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/arch/powerpc/boot/dts/sequoia.dts

https://github.com/aicjofs/android_kernel_lge_v500_20d_f2fs
Device Tree | 412 lines | 348 code | 41 blank | 23 comment | 0 complexity | b9ad9c117ef6c94daa14c2c0c12da48c MD5 | raw file
  1/*
  2 * Device Tree Source for AMCC Sequoia
  3 *
  4 * Based on Bamboo code by Josh Boyer <jwboyer@linux.vnet.ibm.com>
  5 * Copyright (c) 2006, 2007 IBM Corp.
  6 *
  7 * FIXME: Draft only!
  8 *
  9 * This file is licensed under the terms of the GNU General Public
 10 * License version 2.  This program is licensed "as is" without
 11 * any warranty of any kind, whether express or implied.
 12 *
 13 */
 14
 15/dts-v1/;
 16
 17/ {
 18	#address-cells = <2>;
 19	#size-cells = <1>;
 20	model = "amcc,sequoia";
 21	compatible = "amcc,sequoia";
 22	dcr-parent = <&{/cpus/cpu@0}>;
 23
 24	aliases {
 25		ethernet0 = &EMAC0;
 26		ethernet1 = &EMAC1;
 27		serial0 = &UART0;
 28		serial1 = &UART1;
 29		serial2 = &UART2;
 30		serial3 = &UART3;
 31	};
 32
 33	cpus {
 34		#address-cells = <1>;
 35		#size-cells = <0>;
 36
 37		cpu@0 {
 38			device_type = "cpu";
 39			model = "PowerPC,440EPx";
 40			reg = <0x00000000>;
 41			clock-frequency = <0>; /* Filled in by zImage */
 42			timebase-frequency = <0>; /* Filled in by zImage */
 43			i-cache-line-size = <32>;
 44			d-cache-line-size = <32>;
 45			i-cache-size = <32768>;
 46			d-cache-size = <32768>;
 47			dcr-controller;
 48			dcr-access-method = "native";
 49		};
 50	};
 51
 52	memory {
 53		device_type = "memory";
 54		reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
 55	};
 56
 57	UIC0: interrupt-controller0 {
 58		compatible = "ibm,uic-440epx","ibm,uic";
 59		interrupt-controller;
 60		cell-index = <0>;
 61		dcr-reg = <0x0c0 0x009>;
 62		#address-cells = <0>;
 63		#size-cells = <0>;
 64		#interrupt-cells = <2>;
 65	};
 66
 67	UIC1: interrupt-controller1 {
 68		compatible = "ibm,uic-440epx","ibm,uic";
 69		interrupt-controller;
 70		cell-index = <1>;
 71		dcr-reg = <0x0d0 0x009>;
 72		#address-cells = <0>;
 73		#size-cells = <0>;
 74		#interrupt-cells = <2>;
 75		interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
 76		interrupt-parent = <&UIC0>;
 77	};
 78
 79	UIC2: interrupt-controller2 {
 80		compatible = "ibm,uic-440epx","ibm,uic";
 81		interrupt-controller;
 82		cell-index = <2>;
 83		dcr-reg = <0x0e0 0x009>;
 84		#address-cells = <0>;
 85		#size-cells = <0>;
 86		#interrupt-cells = <2>;
 87		interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
 88		interrupt-parent = <&UIC0>;
 89	};
 90
 91	SDR0: sdr {
 92		compatible = "ibm,sdr-440epx", "ibm,sdr-440ep";
 93		dcr-reg = <0x00e 0x002>;
 94	};
 95
 96	CPR0: cpr {
 97		compatible = "ibm,cpr-440epx", "ibm,cpr-440ep";
 98		dcr-reg = <0x00c 0x002>;
 99	};
100
101	plb {
102		compatible = "ibm,plb-440epx", "ibm,plb4";
103		#address-cells = <2>;
104		#size-cells = <1>;
105		ranges;
106		clock-frequency = <0>; /* Filled in by zImage */
107
108		SDRAM0: sdram {
109			compatible = "ibm,sdram-440epx", "ibm,sdram-44x-ddr2denali";
110			dcr-reg = <0x010 0x002>;
111		};
112
113		CRYPTO: crypto@e0100000 {
114			compatible = "amcc,ppc440epx-crypto","amcc,ppc4xx-crypto";
115			reg = <0 0xE0100000 0x80400>;
116			interrupt-parent = <&UIC0>;
117			interrupts = <0x17 0x4>;
118		};
119
120		rng@e0120000 {
121			compatible = "amcc,ppc440epx-rng","amcc,ppc4xx-rng";
122			reg = <0 0xE0120000 0x150>;
123		};
124
125		DMA0: dma {
126			compatible = "ibm,dma-440epx", "ibm,dma-4xx";
127			dcr-reg = <0x100 0x027>;
128		};
129
130		MAL0: mcmal {
131			compatible = "ibm,mcmal-440epx", "ibm,mcmal2";
132			dcr-reg = <0x180 0x062>;
133			num-tx-chans = <2>;
134			num-rx-chans = <2>;
135			interrupt-parent = <&MAL0>;
136			interrupts = <0x0 0x1 0x2 0x3 0x4>;
137			#interrupt-cells = <1>;
138			#address-cells = <0>;
139			#size-cells = <0>;
140			interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
141					/*RXEOB*/ 0x1 &UIC0 0xb 0x4
142					/*SERR*/  0x2 &UIC1 0x0 0x4
143					/*TXDE*/  0x3 &UIC1 0x1 0x4
144					/*RXDE*/  0x4 &UIC1 0x2 0x4>;
145			interrupt-map-mask = <0xffffffff>;
146		};
147
148		USB1: usb@e0000400 {
149			compatible = "ibm,usb-ohci-440epx", "ohci-be";
150			reg = <0x00000000 0xe0000400 0x00000060>;
151			interrupt-parent = <&UIC0>;
152			interrupts = <0x15 0x8>;
153		};
154
155		USB0: ehci@e0000300 {
156			compatible = "ibm,usb-ehci-440epx", "usb-ehci";
157			interrupt-parent = <&UIC0>;
158			interrupts = <0x1a 0x4>;
159			reg = <0x00000000 0xe0000300 0x00000090 0x00000000 0xe0000390 0x00000070>;
160			big-endian;
161		};
162
163		POB0: opb {
164		  	compatible = "ibm,opb-440epx", "ibm,opb";
165			#address-cells = <1>;
166			#size-cells = <1>;
167		  	ranges = <0x00000000 0x00000001 0x00000000 0x80000000
168			          0x80000000 0x00000001 0x80000000 0x80000000>;
169		  	interrupt-parent = <&UIC1>;
170		  	interrupts = <0x7 0x4>;
171		  	clock-frequency = <0>; /* Filled in by zImage */
172
173			EBC0: ebc {
174				compatible = "ibm,ebc-440epx", "ibm,ebc";
175				dcr-reg = <0x012 0x002>;
176				#address-cells = <2>;
177				#size-cells = <1>;
178				clock-frequency = <0>; /* Filled in by zImage */
179				interrupts = <0x5 0x1>;
180				interrupt-parent = <&UIC1>;
181
182				nor_flash@0,0 {
183					compatible = "amd,s29gl256n", "cfi-flash";
184					bank-width = <2>;
185					reg = <0x00000000 0x00000000 0x04000000>;
186					#address-cells = <1>;
187					#size-cells = <1>;
188					partition@0 {
189						label = "Kernel";
190						reg = <0x00000000 0x00180000>;
191					};
192					partition@180000 {
193						label = "ramdisk";
194						reg = <0x00180000 0x00200000>;
195					};
196					partition@380000 {
197						label = "file system";
198						reg = <0x00380000 0x03aa0000>;
199					};
200					partition@3e20000 {
201						label = "kozio";
202						reg = <0x03e20000 0x00140000>;
203					};
204					partition@3f60000 {
205						label = "env";
206						reg = <0x03f60000 0x00040000>;
207					};
208					partition@3fa0000 {
209						label = "u-boot";
210						reg = <0x03fa0000 0x00060000>;
211					};
212				};
213
214				ndfc@3,0 {
215					compatible = "ibm,ndfc";
216					reg = <0x00000003 0x00000000 0x00002000>;
217					ccr = <0x00001000>;
218					bank-settings = <0x80002222>;
219					#address-cells = <1>;
220					#size-cells = <1>;
221
222					nand {
223						#address-cells = <1>;
224						#size-cells = <1>;
225
226						partition@0 {
227							label = "u-boot";
228							reg = <0x00000000 0x00084000>;
229						};
230						partition@84000 {
231							label = "user";
232							reg = <0x00000000 0x01f7c000>;
233						};
234					};
235				};
236			};
237
238			UART0: serial@ef600300 {
239		   		device_type = "serial";
240		   		compatible = "ns16550";
241		   		reg = <0xef600300 0x00000008>;
242		   		virtual-reg = <0xef600300>;
243		   		clock-frequency = <0>; /* Filled in by zImage */
244		   		current-speed = <115200>;
245		   		interrupt-parent = <&UIC0>;
246		   		interrupts = <0x0 0x4>;
247	   		};
248
249			UART1: serial@ef600400 {
250		   		device_type = "serial";
251		   		compatible = "ns16550";
252		   		reg = <0xef600400 0x00000008>;
253		   		virtual-reg = <0xef600400>;
254		   		clock-frequency = <0>;
255		   		current-speed = <0>;
256		   		interrupt-parent = <&UIC0>;
257		   		interrupts = <0x1 0x4>;
258	   		};
259
260			UART2: serial@ef600500 {
261		   		device_type = "serial";
262		   		compatible = "ns16550";
263		   		reg = <0xef600500 0x00000008>;
264		   		virtual-reg = <0xef600500>;
265		   		clock-frequency = <0>;
266		   		current-speed = <0>;
267		   		interrupt-parent = <&UIC1>;
268		   		interrupts = <0x3 0x4>;
269	   		};
270
271			UART3: serial@ef600600 {
272		   		device_type = "serial";
273		   		compatible = "ns16550";
274		   		reg = <0xef600600 0x00000008>;
275		   		virtual-reg = <0xef600600>;
276		   		clock-frequency = <0>;
277		   		current-speed = <0>;
278		   		interrupt-parent = <&UIC1>;
279		   		interrupts = <0x4 0x4>;
280	   		};
281
282			IIC0: i2c@ef600700 {
283				#address-cells = <1>;
284				#size-cells = <0>;
285				compatible = "ibm,iic-440epx", "ibm,iic";
286				reg = <0xef600700 0x00000014>;
287				interrupt-parent = <&UIC0>;
288				interrupts = <0x2 0x4>;
289
290				hwmon@48 {
291					compatible = "adi,ad7414";
292					reg = <0x48>;
293				};
294			};
295
296			IIC1: i2c@ef600800 {
297				#address-cells = <1>;
298				#size-cells = <0>;
299				compatible = "ibm,iic-440epx", "ibm,iic";
300				reg = <0xef600800 0x00000014>;
301				interrupt-parent = <&UIC0>;
302				interrupts = <0x7 0x4>;
303			};
304
305			ZMII0: emac-zmii@ef600d00 {
306				compatible = "ibm,zmii-440epx", "ibm,zmii";
307				reg = <0xef600d00 0x0000000c>;
308			};
309
310			RGMII0: emac-rgmii@ef601000 {
311				compatible = "ibm,rgmii-440epx", "ibm,rgmii";
312				reg = <0xef601000 0x00000008>;
313				has-mdio;
314			};
315
316			EMAC0: ethernet@ef600e00 {
317				device_type = "network";
318				compatible = "ibm,emac-440epx", "ibm,emac4";
319				interrupt-parent = <&EMAC0>;
320				interrupts = <0x0 0x1>;
321				#interrupt-cells = <1>;
322				#address-cells = <0>;
323				#size-cells = <0>;
324				interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
325						/*Wake*/  0x1 &UIC1 0x1d 0x4>;
326				reg = <0xef600e00 0x00000074>;
327				local-mac-address = [000000000000];
328				mal-device = <&MAL0>;
329				mal-tx-channel = <0>;
330				mal-rx-channel = <0>;
331				cell-index = <0>;
332				max-frame-size = <9000>;
333				rx-fifo-size = <4096>;
334				tx-fifo-size = <2048>;
335				phy-mode = "rgmii";
336				phy-map = <0x00000000>;
337				zmii-device = <&ZMII0>;
338				zmii-channel = <0>;
339				rgmii-device = <&RGMII0>;
340				rgmii-channel = <0>;
341				has-inverted-stacr-oc;
342				has-new-stacr-staopc;
343			};
344
345			EMAC1: ethernet@ef600f00 {
346				device_type = "network";
347				compatible = "ibm,emac-440epx", "ibm,emac4";
348				interrupt-parent = <&EMAC1>;
349				interrupts = <0x0 0x1>;
350				#interrupt-cells = <1>;
351				#address-cells = <0>;
352				#size-cells = <0>;
353				interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4
354						/*Wake*/  0x1 &UIC1 0x1f 0x4>;
355				reg = <0xef600f00 0x00000074>;
356				local-mac-address = [000000000000];
357				mal-device = <&MAL0>;
358				mal-tx-channel = <1>;
359				mal-rx-channel = <1>;
360				cell-index = <1>;
361				max-frame-size = <9000>;
362				rx-fifo-size = <4096>;
363				tx-fifo-size = <2048>;
364				phy-mode = "rgmii";
365				phy-map = <0x00000000>;
366				zmii-device = <&ZMII0>;
367				zmii-channel = <1>;
368				rgmii-device = <&RGMII0>;
369				rgmii-channel = <1>;
370				has-inverted-stacr-oc;
371				has-new-stacr-staopc;
372			};
373		};
374
375		PCI0: pci@1ec000000 {
376			device_type = "pci";
377			#interrupt-cells = <1>;
378			#size-cells = <2>;
379			#address-cells = <3>;
380			compatible = "ibm,plb440epx-pci", "ibm,plb-pci";
381			primary;
382			reg = <0x00000001 0xeec00000 0x00000008	/* Config space access */
383			       0x00000001 0xeed00000 0x00000004	/* IACK */
384			       0x00000001 0xeed00000 0x00000004	/* Special cycle */
385			       0x00000001 0xef400000 0x00000040>;	/* Internal registers */
386
387			/* Outbound ranges, one memory and one IO,
388			 * later cannot be changed. Chip supports a second
389			 * IO range but we don't use it for now
390			 * From the 440EPx user manual:
391			 * PCI 1 Memory     1 8000 0000     1 BFFF FFFF     1GB
392			 * I/O              1 E800 0000     1 E800 FFFF     64KB
393			 * I/O              1 E880 0000     1 EBFF FFFF     56MB
394			 */
395			ranges = <0x02000000 0x00000000 0x80000000 0x00000001 0x80000000 0x00000000 0x40000000
396				0x01000000 0x00000000 0x00000000 0x00000001 0xe8000000 0x00000000 0x00010000
397				0x01000000 0x00000000 0x00000000 0x00000001 0xe8800000 0x00000000 0x03800000>;
398
399			/* Inbound 2GB range starting at 0 */
400			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
401
402			/* All PCI interrupts are routed to IRQ 67 */
403			interrupt-map-mask = <0x0 0x0 0x0 0x0>;
404			interrupt-map = < 0x0 0x0 0x0 0x0 &UIC2 0x3 0x8 >;
405		};
406	};
407
408	chosen {
409		linux,stdout-path = "/plb/opb/serial@ef600300";
410		bootargs = "console=ttyS0,115200";
411	};
412};