PageRenderTime 16ms CodeModel.GetById 12ms app.highlight 1ms RepoModel.GetById 1ms app.codeStats 0ms

/arch/powerpc/boot/dts/walnut.dts

https://github.com/aicjofs/android_kernel_lge_v500_20d_f2fs
Device Tree | 246 lines | 189 code | 32 blank | 25 comment | 0 complexity | dff04d002af53fbabebef29862a1c1dd MD5 | raw file
  1/*
  2 * Device Tree Source for IBM Walnut
  3 *
  4 * Copyright 2007 IBM Corp.
  5 * Josh Boyer <jwboyer@linux.vnet.ibm.com>
  6 *
  7 * This file is licensed under the terms of the GNU General Public
  8 * License version 2.  This program is licensed "as is" without
  9 * any warranty of any kind, whether express or implied.
 10 */
 11
 12/dts-v1/;
 13
 14/ {
 15	#address-cells = <1>;
 16	#size-cells = <1>;
 17	model = "ibm,walnut";
 18	compatible = "ibm,walnut";
 19	dcr-parent = <&{/cpus/cpu@0}>;
 20
 21	aliases {
 22		ethernet0 = &EMAC;
 23		serial0 = &UART0;
 24		serial1 = &UART1;
 25	};
 26
 27	cpus {
 28		#address-cells = <1>;
 29		#size-cells = <0>;
 30
 31		cpu@0 {
 32			device_type = "cpu";
 33			model = "PowerPC,405GP";
 34			reg = <0x00000000>;
 35			clock-frequency = <200000000>; /* Filled in by zImage */
 36			timebase-frequency = <0>; /* Filled in by zImage */
 37			i-cache-line-size = <32>;
 38			d-cache-line-size = <32>;
 39			i-cache-size = <16384>;
 40			d-cache-size = <16384>;
 41			dcr-controller;
 42			dcr-access-method = "native";
 43		};
 44	};
 45
 46	memory {
 47		device_type = "memory";
 48		reg = <0x00000000 0x00000000>; /* Filled in by zImage */
 49	};
 50
 51	UIC0: interrupt-controller {
 52		compatible = "ibm,uic";
 53		interrupt-controller;
 54		cell-index = <0>;
 55		dcr-reg = <0x0c0 0x009>;
 56		#address-cells = <0>;
 57		#size-cells = <0>;
 58		#interrupt-cells = <2>;
 59	};
 60
 61	plb {
 62		compatible = "ibm,plb3";
 63		#address-cells = <1>;
 64		#size-cells = <1>;
 65		ranges;
 66		clock-frequency = <0>; /* Filled in by zImage */
 67
 68		SDRAM0: memory-controller {
 69			compatible = "ibm,sdram-405gp";
 70			dcr-reg = <0x010 0x002>;
 71		};
 72
 73		MAL: mcmal {
 74			compatible = "ibm,mcmal-405gp", "ibm,mcmal";
 75			dcr-reg = <0x180 0x062>;
 76			num-tx-chans = <1>;
 77			num-rx-chans = <1>;
 78			interrupt-parent = <&UIC0>;
 79			interrupts = <
 80				0xb 0x4 /* TXEOB */
 81				0xc 0x4 /* RXEOB */
 82				0xa 0x4 /* SERR */
 83				0xd 0x4 /* TXDE */
 84				0xe 0x4 /* RXDE */>;
 85		};
 86
 87		POB0: opb {
 88			compatible = "ibm,opb-405gp", "ibm,opb";
 89			#address-cells = <1>;
 90			#size-cells = <1>;
 91			ranges = <0xef600000 0xef600000 0x00a00000>;
 92			dcr-reg = <0x0a0 0x005>;
 93			clock-frequency = <0>; /* Filled in by zImage */
 94
 95			UART0: serial@ef600300 {
 96				device_type = "serial";
 97				compatible = "ns16550";
 98				reg = <0xef600300 0x00000008>;
 99				virtual-reg = <0xef600300>;
100				clock-frequency = <0>; /* Filled in by zImage */
101				current-speed = <9600>;
102				interrupt-parent = <&UIC0>;
103				interrupts = <0x0 0x4>;
104			};
105
106			UART1: serial@ef600400 {
107				device_type = "serial";
108				compatible = "ns16550";
109				reg = <0xef600400 0x00000008>;
110				virtual-reg = <0xef600400>;
111				clock-frequency = <0>; /* Filled in by zImage */
112				current-speed = <9600>;
113				interrupt-parent = <&UIC0>;
114				interrupts = <0x1 0x4>;
115			};
116
117			IIC: i2c@ef600500 {
118				compatible = "ibm,iic-405gp", "ibm,iic";
119				reg = <0xef600500 0x00000011>;
120				interrupt-parent = <&UIC0>;
121				interrupts = <0x2 0x4>;
122			};
123
124			GPIO: gpio@ef600700 {
125				compatible = "ibm,gpio-405gp";
126				reg = <0xef600700 0x00000020>;
127			};
128
129			EMAC: ethernet@ef600800 {
130				device_type = "network";
131				compatible = "ibm,emac-405gp", "ibm,emac";
132				interrupt-parent = <&UIC0>;
133				interrupts = <
134					0xf 0x4 /* Ethernet */
135					0x9 0x4 /* Ethernet Wake Up */>;
136				local-mac-address = [000000000000]; /* Filled in by zImage */
137				reg = <0xef600800 0x00000070>;
138				mal-device = <&MAL>;
139				mal-tx-channel = <0>;
140				mal-rx-channel = <0>;
141				cell-index = <0>;
142				max-frame-size = <1500>;
143				rx-fifo-size = <4096>;
144				tx-fifo-size = <2048>;
145				phy-mode = "rmii";
146				phy-map = <0x00000001>;
147			};
148
149		};
150
151		EBC0: ebc {
152			compatible = "ibm,ebc-405gp", "ibm,ebc";
153			dcr-reg = <0x012 0x002>;
154			#address-cells = <2>;
155			#size-cells = <1>;
156			/* The ranges property is supplied by the bootwrapper
157			 * and is based on the firmware's configuration of the
158			 * EBC bridge
159			 */
160			clock-frequency = <0>; /* Filled in by zImage */
161
162			sram@0,0 {
163				reg = <0x00000000 0x00000000 0x00080000>;
164			};
165
166			flash@0,80000 {
167				compatible = "jedec-flash";
168				bank-width = <1>;
169				reg = <0x00000000 0x00080000 0x00080000>;
170				#address-cells = <1>;
171				#size-cells = <1>;
172				partition@0 {
173					label = "OpenBIOS";
174					reg = <0x00000000 0x00080000>;
175					read-only;
176				};
177			};
178
179			nvram@1,0 {
180				/* NVRAM and RTC */
181				compatible = "ds1743-nvram";
182				#bytes = <0x2000>;
183				reg = <0x00000001 0x00000000 0x00002000>;
184			};
185
186			keyboard@2,0 {
187				compatible = "intel,82C42PC";
188				reg = <0x00000002 0x00000000 0x00000002>;
189			};
190
191			ir@3,0 {
192				compatible = "ti,TIR2000PAG";
193				reg = <0x00000003 0x00000000 0x00000010>;
194			};
195
196			fpga@7,0 {
197				compatible = "Walnut-FPGA";
198				reg = <0x00000007 0x00000000 0x00000010>;
199				virtual-reg = <0xf0300005>;
200			};
201		};
202
203		PCI0: pci@ec000000 {
204			device_type = "pci";
205			#interrupt-cells = <1>;
206			#size-cells = <2>;
207			#address-cells = <3>;
208			compatible = "ibm,plb405gp-pci", "ibm,plb-pci";
209			primary;
210			reg = <0xeec00000 0x00000008	/* Config space access */
211			       0xeed80000 0x00000004	/* IACK */
212			       0xeed80000 0x00000004	/* Special cycle */
213			       0xef480000 0x00000040>;	/* Internal registers */
214
215			/* Outbound ranges, one memory and one IO,
216			 * later cannot be changed. Chip supports a second
217			 * IO range but we don't use it for now
218			 */
219			ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
220				  0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
221
222			/* Inbound 2GB range starting at 0 */
223			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
224
225			/* Walnut has all 4 IRQ pins tied together per slot */
226			interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
227			interrupt-map = <
228				/* IDSEL 1 */
229				0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8
230
231				/* IDSEL 2 */
232				0x1000 0x0 0x0 0x0 &UIC0 0x1d 0x8
233
234				/* IDSEL 3 */
235				0x1800 0x0 0x0 0x0 &UIC0 0x1e 0x8
236
237				/* IDSEL 4 */
238				0x2000 0x0 0x0 0x0 &UIC0 0x1f 0x8
239			>;
240		};
241	};
242
243	chosen {
244		linux,stdout-path = "/plb/opb/serial@ef600300";
245	};
246};