/arch/arm/mach-omap2/omap_hwmod.c

https://github.com/AICP/kernel_asus_grouper · C · 2667 lines · 1327 code · 420 blank · 920 comment · 323 complexity · ab8c59af5c0f55d1fc49fa74e236d2f5 MD5 · raw file

Large files are truncated click here to view the full file

  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2011 Nokia Corporation
  5. * Copyright (C) 2011 Texas Instruments, Inc.
  6. *
  7. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  8. *
  9. * Created in collaboration with (alphabetical order): Thara Gopinath,
  10. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  11. * Sawant, Santosh Shilimkar, Richard Woodruff
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. *
  17. * Introduction
  18. * ------------
  19. * One way to view an OMAP SoC is as a collection of largely unrelated
  20. * IP blocks connected by interconnects. The IP blocks include
  21. * devices such as ARM processors, audio serial interfaces, UARTs,
  22. * etc. Some of these devices, like the DSP, are created by TI;
  23. * others, like the SGX, largely originate from external vendors. In
  24. * TI's documentation, on-chip devices are referred to as "OMAP
  25. * modules." Some of these IP blocks are identical across several
  26. * OMAP versions. Others are revised frequently.
  27. *
  28. * These OMAP modules are tied together by various interconnects.
  29. * Most of the address and data flow between modules is via OCP-based
  30. * interconnects such as the L3 and L4 buses; but there are other
  31. * interconnects that distribute the hardware clock tree, handle idle
  32. * and reset signaling, supply power, and connect the modules to
  33. * various pads or balls on the OMAP package.
  34. *
  35. * OMAP hwmod provides a consistent way to describe the on-chip
  36. * hardware blocks and their integration into the rest of the chip.
  37. * This description can be automatically generated from the TI
  38. * hardware database. OMAP hwmod provides a standard, consistent API
  39. * to reset, enable, idle, and disable these hardware blocks. And
  40. * hwmod provides a way for other core code, such as the Linux device
  41. * code or the OMAP power management and address space mapping code,
  42. * to query the hardware database.
  43. *
  44. * Using hwmod
  45. * -----------
  46. * Drivers won't call hwmod functions directly. That is done by the
  47. * omap_device code, and in rare occasions, by custom integration code
  48. * in arch/arm/ *omap*. The omap_device code includes functions to
  49. * build a struct platform_device using omap_hwmod data, and that is
  50. * currently how hwmod data is communicated to drivers and to the
  51. * Linux driver model. Most drivers will call omap_hwmod functions only
  52. * indirectly, via pm_runtime*() functions.
  53. *
  54. * From a layering perspective, here is where the OMAP hwmod code
  55. * fits into the kernel software stack:
  56. *
  57. * +-------------------------------+
  58. * | Device driver code |
  59. * | (e.g., drivers/) |
  60. * +-------------------------------+
  61. * | Linux driver model |
  62. * | (platform_device / |
  63. * | platform_driver data/code) |
  64. * +-------------------------------+
  65. * | OMAP core-driver integration |
  66. * |(arch/arm/mach-omap2/devices.c)|
  67. * +-------------------------------+
  68. * | omap_device code |
  69. * | (../plat-omap/omap_device.c) |
  70. * +-------------------------------+
  71. * ----> | omap_hwmod code/data | <-----
  72. * | (../mach-omap2/omap_hwmod*) |
  73. * +-------------------------------+
  74. * | OMAP clock/PRCM/register fns |
  75. * | (__raw_{read,write}l, clk*) |
  76. * +-------------------------------+
  77. *
  78. * Device drivers should not contain any OMAP-specific code or data in
  79. * them. They should only contain code to operate the IP block that
  80. * the driver is responsible for. This is because these IP blocks can
  81. * also appear in other SoCs, either from TI (such as DaVinci) or from
  82. * other manufacturers; and drivers should be reusable across other
  83. * platforms.
  84. *
  85. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  86. * devices upon boot. The goal here is for the kernel to be
  87. * completely self-reliant and independent from bootloaders. This is
  88. * to ensure a repeatable configuration, both to ensure consistent
  89. * runtime behavior, and to make it easier for others to reproduce
  90. * bugs.
  91. *
  92. * OMAP module activity states
  93. * ---------------------------
  94. * The hwmod code considers modules to be in one of several activity
  95. * states. IP blocks start out in an UNKNOWN state, then once they
  96. * are registered via the hwmod code, proceed to the REGISTERED state.
  97. * Once their clock names are resolved to clock pointers, the module
  98. * enters the CLKS_INITED state; and finally, once the module has been
  99. * reset and the integration registers programmed, the INITIALIZED state
  100. * is entered. The hwmod code will then place the module into either
  101. * the IDLE state to save power, or in the case of a critical system
  102. * module, the ENABLED state.
  103. *
  104. * OMAP core integration code can then call omap_hwmod*() functions
  105. * directly to move the module between the IDLE, ENABLED, and DISABLED
  106. * states, as needed. This is done during both the PM idle loop, and
  107. * in the OMAP core integration code's implementation of the PM runtime
  108. * functions.
  109. *
  110. * References
  111. * ----------
  112. * This is a partial list.
  113. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  114. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  115. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  116. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  117. * - Open Core Protocol Specification 2.2
  118. *
  119. * To do:
  120. * - handle IO mapping
  121. * - bus throughput & module latency measurement code
  122. *
  123. * XXX add tests at the beginning of each function to ensure the hwmod is
  124. * in the appropriate state
  125. * XXX error return values should be checked to ensure that they are
  126. * appropriate
  127. */
  128. #undef DEBUG
  129. #include <linux/kernel.h>
  130. #include <linux/errno.h>
  131. #include <linux/io.h>
  132. #include <linux/clk.h>
  133. #include <linux/delay.h>
  134. #include <linux/err.h>
  135. #include <linux/list.h>
  136. #include <linux/mutex.h>
  137. #include <linux/spinlock.h>
  138. #include <plat/common.h>
  139. #include <plat/cpu.h>
  140. #include "clockdomain.h"
  141. #include "powerdomain.h"
  142. #include <plat/clock.h>
  143. #include <plat/omap_hwmod.h>
  144. #include <plat/prcm.h>
  145. #include "cm2xxx_3xxx.h"
  146. #include "cminst44xx.h"
  147. #include "prm2xxx_3xxx.h"
  148. #include "prm44xx.h"
  149. #include "prminst44xx.h"
  150. #include "mux.h"
  151. /* Maximum microseconds to wait for OMAP module to softreset */
  152. #define MAX_MODULE_SOFTRESET_WAIT 10000
  153. /* Name of the OMAP hwmod for the MPU */
  154. #define MPU_INITIATOR_NAME "mpu"
  155. /* omap_hwmod_list contains all registered struct omap_hwmods */
  156. static LIST_HEAD(omap_hwmod_list);
  157. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  158. static struct omap_hwmod *mpu_oh;
  159. /* Private functions */
  160. /**
  161. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  162. * @oh: struct omap_hwmod *
  163. *
  164. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  165. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  166. * OCP_SYSCONFIG register or 0 upon success.
  167. */
  168. static int _update_sysc_cache(struct omap_hwmod *oh)
  169. {
  170. if (!oh->class->sysc) {
  171. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  172. return -EINVAL;
  173. }
  174. /* XXX ensure module interface clock is up */
  175. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  176. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  177. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  178. return 0;
  179. }
  180. /**
  181. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  182. * @v: OCP_SYSCONFIG value to write
  183. * @oh: struct omap_hwmod *
  184. *
  185. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  186. * one. No return value.
  187. */
  188. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  189. {
  190. if (!oh->class->sysc) {
  191. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  192. return;
  193. }
  194. /* XXX ensure module interface clock is up */
  195. /* Module might have lost context, always update cache and register */
  196. oh->_sysc_cache = v;
  197. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  198. }
  199. /**
  200. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  201. * @oh: struct omap_hwmod *
  202. * @standbymode: MIDLEMODE field bits
  203. * @v: pointer to register contents to modify
  204. *
  205. * Update the master standby mode bits in @v to be @standbymode for
  206. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  207. * upon error or 0 upon success.
  208. */
  209. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  210. u32 *v)
  211. {
  212. u32 mstandby_mask;
  213. u8 mstandby_shift;
  214. if (!oh->class->sysc ||
  215. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  216. return -EINVAL;
  217. if (!oh->class->sysc->sysc_fields) {
  218. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  219. return -EINVAL;
  220. }
  221. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  222. mstandby_mask = (0x3 << mstandby_shift);
  223. *v &= ~mstandby_mask;
  224. *v |= __ffs(standbymode) << mstandby_shift;
  225. return 0;
  226. }
  227. /**
  228. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  229. * @oh: struct omap_hwmod *
  230. * @idlemode: SIDLEMODE field bits
  231. * @v: pointer to register contents to modify
  232. *
  233. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  234. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  235. * or 0 upon success.
  236. */
  237. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  238. {
  239. u32 sidle_mask;
  240. u8 sidle_shift;
  241. if (!oh->class->sysc ||
  242. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  243. return -EINVAL;
  244. if (!oh->class->sysc->sysc_fields) {
  245. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  246. return -EINVAL;
  247. }
  248. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  249. sidle_mask = (0x3 << sidle_shift);
  250. *v &= ~sidle_mask;
  251. *v |= __ffs(idlemode) << sidle_shift;
  252. return 0;
  253. }
  254. /**
  255. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  256. * @oh: struct omap_hwmod *
  257. * @clockact: CLOCKACTIVITY field bits
  258. * @v: pointer to register contents to modify
  259. *
  260. * Update the clockactivity mode bits in @v to be @clockact for the
  261. * @oh hwmod. Used for additional powersaving on some modules. Does
  262. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  263. * success.
  264. */
  265. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  266. {
  267. u32 clkact_mask;
  268. u8 clkact_shift;
  269. if (!oh->class->sysc ||
  270. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  271. return -EINVAL;
  272. if (!oh->class->sysc->sysc_fields) {
  273. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  274. return -EINVAL;
  275. }
  276. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  277. clkact_mask = (0x3 << clkact_shift);
  278. *v &= ~clkact_mask;
  279. *v |= clockact << clkact_shift;
  280. return 0;
  281. }
  282. /**
  283. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  284. * @oh: struct omap_hwmod *
  285. * @v: pointer to register contents to modify
  286. *
  287. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  288. * error or 0 upon success.
  289. */
  290. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  291. {
  292. u32 softrst_mask;
  293. if (!oh->class->sysc ||
  294. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  295. return -EINVAL;
  296. if (!oh->class->sysc->sysc_fields) {
  297. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  298. return -EINVAL;
  299. }
  300. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  301. *v |= softrst_mask;
  302. return 0;
  303. }
  304. /**
  305. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  306. * @oh: struct omap_hwmod *
  307. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  308. * @v: pointer to register contents to modify
  309. *
  310. * Update the module autoidle bit in @v to be @autoidle for the @oh
  311. * hwmod. The autoidle bit controls whether the module can gate
  312. * internal clocks automatically when it isn't doing anything; the
  313. * exact function of this bit varies on a per-module basis. This
  314. * function does not write to the hardware. Returns -EINVAL upon
  315. * error or 0 upon success.
  316. */
  317. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  318. u32 *v)
  319. {
  320. u32 autoidle_mask;
  321. u8 autoidle_shift;
  322. if (!oh->class->sysc ||
  323. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  324. return -EINVAL;
  325. if (!oh->class->sysc->sysc_fields) {
  326. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  327. return -EINVAL;
  328. }
  329. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  330. autoidle_mask = (0x1 << autoidle_shift);
  331. *v &= ~autoidle_mask;
  332. *v |= autoidle << autoidle_shift;
  333. return 0;
  334. }
  335. /**
  336. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  337. * @oh: struct omap_hwmod *
  338. *
  339. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  340. * upon error or 0 upon success.
  341. */
  342. static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  343. {
  344. if (!oh->class->sysc ||
  345. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  346. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  347. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  348. return -EINVAL;
  349. if (!oh->class->sysc->sysc_fields) {
  350. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  351. return -EINVAL;
  352. }
  353. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  354. *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
  355. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  356. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  357. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  358. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  359. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  360. oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
  361. return 0;
  362. }
  363. /**
  364. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  365. * @oh: struct omap_hwmod *
  366. *
  367. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  368. * upon error or 0 upon success.
  369. */
  370. static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
  371. {
  372. if (!oh->class->sysc ||
  373. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  374. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  375. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  376. return -EINVAL;
  377. if (!oh->class->sysc->sysc_fields) {
  378. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  379. return -EINVAL;
  380. }
  381. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  382. *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  383. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  384. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
  385. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  386. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  387. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  388. oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
  389. return 0;
  390. }
  391. /**
  392. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  393. * @oh: struct omap_hwmod *
  394. *
  395. * Prevent the hardware module @oh from entering idle while the
  396. * hardare module initiator @init_oh is active. Useful when a module
  397. * will be accessed by a particular initiator (e.g., if a module will
  398. * be accessed by the IVA, there should be a sleepdep between the IVA
  399. * initiator and the module). Only applies to modules in smart-idle
  400. * mode. If the clockdomain is marked as not needing autodeps, return
  401. * 0 without doing anything. Otherwise, returns -EINVAL upon error or
  402. * passes along clkdm_add_sleepdep() value upon success.
  403. */
  404. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  405. {
  406. if (!oh->_clk)
  407. return -EINVAL;
  408. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  409. return 0;
  410. return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  411. }
  412. /**
  413. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  414. * @oh: struct omap_hwmod *
  415. *
  416. * Allow the hardware module @oh to enter idle while the hardare
  417. * module initiator @init_oh is active. Useful when a module will not
  418. * be accessed by a particular initiator (e.g., if a module will not
  419. * be accessed by the IVA, there should be no sleepdep between the IVA
  420. * initiator and the module). Only applies to modules in smart-idle
  421. * mode. If the clockdomain is marked as not needing autodeps, return
  422. * 0 without doing anything. Returns -EINVAL upon error or passes
  423. * along clkdm_del_sleepdep() value upon success.
  424. */
  425. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  426. {
  427. if (!oh->_clk)
  428. return -EINVAL;
  429. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  430. return 0;
  431. return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  432. }
  433. /**
  434. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  435. * @oh: struct omap_hwmod *
  436. *
  437. * Called from _init_clocks(). Populates the @oh _clk (main
  438. * functional clock pointer) if a main_clk is present. Returns 0 on
  439. * success or -EINVAL on error.
  440. */
  441. static int _init_main_clk(struct omap_hwmod *oh)
  442. {
  443. int ret = 0;
  444. if (!oh->main_clk)
  445. return 0;
  446. oh->_clk = omap_clk_get_by_name(oh->main_clk);
  447. if (!oh->_clk) {
  448. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  449. oh->name, oh->main_clk);
  450. return -EINVAL;
  451. }
  452. if (!oh->_clk->clkdm)
  453. pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
  454. oh->main_clk, oh->_clk->name);
  455. return ret;
  456. }
  457. /**
  458. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  459. * @oh: struct omap_hwmod *
  460. *
  461. * Called from _init_clocks(). Populates the @oh OCP slave interface
  462. * clock pointers. Returns 0 on success or -EINVAL on error.
  463. */
  464. static int _init_interface_clks(struct omap_hwmod *oh)
  465. {
  466. struct clk *c;
  467. int i;
  468. int ret = 0;
  469. if (oh->slaves_cnt == 0)
  470. return 0;
  471. for (i = 0; i < oh->slaves_cnt; i++) {
  472. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  473. if (!os->clk)
  474. continue;
  475. c = omap_clk_get_by_name(os->clk);
  476. if (!c) {
  477. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  478. oh->name, os->clk);
  479. ret = -EINVAL;
  480. }
  481. os->_clk = c;
  482. }
  483. return ret;
  484. }
  485. /**
  486. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  487. * @oh: struct omap_hwmod *
  488. *
  489. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  490. * clock pointers. Returns 0 on success or -EINVAL on error.
  491. */
  492. static int _init_opt_clks(struct omap_hwmod *oh)
  493. {
  494. struct omap_hwmod_opt_clk *oc;
  495. struct clk *c;
  496. int i;
  497. int ret = 0;
  498. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  499. c = omap_clk_get_by_name(oc->clk);
  500. if (!c) {
  501. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  502. oh->name, oc->clk);
  503. ret = -EINVAL;
  504. }
  505. oc->_clk = c;
  506. }
  507. return ret;
  508. }
  509. /**
  510. * _enable_clocks - enable hwmod main clock and interface clocks
  511. * @oh: struct omap_hwmod *
  512. *
  513. * Enables all clocks necessary for register reads and writes to succeed
  514. * on the hwmod @oh. Returns 0.
  515. */
  516. static int _enable_clocks(struct omap_hwmod *oh)
  517. {
  518. int i;
  519. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  520. if (oh->_clk)
  521. clk_enable(oh->_clk);
  522. if (oh->slaves_cnt > 0) {
  523. for (i = 0; i < oh->slaves_cnt; i++) {
  524. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  525. struct clk *c = os->_clk;
  526. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  527. clk_enable(c);
  528. }
  529. }
  530. /* The opt clocks are controlled by the device driver. */
  531. return 0;
  532. }
  533. /**
  534. * _disable_clocks - disable hwmod main clock and interface clocks
  535. * @oh: struct omap_hwmod *
  536. *
  537. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  538. */
  539. static int _disable_clocks(struct omap_hwmod *oh)
  540. {
  541. int i;
  542. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  543. if (oh->_clk)
  544. clk_disable(oh->_clk);
  545. if (oh->slaves_cnt > 0) {
  546. for (i = 0; i < oh->slaves_cnt; i++) {
  547. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  548. struct clk *c = os->_clk;
  549. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  550. clk_disable(c);
  551. }
  552. }
  553. /* The opt clocks are controlled by the device driver. */
  554. return 0;
  555. }
  556. static void _enable_optional_clocks(struct omap_hwmod *oh)
  557. {
  558. struct omap_hwmod_opt_clk *oc;
  559. int i;
  560. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  561. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  562. if (oc->_clk) {
  563. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  564. oc->_clk->name);
  565. clk_enable(oc->_clk);
  566. }
  567. }
  568. static void _disable_optional_clocks(struct omap_hwmod *oh)
  569. {
  570. struct omap_hwmod_opt_clk *oc;
  571. int i;
  572. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  573. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  574. if (oc->_clk) {
  575. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  576. oc->_clk->name);
  577. clk_disable(oc->_clk);
  578. }
  579. }
  580. /**
  581. * _enable_module - enable CLKCTRL modulemode on OMAP4
  582. * @oh: struct omap_hwmod *
  583. *
  584. * Enables the PRCM module mode related to the hwmod @oh.
  585. * No return value.
  586. */
  587. static void _enable_module(struct omap_hwmod *oh)
  588. {
  589. /* The module mode does not exist prior OMAP4 */
  590. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  591. return;
  592. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  593. return;
  594. pr_debug("omap_hwmod: %s: _enable_module: %d\n",
  595. oh->name, oh->prcm.omap4.modulemode);
  596. omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
  597. oh->clkdm->prcm_partition,
  598. oh->clkdm->cm_inst,
  599. oh->clkdm->clkdm_offs,
  600. oh->prcm.omap4.clkctrl_offs);
  601. }
  602. /**
  603. * _disable_module - enable CLKCTRL modulemode on OMAP4
  604. * @oh: struct omap_hwmod *
  605. *
  606. * Disable the PRCM module mode related to the hwmod @oh.
  607. * No return value.
  608. */
  609. static void _disable_module(struct omap_hwmod *oh)
  610. {
  611. /* The module mode does not exist prior OMAP4 */
  612. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  613. return;
  614. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  615. return;
  616. pr_debug("omap_hwmod: %s: _disable_module\n", oh->name);
  617. omap4_cminst_module_disable(oh->clkdm->prcm_partition,
  618. oh->clkdm->cm_inst,
  619. oh->clkdm->clkdm_offs,
  620. oh->prcm.omap4.clkctrl_offs);
  621. }
  622. /**
  623. * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
  624. * @oh: struct omap_hwmod *oh
  625. *
  626. * Count and return the number of MPU IRQs associated with the hwmod
  627. * @oh. Used to allocate struct resource data. Returns 0 if @oh is
  628. * NULL.
  629. */
  630. static int _count_mpu_irqs(struct omap_hwmod *oh)
  631. {
  632. struct omap_hwmod_irq_info *ohii;
  633. int i = 0;
  634. if (!oh || !oh->mpu_irqs)
  635. return 0;
  636. do {
  637. ohii = &oh->mpu_irqs[i++];
  638. } while (ohii->irq != -1);
  639. return i-1;
  640. }
  641. /**
  642. * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
  643. * @oh: struct omap_hwmod *oh
  644. *
  645. * Count and return the number of SDMA request lines associated with
  646. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  647. * if @oh is NULL.
  648. */
  649. static int _count_sdma_reqs(struct omap_hwmod *oh)
  650. {
  651. struct omap_hwmod_dma_info *ohdi;
  652. int i = 0;
  653. if (!oh || !oh->sdma_reqs)
  654. return 0;
  655. do {
  656. ohdi = &oh->sdma_reqs[i++];
  657. } while (ohdi->dma_req != -1);
  658. return i-1;
  659. }
  660. /**
  661. * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
  662. * @oh: struct omap_hwmod *oh
  663. *
  664. * Count and return the number of address space ranges associated with
  665. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  666. * if @oh is NULL.
  667. */
  668. static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
  669. {
  670. struct omap_hwmod_addr_space *mem;
  671. int i = 0;
  672. if (!os || !os->addr)
  673. return 0;
  674. do {
  675. mem = &os->addr[i++];
  676. } while (mem->pa_start != mem->pa_end);
  677. return i-1;
  678. }
  679. /**
  680. * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
  681. * @oh: struct omap_hwmod *
  682. *
  683. * Returns the array index of the OCP slave port that the MPU
  684. * addresses the device on, or -EINVAL upon error or not found.
  685. */
  686. static int __init _find_mpu_port_index(struct omap_hwmod *oh)
  687. {
  688. int i;
  689. int found = 0;
  690. if (!oh || oh->slaves_cnt == 0)
  691. return -EINVAL;
  692. for (i = 0; i < oh->slaves_cnt; i++) {
  693. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  694. if (os->user & OCP_USER_MPU) {
  695. found = 1;
  696. break;
  697. }
  698. }
  699. if (found)
  700. pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
  701. oh->name, i);
  702. else
  703. pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
  704. oh->name);
  705. return (found) ? i : -EINVAL;
  706. }
  707. /**
  708. * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
  709. * @oh: struct omap_hwmod *
  710. *
  711. * Return the virtual address of the base of the register target of
  712. * device @oh, or NULL on error.
  713. */
  714. static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
  715. {
  716. struct omap_hwmod_ocp_if *os;
  717. struct omap_hwmod_addr_space *mem;
  718. int i = 0, found = 0;
  719. void __iomem *va_start;
  720. if (!oh || oh->slaves_cnt == 0)
  721. return NULL;
  722. os = oh->slaves[index];
  723. if (!os->addr)
  724. return NULL;
  725. do {
  726. mem = &os->addr[i++];
  727. if (mem->flags & ADDR_TYPE_RT)
  728. found = 1;
  729. } while (!found && mem->pa_start != mem->pa_end);
  730. if (found) {
  731. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  732. if (!va_start) {
  733. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  734. return NULL;
  735. }
  736. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  737. oh->name, va_start);
  738. } else {
  739. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  740. oh->name);
  741. }
  742. return (found) ? va_start : NULL;
  743. }
  744. /**
  745. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  746. * @oh: struct omap_hwmod *
  747. *
  748. * If module is marked as SWSUP_SIDLE, force the module out of slave
  749. * idle; otherwise, configure it for smart-idle. If module is marked
  750. * as SWSUP_MSUSPEND, force the module out of master standby;
  751. * otherwise, configure it for smart-standby. No return value.
  752. */
  753. static void _enable_sysc(struct omap_hwmod *oh)
  754. {
  755. u8 idlemode, sf;
  756. u32 v;
  757. if (!oh->class->sysc)
  758. return;
  759. v = oh->_sysc_cache;
  760. sf = oh->class->sysc->sysc_flags;
  761. if (sf & SYSC_HAS_SIDLEMODE) {
  762. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  763. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  764. _set_slave_idlemode(oh, idlemode, &v);
  765. }
  766. if (sf & SYSC_HAS_MIDLEMODE) {
  767. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  768. idlemode = HWMOD_IDLEMODE_NO;
  769. } else {
  770. if (sf & SYSC_HAS_ENAWAKEUP)
  771. _enable_wakeup(oh, &v);
  772. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  773. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  774. else
  775. idlemode = HWMOD_IDLEMODE_SMART;
  776. }
  777. _set_master_standbymode(oh, idlemode, &v);
  778. }
  779. /*
  780. * XXX The clock framework should handle this, by
  781. * calling into this code. But this must wait until the
  782. * clock structures are tagged with omap_hwmod entries
  783. */
  784. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  785. (sf & SYSC_HAS_CLOCKACTIVITY))
  786. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  787. /* If slave is in SMARTIDLE, also enable wakeup */
  788. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  789. _enable_wakeup(oh, &v);
  790. _write_sysconfig(v, oh);
  791. /*
  792. * Set the autoidle bit only after setting the smartidle bit
  793. * Setting this will not have any impact on the other modules.
  794. */
  795. if (sf & SYSC_HAS_AUTOIDLE) {
  796. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  797. 0 : 1;
  798. _set_module_autoidle(oh, idlemode, &v);
  799. _write_sysconfig(v, oh);
  800. }
  801. }
  802. /**
  803. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  804. * @oh: struct omap_hwmod *
  805. *
  806. * If module is marked as SWSUP_SIDLE, force the module into slave
  807. * idle; otherwise, configure it for smart-idle. If module is marked
  808. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  809. * configure it for smart-standby. No return value.
  810. */
  811. static void _idle_sysc(struct omap_hwmod *oh)
  812. {
  813. u8 idlemode, sf;
  814. u32 v;
  815. if (!oh->class->sysc)
  816. return;
  817. v = oh->_sysc_cache;
  818. sf = oh->class->sysc->sysc_flags;
  819. if (sf & SYSC_HAS_SIDLEMODE) {
  820. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  821. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  822. _set_slave_idlemode(oh, idlemode, &v);
  823. }
  824. if (sf & SYSC_HAS_MIDLEMODE) {
  825. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  826. idlemode = HWMOD_IDLEMODE_FORCE;
  827. } else {
  828. if (sf & SYSC_HAS_ENAWAKEUP)
  829. _enable_wakeup(oh, &v);
  830. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  831. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  832. else
  833. idlemode = HWMOD_IDLEMODE_SMART;
  834. }
  835. _set_master_standbymode(oh, idlemode, &v);
  836. }
  837. /* If slave is in SMARTIDLE, also enable wakeup */
  838. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  839. _enable_wakeup(oh, &v);
  840. _write_sysconfig(v, oh);
  841. }
  842. /**
  843. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  844. * @oh: struct omap_hwmod *
  845. *
  846. * Force the module into slave idle and master suspend. No return
  847. * value.
  848. */
  849. static void _shutdown_sysc(struct omap_hwmod *oh)
  850. {
  851. u32 v;
  852. u8 sf;
  853. if (!oh->class->sysc)
  854. return;
  855. v = oh->_sysc_cache;
  856. sf = oh->class->sysc->sysc_flags;
  857. if (sf & SYSC_HAS_SIDLEMODE)
  858. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  859. if (sf & SYSC_HAS_MIDLEMODE)
  860. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  861. if (sf & SYSC_HAS_AUTOIDLE)
  862. _set_module_autoidle(oh, 1, &v);
  863. _write_sysconfig(v, oh);
  864. }
  865. /**
  866. * _lookup - find an omap_hwmod by name
  867. * @name: find an omap_hwmod by name
  868. *
  869. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  870. */
  871. static struct omap_hwmod *_lookup(const char *name)
  872. {
  873. struct omap_hwmod *oh, *temp_oh;
  874. oh = NULL;
  875. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  876. if (!strcmp(name, temp_oh->name)) {
  877. oh = temp_oh;
  878. break;
  879. }
  880. }
  881. return oh;
  882. }
  883. /**
  884. * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
  885. * @oh: struct omap_hwmod *
  886. *
  887. * Convert a clockdomain name stored in a struct omap_hwmod into a
  888. * clockdomain pointer, and save it into the struct omap_hwmod.
  889. * return -EINVAL if clkdm_name does not exist or if the lookup failed.
  890. */
  891. static int _init_clkdm(struct omap_hwmod *oh)
  892. {
  893. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  894. return 0;
  895. if (!oh->clkdm_name) {
  896. pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name);
  897. return -EINVAL;
  898. }
  899. oh->clkdm = clkdm_lookup(oh->clkdm_name);
  900. if (!oh->clkdm) {
  901. pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
  902. oh->name, oh->clkdm_name);
  903. return -EINVAL;
  904. }
  905. pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
  906. oh->name, oh->clkdm_name);
  907. return 0;
  908. }
  909. /**
  910. * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
  911. * well the clockdomain.
  912. * @oh: struct omap_hwmod *
  913. * @data: not used; pass NULL
  914. *
  915. * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
  916. * Resolves all clock names embedded in the hwmod. Returns 0 on
  917. * success, or a negative error code on failure.
  918. */
  919. static int _init_clocks(struct omap_hwmod *oh, void *data)
  920. {
  921. int ret = 0;
  922. if (oh->_state != _HWMOD_STATE_REGISTERED)
  923. return 0;
  924. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  925. ret |= _init_main_clk(oh);
  926. ret |= _init_interface_clks(oh);
  927. ret |= _init_opt_clks(oh);
  928. ret |= _init_clkdm(oh);
  929. if (!ret)
  930. oh->_state = _HWMOD_STATE_CLKS_INITED;
  931. else
  932. pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
  933. return ret;
  934. }
  935. /**
  936. * _wait_target_ready - wait for a module to leave slave idle
  937. * @oh: struct omap_hwmod *
  938. *
  939. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  940. * does not have an IDLEST bit or if the module successfully leaves
  941. * slave idle; otherwise, pass along the return value of the
  942. * appropriate *_cm*_wait_module_ready() function.
  943. */
  944. static int _wait_target_ready(struct omap_hwmod *oh)
  945. {
  946. struct omap_hwmod_ocp_if *os;
  947. int ret;
  948. if (!oh)
  949. return -EINVAL;
  950. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  951. return 0;
  952. os = oh->slaves[oh->_mpu_port_index];
  953. if (oh->flags & HWMOD_NO_IDLEST)
  954. return 0;
  955. /* XXX check module SIDLEMODE */
  956. /* XXX check clock enable states */
  957. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  958. ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  959. oh->prcm.omap2.idlest_reg_id,
  960. oh->prcm.omap2.idlest_idle_bit);
  961. } else if (cpu_is_omap44xx()) {
  962. if (!oh->clkdm)
  963. return -EINVAL;
  964. ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
  965. oh->clkdm->cm_inst,
  966. oh->clkdm->clkdm_offs,
  967. oh->prcm.omap4.clkctrl_offs);
  968. } else {
  969. BUG();
  970. };
  971. return ret;
  972. }
  973. /**
  974. * _wait_target_disable - wait for a module to be disabled
  975. * @oh: struct omap_hwmod *
  976. *
  977. * Wait for a module @oh to enter slave idle. Returns 0 if the module
  978. * does not have an IDLEST bit or if the module successfully enters
  979. * slave idle; otherwise, pass along the return value of the
  980. * appropriate *_cm*_wait_module_idle() function.
  981. */
  982. static int _wait_target_disable(struct omap_hwmod *oh)
  983. {
  984. /* TODO: For now just handle OMAP4+ */
  985. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  986. return 0;
  987. if (!oh)
  988. return -EINVAL;
  989. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  990. return 0;
  991. if (oh->flags & HWMOD_NO_IDLEST)
  992. return 0;
  993. return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
  994. oh->clkdm->cm_inst,
  995. oh->clkdm->clkdm_offs,
  996. oh->prcm.omap4.clkctrl_offs);
  997. }
  998. /**
  999. * _lookup_hardreset - fill register bit info for this hwmod/reset line
  1000. * @oh: struct omap_hwmod *
  1001. * @name: name of the reset line in the context of this hwmod
  1002. * @ohri: struct omap_hwmod_rst_info * that this function will fill in
  1003. *
  1004. * Return the bit position of the reset line that match the
  1005. * input name. Return -ENOENT if not found.
  1006. */
  1007. static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
  1008. struct omap_hwmod_rst_info *ohri)
  1009. {
  1010. int i;
  1011. for (i = 0; i < oh->rst_lines_cnt; i++) {
  1012. const char *rst_line = oh->rst_lines[i].name;
  1013. if (!strcmp(rst_line, name)) {
  1014. ohri->rst_shift = oh->rst_lines[i].rst_shift;
  1015. ohri->st_shift = oh->rst_lines[i].st_shift;
  1016. pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
  1017. oh->name, __func__, rst_line, ohri->rst_shift,
  1018. ohri->st_shift);
  1019. return 0;
  1020. }
  1021. }
  1022. return -ENOENT;
  1023. }
  1024. /**
  1025. * _assert_hardreset - assert the HW reset line of submodules
  1026. * contained in the hwmod module.
  1027. * @oh: struct omap_hwmod *
  1028. * @name: name of the reset line to lookup and assert
  1029. *
  1030. * Some IP like dsp, ipu or iva contain processor that require
  1031. * an HW reset line to be assert / deassert in order to enable fully
  1032. * the IP.
  1033. */
  1034. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  1035. {
  1036. struct omap_hwmod_rst_info ohri;
  1037. u8 ret;
  1038. if (!oh)
  1039. return -EINVAL;
  1040. ret = _lookup_hardreset(oh, name, &ohri);
  1041. if (IS_ERR_VALUE(ret))
  1042. return ret;
  1043. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  1044. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  1045. ohri.rst_shift);
  1046. else if (cpu_is_omap44xx())
  1047. return omap4_prminst_assert_hardreset(ohri.rst_shift,
  1048. oh->clkdm->pwrdm.ptr->prcm_partition,
  1049. oh->clkdm->pwrdm.ptr->prcm_offs,
  1050. oh->prcm.omap4.rstctrl_offs);
  1051. else
  1052. return -EINVAL;
  1053. }
  1054. /**
  1055. * _deassert_hardreset - deassert the HW reset line of submodules contained
  1056. * in the hwmod module.
  1057. * @oh: struct omap_hwmod *
  1058. * @name: name of the reset line to look up and deassert
  1059. *
  1060. * Some IP like dsp, ipu or iva contain processor that require
  1061. * an HW reset line to be assert / deassert in order to enable fully
  1062. * the IP.
  1063. */
  1064. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1065. {
  1066. struct omap_hwmod_rst_info ohri;
  1067. int ret;
  1068. if (!oh)
  1069. return -EINVAL;
  1070. ret = _lookup_hardreset(oh, name, &ohri);
  1071. if (IS_ERR_VALUE(ret))
  1072. return ret;
  1073. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  1074. ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  1075. ohri.rst_shift,
  1076. ohri.st_shift);
  1077. } else if (cpu_is_omap44xx()) {
  1078. if (ohri.st_shift)
  1079. pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
  1080. oh->name, name);
  1081. ret = omap4_prminst_deassert_hardreset(ohri.rst_shift,
  1082. oh->clkdm->pwrdm.ptr->prcm_partition,
  1083. oh->clkdm->pwrdm.ptr->prcm_offs,
  1084. oh->prcm.omap4.rstctrl_offs);
  1085. } else {
  1086. return -EINVAL;
  1087. }
  1088. if (ret == -EBUSY)
  1089. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  1090. return ret;
  1091. }
  1092. /**
  1093. * _read_hardreset - read the HW reset line state of submodules
  1094. * contained in the hwmod module
  1095. * @oh: struct omap_hwmod *
  1096. * @name: name of the reset line to look up and read
  1097. *
  1098. * Return the state of the reset line.
  1099. */
  1100. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  1101. {
  1102. struct omap_hwmod_rst_info ohri;
  1103. u8 ret;
  1104. if (!oh)
  1105. return -EINVAL;
  1106. ret = _lookup_hardreset(oh, name, &ohri);
  1107. if (IS_ERR_VALUE(ret))
  1108. return ret;
  1109. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  1110. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  1111. ohri.st_shift);
  1112. } else if (cpu_is_omap44xx()) {
  1113. return omap4_prminst_is_hardreset_asserted(ohri.rst_shift,
  1114. oh->clkdm->pwrdm.ptr->prcm_partition,
  1115. oh->clkdm->pwrdm.ptr->prcm_offs,
  1116. oh->prcm.omap4.rstctrl_offs);
  1117. } else {
  1118. return -EINVAL;
  1119. }
  1120. }
  1121. /**
  1122. * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  1123. * @oh: struct omap_hwmod *
  1124. *
  1125. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  1126. * enabled for this to work. Returns -EINVAL if the hwmod cannot be
  1127. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  1128. * the module did not reset in time, or 0 upon success.
  1129. *
  1130. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  1131. * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
  1132. * use the SYSCONFIG softreset bit to provide the status.
  1133. *
  1134. * Note that some IP like McBSP do have reset control but don't have
  1135. * reset status.
  1136. */
  1137. static int _ocp_softreset(struct omap_hwmod *oh)
  1138. {
  1139. u32 v;
  1140. int c = 0;
  1141. int ret = 0;
  1142. if (!oh->class->sysc ||
  1143. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  1144. return -EINVAL;
  1145. /* clocks must be on for this operation */
  1146. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1147. pr_warning("omap_hwmod: %s: reset can only be entered from "
  1148. "enabled state\n", oh->name);
  1149. return -EINVAL;
  1150. }
  1151. /* For some modules, all optionnal clocks need to be enabled as well */
  1152. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1153. _enable_optional_clocks(oh);
  1154. pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
  1155. v = oh->_sysc_cache;
  1156. ret = _set_softreset(oh, &v);
  1157. if (ret)
  1158. goto dis_opt_clks;
  1159. _write_sysconfig(v, oh);
  1160. if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  1161. omap_test_timeout((omap_hwmod_read(oh,
  1162. oh->class->sysc->syss_offs)
  1163. & SYSS_RESETDONE_MASK),
  1164. MAX_MODULE_SOFTRESET_WAIT, c);
  1165. else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
  1166. omap_test_timeout(!(omap_hwmod_read(oh,
  1167. oh->class->sysc->sysc_offs)
  1168. & SYSC_TYPE2_SOFTRESET_MASK),
  1169. MAX_MODULE_SOFTRESET_WAIT, c);
  1170. if (c == MAX_MODULE_SOFTRESET_WAIT)
  1171. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  1172. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  1173. else
  1174. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  1175. /*
  1176. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  1177. * _wait_target_ready() or _reset()
  1178. */
  1179. ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  1180. dis_opt_clks:
  1181. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1182. _disable_optional_clocks(oh);
  1183. return ret;
  1184. }
  1185. /**
  1186. * _reset - reset an omap_hwmod
  1187. * @oh: struct omap_hwmod *
  1188. *
  1189. * Resets an omap_hwmod @oh. The default software reset mechanism for
  1190. * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
  1191. * bit. However, some hwmods cannot be reset via this method: some
  1192. * are not targets and therefore have no OCP header registers to
  1193. * access; others (like the IVA) have idiosyncratic reset sequences.
  1194. * So for these relatively rare cases, custom reset code can be
  1195. * supplied in the struct omap_hwmod_class .reset function pointer.
  1196. * Passes along the return value from either _reset() or the custom
  1197. * reset function - these must return -EINVAL if the hwmod cannot be
  1198. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  1199. * the module did not reset in time, or 0 upon success.
  1200. */
  1201. static int _reset(struct omap_hwmod *oh)
  1202. {
  1203. int ret;
  1204. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  1205. ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
  1206. return ret;
  1207. }
  1208. /**
  1209. * _enable - enable an omap_hwmod
  1210. * @oh: struct omap_hwmod *
  1211. *
  1212. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  1213. * register target. Returns -EINVAL if the hwmod is in the wrong
  1214. * state or passes along the return value of _wait_target_ready().
  1215. */
  1216. static int _enable(struct omap_hwmod *oh)
  1217. {
  1218. int r;
  1219. int hwsup = 0;
  1220. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  1221. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  1222. oh->_state != _HWMOD_STATE_IDLE &&
  1223. oh->_state != _HWMOD_STATE_DISABLED) {
  1224. WARN(1, "omap_hwmod: %s: enabled state can only be entered "
  1225. "from initialized, idle, or disabled state\n", oh->name);
  1226. return -EINVAL;
  1227. }
  1228. /*
  1229. * If an IP contains only one HW reset line, then de-assert it in order
  1230. * to allow the module state transition. Otherwise the PRCM will return
  1231. * Intransition status, and the init will failed.
  1232. */
  1233. if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
  1234. oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
  1235. _deassert_hardreset(oh, oh->rst_lines[0].name);
  1236. /* Mux pins for device runtime if populated */
  1237. if (oh->mux && (!oh->mux->enabled ||
  1238. ((oh->_state == _HWMOD_STATE_IDLE) &&
  1239. oh->mux->pads_dynamic)))
  1240. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1241. _add_initiator_dep(oh, mpu_oh);
  1242. if (oh->clkdm) {
  1243. /*
  1244. * A clockdomain must be in SW_SUP before enabling
  1245. * completely the module. The clockdomain can be set
  1246. * in HW_AUTO only when the module become ready.
  1247. */
  1248. hwsup = clkdm_in_hwsup(oh->clkdm);
  1249. r = clkdm_hwmod_enable(oh->clkdm, oh);
  1250. if (r) {
  1251. WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
  1252. oh->name, oh->clkdm->name, r);
  1253. return r;
  1254. }
  1255. }
  1256. _enable_clocks(oh);
  1257. _enable_module(oh);
  1258. r = _wait_target_ready(oh);
  1259. if (!r) {
  1260. /*
  1261. * Set the clockdomain to HW_AUTO only if the target is ready,
  1262. * assuming that the previous state was HW_AUTO
  1263. */
  1264. if (oh->clkdm && hwsup)
  1265. clkdm_allow_idle(oh->clkdm);
  1266. oh->_state = _HWMOD_STATE_ENABLED;
  1267. /* Access the sysconfig only if the target is ready */
  1268. if (oh->class->sysc) {
  1269. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1270. _update_sysc_cache(oh);
  1271. _enable_sysc(oh);
  1272. }
  1273. } else {
  1274. _disable_clocks(oh);
  1275. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  1276. oh->name, r);
  1277. if (oh->clkdm)
  1278. clkdm_hwmod_disable(oh->clkdm, oh);
  1279. }
  1280. return r;
  1281. }
  1282. /**
  1283. * _idle - idle an omap_hwmod
  1284. * @oh: struct omap_hwmod *
  1285. *
  1286. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1287. * no further work. Returns -EINVAL if the hwmod is in the wrong
  1288. * state or returns 0.
  1289. */
  1290. static int _idle(struct omap_hwmod *oh)
  1291. {
  1292. int ret;
  1293. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1294. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1295. WARN(1, "omap_hwmod: %s: idle state can only be entered from "
  1296. "enabled state\n", oh->name);
  1297. return -EINVAL;
  1298. }
  1299. if (oh->class->sysc)
  1300. _idle_sysc(oh);
  1301. _del_initiator_dep(oh, mpu_oh);
  1302. _disable_module(oh);
  1303. ret = _wait_target_disable(oh);
  1304. if (ret)
  1305. pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
  1306. oh->name);
  1307. /*
  1308. * The module must be in idle mode before disabling any parents
  1309. * clocks. Otherwise, the parent clock might be disabled before
  1310. * the module transition is done, and thus will prevent the
  1311. * transition to complete properly.
  1312. */
  1313. _disable_clocks(oh);
  1314. if (oh->clkdm)
  1315. clkdm_hwmod_disable(oh->clkdm, oh);
  1316. /* Mux pins for device idle if populated */
  1317. if (oh->mux && oh->mux->pads_dynamic)
  1318. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  1319. oh->_state = _HWMOD_STATE_IDLE;
  1320. return 0;
  1321. }
  1322. /**
  1323. * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
  1324. * @oh: struct omap_hwmod *
  1325. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  1326. *
  1327. * Sets the IP block's OCP autoidle bit in hardware, and updates our
  1328. * local copy. Intended to be used by drivers that require
  1329. * direct manipulation of the AUTOIDLE bits.
  1330. * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
  1331. * along the return value from _set_module_autoidle().
  1332. *
  1333. * Any users of this function should be scrutinized carefully.
  1334. */
  1335. int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
  1336. {
  1337. u32 v;
  1338. int retval = 0;
  1339. unsigned long flags;
  1340. if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
  1341. return -EINVAL;
  1342. spin_lock_irqsave(&oh->_lock, flags);
  1343. v = oh->_sysc_cache;
  1344. retval = _set_module_autoidle(oh, autoidle, &v);
  1345. if (!retval)
  1346. _write_sysconfig(v, oh);
  1347. spin_unlock_irqrestore(&oh->_lock, flags);
  1348. return retval;
  1349. }
  1350. /**
  1351. * _shutdown - shutdown an omap_hwmod
  1352. * @oh: struct omap_hwmod *
  1353. *
  1354. * Shut down an omap_hwmod @oh. This should be called when the driver
  1355. * used for the hwmod is removed or unloaded or if the driver is not
  1356. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1357. * state or returns 0.
  1358. */
  1359. static int _shutdown(struct omap_hwmod *oh)
  1360. {
  1361. int ret;
  1362. u8 prev_state;
  1363. if (oh->_state != _HWMOD_STATE_IDLE &&
  1364. oh->_state != _HWMOD_STATE_ENABLED) {
  1365. WARN(1, "omap_hwmod: %s: disabled state can only be entered "
  1366. "from idle, or enabled state\n", oh->name);
  1367. return -EINVAL;
  1368. }
  1369. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1370. if (oh->class->pre_shutdown) {
  1371. prev_state = oh->_state;
  1372. if (oh->_state == _HWMOD_STATE_IDLE)
  1373. _enable(oh);
  1374. ret = oh->class->pre_shutdown(oh);
  1375. if (ret) {
  1376. if (prev_state == _HWMOD_STATE_IDLE)
  1377. _idle(oh);
  1378. return ret;
  1379. }
  1380. }
  1381. if (oh->class->sysc) {
  1382. if (oh->_state == _HWMOD_STATE_IDLE)
  1383. _enable(oh);
  1384. _shutdown_sysc(oh);
  1385. }
  1386. /* clocks and deps are already disabled in idle */
  1387. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1388. _del_initiator_dep(oh, mpu_oh);
  1389. /* XXX what about the other system initiators here? dma, dsp */
  1390. _disable_module(oh);
  1391. ret = _wait_target_disable(oh);
  1392. if (ret)
  1393. pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
  1394. oh->name);
  1395. _disable_clocks(oh);
  1396. if (oh->clkdm)
  1397. clkdm_hwmod_disable(oh->clkdm, oh);
  1398. }
  1399. /* XXX Should this code also force-disable the optional clocks? */
  1400. /*
  1401. * If an IP contains only one HW reset line, then assert it
  1402. * after disabling the clocks and before shutting down the IP.
  1403. */
  1404. if (oh->rst_lines_cnt == 1)
  1405. _assert_hardreset(oh, oh->rst_lines[0].name);
  1406. /* Mux pins to safe mode or use populated off mode values */
  1407. if (oh->mux)
  1408. omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
  1409. oh->_state = _HWMOD_STATE_DISABLED;
  1410. return 0;
  1411. }
  1412. /**
  1413. * _setup - do initial configuration of omap_hwmod
  1414. * @oh: struct omap_hwmod *
  1415. *
  1416. * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
  1417. * OCP_SYSCONFIG register. Returns 0.
  1418. */
  1419. static int _setup(struct omap_hwmod *oh, void *data)
  1420. {
  1421. int i, r;
  1422. u8 postsetup_state;
  1423. if (oh->_state != _HWMOD_STATE_CLKS_INITED)
  1424. return 0;
  1425. /* Set iclk autoidle mode */
  1426. if (oh->slaves_cnt > 0) {
  1427. for (i = 0; i < oh->slaves_cnt; i++) {
  1428. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  1429. struct clk *c = os->_clk;
  1430. if (!c)
  1431. continue;
  1432. if (os->flags & OCPIF_SWSUP_IDLE) {
  1433. /* XXX omap_iclk_deny_idle(c); */
  1434. } else {
  1435. /* XXX omap_iclk_allow_idle(c); */
  1436. clk_enable(c);
  1437. }
  1438. }
  1439. }
  1440. oh->_state = _HWMOD_STATE_INITIALIZED;
  1441. /*
  1442. * In the case of hwmod with hardreset that should not be
  1443. * de-assert at boot time, we have to keep the module
  1444. * initialized, because we cannot enable it properly with the
  1445. * reset asserted. Exit without warning because that behavior is
  1446. * expected.
  1447. */
  1448. if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
  1449. return 0;
  1450. r = _enable(oh);
  1451. if (r) {
  1452. pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
  1453. oh->name, oh->_state);
  1454. return 0;
  1455. }
  1456. if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
  1457. _reset(oh);
  1458. /*
  1459. * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
  1460. * The _enable() function should be split to
  1461. * avoid the rewrite of the OCP_SYSCONFIG register.
  1462. */
  1463. if (oh->class->sysc) {
  1464. _update_sysc_cache(oh);
  1465. _enable_sysc(oh);
  1466. }
  1467. }
  1468. postsetup_state = oh->_postsetup_state;
  1469. if (postsetup_state == _HWMOD_STATE_UNKNOWN)
  1470. postsetup_state = _HWMOD_STATE_ENABLED;
  1471. /*
  1472. * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
  1473. * it should be set by the core code as a runtime flag during startup
  1474. */
  1475. if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
  1476. (postsetup_state == _HWMOD_STATE_IDLE))
  1477. postsetup_state = _HWMOD_STATE_ENABLED;
  1478. if (postsetup_state == _HWMOD_STATE_IDLE)
  1479. _idle(oh);
  1480. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  1481. _shutdown(oh);
  1482. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  1483. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  1484. oh->name, postsetup_state);
  1485. return 0;
  1486. }
  1487. /**
  1488. * _register - register a struct omap_hwmod
  1489. * @oh: struct omap_hwmod *
  1490. *
  1491. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  1492. * already has been registered by the same name; -EINVAL if the
  1493. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  1494. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  1495. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  1496. * success.
  1497. *
  1498. * XXX The data should be copied into bootmem, so the original data
  1499. * should be marked __initdata and freed after init. This would allow
  1500. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  1501. * that the copy process would be relatively complex due to the large number
  1502. * of substructures.
  1503. */
  1504. static int __init _register(struct omap_hwmod *oh)
  1505. {
  1506. int ms_id;
  1507. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  1508. (oh->_state != _HWMOD_STATE_UNKNOWN))
  1509. return -EINVAL;
  1510. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  1511. if (_lookup(oh->name))
  1512. r