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/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi

https://github.com/aicjofs/android_kernel_lge_v500_20d
Device Tree | 246 lines | 174 code | 29 blank | 43 comment | 0 complexity | 90a2e9bff21ec9b2f0e0b60d7023974c MD5 | raw file
  1/*
  2 * P1022/P1013 Silicon/SoC Device Tree Source (post include)
  3 *
  4 * Copyright 2011 Freescale Semiconductor Inc.
  5 *
  6 * Redistribution and use in source and binary forms, with or without
  7 * modification, are permitted provided that the following conditions are met:
  8 *     * Redistributions of source code must retain the above copyright
  9 *       notice, this list of conditions and the following disclaimer.
 10 *     * Redistributions in binary form must reproduce the above copyright
 11 *       notice, this list of conditions and the following disclaimer in the
 12 *       documentation and/or other materials provided with the distribution.
 13 *     * Neither the name of Freescale Semiconductor nor the
 14 *       names of its contributors may be used to endorse or promote products
 15 *       derived from this software without specific prior written permission.
 16 *
 17 *
 18 * ALTERNATIVELY, this software may be distributed under the terms of the
 19 * GNU General Public License ("GPL") as published by the Free Software
 20 * Foundation, either version 2 of that License or (at your option) any
 21 * later version.
 22 *
 23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
 24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
 27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 33 */
 34
 35&lbc {
 36	#address-cells = <2>;
 37	#size-cells = <1>;
 38	/*
 39	 * The localbus on the P1022 is not a simple-bus because of the eLBC
 40	 * pin muxing when the DIU is enabled.
 41	 */
 42	compatible = "fsl,p1022-elbc", "fsl,elbc";
 43	interrupts = <19 2 0 0>;
 44};
 45
 46/* controller at 0x9000 */
 47&pci0 {
 48	compatible = "fsl,p1022-pcie";
 49	device_type = "pci";
 50	#size-cells = <2>;
 51	#address-cells = <3>;
 52	bus-range = <0 255>;
 53	clock-frequency = <33333333>;
 54	interrupts = <16 2 0 0>;
 55
 56	pcie@0 {
 57		reg = <0 0 0 0 0>;
 58		#interrupt-cells = <1>;
 59		#size-cells = <2>;
 60		#address-cells = <3>;
 61		device_type = "pci";
 62		interrupts = <16 2 0 0>;
 63		interrupt-map-mask = <0xf800 0 0 7>;
 64		interrupt-map = <
 65			/* IDSEL 0x0 */
 66			0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
 67			0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
 68			0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
 69			0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
 70			>;
 71	};
 72};
 73
 74/* controller at 0xa000 */
 75&pci1 {
 76	compatible = "fsl,p1022-pcie";
 77	device_type = "pci";
 78	#size-cells = <2>;
 79	#address-cells = <3>;
 80	bus-range = <0 255>;
 81	clock-frequency = <33333333>;
 82	interrupts = <16 2 0 0>;
 83
 84	pcie@0 {
 85		reg = <0 0 0 0 0>;
 86		#interrupt-cells = <1>;
 87		#size-cells = <2>;
 88		#address-cells = <3>;
 89		device_type = "pci";
 90		interrupts = <16 2 0 0>;
 91		interrupt-map-mask = <0xf800 0 0 7>;
 92
 93		interrupt-map = <
 94			/* IDSEL 0x0 */
 95			0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
 96			0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
 97			0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
 98			0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
 99			>;
100	};
101};
102
103/* controller at 0xb000 */
104&pci2 {
105	compatible = "fsl,p1022-pcie";
106	device_type = "pci";
107	#size-cells = <2>;
108	#address-cells = <3>;
109	bus-range = <0 255>;
110	clock-frequency = <33333333>;
111	interrupts = <16 2 0 0>;
112
113	pcie@0 {
114		reg = <0 0 0 0 0>;
115		#interrupt-cells = <1>;
116		#size-cells = <2>;
117		#address-cells = <3>;
118		device_type = "pci";
119		interrupts = <16 2 0 0>;
120		interrupt-map-mask = <0xf800 0 0 7>;
121
122		interrupt-map = <
123			/* IDSEL 0x0 */
124			0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0
125			0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0
126			0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0
127			0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0
128			>;
129	};
130};
131
132&soc {
133	#address-cells = <1>;
134	#size-cells = <1>;
135	device_type = "soc";
136	compatible = "fsl,p1022-immr", "simple-bus";
137	bus-frequency = <0>;		// Filled out by uboot.
138
139	ecm-law@0 {
140		compatible = "fsl,ecm-law";
141		reg = <0x0 0x1000>;
142		fsl,num-laws = <12>;
143	};
144
145	ecm@1000 {
146		compatible = "fsl,p1022-ecm", "fsl,ecm";
147		reg = <0x1000 0x1000>;
148		interrupts = <16 2 0 0>;
149	};
150
151	memory-controller@2000 {
152		compatible = "fsl,p1022-memory-controller";
153		reg = <0x2000 0x1000>;
154		interrupts = <16 2 0 0>;
155	};
156
157/include/ "pq3-i2c-0.dtsi"
158/include/ "pq3-i2c-1.dtsi"
159/include/ "pq3-duart-0.dtsi"
160/include/ "pq3-espi-0.dtsi"
161	spi@7000 {
162		fsl,espi-num-chipselects = <4>;
163	};
164
165/include/ "pq3-dma-1.dtsi"
166	dma@c300 {
167		dma00: dma-channel@0 {
168			compatible = "fsl,ssi-dma-channel";
169		};
170		dma01: dma-channel@80 {
171			compatible = "fsl,ssi-dma-channel";
172		};
173	};
174
175/include/ "pq3-gpio-0.dtsi"
176
177	display@10000 {
178		compatible = "fsl,diu", "fsl,p1022-diu";
179		reg = <0x10000 1000>;
180		interrupts = <64 2 0 0>;
181	};
182
183	ssi@15000 {
184		compatible = "fsl,mpc8610-ssi";
185		cell-index = <0>;
186		reg = <0x15000 0x100>;
187		interrupts = <75 2 0 0>;
188		fsl,playback-dma = <&dma00>;
189		fsl,capture-dma = <&dma01>;
190		fsl,fifo-depth = <15>;
191	};
192
193/include/ "pq3-sata2-0.dtsi"
194/include/ "pq3-sata2-1.dtsi"
195
196	L2: l2-cache-controller@20000 {
197		compatible = "fsl,p1022-l2-cache-controller";
198		reg = <0x20000 0x1000>;
199		cache-line-size = <32>;	// 32 bytes
200		cache-size = <0x40000>; // L2,256K
201		interrupts = <16 2 0 0>;
202	};
203
204/include/ "pq3-dma-0.dtsi"
205/include/ "pq3-usb2-dr-0.dtsi"
206	usb@22000 {
207		compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
208	};
209/include/ "pq3-usb2-dr-1.dtsi"
210	usb@23000 {
211		compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
212	};
213
214/include/ "pq3-esdhc-0.dtsi"
215	sdhc@2e000 {
216		compatible = "fsl,p1022-esdhc", "fsl,esdhc";
217		sdhci,auto-cmd12;
218	};
219
220/include/ "pq3-sec3.3-0.dtsi"
221/include/ "pq3-mpic.dtsi"
222/include/ "pq3-mpic-timer-B.dtsi"
223
224/include/ "pq3-etsec2-0.dtsi"
225	enet0: enet0_grp2: ethernet@b0000 {
226	};
227
228/include/ "pq3-etsec2-1.dtsi"
229	enet1: enet1_grp2: ethernet@b1000 {
230	};
231
232	global-utilities@e0000 {
233		compatible = "fsl,p1022-guts";
234		reg = <0xe0000 0x1000>;
235		fsl,has-rstcr;
236	};
237
238	power@e0070{
239		compatible = "fsl,mpc8536-pmc", "fsl,mpc8548-pmc";
240		reg = <0xe0070 0x20>;
241	};
242
243};
244
245/include/ "pq3-etsec2-grp2-0.dtsi"
246/include/ "pq3-etsec2-grp2-1.dtsi"