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/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi

https://github.com/aicjofs/android_kernel_lge_v500_20d
Device Tree | 96 lines | 57 code | 6 blank | 33 comment | 0 complexity | a4e7cbe4e29c19401b82ee8a15a5d19a MD5 | raw file
 1/*
 2 * P5020/P5010 Silicon/SoC Device Tree Source (pre include)
 3 *
 4 * Copyright 2011 Freescale Semiconductor Inc.
 5 *
 6 * Redistribution and use in source and binary forms, with or without
 7 * modification, are permitted provided that the following conditions are met:
 8 *     * Redistributions of source code must retain the above copyright
 9 *       notice, this list of conditions and the following disclaimer.
10 *     * Redistributions in binary form must reproduce the above copyright
11 *       notice, this list of conditions and the following disclaimer in the
12 *       documentation and/or other materials provided with the distribution.
13 *     * Neither the name of Freescale Semiconductor nor the
14 *       names of its contributors may be used to endorse or promote products
15 *       derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36/ {
37	compatible = "fsl,P5020";
38	#address-cells = <2>;
39	#size-cells = <2>;
40	interrupt-parent = <&mpic>;
41
42	aliases {
43		ccsr = &soc;
44		dcsr = &dcsr;
45
46		serial0 = &serial0;
47		serial1 = &serial1;
48		serial2 = &serial2;
49		serial3 = &serial3;
50		pci0 = &pci0;
51		pci1 = &pci1;
52		pci2 = &pci2;
53		pci3 = &pci3;
54		usb0 = &usb0;
55		usb1 = &usb1;
56		dma0 = &dma0;
57		dma1 = &dma1;
58		sdhc = &sdhc;
59		msi0 = &msi0;
60		msi1 = &msi1;
61		msi2 = &msi2;
62
63		crypto = &crypto;
64		sec_jr0 = &sec_jr0;
65		sec_jr1 = &sec_jr1;
66		sec_jr2 = &sec_jr2;
67		sec_jr3 = &sec_jr3;
68		rtic_a = &rtic_a;
69		rtic_b = &rtic_b;
70		rtic_c = &rtic_c;
71		rtic_d = &rtic_d;
72		sec_mon = &sec_mon;
73	};
74
75	cpus {
76		#address-cells = <1>;
77		#size-cells = <0>;
78
79		cpu0: PowerPC,e5500@0 {
80			device_type = "cpu";
81			reg = <0>;
82			next-level-cache = <&L2_0>;
83			L2_0: l2-cache {
84				next-level-cache = <&cpc>;
85			};
86		};
87		cpu1: PowerPC,e5500@1 {
88			device_type = "cpu";
89			reg = <1>;
90			next-level-cache = <&L2_1>;
91			L2_1: l2-cache {
92				next-level-cache = <&cpc>;
93			};
94		};
95	};
96};