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/arch/arm/mach-mmp/pxa910.c

https://github.com/AICP/kernel_google_msm
C | 213 lines | 161 code | 25 blank | 27 comment | 1 complexity | f34496773264fa7d3674c31362c0e667 MD5 | raw file
  1/*
  2 *  linux/arch/arm/mach-mmp/pxa910.c
  3 *
  4 *  Code specific to PXA910
  5 *
  6 * This program is free software; you can redistribute it and/or modify
  7 * it under the terms of the GNU General Public License version 2 as
  8 * published by the Free Software Foundation.
  9 */
 10#include <linux/module.h>
 11#include <linux/kernel.h>
 12#include <linux/init.h>
 13#include <linux/list.h>
 14#include <linux/io.h>
 15#include <linux/platform_device.h>
 16
 17#include <asm/mach/time.h>
 18#include <mach/addr-map.h>
 19#include <mach/regs-apbc.h>
 20#include <mach/regs-apmu.h>
 21#include <mach/cputype.h>
 22#include <mach/irqs.h>
 23#include <mach/dma.h>
 24#include <mach/mfp.h>
 25#include <mach/devices.h>
 26
 27#include "common.h"
 28#include "clock.h"
 29
 30#define MFPR_VIRT_BASE	(APB_VIRT_BASE + 0x1e000)
 31
 32static struct mfp_addr_map pxa910_mfp_addr_map[] __initdata =
 33{
 34	MFP_ADDR_X(GPIO0, GPIO54, 0xdc),
 35	MFP_ADDR_X(GPIO67, GPIO98, 0x1b8),
 36	MFP_ADDR_X(GPIO100, GPIO109, 0x238),
 37
 38	MFP_ADDR(GPIO123, 0xcc),
 39	MFP_ADDR(GPIO124, 0xd0),
 40
 41	MFP_ADDR(DF_IO0, 0x40),
 42	MFP_ADDR(DF_IO1, 0x3c),
 43	MFP_ADDR(DF_IO2, 0x38),
 44	MFP_ADDR(DF_IO3, 0x34),
 45	MFP_ADDR(DF_IO4, 0x30),
 46	MFP_ADDR(DF_IO5, 0x2c),
 47	MFP_ADDR(DF_IO6, 0x28),
 48	MFP_ADDR(DF_IO7, 0x24),
 49	MFP_ADDR(DF_IO8, 0x20),
 50	MFP_ADDR(DF_IO9, 0x1c),
 51	MFP_ADDR(DF_IO10, 0x18),
 52	MFP_ADDR(DF_IO11, 0x14),
 53	MFP_ADDR(DF_IO12, 0x10),
 54	MFP_ADDR(DF_IO13, 0xc),
 55	MFP_ADDR(DF_IO14, 0x8),
 56	MFP_ADDR(DF_IO15, 0x4),
 57
 58	MFP_ADDR(DF_nCS0_SM_nCS2, 0x44),
 59	MFP_ADDR(DF_nCS1_SM_nCS3, 0x48),
 60	MFP_ADDR(SM_nCS0, 0x4c),
 61	MFP_ADDR(SM_nCS1, 0x50),
 62	MFP_ADDR(DF_WEn, 0x54),
 63	MFP_ADDR(DF_REn, 0x58),
 64	MFP_ADDR(DF_CLE_SM_OEn, 0x5c),
 65	MFP_ADDR(DF_ALE_SM_WEn, 0x60),
 66	MFP_ADDR(SM_SCLK, 0x64),
 67	MFP_ADDR(DF_RDY0, 0x68),
 68	MFP_ADDR(SM_BE0, 0x6c),
 69	MFP_ADDR(SM_BE1, 0x70),
 70	MFP_ADDR(SM_ADV, 0x74),
 71	MFP_ADDR(DF_RDY1, 0x78),
 72	MFP_ADDR(SM_ADVMUX, 0x7c),
 73	MFP_ADDR(SM_RDY, 0x80),
 74
 75	MFP_ADDR_X(MMC1_DAT7, MMC1_WP, 0x84),
 76
 77	MFP_ADDR_END,
 78};
 79
 80void __init pxa910_init_irq(void)
 81{
 82	icu_init_irq();
 83}
 84
 85/* APB peripheral clocks */
 86static APBC_CLK(uart1, PXA910_UART0, 1, 14745600);
 87static APBC_CLK(uart2, PXA910_UART1, 1, 14745600);
 88static APBC_CLK(twsi0, PXA168_TWSI0, 1, 33000000);
 89static APBC_CLK(twsi1, PXA168_TWSI1, 1, 33000000);
 90static APBC_CLK(pwm1, PXA910_PWM1, 1, 13000000);
 91static APBC_CLK(pwm2, PXA910_PWM2, 1, 13000000);
 92static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000);
 93static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000);
 94static APBC_CLK(gpio, PXA910_GPIO, 0, 13000000);
 95static APBC_CLK(rtc, PXA910_RTC, 8, 32768);
 96
 97static APMU_CLK(nand, NAND, 0x19b, 156000000);
 98static APMU_CLK(u2o, USB, 0x1b, 480000000);
 99
100/* device and clock bindings */
101static struct clk_lookup pxa910_clkregs[] = {
102	INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
103	INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL),
104	INIT_CLKREG(&clk_twsi0, "pxa2xx-i2c.0", NULL),
105	INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.1", NULL),
106	INIT_CLKREG(&clk_pwm1, "pxa910-pwm.0", NULL),
107	INIT_CLKREG(&clk_pwm2, "pxa910-pwm.1", NULL),
108	INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL),
109	INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL),
110	INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
111	INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
112	INIT_CLKREG(&clk_u2o, "pxa-u2o", "U2OCLK"),
113	INIT_CLKREG(&clk_rtc, "sa1100-rtc", NULL),
114};
115
116static int __init pxa910_init(void)
117{
118	if (cpu_is_pxa910()) {
119		mfp_init_base(MFPR_VIRT_BASE);
120		mfp_init_addr(pxa910_mfp_addr_map);
121		pxa_init_dma(IRQ_PXA910_DMA_INT0, 32);
122		clkdev_add_table(ARRAY_AND_SIZE(pxa910_clkregs));
123	}
124
125	return 0;
126}
127postcore_initcall(pxa910_init);
128
129/* system timer - clock enabled, 3.25MHz */
130#define TIMER_CLK_RST	(APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))
131
132static void __init pxa910_timer_init(void)
133{
134	/* reset and configure */
135	__raw_writel(APBC_APBCLK | APBC_RST, APBC_PXA910_TIMERS);
136	__raw_writel(TIMER_CLK_RST, APBC_PXA910_TIMERS);
137
138	timer_init(IRQ_PXA910_AP1_TIMER1);
139}
140
141struct sys_timer pxa910_timer = {
142	.init	= pxa910_timer_init,
143};
144
145/* on-chip devices */
146
147/* NOTE: there are totally 3 UARTs on PXA910:
148 *
149 *   UART1   - Slow UART (can be used both by AP and CP)
150 *   UART2/3 - Fast UART
151 *
152 * To be backward compatible with the legacy FFUART/BTUART/STUART sequence,
153 * they are re-ordered as:
154 *
155 *   pxa910_device_uart1 - UART2 as FFUART
156 *   pxa910_device_uart2 - UART3 as BTUART
157 *
158 * UART1 is not used by AP for the moment.
159 */
160PXA910_DEVICE(uart1, "pxa2xx-uart", 0, UART2, 0xd4017000, 0x30, 21, 22);
161PXA910_DEVICE(uart2, "pxa2xx-uart", 1, UART3, 0xd4018000, 0x30, 23, 24);
162PXA910_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28);
163PXA910_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28);
164PXA910_DEVICE(pwm1, "pxa910-pwm", 0, NONE, 0xd401a000, 0x10);
165PXA910_DEVICE(pwm2, "pxa910-pwm", 1, NONE, 0xd401a400, 0x10);
166PXA910_DEVICE(pwm3, "pxa910-pwm", 2, NONE, 0xd401a800, 0x10);
167PXA910_DEVICE(pwm4, "pxa910-pwm", 3, NONE, 0xd401ac00, 0x10);
168PXA910_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);
169
170struct resource pxa910_resource_gpio[] = {
171	{
172		.start	= 0xd4019000,
173		.end	= 0xd4019fff,
174		.flags	= IORESOURCE_MEM,
175	}, {
176		.start	= IRQ_PXA910_AP_GPIO,
177		.end	= IRQ_PXA910_AP_GPIO,
178		.name	= "gpio_mux",
179		.flags	= IORESOURCE_IRQ,
180	},
181};
182
183struct platform_device pxa910_device_gpio = {
184	.name		= "pxa-gpio",
185	.id		= -1,
186	.num_resources	= ARRAY_SIZE(pxa910_resource_gpio),
187	.resource	= pxa910_resource_gpio,
188};
189
190static struct resource pxa910_resource_rtc[] = {
191	{
192		.start	= 0xd4010000,
193		.end	= 0xd401003f,
194		.flags	= IORESOURCE_MEM,
195	}, {
196		.start	= IRQ_PXA910_RTC_INT,
197		.end	= IRQ_PXA910_RTC_INT,
198		.name	= "rtc 1Hz",
199		.flags	= IORESOURCE_IRQ,
200	}, {
201		.start	= IRQ_PXA910_RTC_ALARM,
202		.end	= IRQ_PXA910_RTC_ALARM,
203		.name	= "rtc alarm",
204		.flags	= IORESOURCE_IRQ,
205	},
206};
207
208struct platform_device pxa910_device_rtc = {
209	.name		= "sa1100-rtc",
210	.id		= -1,
211	.num_resources	= ARRAY_SIZE(pxa910_resource_rtc),
212	.resource	= pxa910_resource_rtc,
213};