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/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c

https://github.com/AICP/kernel_asus_grouper
C | 191 lines | 133 code | 24 blank | 34 comment | 5 complexity | e6cf0dceb6ee33f48e32ca3bd9d91d5a MD5 | raw file
  1/*
  2 * arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
  3 *
  4 * Marvell Orion-VoIP GE Reference Design Setup
  5 *
  6 * This file is licensed under the terms of the GNU General Public
  7 * License version 2.  This program is licensed "as is" without any
  8 * warranty of any kind, whether express or implied.
  9 */
 10
 11#include <linux/kernel.h>
 12#include <linux/init.h>
 13#include <linux/platform_device.h>
 14#include <linux/pci.h>
 15#include <linux/irq.h>
 16#include <linux/mtd/physmap.h>
 17#include <linux/mv643xx_eth.h>
 18#include <linux/ethtool.h>
 19#include <linux/i2c.h>
 20#include <net/dsa.h>
 21#include <asm/mach-types.h>
 22#include <asm/gpio.h>
 23#include <asm/leds.h>
 24#include <asm/mach/arch.h>
 25#include <asm/mach/pci.h>
 26#include <mach/orion5x.h>
 27#include "common.h"
 28#include "mpp.h"
 29
 30/*****************************************************************************
 31 * RD-88F5181L GE Info
 32 ****************************************************************************/
 33/*
 34 * 16M NOR flash Device bus boot chip select
 35 */
 36#define RD88F5181L_GE_NOR_BOOT_BASE		0xff000000
 37#define RD88F5181L_GE_NOR_BOOT_SIZE		SZ_16M
 38
 39
 40/*****************************************************************************
 41 * 16M NOR Flash on Device bus Boot chip select
 42 ****************************************************************************/
 43static struct physmap_flash_data rd88f5181l_ge_nor_boot_flash_data = {
 44	.width		= 1,
 45};
 46
 47static struct resource rd88f5181l_ge_nor_boot_flash_resource = {
 48	.flags		= IORESOURCE_MEM,
 49	.start		= RD88F5181L_GE_NOR_BOOT_BASE,
 50	.end		= RD88F5181L_GE_NOR_BOOT_BASE +
 51			  RD88F5181L_GE_NOR_BOOT_SIZE - 1,
 52};
 53
 54static struct platform_device rd88f5181l_ge_nor_boot_flash = {
 55	.name			= "physmap-flash",
 56	.id			= 0,
 57	.dev		= {
 58		.platform_data	= &rd88f5181l_ge_nor_boot_flash_data,
 59	},
 60	.num_resources		= 1,
 61	.resource		= &rd88f5181l_ge_nor_boot_flash_resource,
 62};
 63
 64
 65/*****************************************************************************
 66 * General Setup
 67 ****************************************************************************/
 68static unsigned int rd88f5181l_ge_mpp_modes[] __initdata = {
 69	MPP0_GPIO,		/* LED1 */
 70	MPP1_GPIO,		/* LED5 */
 71	MPP2_GPIO,		/* LED4 */
 72	MPP3_GPIO,		/* LED3 */
 73	MPP4_GPIO,		/* PCI_intA */
 74	MPP5_GPIO,		/* RTC interrupt */
 75	MPP6_PCI_CLK,		/* CPU PCI refclk */
 76	MPP7_PCI_CLK,		/* PCI/PCIe refclk */
 77	MPP8_GPIO,		/* 88e6131 interrupt */
 78	MPP9_GPIO,		/* GE_RXERR */
 79	MPP10_GPIO,		/* PCI_intB */
 80	MPP11_GPIO,		/* LED2 */
 81	MPP12_GIGE,		/* GE_TXD[4] */
 82	MPP13_GIGE,		/* GE_TXD[5] */
 83	MPP14_GIGE,		/* GE_TXD[6] */
 84	MPP15_GIGE,		/* GE_TXD[7] */
 85	MPP16_GIGE,		/* GE_RXD[4] */
 86	MPP17_GIGE,		/* GE_RXD[5] */
 87	MPP18_GIGE,		/* GE_RXD[6] */
 88	MPP19_GIGE,		/* GE_RXD[7] */
 89	0,
 90};
 91
 92static struct mv643xx_eth_platform_data rd88f5181l_ge_eth_data = {
 93	.phy_addr	= MV643XX_ETH_PHY_NONE,
 94	.speed		= SPEED_1000,
 95	.duplex		= DUPLEX_FULL,
 96};
 97
 98static struct dsa_chip_data rd88f5181l_ge_switch_chip_data = {
 99	.port_names[0]	= "lan2",
100	.port_names[1]	= "lan1",
101	.port_names[2]	= "wan",
102	.port_names[3]	= "cpu",
103	.port_names[5]	= "lan4",
104	.port_names[7]	= "lan3",
105};
106
107static struct dsa_platform_data rd88f5181l_ge_switch_plat_data = {
108	.nr_chips	= 1,
109	.chip		= &rd88f5181l_ge_switch_chip_data,
110};
111
112static struct i2c_board_info __initdata rd88f5181l_ge_i2c_rtc = {
113	I2C_BOARD_INFO("ds1338", 0x68),
114};
115
116static void __init rd88f5181l_ge_init(void)
117{
118	/*
119	 * Setup basic Orion functions. Need to be called early.
120	 */
121	orion5x_init();
122
123	orion5x_mpp_conf(rd88f5181l_ge_mpp_modes);
124
125	/*
126	 * Configure peripherals.
127	 */
128	orion5x_ehci0_init();
129	orion5x_eth_init(&rd88f5181l_ge_eth_data);
130	orion5x_eth_switch_init(&rd88f5181l_ge_switch_plat_data,
131				gpio_to_irq(8));
132	orion5x_i2c_init();
133	orion5x_uart0_init();
134
135	orion5x_setup_dev_boot_win(RD88F5181L_GE_NOR_BOOT_BASE,
136				   RD88F5181L_GE_NOR_BOOT_SIZE);
137	platform_device_register(&rd88f5181l_ge_nor_boot_flash);
138
139	i2c_register_board_info(0, &rd88f5181l_ge_i2c_rtc, 1);
140}
141
142static int __init
143rd88f5181l_ge_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
144{
145	int irq;
146
147	/*
148	 * Check for devices with hard-wired IRQs.
149	 */
150	irq = orion5x_pci_map_irq(dev, slot, pin);
151	if (irq != -1)
152		return irq;
153
154	/*
155	 * Cardbus slot.
156	 */
157	if (pin == 1)
158		return gpio_to_irq(4);
159	else
160		return gpio_to_irq(10);
161}
162
163static struct hw_pci rd88f5181l_ge_pci __initdata = {
164	.nr_controllers	= 2,
165	.swizzle	= pci_std_swizzle,
166	.setup		= orion5x_pci_sys_setup,
167	.scan		= orion5x_pci_sys_scan_bus,
168	.map_irq	= rd88f5181l_ge_pci_map_irq,
169};
170
171static int __init rd88f5181l_ge_pci_init(void)
172{
173	if (machine_is_rd88f5181l_ge()) {
174		orion5x_pci_set_cardbus_mode();
175		pci_common_init(&rd88f5181l_ge_pci);
176	}
177
178	return 0;
179}
180subsys_initcall(rd88f5181l_ge_pci_init);
181
182MACHINE_START(RD88F5181L_GE, "Marvell Orion-VoIP GE Reference Design")
183	/* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
184	.boot_params	= 0x00000100,
185	.init_machine	= rd88f5181l_ge_init,
186	.map_io		= orion5x_map_io,
187	.init_early	= orion5x_init_early,
188	.init_irq	= orion5x_init_irq,
189	.timer		= &orion5x_timer,
190	.fixup		= tag_fixup_mem32,
191MACHINE_END