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/arch/arm/mach-mmp/include/mach/regs-smc.h

https://github.com/AICP/kernel_google_msm
C Header | 37 lines | 23 code | 5 blank | 9 comment | 0 complexity | c680727be0f4901328923eb3e83a5b53 MD5 | raw file
 1/*
 2 * linux/arch/arm/mach-mmp/include/mach/regs-smc.h
 3 *
 4 *  Static Memory Controller Registers
 5 *
 6 * This program is free software; you can redistribute it and/or modify
 7 * it under the terms of the GNU General Public License version 2 as
 8 * published by the Free Software Foundation.
 9 */
10
11#ifndef __ASM_MACH_REGS_SMC_H
12#define __ASM_MACH_REGS_SMC_H
13
14#include <mach/addr-map.h>
15
16#define SMC_VIRT_BASE		(AXI_VIRT_BASE + 0x83800)
17#define SMC_REG(x)		(SMC_VIRT_BASE + (x))
18
19#define SMC_MSC0		SMC_REG(0x0020)
20#define SMC_MSC1		SMC_REG(0x0024)
21#define SMC_SXCNFG0		SMC_REG(0x0030)
22#define SMC_SXCNFG1		SMC_REG(0x0034)
23#define SMC_MEMCLKCFG		SMC_REG(0x0068)
24#define SMC_CSDFICFG0		SMC_REG(0x0090)
25#define SMC_CSDFICFG1		SMC_REG(0x0094)
26#define SMC_CLK_RET_DEL		SMC_REG(0x00b0)
27#define SMC_ADV_RET_DEL		SMC_REG(0x00b4)
28#define SMC_CSADRMAP0		SMC_REG(0x00c0)
29#define SMC_CSADRMAP1		SMC_REG(0x00c4)
30#define SMC_WE_AP0		SMC_REG(0x00e0)
31#define SMC_WE_AP1		SMC_REG(0x00e4)
32#define SMC_OE_AP0		SMC_REG(0x00f0)
33#define SMC_OE_AP1		SMC_REG(0x00f4)
34#define SMC_ADV_AP0		SMC_REG(0x0100)
35#define SMC_ADV_AP1		SMC_REG(0x0104)
36
37#endif /* __ASM_MACH_REGS_SMC_H */