/arch/arm/mach-msm/board-8930-display.c

https://github.com/AICP/kernel_google_msm · C · 847 lines · 729 code · 91 blank · 27 comment · 69 complexity · 8c60bd743805b7a3de6d5bd2d8ce9491 MD5 · raw file

  1. /* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. */
  13. #include <linux/init.h>
  14. #include <linux/ioport.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/bootmem.h>
  17. #include <linux/gpio.h>
  18. #include <asm/mach-types.h>
  19. #include <mach/msm_bus_board.h>
  20. #include <mach/msm_memtypes.h>
  21. #include <mach/board.h>
  22. #include <mach/gpiomux.h>
  23. #include <mach/socinfo.h>
  24. #include <linux/msm_ion.h>
  25. #include <mach/ion.h>
  26. #include "devices.h"
  27. #include "board-8930.h"
  28. #ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
  29. #define MSM_FB_PRIM_BUF_SIZE \
  30. (roundup((1920 * 1088 * 4), 4096) * 3) /* 4 bpp x 3 pages */
  31. #else
  32. #define MSM_FB_PRIM_BUF_SIZE \
  33. (roundup((1920 * 1088 * 4), 4096) * 2) /* 4 bpp x 2 pages */
  34. #endif
  35. /* Note: must be multiple of 4096 */
  36. #define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE, 4096)
  37. #ifdef CONFIG_FB_MSM_OVERLAY0_WRITEBACK
  38. #define MSM_FB_OVERLAY0_WRITEBACK_SIZE roundup((1376 * 768 * 3 * 2), 4096)
  39. #else
  40. #define MSM_FB_OVERLAY0_WRITEBACK_SIZE (0)
  41. #endif /* CONFIG_FB_MSM_OVERLAY0_WRITEBACK */
  42. #ifdef CONFIG_FB_MSM_OVERLAY1_WRITEBACK
  43. #define MSM_FB_OVERLAY1_WRITEBACK_SIZE roundup((1920 * 1088 * 3 * 2), 4096)
  44. #else
  45. #define MSM_FB_OVERLAY1_WRITEBACK_SIZE (0)
  46. #endif /* CONFIG_FB_MSM_OVERLAY1_WRITEBACK */
  47. #define MDP_VSYNC_GPIO 0
  48. #define MIPI_CMD_NOVATEK_QHD_PANEL_NAME "mipi_cmd_novatek_qhd"
  49. #define MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME "mipi_video_novatek_qhd"
  50. #define MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME "mipi_video_toshiba_wsvga"
  51. #define MIPI_VIDEO_CHIMEI_WXGA_PANEL_NAME "mipi_video_chimei_wxga"
  52. #define MIPI_VIDEO_SIMULATOR_VGA_PANEL_NAME "mipi_video_simulator_vga"
  53. #define MIPI_CMD_RENESAS_FWVGA_PANEL_NAME "mipi_cmd_renesas_fwvga"
  54. #define HDMI_PANEL_NAME "hdmi_msm"
  55. #define TVOUT_PANEL_NAME "tvout_msm"
  56. static struct resource msm_fb_resources[] = {
  57. {
  58. .flags = IORESOURCE_DMA,
  59. }
  60. };
  61. static int msm_fb_detect_panel(const char *name)
  62. {
  63. if (!strncmp(name, MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
  64. strnlen(MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
  65. PANEL_NAME_MAX_LEN)))
  66. return 0;
  67. #if !defined(CONFIG_FB_MSM_LVDS_MIPI_PANEL_DETECT) && \
  68. !defined(CONFIG_FB_MSM_MIPI_PANEL_DETECT)
  69. if (!strncmp(name, MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
  70. strnlen(MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
  71. PANEL_NAME_MAX_LEN)))
  72. return 0;
  73. if (!strncmp(name, MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME,
  74. strnlen(MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME,
  75. PANEL_NAME_MAX_LEN)))
  76. return 0;
  77. if (!strncmp(name, MIPI_VIDEO_SIMULATOR_VGA_PANEL_NAME,
  78. strnlen(MIPI_VIDEO_SIMULATOR_VGA_PANEL_NAME,
  79. PANEL_NAME_MAX_LEN)))
  80. return 0;
  81. if (!strncmp(name, MIPI_CMD_RENESAS_FWVGA_PANEL_NAME,
  82. strnlen(MIPI_CMD_RENESAS_FWVGA_PANEL_NAME,
  83. PANEL_NAME_MAX_LEN)))
  84. return 0;
  85. #endif
  86. if (!strncmp(name, HDMI_PANEL_NAME,
  87. strnlen(HDMI_PANEL_NAME,
  88. PANEL_NAME_MAX_LEN)))
  89. return 0;
  90. if (!strncmp(name, TVOUT_PANEL_NAME,
  91. strnlen(TVOUT_PANEL_NAME,
  92. PANEL_NAME_MAX_LEN)))
  93. return 0;
  94. pr_warning("%s: not supported '%s'", __func__, name);
  95. return -ENODEV;
  96. }
  97. static struct msm_fb_platform_data msm_fb_pdata = {
  98. .detect_client = msm_fb_detect_panel,
  99. };
  100. static struct platform_device msm_fb_device = {
  101. .name = "msm_fb",
  102. .id = 0,
  103. .num_resources = ARRAY_SIZE(msm_fb_resources),
  104. .resource = msm_fb_resources,
  105. .dev.platform_data = &msm_fb_pdata,
  106. };
  107. static bool dsi_power_on;
  108. static struct mipi_dsi_panel_platform_data novatek_pdata;
  109. static void pm8917_gpio_set_backlight(int bl_level)
  110. {
  111. int gpio24 = PM8917_GPIO_PM_TO_SYS(24);
  112. if (bl_level > 0)
  113. gpio_set_value_cansleep(gpio24, 1);
  114. else
  115. gpio_set_value_cansleep(gpio24, 0);
  116. }
  117. /*
  118. * TODO: When physical 8930/PM8038 hardware becomes
  119. * available, replace mipi_dsi_cdp_panel_power with
  120. * appropriate function.
  121. */
  122. #define DISP_RST_GPIO 58
  123. #define DISP_3D_2D_MODE 1
  124. static int mipi_dsi_cdp_panel_power(int on)
  125. {
  126. static struct regulator *reg_l8, *reg_l23, *reg_l2;
  127. /* Control backlight GPIO (24) directly when using PM8917 */
  128. int gpio24 = PM8917_GPIO_PM_TO_SYS(24);
  129. int rc;
  130. pr_debug("%s: state : %d\n", __func__, on);
  131. if (!dsi_power_on) {
  132. reg_l8 = regulator_get(&msm_mipi_dsi1_device.dev,
  133. "dsi_vdc");
  134. if (IS_ERR(reg_l8)) {
  135. pr_err("could not get 8038_l8, rc = %ld\n",
  136. PTR_ERR(reg_l8));
  137. return -ENODEV;
  138. }
  139. reg_l23 = regulator_get(&msm_mipi_dsi1_device.dev,
  140. "dsi_vddio");
  141. if (IS_ERR(reg_l23)) {
  142. pr_err("could not get 8038_l23, rc = %ld\n",
  143. PTR_ERR(reg_l23));
  144. return -ENODEV;
  145. }
  146. reg_l2 = regulator_get(&msm_mipi_dsi1_device.dev,
  147. "dsi_vdda");
  148. if (IS_ERR(reg_l2)) {
  149. pr_err("could not get 8038_l2, rc = %ld\n",
  150. PTR_ERR(reg_l2));
  151. return -ENODEV;
  152. }
  153. rc = regulator_set_voltage(reg_l8, 2800000, 3000000);
  154. if (rc) {
  155. pr_err("set_voltage l8 failed, rc=%d\n", rc);
  156. return -EINVAL;
  157. }
  158. rc = regulator_set_voltage(reg_l23, 1800000, 1800000);
  159. if (rc) {
  160. pr_err("set_voltage l23 failed, rc=%d\n", rc);
  161. return -EINVAL;
  162. }
  163. rc = regulator_set_voltage(reg_l2, 1200000, 1200000);
  164. if (rc) {
  165. pr_err("set_voltage l2 failed, rc=%d\n", rc);
  166. return -EINVAL;
  167. }
  168. rc = gpio_request(DISP_RST_GPIO, "disp_rst_n");
  169. if (rc) {
  170. pr_err("request gpio DISP_RST_GPIO failed, rc=%d\n",
  171. rc);
  172. gpio_free(DISP_RST_GPIO);
  173. return -ENODEV;
  174. }
  175. rc = gpio_request(DISP_3D_2D_MODE, "disp_3d_2d");
  176. if (rc) {
  177. pr_err("request gpio DISP_3D_2D_MODE failed, rc=%d\n",
  178. rc);
  179. gpio_free(DISP_3D_2D_MODE);
  180. return -ENODEV;
  181. }
  182. rc = gpio_direction_output(DISP_3D_2D_MODE, 0);
  183. if (rc) {
  184. pr_err("gpio_direction_output failed for %d gpio rc=%d\n",
  185. DISP_3D_2D_MODE, rc);
  186. return -ENODEV;
  187. }
  188. if (socinfo_get_pmic_model() == PMIC_MODEL_PM8917) {
  189. rc = gpio_request(gpio24, "disp_bl");
  190. if (rc) {
  191. pr_err("request for gpio 24 failed, rc=%d\n",
  192. rc);
  193. return -ENODEV;
  194. }
  195. gpio_set_value_cansleep(gpio24, 0);
  196. novatek_pdata.gpio_set_backlight =
  197. pm8917_gpio_set_backlight;
  198. }
  199. dsi_power_on = true;
  200. }
  201. if (on) {
  202. rc = regulator_set_optimum_mode(reg_l8, 100000);
  203. if (rc < 0) {
  204. pr_err("set_optimum_mode l8 failed, rc=%d\n", rc);
  205. return -EINVAL;
  206. }
  207. rc = regulator_set_optimum_mode(reg_l23, 100000);
  208. if (rc < 0) {
  209. pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
  210. return -EINVAL;
  211. }
  212. rc = regulator_set_optimum_mode(reg_l2, 100000);
  213. if (rc < 0) {
  214. pr_err("set_optimum_mode l2 failed, rc=%d\n", rc);
  215. return -EINVAL;
  216. }
  217. rc = regulator_enable(reg_l8);
  218. if (rc) {
  219. pr_err("enable l8 failed, rc=%d\n", rc);
  220. return -ENODEV;
  221. }
  222. rc = regulator_enable(reg_l23);
  223. if (rc) {
  224. pr_err("enable l8 failed, rc=%d\n", rc);
  225. return -ENODEV;
  226. }
  227. rc = regulator_enable(reg_l2);
  228. if (rc) {
  229. pr_err("enable l2 failed, rc=%d\n", rc);
  230. return -ENODEV;
  231. }
  232. usleep(10000);
  233. gpio_set_value(DISP_RST_GPIO, 1);
  234. usleep(10);
  235. gpio_set_value(DISP_RST_GPIO, 0);
  236. usleep(20);
  237. gpio_set_value(DISP_RST_GPIO, 1);
  238. gpio_set_value(DISP_3D_2D_MODE, 1);
  239. usleep(20);
  240. } else {
  241. gpio_set_value(DISP_RST_GPIO, 0);
  242. rc = regulator_disable(reg_l2);
  243. if (rc) {
  244. pr_err("disable reg_l2 failed, rc=%d\n", rc);
  245. return -ENODEV;
  246. }
  247. rc = regulator_disable(reg_l8);
  248. if (rc) {
  249. pr_err("disable reg_l8 failed, rc=%d\n", rc);
  250. return -ENODEV;
  251. }
  252. rc = regulator_disable(reg_l23);
  253. if (rc) {
  254. pr_err("disable reg_l23 failed, rc=%d\n", rc);
  255. return -ENODEV;
  256. }
  257. rc = regulator_set_optimum_mode(reg_l8, 100);
  258. if (rc < 0) {
  259. pr_err("set_optimum_mode l8 failed, rc=%d\n", rc);
  260. return -EINVAL;
  261. }
  262. rc = regulator_set_optimum_mode(reg_l23, 100);
  263. if (rc < 0) {
  264. pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
  265. return -EINVAL;
  266. }
  267. rc = regulator_set_optimum_mode(reg_l2, 100);
  268. if (rc < 0) {
  269. pr_err("set_optimum_mode l2 failed, rc=%d\n", rc);
  270. return -EINVAL;
  271. }
  272. gpio_set_value(DISP_3D_2D_MODE, 0);
  273. usleep(20);
  274. }
  275. return 0;
  276. }
  277. static int mipi_dsi_panel_power(int on)
  278. {
  279. pr_debug("%s: on=%d\n", __func__, on);
  280. return mipi_dsi_cdp_panel_power(on);
  281. }
  282. static struct mipi_dsi_platform_data mipi_dsi_pdata = {
  283. .vsync_gpio = MDP_VSYNC_GPIO,
  284. .dsi_power_save = mipi_dsi_panel_power,
  285. };
  286. #ifdef CONFIG_MSM_BUS_SCALING
  287. static struct msm_bus_vectors mdp_init_vectors[] = {
  288. {
  289. .src = MSM_BUS_MASTER_MDP_PORT0,
  290. .dst = MSM_BUS_SLAVE_EBI_CH0,
  291. .ab = 0,
  292. .ib = 0,
  293. },
  294. };
  295. #ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
  296. static struct msm_bus_vectors hdmi_as_primary_vectors[] = {
  297. /* If HDMI is used as primary */
  298. {
  299. .src = MSM_BUS_MASTER_MDP_PORT0,
  300. .dst = MSM_BUS_SLAVE_EBI_CH0,
  301. .ab = 2000000000,
  302. .ib = 2000000000,
  303. },
  304. };
  305. static struct msm_bus_paths mdp_bus_scale_usecases[] = {
  306. {
  307. ARRAY_SIZE(mdp_init_vectors),
  308. mdp_init_vectors,
  309. },
  310. {
  311. ARRAY_SIZE(hdmi_as_primary_vectors),
  312. hdmi_as_primary_vectors,
  313. },
  314. {
  315. ARRAY_SIZE(hdmi_as_primary_vectors),
  316. hdmi_as_primary_vectors,
  317. },
  318. {
  319. ARRAY_SIZE(hdmi_as_primary_vectors),
  320. hdmi_as_primary_vectors,
  321. },
  322. {
  323. ARRAY_SIZE(hdmi_as_primary_vectors),
  324. hdmi_as_primary_vectors,
  325. },
  326. {
  327. ARRAY_SIZE(hdmi_as_primary_vectors),
  328. hdmi_as_primary_vectors,
  329. },
  330. };
  331. #else
  332. static struct msm_bus_vectors mdp_ui_vectors[] = {
  333. {
  334. .src = MSM_BUS_MASTER_MDP_PORT0,
  335. .dst = MSM_BUS_SLAVE_EBI_CH0,
  336. .ab = 216000000 * 2,
  337. .ib = 270000000 * 2,
  338. },
  339. };
  340. static struct msm_bus_vectors mdp_vga_vectors[] = {
  341. /* VGA and less video */
  342. {
  343. .src = MSM_BUS_MASTER_MDP_PORT0,
  344. .dst = MSM_BUS_SLAVE_EBI_CH0,
  345. .ab = 216000000 * 2,
  346. .ib = 270000000 * 2,
  347. },
  348. };
  349. static struct msm_bus_vectors mdp_720p_vectors[] = {
  350. /* 720p and less video */
  351. {
  352. .src = MSM_BUS_MASTER_MDP_PORT0,
  353. .dst = MSM_BUS_SLAVE_EBI_CH0,
  354. .ab = 230400000 * 2,
  355. .ib = 288000000 * 2,
  356. },
  357. };
  358. static struct msm_bus_vectors mdp_1080p_vectors[] = {
  359. /* 1080p and less video */
  360. {
  361. .src = MSM_BUS_MASTER_MDP_PORT0,
  362. .dst = MSM_BUS_SLAVE_EBI_CH0,
  363. .ab = 334080000 * 2,
  364. .ib = 417600000 * 2,
  365. },
  366. };
  367. static struct msm_bus_paths mdp_bus_scale_usecases[] = {
  368. {
  369. ARRAY_SIZE(mdp_init_vectors),
  370. mdp_init_vectors,
  371. },
  372. {
  373. ARRAY_SIZE(mdp_ui_vectors),
  374. mdp_ui_vectors,
  375. },
  376. {
  377. ARRAY_SIZE(mdp_ui_vectors),
  378. mdp_ui_vectors,
  379. },
  380. {
  381. ARRAY_SIZE(mdp_vga_vectors),
  382. mdp_vga_vectors,
  383. },
  384. {
  385. ARRAY_SIZE(mdp_720p_vectors),
  386. mdp_720p_vectors,
  387. },
  388. {
  389. ARRAY_SIZE(mdp_1080p_vectors),
  390. mdp_1080p_vectors,
  391. },
  392. };
  393. #endif
  394. static struct msm_bus_scale_pdata mdp_bus_scale_pdata = {
  395. mdp_bus_scale_usecases,
  396. ARRAY_SIZE(mdp_bus_scale_usecases),
  397. .name = "mdp",
  398. };
  399. #endif
  400. static struct msm_panel_common_pdata mdp_pdata = {
  401. .gpio = MDP_VSYNC_GPIO,
  402. .mdp_max_clk = 200000000,
  403. .mdp_max_bw = 2000000000,
  404. .mdp_bw_ab_factor = 115,
  405. .mdp_bw_ib_factor = 125,
  406. #ifdef CONFIG_MSM_BUS_SCALING
  407. .mdp_bus_scale_table = &mdp_bus_scale_pdata,
  408. #endif
  409. .mdp_rev = MDP_REV_43,
  410. #ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
  411. .mem_hid = BIT(ION_CP_MM_HEAP_ID),
  412. #else
  413. .mem_hid = MEMTYPE_EBI1,
  414. #endif
  415. .mdp_iommu_split_domain = 0,
  416. };
  417. void __init msm8930_mdp_writeback(struct memtype_reserve* reserve_table)
  418. {
  419. mdp_pdata.ov0_wb_size = MSM_FB_OVERLAY0_WRITEBACK_SIZE;
  420. mdp_pdata.ov1_wb_size = MSM_FB_OVERLAY1_WRITEBACK_SIZE;
  421. #if defined(CONFIG_ANDROID_PMEM) && !defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
  422. reserve_table[mdp_pdata.mem_hid].size +=
  423. mdp_pdata.ov0_wb_size;
  424. reserve_table[mdp_pdata.mem_hid].size +=
  425. mdp_pdata.ov1_wb_size;
  426. #endif
  427. }
  428. #define LPM_CHANNEL0 0
  429. static int toshiba_gpio[] = {LPM_CHANNEL0};
  430. static struct mipi_dsi_panel_platform_data toshiba_pdata = {
  431. .gpio = toshiba_gpio,
  432. };
  433. static struct platform_device mipi_dsi_toshiba_panel_device = {
  434. .name = "mipi_toshiba",
  435. .id = 0,
  436. .dev = {
  437. .platform_data = &toshiba_pdata,
  438. }
  439. };
  440. #define FPGA_3D_GPIO_CONFIG_ADDR 0xB5
  441. static struct mipi_dsi_phy_ctrl dsi_novatek_cmd_mode_phy_db = {
  442. /* DSI_BIT_CLK at 500MHz, 2 lane, RGB888 */
  443. {0x09, 0x08, 0x05, 0x00, 0x20}, /* regulator */
  444. /* timing */
  445. {0xab, 0x8a, 0x18, 0x00, 0x92, 0x97, 0x1b, 0x8c,
  446. 0x0c, 0x03, 0x04, 0xa0},
  447. {0x5f, 0x00, 0x00, 0x10}, /* phy ctrl */
  448. {0xff, 0x00, 0x06, 0x00}, /* strength */
  449. /* pll control */
  450. {0x0, 0xe, 0x30, 0xda, 0x00, 0x10, 0x0f, 0x61,
  451. 0x40, 0x07, 0x03,
  452. 0x00, 0x1a, 0x00, 0x00, 0x02, 0x00, 0x20, 0x00, 0x02},
  453. };
  454. static struct mipi_dsi_panel_platform_data novatek_pdata = {
  455. .fpga_3d_config_addr = FPGA_3D_GPIO_CONFIG_ADDR,
  456. .fpga_ctrl_mode = FPGA_SPI_INTF,
  457. .phy_ctrl_settings = &dsi_novatek_cmd_mode_phy_db,
  458. .dlane_swap = 0x1,
  459. .enable_wled_bl_ctrl = 0x1,
  460. };
  461. static struct platform_device mipi_dsi_novatek_panel_device = {
  462. .name = "mipi_novatek",
  463. .id = 0,
  464. .dev = {
  465. .platform_data = &novatek_pdata,
  466. }
  467. };
  468. #ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
  469. static struct resource hdmi_msm_resources[] = {
  470. {
  471. .name = "hdmi_msm_qfprom_addr",
  472. .start = 0x00700000,
  473. .end = 0x007060FF,
  474. .flags = IORESOURCE_MEM,
  475. },
  476. {
  477. .name = "hdmi_msm_hdmi_addr",
  478. .start = 0x04A00000,
  479. .end = 0x04A00FFF,
  480. .flags = IORESOURCE_MEM,
  481. },
  482. {
  483. .name = "hdmi_msm_irq",
  484. .start = HDMI_IRQ,
  485. .end = HDMI_IRQ,
  486. .flags = IORESOURCE_IRQ,
  487. },
  488. };
  489. static int hdmi_enable_5v(int on);
  490. static int hdmi_core_power(int on, int show);
  491. static int hdmi_cec_power(int on);
  492. static int hdmi_gpio_config(int on);
  493. static int hdmi_panel_power(int on);
  494. static struct msm_hdmi_platform_data hdmi_msm_data = {
  495. .irq = HDMI_IRQ,
  496. .enable_5v = hdmi_enable_5v,
  497. .core_power = hdmi_core_power,
  498. .cec_power = hdmi_cec_power,
  499. .panel_power = hdmi_panel_power,
  500. .gpio_config = hdmi_gpio_config,
  501. };
  502. static struct platform_device hdmi_msm_device = {
  503. .name = "hdmi_msm",
  504. .id = 0,
  505. .num_resources = ARRAY_SIZE(hdmi_msm_resources),
  506. .resource = hdmi_msm_resources,
  507. .dev.platform_data = &hdmi_msm_data,
  508. };
  509. #endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
  510. #ifdef CONFIG_FB_MSM_WRITEBACK_MSM_PANEL
  511. static struct platform_device wfd_panel_device = {
  512. .name = "wfd_panel",
  513. .id = 0,
  514. .dev.platform_data = NULL,
  515. };
  516. static struct platform_device wfd_device = {
  517. .name = "msm_wfd",
  518. .id = -1,
  519. };
  520. #endif
  521. #ifdef CONFIG_MSM_BUS_SCALING
  522. static struct msm_bus_vectors dtv_bus_init_vectors[] = {
  523. {
  524. .src = MSM_BUS_MASTER_MDP_PORT0,
  525. .dst = MSM_BUS_SLAVE_EBI_CH0,
  526. .ab = 0,
  527. .ib = 0,
  528. },
  529. };
  530. #ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
  531. static struct msm_bus_vectors dtv_bus_def_vectors[] = {
  532. {
  533. .src = MSM_BUS_MASTER_MDP_PORT0,
  534. .dst = MSM_BUS_SLAVE_EBI_CH0,
  535. .ab = 2000000000,
  536. .ib = 2000000000,
  537. },
  538. };
  539. #else
  540. static struct msm_bus_vectors dtv_bus_def_vectors[] = {
  541. {
  542. .src = MSM_BUS_MASTER_MDP_PORT0,
  543. .dst = MSM_BUS_SLAVE_EBI_CH0,
  544. .ab = 566092800 * 2,
  545. .ib = 707616000 * 2,
  546. },
  547. };
  548. #endif
  549. static struct msm_bus_paths dtv_bus_scale_usecases[] = {
  550. {
  551. ARRAY_SIZE(dtv_bus_init_vectors),
  552. dtv_bus_init_vectors,
  553. },
  554. {
  555. ARRAY_SIZE(dtv_bus_def_vectors),
  556. dtv_bus_def_vectors,
  557. },
  558. };
  559. static struct msm_bus_scale_pdata dtv_bus_scale_pdata = {
  560. dtv_bus_scale_usecases,
  561. ARRAY_SIZE(dtv_bus_scale_usecases),
  562. .name = "dtv",
  563. };
  564. static struct lcdc_platform_data dtv_pdata = {
  565. .bus_scale_table = &dtv_bus_scale_pdata,
  566. .lcdc_power_save = hdmi_panel_power,
  567. };
  568. static int hdmi_panel_power(int on)
  569. {
  570. int rc;
  571. pr_debug("%s: HDMI Core: %s\n", __func__, (on ? "ON" : "OFF"));
  572. rc = hdmi_core_power(on, 1);
  573. if (rc)
  574. rc = hdmi_cec_power(on);
  575. pr_debug("%s: HDMI Core: %s Success\n", __func__, (on ? "ON" : "OFF"));
  576. return rc;
  577. }
  578. #endif
  579. #ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
  580. static int hdmi_enable_5v(int on)
  581. {
  582. static struct regulator *reg_ext_5v; /* HDMI_5V */
  583. static int prev_on;
  584. int rc;
  585. if (on == prev_on)
  586. return 0;
  587. if (!reg_ext_5v) {
  588. reg_ext_5v = regulator_get(&hdmi_msm_device.dev, "hdmi_mvs");
  589. if (IS_ERR(reg_ext_5v)) {
  590. pr_err("'%s' regulator not found, rc=%ld\n",
  591. "hdmi_mvs", IS_ERR(reg_ext_5v));
  592. reg_ext_5v = NULL;
  593. return -ENODEV;
  594. }
  595. }
  596. if (on) {
  597. rc = regulator_enable(reg_ext_5v);
  598. if (rc) {
  599. pr_err("'%s' regulator enable failed, rc=%d\n",
  600. "reg_ext_5v", rc);
  601. return rc;
  602. }
  603. pr_debug("%s(on): success\n", __func__);
  604. } else {
  605. rc = regulator_disable(reg_ext_5v);
  606. if (rc)
  607. pr_warning("'%s' regulator disable failed, rc=%d\n",
  608. "reg_ext_5v", rc);
  609. pr_debug("%s(off): success\n", __func__);
  610. }
  611. prev_on = on;
  612. return 0;
  613. }
  614. static int hdmi_core_power(int on, int show)
  615. {
  616. /* Both HDMI "avdd" and "vcc" are powered by 8038_l23 regulator */
  617. static struct regulator *reg_8038_l23;
  618. static int prev_on;
  619. int rc;
  620. if (on == prev_on)
  621. return 0;
  622. if (!reg_8038_l23) {
  623. reg_8038_l23 = regulator_get(&hdmi_msm_device.dev, "hdmi_avdd");
  624. if (IS_ERR(reg_8038_l23)) {
  625. pr_err("could not get reg_8038_l23, rc = %ld\n",
  626. PTR_ERR(reg_8038_l23));
  627. return -ENODEV;
  628. }
  629. rc = regulator_set_voltage(reg_8038_l23, 1800000, 1800000);
  630. if (rc) {
  631. pr_err("set_voltage failed for 8921_l23, rc=%d\n", rc);
  632. return -EINVAL;
  633. }
  634. }
  635. if (on) {
  636. rc = regulator_set_optimum_mode(reg_8038_l23, 100000);
  637. if (rc < 0) {
  638. pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
  639. return -EINVAL;
  640. }
  641. rc = regulator_enable(reg_8038_l23);
  642. if (rc) {
  643. pr_err("'%s' regulator enable failed, rc=%d\n",
  644. "hdmi_avdd", rc);
  645. return rc;
  646. }
  647. pr_debug("%s(on): success\n", __func__);
  648. } else {
  649. rc = regulator_disable(reg_8038_l23);
  650. if (rc) {
  651. pr_err("disable reg_8038_l23 failed, rc=%d\n", rc);
  652. return -ENODEV;
  653. }
  654. rc = regulator_set_optimum_mode(reg_8038_l23, 100);
  655. if (rc < 0) {
  656. pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
  657. return -EINVAL;
  658. }
  659. pr_debug("%s(off): success\n", __func__);
  660. }
  661. prev_on = on;
  662. return 0;
  663. }
  664. static int hdmi_gpio_config(int on)
  665. {
  666. int rc = 0;
  667. static int prev_on;
  668. if (on == prev_on)
  669. return 0;
  670. if (on) {
  671. rc = gpio_request(100, "HDMI_DDC_CLK");
  672. if (rc) {
  673. pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
  674. "HDMI_DDC_CLK", 100, rc);
  675. return rc;
  676. }
  677. rc = gpio_request(101, "HDMI_DDC_DATA");
  678. if (rc) {
  679. pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
  680. "HDMI_DDC_DATA", 101, rc);
  681. goto error1;
  682. }
  683. rc = gpio_request(102, "HDMI_HPD");
  684. if (rc) {
  685. pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
  686. "HDMI_HPD", 102, rc);
  687. goto error2;
  688. }
  689. pr_debug("%s(on): success\n", __func__);
  690. } else {
  691. gpio_free(100);
  692. gpio_free(101);
  693. gpio_free(102);
  694. pr_debug("%s(off): success\n", __func__);
  695. }
  696. prev_on = on;
  697. return 0;
  698. error2:
  699. gpio_free(101);
  700. error1:
  701. gpio_free(100);
  702. return rc;
  703. }
  704. static int hdmi_cec_power(int on)
  705. {
  706. static int prev_on;
  707. int rc;
  708. if (on == prev_on)
  709. return 0;
  710. if (on) {
  711. rc = gpio_request(99, "HDMI_CEC_VAR");
  712. if (rc) {
  713. pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
  714. "HDMI_CEC_VAR", 99, rc);
  715. goto error;
  716. }
  717. pr_debug("%s(on): success\n", __func__);
  718. } else {
  719. gpio_free(99);
  720. pr_debug("%s(off): success\n", __func__);
  721. }
  722. prev_on = on;
  723. return 0;
  724. error:
  725. return rc;
  726. }
  727. #endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
  728. void __init msm8930_init_fb(void)
  729. {
  730. platform_device_register(&msm_fb_device);
  731. #ifdef CONFIG_FB_MSM_WRITEBACK_MSM_PANEL
  732. platform_device_register(&wfd_panel_device);
  733. platform_device_register(&wfd_device);
  734. #endif
  735. platform_device_register(&mipi_dsi_novatek_panel_device);
  736. #ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
  737. platform_device_register(&hdmi_msm_device);
  738. #endif
  739. platform_device_register(&mipi_dsi_toshiba_panel_device);
  740. msm_fb_register_device("mdp", &mdp_pdata);
  741. msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
  742. #ifdef CONFIG_MSM_BUS_SCALING
  743. msm_fb_register_device("dtv", &dtv_pdata);
  744. #endif
  745. }
  746. void __init msm8930_allocate_fb_region(void)
  747. {
  748. void *addr;
  749. unsigned long size;
  750. size = MSM_FB_SIZE;
  751. addr = alloc_bootmem_align(size, 0x1000);
  752. msm_fb_resources[0].start = __pa(addr);
  753. msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
  754. pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
  755. size, addr, __pa(addr));
  756. }