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/arch/arm/mach-msm/board-8930-regulator-pm8038.c

https://github.com/AICP/kernel_google_msm
C | 585 lines | 514 code | 36 blank | 35 comment | 0 complexity | adb8e31392c9510749fb3a916ab66e3e MD5 | raw file
  1/*
  2 * Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
  3 *
  4 * This program is free software; you can redistribute it and/or modify
  5 * it under the terms of the GNU General Public License version 2 and
  6 * only version 2 as published by the Free Software Foundation.
  7 *
  8 * This program is distributed in the hope that it will be useful,
  9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 11 * GNU General Public License for more details.
 12 */
 13
 14/*
 15 * This file contains regulator configuration and mappings for targets
 16 * consisting of MSM8930 and PM8038.
 17 */
 18
 19#include <linux/regulator/pm8xxx-regulator.h>
 20
 21#include "board-8930.h"
 22
 23#define VREG_CONSUMERS(_id) \
 24	static struct regulator_consumer_supply vreg_consumers_##_id[]
 25
 26/*
 27 * Consumer specific regulator names:
 28 *			 regulator name		consumer dev_name
 29 */
 30VREG_CONSUMERS(L1) = {
 31	REGULATOR_SUPPLY("8038_l1",		NULL),
 32	REGULATOR_SUPPLY("iris_vddrfa",		"wcnss_wlan.0"),
 33};
 34VREG_CONSUMERS(L2) = {
 35	REGULATOR_SUPPLY("8038_l2",		NULL),
 36	REGULATOR_SUPPLY("iris_vdddig",		"wcnss_wlan.0"),
 37	REGULATOR_SUPPLY("dsi_vdda",		"mipi_dsi.1"),
 38	REGULATOR_SUPPLY("mipi_csi_vdd",	"msm_csid.0"),
 39	REGULATOR_SUPPLY("mipi_csi_vdd",	"msm_csid.1"),
 40	REGULATOR_SUPPLY("mipi_csi_vdd",	"msm_csid.2"),
 41};
 42VREG_CONSUMERS(L3) = {
 43	REGULATOR_SUPPLY("8038_l3",		NULL),
 44	REGULATOR_SUPPLY("HSUSB_3p3",		"msm_otg"),
 45};
 46VREG_CONSUMERS(L4) = {
 47	REGULATOR_SUPPLY("8038_l4",		NULL),
 48	REGULATOR_SUPPLY("HSUSB_1p8",		"msm_otg"),
 49	REGULATOR_SUPPLY("iris_vddxo",		"wcnss_wlan.0"),
 50};
 51VREG_CONSUMERS(L5) = {
 52	REGULATOR_SUPPLY("8038_l5",		NULL),
 53	REGULATOR_SUPPLY("sdc_vdd",		"msm_sdcc.1"),
 54};
 55VREG_CONSUMERS(L6) = {
 56	REGULATOR_SUPPLY("8038_l6",		NULL),
 57	REGULATOR_SUPPLY("sdc_vdd",		"msm_sdcc.3"),
 58};
 59VREG_CONSUMERS(L7) = {
 60	REGULATOR_SUPPLY("8038_l7",		NULL),
 61};
 62VREG_CONSUMERS(L8) = {
 63	REGULATOR_SUPPLY("8038_l8",		NULL),
 64	REGULATOR_SUPPLY("dsi_vdc",		"mipi_dsi.1"),
 65};
 66VREG_CONSUMERS(L9) = {
 67	REGULATOR_SUPPLY("8038_l9",		NULL),
 68	REGULATOR_SUPPLY("vdd_ana",		"3-004a"),
 69	REGULATOR_SUPPLY("vdd",			"3-0024"),
 70	REGULATOR_SUPPLY("cam_vana",		"4-001a"),
 71	REGULATOR_SUPPLY("cam_vana",		"4-006c"),
 72	REGULATOR_SUPPLY("cam_vana",		"4-0048"),
 73	REGULATOR_SUPPLY("cam_vaf",		"4-001a"),
 74	REGULATOR_SUPPLY("cam_vaf",		"4-006c"),
 75	REGULATOR_SUPPLY("cam_vaf",		"4-0048"),
 76	REGULATOR_SUPPLY("cam_vana",            "4-0020"),
 77	REGULATOR_SUPPLY("cam_vaf",             "4-0020"),
 78	REGULATOR_SUPPLY("vdd",			"12-0018"),
 79	REGULATOR_SUPPLY("vdd",			"12-0068"),
 80};
 81VREG_CONSUMERS(L10) = {
 82	REGULATOR_SUPPLY("8038_l10",		NULL),
 83	REGULATOR_SUPPLY("iris_vddpa",		"wcnss_wlan.0"),
 84};
 85VREG_CONSUMERS(L11) = {
 86	REGULATOR_SUPPLY("8038_l11",		NULL),
 87	REGULATOR_SUPPLY("vdd_dig",		"3-004a"),
 88	REGULATOR_SUPPLY("iris_vddio",		"wcnss_wlan.0"),
 89	REGULATOR_SUPPLY("riva_vddpx",		"wcnss_wlan.0"),
 90	REGULATOR_SUPPLY("sdc_vdd_io",		"msm_sdcc.1"),
 91	REGULATOR_SUPPLY("VDDIO_CDC",		"sitar-slim"),
 92	REGULATOR_SUPPLY("CDC_VDDA_TX",		"sitar-slim"),
 93	REGULATOR_SUPPLY("CDC_VDDA_RX",		"sitar-slim"),
 94	REGULATOR_SUPPLY("VDDIO_CDC",		"sitar1p1-slim"),
 95	REGULATOR_SUPPLY("CDC_VDDA_TX",		"sitar1p1-slim"),
 96	REGULATOR_SUPPLY("CDC_VDDA_RX",		"sitar1p1-slim"),
 97	REGULATOR_SUPPLY("vddp",		"0-0048"),
 98	REGULATOR_SUPPLY("mhl_iovcc18",		"0-0039"),
 99};
100VREG_CONSUMERS(L12) = {
101	REGULATOR_SUPPLY("8038_l12",		NULL),
102	REGULATOR_SUPPLY("cam_vdig",		"4-001a"),
103	REGULATOR_SUPPLY("cam_vdig",		"4-006c"),
104	REGULATOR_SUPPLY("cam_vdig",		"4-0048"),
105	REGULATOR_SUPPLY("cam_vdig",            "4-0020"),
106};
107VREG_CONSUMERS(L13) = {
108	REGULATOR_SUPPLY("8038_l13",		NULL),
109};
110VREG_CONSUMERS(L14) = {
111	REGULATOR_SUPPLY("8038_l14",		NULL),
112	REGULATOR_SUPPLY("pa_therm",		"pm8xxx-adc"),
113};
114VREG_CONSUMERS(L15) = {
115	REGULATOR_SUPPLY("8038_l15",		NULL),
116};
117VREG_CONSUMERS(L16) = {
118	REGULATOR_SUPPLY("8038_l16",		NULL),
119	REGULATOR_SUPPLY("core_vdd",		"pil_qdsp6v4.2"),
120};
121VREG_CONSUMERS(L17) = {
122	REGULATOR_SUPPLY("8038_l17",		NULL),
123};
124VREG_CONSUMERS(L18) = {
125	REGULATOR_SUPPLY("8038_l18",		NULL),
126};
127VREG_CONSUMERS(L19) = {
128	REGULATOR_SUPPLY("8038_l19",		NULL),
129	REGULATOR_SUPPLY("core_vdd",		"pil_qdsp6v4.1"),
130};
131VREG_CONSUMERS(L20) = {
132	REGULATOR_SUPPLY("8038_l20",		NULL),
133	REGULATOR_SUPPLY("VDDD_CDC_D",		"sitar-slim"),
134	REGULATOR_SUPPLY("CDC_VDDA_A_1P2V",	"sitar-slim"),
135	REGULATOR_SUPPLY("VDDD_CDC_D",		"sitar1p1-slim"),
136	REGULATOR_SUPPLY("CDC_VDDA_A_1P2V",	"sitar1p1-slim"),
137	REGULATOR_SUPPLY("mhl_avcc12",		"0-0039"),
138};
139VREG_CONSUMERS(L21) = {
140	REGULATOR_SUPPLY("8038_l21",		NULL),
141};
142VREG_CONSUMERS(L22) = {
143	REGULATOR_SUPPLY("8038_l22",		NULL),
144	REGULATOR_SUPPLY("sdc_vdd_io",		"msm_sdcc.3"),
145};
146VREG_CONSUMERS(L23) = {
147	REGULATOR_SUPPLY("8038_l23",		NULL),
148	REGULATOR_SUPPLY("dsi_vddio",		"mipi_dsi.1"),
149	REGULATOR_SUPPLY("hdmi_avdd",		"hdmi_msm.0"),
150	REGULATOR_SUPPLY("hdmi_vcc",		"hdmi_msm.0"),
151	REGULATOR_SUPPLY("pll_vdd",		"pil_riva"),
152	REGULATOR_SUPPLY("pll_vdd",		"pil_qdsp6v4.1"),
153	REGULATOR_SUPPLY("pll_vdd",		"pil_qdsp6v4.2"),
154};
155VREG_CONSUMERS(L24) = {
156	REGULATOR_SUPPLY("8038_l24",		NULL),
157	REGULATOR_SUPPLY("riva_vddmx",		"wcnss_wlan.0"),
158};
159VREG_CONSUMERS(L25) = {
160	REGULATOR_SUPPLY("8038_l25",		NULL),
161};
162VREG_CONSUMERS(L26) = {
163	REGULATOR_SUPPLY("8038_l26",		NULL),
164};
165VREG_CONSUMERS(L27) = {
166	REGULATOR_SUPPLY("8038_l27",		NULL),
167	REGULATOR_SUPPLY("core_vdd",		"pil_qdsp6v4.0"),
168};
169VREG_CONSUMERS(S1) = {
170	REGULATOR_SUPPLY("8038_s1",		NULL),
171	REGULATOR_SUPPLY("riva_vddcx",		"wcnss_wlan.0"),
172};
173VREG_CONSUMERS(S2) = {
174	REGULATOR_SUPPLY("8038_s2",		NULL),
175};
176VREG_CONSUMERS(S3) = {
177	REGULATOR_SUPPLY("8038_s3",		NULL),
178};
179VREG_CONSUMERS(S4) = {
180	REGULATOR_SUPPLY("8038_s4",		NULL),
181	REGULATOR_SUPPLY("CDC_VDD_CP",		"sitar-slim"),
182	REGULATOR_SUPPLY("CDC_VDD_CP",		"sitar1p1-slim"),
183};
184VREG_CONSUMERS(S5) = {
185	REGULATOR_SUPPLY("8038_s5",		NULL),
186	REGULATOR_SUPPLY("krait0",		"acpuclk-8627"),
187	REGULATOR_SUPPLY("krait0",		"acpuclk-8930"),
188	REGULATOR_SUPPLY("krait0",		"acpuclk-8930aa"),
189	REGULATOR_SUPPLY("krait0",		"acpuclk-8930ab"),
190};
191VREG_CONSUMERS(S6) = {
192	REGULATOR_SUPPLY("8038_s6",		NULL),
193	REGULATOR_SUPPLY("krait1",		"acpuclk-8627"),
194	REGULATOR_SUPPLY("krait1",		"acpuclk-8930"),
195	REGULATOR_SUPPLY("krait1",		"acpuclk-8930aa"),
196	REGULATOR_SUPPLY("krait1",		"acpuclk-8930ab"),
197};
198VREG_CONSUMERS(LVS1) = {
199	REGULATOR_SUPPLY("8038_lvs1",		NULL),
200	REGULATOR_SUPPLY("cam_vio",		"4-001a"),
201	REGULATOR_SUPPLY("cam_vio",		"4-006c"),
202	REGULATOR_SUPPLY("cam_vio",		"4-0048"),
203	REGULATOR_SUPPLY("cam_vio",             "4-0020"),
204};
205VREG_CONSUMERS(LVS2) = {
206	REGULATOR_SUPPLY("8038_lvs2",		NULL),
207	REGULATOR_SUPPLY("vcc_i2c",		"3-004a"),
208	REGULATOR_SUPPLY("vcc_i2c",		"3-0024"),
209	REGULATOR_SUPPLY("vcc_i2c",		"0-0048"),
210	REGULATOR_SUPPLY("vddio",		"12-0018"),
211	REGULATOR_SUPPLY("vlogic",		"12-0068"),
212};
213VREG_CONSUMERS(EXT_5V) = {
214	REGULATOR_SUPPLY("ext_5v",		NULL),
215	REGULATOR_SUPPLY("hdmi_mvs",		"hdmi_msm.0"),
216	REGULATOR_SUPPLY("mhl_usb_hs_switch",	"msm_otg"),
217};
218VREG_CONSUMERS(EXT_OTG_SW) = {
219	REGULATOR_SUPPLY("ext_otg_sw",		NULL),
220	REGULATOR_SUPPLY("vbus_otg",		"msm_otg"),
221};
222VREG_CONSUMERS(VDD_DIG_CORNER) = {
223	REGULATOR_SUPPLY("vdd_dig_corner",	NULL),
224	REGULATOR_SUPPLY("hsusb_vdd_dig",	"msm_otg"),
225};
226
227#define PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, _modes, _ops, \
228			 _apply_uV, _pull_down, _always_on, _supply_regulator, \
229			 _system_uA, _enable_time, _reg_id) \
230	{ \
231		.init_data = { \
232			.constraints = { \
233				.valid_modes_mask	= _modes, \
234				.valid_ops_mask		= _ops, \
235				.min_uV			= _min_uV, \
236				.max_uV			= _max_uV, \
237				.input_uV		= _max_uV, \
238				.apply_uV		= _apply_uV, \
239				.always_on		= _always_on, \
240				.name			= _name, \
241			}, \
242			.num_consumer_supplies	= \
243					ARRAY_SIZE(vreg_consumers_##_id), \
244			.consumer_supplies	= vreg_consumers_##_id, \
245			.supply_regulator	= _supply_regulator, \
246		}, \
247		.id			= _reg_id, \
248		.pull_down_enable	= _pull_down, \
249		.system_uA		= _system_uA, \
250		.enable_time		= _enable_time, \
251	}
252
253#define PM8XXX_LDO(_id, _name, _always_on, _pull_down, _min_uV, _max_uV, \
254		_enable_time, _supply_regulator, _system_uA, _reg_id) \
255	PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \
256		| REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE | \
257		REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
258		REGULATOR_CHANGE_DRMS, 0, _pull_down, _always_on, \
259		_supply_regulator, _system_uA, _enable_time, _reg_id)
260
261#define PM8XXX_NLDO1200(_id, _name, _always_on, _pull_down, _min_uV, \
262		_max_uV, _enable_time, _supply_regulator, _system_uA, _reg_id) \
263	PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \
264		| REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE | \
265		REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
266		REGULATOR_CHANGE_DRMS, 0, _pull_down, _always_on, \
267		_supply_regulator, _system_uA, _enable_time, _reg_id)
268
269#define PM8XXX_SMPS(_id, _name, _always_on, _pull_down, _min_uV, _max_uV, \
270		_enable_time, _supply_regulator, _system_uA, _reg_id) \
271	PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \
272		| REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE | \
273		REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
274		REGULATOR_CHANGE_DRMS, 0, _pull_down, _always_on, \
275		_supply_regulator, _system_uA, _enable_time, _reg_id)
276
277#define PM8XXX_FTSMPS(_id, _name, _always_on, _pull_down, _min_uV, _max_uV, \
278		_enable_time, _supply_regulator, _system_uA, _reg_id) \
279	PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, REGULATOR_MODE_NORMAL, \
280		REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS \
281		| REGULATOR_CHANGE_MODE, 0, _pull_down, _always_on, \
282		_supply_regulator, _system_uA, _enable_time, _reg_id)
283
284#define PM8XXX_VS(_id, _name, _always_on, _pull_down, _enable_time, \
285		_supply_regulator, _reg_id) \
286	PM8XXX_VREG_INIT(_id, _name, 0, 0, 0, REGULATOR_CHANGE_STATUS, 0, \
287		_pull_down, _always_on, _supply_regulator, 0, _enable_time, \
288		_reg_id)
289
290#define PM8XXX_VS300(_id, _name, _always_on, _pull_down, _enable_time, \
291		_supply_regulator, _reg_id) \
292	PM8XXX_VREG_INIT(_id, _name, 0, 0, 0, REGULATOR_CHANGE_STATUS, 0, \
293		_pull_down, _always_on, _supply_regulator, 0, _enable_time, \
294		_reg_id)
295
296#define PM8XXX_NCP(_id, _name, _always_on, _min_uV, _max_uV, _enable_time, \
297		_supply_regulator, _reg_id) \
298	PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, 0, \
299		REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, 0, 0, \
300		_always_on, _supply_regulator, 0, _enable_time, _reg_id)
301
302/* Pin control initialization */
303#define PM8XXX_PC(_id, _name, _always_on, _pin_fn, _pin_ctrl, \
304		  _supply_regulator, _reg_id) \
305	{ \
306		.init_data = { \
307			.constraints = { \
308				.valid_ops_mask	= REGULATOR_CHANGE_STATUS, \
309				.always_on	= _always_on, \
310				.name		= _name, \
311			}, \
312			.num_consumer_supplies	= \
313					ARRAY_SIZE(vreg_consumers_##_id##_PC), \
314			.consumer_supplies	= vreg_consumers_##_id##_PC, \
315			.supply_regulator  = _supply_regulator, \
316		}, \
317		.id		= _reg_id, \
318		.pin_fn		= PM8XXX_VREG_PIN_FN_##_pin_fn, \
319		.pin_ctrl	= _pin_ctrl, \
320	}
321
322#define RPM_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, _default_uV, \
323		 _peak_uA, _avg_uA, _pull_down, _pin_ctrl, _freq, _pin_fn, \
324		 _force_mode, _sleep_set_force_mode, _power_mode, _state, \
325		 _sleep_selectable, _always_on, _supply_regulator, _system_uA) \
326	{ \
327		.init_data = { \
328			.constraints = { \
329				.valid_modes_mask	= _modes, \
330				.valid_ops_mask		= _ops, \
331				.min_uV			= _min_uV, \
332				.max_uV			= _max_uV, \
333				.input_uV		= _min_uV, \
334				.apply_uV		= _apply_uV, \
335				.always_on		= _always_on, \
336			}, \
337			.num_consumer_supplies	= \
338					ARRAY_SIZE(vreg_consumers_##_id), \
339			.consumer_supplies	= vreg_consumers_##_id, \
340			.supply_regulator	= _supply_regulator, \
341		}, \
342		.id			= RPM_VREG_ID_PM8038_##_id, \
343		.default_uV		= _default_uV, \
344		.peak_uA		= _peak_uA, \
345		.avg_uA			= _avg_uA, \
346		.pull_down_enable	= _pull_down, \
347		.pin_ctrl		= _pin_ctrl, \
348		.freq			= RPM_VREG_FREQ_##_freq, \
349		.pin_fn			= _pin_fn, \
350		.force_mode		= _force_mode, \
351		.sleep_set_force_mode	= _sleep_set_force_mode, \
352		.power_mode		= _power_mode, \
353		.state			= _state, \
354		.sleep_selectable	= _sleep_selectable, \
355		.system_uA		= _system_uA, \
356	}
357
358#define RPM_LDO(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
359		_supply_regulator, _system_uA, _init_peak_uA) \
360	RPM_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \
361		 | REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE \
362		 | REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE \
363		 | REGULATOR_CHANGE_DRMS, 0, _max_uV, _init_peak_uA, 0, _pd, \
364		 RPM_VREG_PIN_CTRL_NONE, NONE, RPM_VREG_PIN_FN_8930_NONE, \
365		 RPM_VREG_FORCE_MODE_8930_NONE, \
366		 RPM_VREG_FORCE_MODE_8930_NONE, RPM_VREG_POWER_MODE_8930_PWM, \
367		 RPM_VREG_STATE_OFF, _sleep_selectable, _always_on, \
368		 _supply_regulator, _system_uA)
369
370#define RPM_SMPS(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
371		 _supply_regulator, _system_uA, _freq, _force_mode, \
372		 _sleep_set_force_mode) \
373	RPM_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \
374		 | REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE \
375		 | REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE \
376		 | REGULATOR_CHANGE_DRMS, 0, _min_uV, _system_uA, 0, _pd, \
377		 RPM_VREG_PIN_CTRL_NONE, _freq, RPM_VREG_PIN_FN_8930_NONE, \
378		 RPM_VREG_FORCE_MODE_8930_##_force_mode, \
379		 RPM_VREG_FORCE_MODE_8930_##_sleep_set_force_mode, \
380		 RPM_VREG_POWER_MODE_8930_PWM, RPM_VREG_STATE_OFF, \
381		 _sleep_selectable, _always_on, _supply_regulator, _system_uA)
382
383#define RPM_VS(_id, _always_on, _pd, _sleep_selectable, _supply_regulator) \
384	RPM_INIT(_id, 0, 0, 0, REGULATOR_CHANGE_STATUS, 0, 0, 1000, 1000, _pd, \
385		 RPM_VREG_PIN_CTRL_NONE, NONE, RPM_VREG_PIN_FN_8930_NONE, \
386		 RPM_VREG_FORCE_MODE_8930_NONE, \
387		 RPM_VREG_FORCE_MODE_8930_NONE, RPM_VREG_POWER_MODE_8930_PWM, \
388		 RPM_VREG_STATE_OFF, _sleep_selectable, _always_on, \
389		 _supply_regulator, 0)
390
391#define RPM_NCP(_id, _always_on, _sleep_selectable, _min_uV, _max_uV, \
392		_supply_regulator, _freq) \
393	RPM_INIT(_id, _min_uV, _max_uV, 0, REGULATOR_CHANGE_VOLTAGE \
394		 | REGULATOR_CHANGE_STATUS, 0, _max_uV, 1000, 1000, 0, \
395		 RPM_VREG_PIN_CTRL_NONE, _freq, RPM_VREG_PIN_FN_8930_NONE, \
396		 RPM_VREG_FORCE_MODE_8930_NONE, \
397		 RPM_VREG_FORCE_MODE_8930_NONE, RPM_VREG_POWER_MODE_8930_PWM, \
398		 RPM_VREG_STATE_OFF, _sleep_selectable, _always_on, \
399		 _supply_regulator, 0)
400
401#define RPM_CORNER(_id, _always_on, _sleep_selectable, _min_uV, _max_uV, \
402		_supply_regulator) \
403	RPM_INIT(_id, _min_uV, _max_uV, 0, REGULATOR_CHANGE_VOLTAGE \
404		 | REGULATOR_CHANGE_STATUS, 0, _max_uV, 0, 0, 0, \
405		 RPM_VREG_PIN_CTRL_NONE, NONE, RPM_VREG_PIN_FN_8930_NONE, \
406		 RPM_VREG_FORCE_MODE_8930_NONE, \
407		 RPM_VREG_FORCE_MODE_8930_NONE, RPM_VREG_POWER_MODE_8930_PWM, \
408		 RPM_VREG_STATE_OFF, _sleep_selectable, _always_on, \
409		 _supply_regulator, 0)
410
411/* Pin control initialization */
412#define RPM_PC_INIT(_id, _always_on, _pin_fn, _pin_ctrl, _supply_regulator) \
413	{ \
414		.init_data = { \
415			.constraints = { \
416				.valid_ops_mask	= REGULATOR_CHANGE_STATUS, \
417				.always_on	= _always_on, \
418			}, \
419			.num_consumer_supplies	= \
420					ARRAY_SIZE(vreg_consumers_##_id##_PC), \
421			.consumer_supplies	= vreg_consumers_##_id##_PC, \
422			.supply_regulator	= _supply_regulator, \
423		}, \
424		.id	  = RPM_VREG_ID_PM8038_##_id##_PC, \
425		.pin_fn	  = RPM_VREG_PIN_FN_8930_##_pin_fn, \
426		.pin_ctrl = _pin_ctrl, \
427	}
428
429#define GPIO_VREG(_id, _reg_name, _gpio_label, _gpio, _supply_regulator) \
430	[MSM8930_GPIO_VREG_ID_##_id] = { \
431		.init_data = { \
432			.constraints = { \
433				.valid_ops_mask	= REGULATOR_CHANGE_STATUS, \
434			}, \
435			.num_consumer_supplies	= \
436					ARRAY_SIZE(vreg_consumers_##_id), \
437			.consumer_supplies	= vreg_consumers_##_id, \
438			.supply_regulator	= _supply_regulator, \
439		}, \
440		.regulator_name = _reg_name, \
441		.gpio_label	= _gpio_label, \
442		.gpio		= _gpio, \
443	}
444
445#define SAW_VREG_INIT(_id, _name, _min_uV, _max_uV) \
446	{ \
447		.constraints = { \
448			.name		= _name, \
449			.valid_ops_mask	= REGULATOR_CHANGE_VOLTAGE, \
450			.min_uV		= _min_uV, \
451			.max_uV		= _max_uV, \
452		}, \
453		.num_consumer_supplies	= ARRAY_SIZE(vreg_consumers_##_id), \
454		.consumer_supplies	= vreg_consumers_##_id, \
455	}
456
457/* GPIO regulator constraints */
458struct gpio_regulator_platform_data
459msm8930_pm8038_gpio_regulator_pdata[] __devinitdata = {
460	/*        ID          vreg_name     gpio_label     gpio  supply */
461	GPIO_VREG(EXT_5V,     "ext_5v",     "ext_5v_en",     63, NULL),
462	GPIO_VREG(EXT_OTG_SW, "ext_otg_sw", "ext_otg_sw_en", 97, "ext_5v"),
463};
464
465/* SAW regulator constraints */
466struct regulator_init_data msm8930_pm8038_saw_regulator_core0_pdata =
467	/*	      ID  vreg_name	       min_uV   max_uV */
468	SAW_VREG_INIT(S5, "8038_s5",	       850000, 1300000);
469struct regulator_init_data msm8930_pm8038_saw_regulator_core1_pdata =
470	SAW_VREG_INIT(S6, "8038_s6",	       850000, 1300000);
471
472/* PM8038 regulator constraints */
473struct pm8xxx_regulator_platform_data
474msm8930_pm8038_regulator_pdata[] __devinitdata = {
475	/*
476	 *	    ID  name always_on pd min_uV   max_uV   en_t supply
477	 *	system_uA reg_ID
478	 */
479	PM8XXX_NLDO1200(L16, "8038_l16", 0, 1, 375000, 1050000, 200, "8038_s3",
480		0, 0),
481	PM8XXX_NLDO1200(L19, "8038_l19", 0, 1, 375000, 1050000, 200, "8038_s3",
482		0, 1),
483	PM8XXX_NLDO1200(L27, "8038_l27", 0, 1, 375000, 1050000, 200, "8038_s3",
484		0, 2),
485};
486
487static struct rpm_regulator_init_data
488msm8930_rpm_regulator_init_data[] __devinitdata = {
489	/*	ID a_on pd ss min_uV   max_uV  supply sys_uA  freq  fm  ss_fm */
490	RPM_SMPS(S1, 0, 1, 1,  500000, 1150000, NULL, 100000, 4p80, AUTO, LPM),
491	RPM_SMPS(S2, 1, 1, 1, 1400000, 1400000, NULL, 100000, 1p60, AUTO, LPM),
492	RPM_SMPS(S3, 0, 1, 1, 1150000, 1150000, NULL, 100000, 3p20, AUTO, AUTO),
493	RPM_SMPS(S4, 1, 1, 1, 1950000, 2200000, NULL, 100000, 1p60, AUTO, LPM),
494
495	/*	ID     a_on pd ss min_uV   max_uV  supply  sys_uA init_ip */
496	RPM_LDO(L1,	 0, 1, 0, 1300000, 1300000, "8038_s2", 0, 0),
497	RPM_LDO(L2,	 0, 1, 0, 1200000, 1200000, "8038_s2", 0, 0),
498	RPM_LDO(L3,	 0, 1, 0, 3075000, 3075000, NULL,      0, 0),
499	RPM_LDO(L4,	 1, 1, 0, 1800000, 1800000, NULL,      10000, 10000),
500	RPM_LDO(L5,	 0, 1, 0, 2950000, 2950000, NULL,      0, 0),
501	RPM_LDO(L6,	 0, 1, 0, 2950000, 2950000, NULL,      0, 0),
502	RPM_LDO(L7,	 0, 1, 0, 2050000, 2050000, "8038_s4", 0, 0),
503	RPM_LDO(L8,	 0, 1, 0, 2800000, 2800000, NULL,      0, 0),
504	RPM_LDO(L9,	 0, 1, 0, 2850000, 2850000, NULL,      0, 0),
505	RPM_LDO(L10,	 0, 1, 0, 2900000, 2900000, NULL,      0, 0),
506	RPM_LDO(L11,	 1, 1, 0, 1800000, 1800000, "8038_s4", 10000, 10000),
507	RPM_LDO(L12,	 0, 1, 0, 1200000, 1200000, "8038_s2", 0, 0),
508	RPM_LDO(L13,	 0, 0, 0, 2220000, 2220000, NULL,      0, 0),
509	RPM_LDO(L14,	 0, 1, 0, 1800000, 1800000, NULL,      0, 0),
510	RPM_LDO(L15,	 0, 1, 0, 1800000, 2950000, NULL,      0, 0),
511	RPM_LDO(L17,	 0, 1, 0, 1800000, 2950000, NULL,      0, 0),
512	RPM_LDO(L18,	 0, 1, 0, 1800000, 1800000, NULL,      0, 0),
513	RPM_LDO(L20,	 1, 1, 0, 1250000, 1250000, "8038_s2", 10000, 10000),
514	RPM_LDO(L21,	 0, 1, 0, 1900000, 1900000, "8038_s4", 0, 0),
515	RPM_LDO(L22,	 1, 1, 0, 1850000, 2950000, NULL,      10000, 10000),
516	RPM_LDO(L23,	 1, 1, 1, 1800000, 1800000, "8038_s4", 0, 0),
517	RPM_LDO(L24,	 0, 1, 1,  500000, 1150000, "8038_s2", 10000, 10000),
518	RPM_LDO(L25,	 0, 0, 0, 1740000, 1740000, "8038_l13", 0, 0),
519	RPM_LDO(L26,     1, 1, 0, 1050000, 1050000, "8038_s2", 10000, 10000),
520
521	/*	ID     a_on pd ss		    supply */
522	RPM_VS(LVS1,	 0, 1, 0,		    "8038_l11"),
523	RPM_VS(LVS2,	 0, 1, 0,		    "8038_l11"),
524
525	/*	   ID            a_on ss min_corner  max_corner  supply */
526	RPM_CORNER(VDD_DIG_CORNER, 0, 1, RPM_VREG_CORNER_NONE,
527		RPM_VREG_CORNER_HIGH, NULL),
528};
529
530int msm8930_pm8038_regulator_pdata_len __devinitdata =
531	ARRAY_SIZE(msm8930_pm8038_regulator_pdata);
532
533#define RPM_REG_MAP(_id, _sleep_also, _voter, _supply, _dev_name) \
534	{ \
535		.vreg_id = RPM_VREG_ID_PM8038_##_id, \
536		.sleep_also = _sleep_also, \
537		.voter = _voter, \
538		.supply = _supply, \
539		.dev_name = _dev_name, \
540	}
541static struct rpm_regulator_consumer_mapping
542	      msm_rpm_regulator_consumer_mapping[] __devinitdata = {
543	RPM_REG_MAP(L23,            0, 1, "krait0_hfpll", "acpuclk-8930"),
544	RPM_REG_MAP(L23,            0, 2, "krait1_hfpll", "acpuclk-8930"),
545	RPM_REG_MAP(L23,            0, 6, "l2_hfpll",     "acpuclk-8930"),
546	RPM_REG_MAP(L24,            0, 1, "krait0_mem",   "acpuclk-8930"),
547	RPM_REG_MAP(L24,            0, 2, "krait1_mem",   "acpuclk-8930"),
548	RPM_REG_MAP(VDD_DIG_CORNER, 0, 1, "krait0_dig",   "acpuclk-8930"),
549	RPM_REG_MAP(VDD_DIG_CORNER, 0, 2, "krait1_dig",   "acpuclk-8930"),
550
551	RPM_REG_MAP(L23,            0, 1, "krait0_hfpll", "acpuclk-8627"),
552	RPM_REG_MAP(L23,            0, 2, "krait1_hfpll", "acpuclk-8627"),
553	RPM_REG_MAP(L23,            0, 6, "l2_hfpll",     "acpuclk-8627"),
554	RPM_REG_MAP(L24,            0, 1, "krait0_mem",   "acpuclk-8627"),
555	RPM_REG_MAP(L24,            0, 2, "krait1_mem",   "acpuclk-8627"),
556	RPM_REG_MAP(VDD_DIG_CORNER, 0, 1, "krait0_dig",   "acpuclk-8627"),
557	RPM_REG_MAP(VDD_DIG_CORNER, 0, 2, "krait1_dig",   "acpuclk-8627"),
558
559	RPM_REG_MAP(L23,            0, 1, "krait0_hfpll", "acpuclk-8930aa"),
560	RPM_REG_MAP(L23,            0, 2, "krait1_hfpll", "acpuclk-8930aa"),
561	RPM_REG_MAP(L23,            0, 6, "l2_hfpll",     "acpuclk-8930aa"),
562	RPM_REG_MAP(L24,            0, 1, "krait0_mem",   "acpuclk-8930aa"),
563	RPM_REG_MAP(L24,            0, 2, "krait1_mem",   "acpuclk-8930aa"),
564	RPM_REG_MAP(VDD_DIG_CORNER, 0, 1, "krait0_dig",   "acpuclk-8930aa"),
565	RPM_REG_MAP(VDD_DIG_CORNER, 0, 2, "krait1_dig",   "acpuclk-8930aa"),
566
567	RPM_REG_MAP(L23,            0, 1, "krait0_hfpll", "acpuclk-8930ab"),
568	RPM_REG_MAP(L23,            0, 2, "krait1_hfpll", "acpuclk-8930ab"),
569	RPM_REG_MAP(L23,            0, 6, "l2_hfpll",     "acpuclk-8930ab"),
570	RPM_REG_MAP(L24,            0, 1, "krait0_mem",   "acpuclk-8930ab"),
571	RPM_REG_MAP(L24,            0, 2, "krait1_mem",   "acpuclk-8930ab"),
572	RPM_REG_MAP(VDD_DIG_CORNER, 0, 1, "krait0_dig",   "acpuclk-8930ab"),
573	RPM_REG_MAP(VDD_DIG_CORNER, 0, 2, "krait1_dig",   "acpuclk-8930ab"),
574};
575
576struct rpm_regulator_platform_data
577msm8930_pm8038_rpm_regulator_pdata __devinitdata = {
578	.init_data		= msm8930_rpm_regulator_init_data,
579	.num_regulators		= ARRAY_SIZE(msm8930_rpm_regulator_init_data),
580	.version		= RPM_VREG_VERSION_8930,
581	.vreg_id_vdd_mem	= RPM_VREG_ID_PM8038_L24,
582	.vreg_id_vdd_dig	= RPM_VREG_ID_PM8038_VDD_DIG_CORNER,
583	.consumer_map		= msm_rpm_regulator_consumer_mapping,
584	.consumer_map_len = ARRAY_SIZE(msm_rpm_regulator_consumer_mapping),
585};