/arch/arm/mach-msm/board-8930-regulator-pm8917.c

https://github.com/AICP/kernel_google_msm · C · 657 lines · 578 code · 40 blank · 39 comment · 0 complexity · 274d811bcd7e712aaafc849aa41dac96 MD5 · raw file

  1. /*
  2. * Copyright (c) 2012, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. /*
  14. * This file contains regulator configuration and mappings for targets
  15. * consisting of MSM8930 and PM8917.
  16. */
  17. #include <linux/regulator/pm8xxx-regulator.h>
  18. #include "board-8930.h"
  19. #define VREG_CONSUMERS(_id) \
  20. static struct regulator_consumer_supply vreg_consumers_##_id[]
  21. /*
  22. * Consumer specific regulator names:
  23. * regulator name consumer dev_name
  24. */
  25. VREG_CONSUMERS(L1) = {
  26. REGULATOR_SUPPLY("8917_l1", NULL),
  27. };
  28. VREG_CONSUMERS(L2) = {
  29. REGULATOR_SUPPLY("8917_l2", NULL),
  30. REGULATOR_SUPPLY("iris_vdddig", "wcnss_wlan.0"),
  31. REGULATOR_SUPPLY("dsi_vdda", "mipi_dsi.1"),
  32. REGULATOR_SUPPLY("dsi_pll_vdda", "mdp.0"),
  33. REGULATOR_SUPPLY("mipi_csi_vdd", "msm_csid.0"),
  34. REGULATOR_SUPPLY("mipi_csi_vdd", "msm_csid.1"),
  35. REGULATOR_SUPPLY("mipi_csi_vdd", "msm_csid.2"),
  36. };
  37. VREG_CONSUMERS(L3) = {
  38. REGULATOR_SUPPLY("8917_l3", NULL),
  39. REGULATOR_SUPPLY("HSUSB_3p3", "msm_otg"),
  40. };
  41. VREG_CONSUMERS(L4) = {
  42. REGULATOR_SUPPLY("8917_l4", NULL),
  43. REGULATOR_SUPPLY("HSUSB_1p8", "msm_otg"),
  44. REGULATOR_SUPPLY("iris_vddxo", "wcnss_wlan.0"),
  45. };
  46. VREG_CONSUMERS(L5) = {
  47. REGULATOR_SUPPLY("8917_l5", NULL),
  48. REGULATOR_SUPPLY("sdc_vdd", "msm_sdcc.1"),
  49. };
  50. VREG_CONSUMERS(L6) = {
  51. REGULATOR_SUPPLY("8917_l6", NULL),
  52. REGULATOR_SUPPLY("sdc_vdd", "msm_sdcc.3"),
  53. };
  54. VREG_CONSUMERS(L7) = {
  55. REGULATOR_SUPPLY("8917_l7", NULL),
  56. REGULATOR_SUPPLY("sdc_vdd_io", "msm_sdcc.3"),
  57. };
  58. VREG_CONSUMERS(L8) = {
  59. REGULATOR_SUPPLY("8917_l8", NULL),
  60. REGULATOR_SUPPLY("dsi_vdc", "mipi_dsi.1"),
  61. };
  62. VREG_CONSUMERS(L9) = {
  63. REGULATOR_SUPPLY("8917_l9", NULL),
  64. REGULATOR_SUPPLY("vdd_ana", "3-004a"),
  65. REGULATOR_SUPPLY("vdd", "3-0024"),
  66. REGULATOR_SUPPLY("vdd", "12-0018"),
  67. REGULATOR_SUPPLY("vdd", "12-0068"),
  68. };
  69. VREG_CONSUMERS(L10) = {
  70. REGULATOR_SUPPLY("8917_l10", NULL),
  71. REGULATOR_SUPPLY("iris_vddpa", "wcnss_wlan.0"),
  72. };
  73. VREG_CONSUMERS(L11) = {
  74. REGULATOR_SUPPLY("8917_l11", NULL),
  75. REGULATOR_SUPPLY("cam_vana", "4-001a"),
  76. REGULATOR_SUPPLY("cam_vana", "4-006c"),
  77. REGULATOR_SUPPLY("cam_vana", "4-0048"),
  78. REGULATOR_SUPPLY("cam_vana", "4-0020"),
  79. };
  80. VREG_CONSUMERS(L12) = {
  81. REGULATOR_SUPPLY("8917_l12", NULL),
  82. REGULATOR_SUPPLY("cam_vdig", "4-001a"),
  83. REGULATOR_SUPPLY("cam_vdig", "4-006c"),
  84. REGULATOR_SUPPLY("cam_vdig", "4-0048"),
  85. REGULATOR_SUPPLY("cam_vdig", "4-0020"),
  86. };
  87. VREG_CONSUMERS(L14) = {
  88. REGULATOR_SUPPLY("8917_l14", NULL),
  89. REGULATOR_SUPPLY("pa_therm", "pm8xxx-adc"),
  90. };
  91. VREG_CONSUMERS(L15) = {
  92. REGULATOR_SUPPLY("8917_l15", NULL),
  93. };
  94. VREG_CONSUMERS(L16) = {
  95. REGULATOR_SUPPLY("8917_l16", NULL),
  96. REGULATOR_SUPPLY("cam_vaf", "4-001a"),
  97. REGULATOR_SUPPLY("cam_vaf", "4-006c"),
  98. REGULATOR_SUPPLY("cam_vaf", "4-0048"),
  99. REGULATOR_SUPPLY("cam_vaf", "4-0020"),
  100. };
  101. VREG_CONSUMERS(L17) = {
  102. REGULATOR_SUPPLY("8917_l17", NULL),
  103. };
  104. VREG_CONSUMERS(L18) = {
  105. REGULATOR_SUPPLY("8917_l18", NULL),
  106. };
  107. VREG_CONSUMERS(L21) = {
  108. REGULATOR_SUPPLY("8917_l21", NULL),
  109. };
  110. VREG_CONSUMERS(L22) = {
  111. REGULATOR_SUPPLY("8917_l22", NULL),
  112. };
  113. VREG_CONSUMERS(L23) = {
  114. REGULATOR_SUPPLY("8917_l23", NULL),
  115. REGULATOR_SUPPLY("dsi_vddio", "mipi_dsi.1"),
  116. REGULATOR_SUPPLY("dsi_pll_vddio", "mdp.0"),
  117. REGULATOR_SUPPLY("hdmi_avdd", "hdmi_msm.0"),
  118. REGULATOR_SUPPLY("hdmi_vcc", "hdmi_msm.0"),
  119. REGULATOR_SUPPLY("pll_vdd", "pil_riva"),
  120. REGULATOR_SUPPLY("pll_vdd", "pil_qdsp6v4.1"),
  121. REGULATOR_SUPPLY("pll_vdd", "pil_qdsp6v4.2"),
  122. };
  123. VREG_CONSUMERS(L24) = {
  124. REGULATOR_SUPPLY("8917_l24", NULL),
  125. REGULATOR_SUPPLY("riva_vddmx", "wcnss_wlan.0"),
  126. };
  127. VREG_CONSUMERS(L25) = {
  128. REGULATOR_SUPPLY("8917_l25", NULL),
  129. REGULATOR_SUPPLY("VDDD_CDC_D", "sitar-slim"),
  130. REGULATOR_SUPPLY("CDC_VDDA_A_1P2V", "sitar-slim"),
  131. REGULATOR_SUPPLY("VDDD_CDC_D", "sitar1p1-slim"),
  132. REGULATOR_SUPPLY("CDC_VDDA_A_1P2V", "sitar1p1-slim"),
  133. REGULATOR_SUPPLY("mhl_avcc12", "0-0039"),
  134. };
  135. VREG_CONSUMERS(L26) = {
  136. REGULATOR_SUPPLY("8921_l26", NULL),
  137. REGULATOR_SUPPLY("core_vdd", "pil_qdsp6v4.0"),
  138. };
  139. VREG_CONSUMERS(L27) = {
  140. REGULATOR_SUPPLY("8921_l27", NULL),
  141. REGULATOR_SUPPLY("core_vdd", "pil_qdsp6v4.2"),
  142. };
  143. VREG_CONSUMERS(L28) = {
  144. REGULATOR_SUPPLY("8921_l28", NULL),
  145. REGULATOR_SUPPLY("core_vdd", "pil_qdsp6v4.1"),
  146. };
  147. VREG_CONSUMERS(L29) = {
  148. REGULATOR_SUPPLY("8921_l29", NULL),
  149. };
  150. VREG_CONSUMERS(L30) = {
  151. REGULATOR_SUPPLY("8917_l30", NULL),
  152. };
  153. VREG_CONSUMERS(L31) = {
  154. REGULATOR_SUPPLY("8917_l31", NULL),
  155. };
  156. VREG_CONSUMERS(L32) = {
  157. REGULATOR_SUPPLY("8917_l32", NULL),
  158. };
  159. VREG_CONSUMERS(L33) = {
  160. REGULATOR_SUPPLY("8917_l33", NULL),
  161. };
  162. VREG_CONSUMERS(L34) = {
  163. REGULATOR_SUPPLY("8917_l34", NULL),
  164. };
  165. VREG_CONSUMERS(L35) = {
  166. REGULATOR_SUPPLY("8917_l35", NULL),
  167. };
  168. VREG_CONSUMERS(L36) = {
  169. REGULATOR_SUPPLY("8917_l36", NULL),
  170. };
  171. VREG_CONSUMERS(S1) = {
  172. REGULATOR_SUPPLY("8917_s1", NULL),
  173. };
  174. VREG_CONSUMERS(S2) = {
  175. REGULATOR_SUPPLY("8917_s2", NULL),
  176. REGULATOR_SUPPLY("iris_vddrfa", "wcnss_wlan.0"),
  177. };
  178. VREG_CONSUMERS(S3) = {
  179. REGULATOR_SUPPLY("8917_s3", NULL),
  180. REGULATOR_SUPPLY("riva_vddcx", "wcnss_wlan.0"),
  181. };
  182. VREG_CONSUMERS(S4) = {
  183. REGULATOR_SUPPLY("8917_s4", NULL),
  184. REGULATOR_SUPPLY("vdd_dig", "3-004a"),
  185. REGULATOR_SUPPLY("sdc_vdd_io", "msm_sdcc.1"),
  186. REGULATOR_SUPPLY("VDDIO_CDC", "sitar-slim"),
  187. REGULATOR_SUPPLY("CDC_VDDA_TX", "sitar-slim"),
  188. REGULATOR_SUPPLY("CDC_VDDA_RX", "sitar-slim"),
  189. REGULATOR_SUPPLY("VDDIO_CDC", "sitar1p1-slim"),
  190. REGULATOR_SUPPLY("CDC_VDDA_TX", "sitar1p1-slim"),
  191. REGULATOR_SUPPLY("CDC_VDDA_RX", "sitar1p1-slim"),
  192. REGULATOR_SUPPLY("vddp", "0-0048"),
  193. REGULATOR_SUPPLY("mhl_iovcc18", "0-0039"),
  194. REGULATOR_SUPPLY("CDC_VDD_CP", "sitar-slim"),
  195. REGULATOR_SUPPLY("CDC_VDD_CP", "sitar1p1-slim"),
  196. };
  197. VREG_CONSUMERS(S5) = {
  198. REGULATOR_SUPPLY("8917_s5", NULL),
  199. REGULATOR_SUPPLY("krait0", "acpuclk-8627"),
  200. REGULATOR_SUPPLY("krait0", "acpuclk-8930"),
  201. REGULATOR_SUPPLY("krait0", "acpuclk-8930aa"),
  202. REGULATOR_SUPPLY("krait0", "acpuclk-8930ab"),
  203. };
  204. VREG_CONSUMERS(S6) = {
  205. REGULATOR_SUPPLY("8917_s6", NULL),
  206. REGULATOR_SUPPLY("krait1", "acpuclk-8627"),
  207. REGULATOR_SUPPLY("krait1", "acpuclk-8930"),
  208. REGULATOR_SUPPLY("krait1", "acpuclk-8930aa"),
  209. REGULATOR_SUPPLY("krait1", "acpuclk-8930ab"),
  210. };
  211. VREG_CONSUMERS(S7) = {
  212. REGULATOR_SUPPLY("8917_s7", NULL),
  213. };
  214. VREG_CONSUMERS(S8) = {
  215. REGULATOR_SUPPLY("8917_s8", NULL),
  216. };
  217. VREG_CONSUMERS(LVS1) = {
  218. REGULATOR_SUPPLY("8917_lvs1", NULL),
  219. REGULATOR_SUPPLY("iris_vddio", "wcnss_wlan.0"),
  220. REGULATOR_SUPPLY("riva_vddpx", "wcnss_wlan.0"),
  221. };
  222. VREG_CONSUMERS(LVS3) = {
  223. REGULATOR_SUPPLY("8917_lvs3", NULL),
  224. };
  225. VREG_CONSUMERS(LVS4) = {
  226. REGULATOR_SUPPLY("8917_lvs4", NULL),
  227. REGULATOR_SUPPLY("vcc_i2c", "3-004a"),
  228. REGULATOR_SUPPLY("vcc_i2c", "3-0024"),
  229. REGULATOR_SUPPLY("vcc_i2c", "0-0048"),
  230. REGULATOR_SUPPLY("vddio", "12-0018"),
  231. REGULATOR_SUPPLY("vlogic", "12-0068"),
  232. };
  233. VREG_CONSUMERS(LVS5) = {
  234. REGULATOR_SUPPLY("8917_lvs5", NULL),
  235. REGULATOR_SUPPLY("cam_vio", "4-001a"),
  236. REGULATOR_SUPPLY("cam_vio", "4-006c"),
  237. REGULATOR_SUPPLY("cam_vio", "4-0048"),
  238. REGULATOR_SUPPLY("cam_vio", "4-0020"),
  239. };
  240. VREG_CONSUMERS(LVS6) = {
  241. REGULATOR_SUPPLY("8917_lvs6", NULL),
  242. };
  243. VREG_CONSUMERS(LVS7) = {
  244. REGULATOR_SUPPLY("8917_lvs7", NULL),
  245. };
  246. VREG_CONSUMERS(USB_OTG) = {
  247. REGULATOR_SUPPLY("8921_usb_otg", NULL),
  248. REGULATOR_SUPPLY("vbus_otg", "msm_otg"),
  249. };
  250. VREG_CONSUMERS(BOOST) = {
  251. REGULATOR_SUPPLY("8917_boost", NULL),
  252. REGULATOR_SUPPLY("hdmi_mvs", "hdmi_msm.0"),
  253. REGULATOR_SUPPLY("mhl_usb_hs_switch", "msm_otg"),
  254. };
  255. VREG_CONSUMERS(VDD_DIG_CORNER) = {
  256. REGULATOR_SUPPLY("vdd_dig_corner", NULL),
  257. REGULATOR_SUPPLY("hsusb_vdd_dig", "msm_otg"),
  258. };
  259. #define PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, _modes, _ops, \
  260. _apply_uV, _pull_down, _always_on, _supply_regulator, \
  261. _system_uA, _enable_time, _reg_id) \
  262. { \
  263. .init_data = { \
  264. .constraints = { \
  265. .valid_modes_mask = _modes, \
  266. .valid_ops_mask = _ops, \
  267. .min_uV = _min_uV, \
  268. .max_uV = _max_uV, \
  269. .input_uV = _max_uV, \
  270. .apply_uV = _apply_uV, \
  271. .always_on = _always_on, \
  272. .name = _name, \
  273. }, \
  274. .num_consumer_supplies = \
  275. ARRAY_SIZE(vreg_consumers_##_id), \
  276. .consumer_supplies = vreg_consumers_##_id, \
  277. .supply_regulator = _supply_regulator, \
  278. }, \
  279. .id = _reg_id, \
  280. .pull_down_enable = _pull_down, \
  281. .system_uA = _system_uA, \
  282. .enable_time = _enable_time, \
  283. }
  284. #define PM8XXX_LDO(_id, _name, _always_on, _pull_down, _min_uV, _max_uV, \
  285. _enable_time, _supply_regulator, _system_uA, _reg_id) \
  286. PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \
  287. | REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE | \
  288. REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
  289. REGULATOR_CHANGE_DRMS, 0, _pull_down, _always_on, \
  290. _supply_regulator, _system_uA, _enable_time, _reg_id)
  291. #define PM8XXX_NLDO1200(_id, _name, _always_on, _pull_down, _min_uV, \
  292. _max_uV, _enable_time, _supply_regulator, _system_uA, _reg_id) \
  293. PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \
  294. | REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE | \
  295. REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
  296. REGULATOR_CHANGE_DRMS, 0, _pull_down, _always_on, \
  297. _supply_regulator, _system_uA, _enable_time, _reg_id)
  298. #define PM8XXX_SMPS(_id, _name, _always_on, _pull_down, _min_uV, _max_uV, \
  299. _enable_time, _supply_regulator, _system_uA, _reg_id) \
  300. PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \
  301. | REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE | \
  302. REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
  303. REGULATOR_CHANGE_DRMS, 0, _pull_down, _always_on, \
  304. _supply_regulator, _system_uA, _enable_time, _reg_id)
  305. #define PM8XXX_FTSMPS(_id, _name, _always_on, _pull_down, _min_uV, _max_uV, \
  306. _enable_time, _supply_regulator, _system_uA, _reg_id) \
  307. PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, REGULATOR_MODE_NORMAL, \
  308. REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS \
  309. | REGULATOR_CHANGE_MODE, 0, _pull_down, _always_on, \
  310. _supply_regulator, _system_uA, _enable_time, _reg_id)
  311. #define PM8XXX_VS(_id, _name, _always_on, _pull_down, _enable_time, \
  312. _supply_regulator, _reg_id) \
  313. PM8XXX_VREG_INIT(_id, _name, 0, 0, 0, REGULATOR_CHANGE_STATUS, 0, \
  314. _pull_down, _always_on, _supply_regulator, 0, _enable_time, \
  315. _reg_id)
  316. #define PM8XXX_VS300(_id, _name, _always_on, _pull_down, _enable_time, \
  317. _supply_regulator, _reg_id) \
  318. PM8XXX_VREG_INIT(_id, _name, 0, 0, 0, REGULATOR_CHANGE_STATUS, 0, \
  319. _pull_down, _always_on, _supply_regulator, 0, _enable_time, \
  320. _reg_id)
  321. #define PM8XXX_BOOST(_id, _name, _always_on, _min_uV, _max_uV, _enable_time, \
  322. _supply_regulator, _reg_id) \
  323. PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, 0, \
  324. REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, 0, 0, \
  325. _always_on, _supply_regulator, 0, _enable_time, _reg_id)
  326. /* Pin control initialization */
  327. #define PM8XXX_PC(_id, _name, _always_on, _pin_fn, _pin_ctrl, \
  328. _supply_regulator, _reg_id) \
  329. { \
  330. .init_data = { \
  331. .constraints = { \
  332. .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
  333. .always_on = _always_on, \
  334. .name = _name, \
  335. }, \
  336. .num_consumer_supplies = \
  337. ARRAY_SIZE(vreg_consumers_##_id##_PC), \
  338. .consumer_supplies = vreg_consumers_##_id##_PC, \
  339. .supply_regulator = _supply_regulator, \
  340. }, \
  341. .id = _reg_id, \
  342. .pin_fn = PM8XXX_VREG_PIN_FN_##_pin_fn, \
  343. .pin_ctrl = _pin_ctrl, \
  344. }
  345. #define RPM_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, _default_uV, \
  346. _peak_uA, _avg_uA, _pull_down, _pin_ctrl, _freq, _pin_fn, \
  347. _force_mode, _sleep_set_force_mode, _power_mode, _state, \
  348. _sleep_selectable, _always_on, _supply_regulator, _system_uA) \
  349. { \
  350. .init_data = { \
  351. .constraints = { \
  352. .valid_modes_mask = _modes, \
  353. .valid_ops_mask = _ops, \
  354. .min_uV = _min_uV, \
  355. .max_uV = _max_uV, \
  356. .input_uV = _min_uV, \
  357. .apply_uV = _apply_uV, \
  358. .always_on = _always_on, \
  359. }, \
  360. .num_consumer_supplies = \
  361. ARRAY_SIZE(vreg_consumers_##_id), \
  362. .consumer_supplies = vreg_consumers_##_id, \
  363. .supply_regulator = _supply_regulator, \
  364. }, \
  365. .id = RPM_VREG_ID_PM8917_##_id, \
  366. .default_uV = _default_uV, \
  367. .peak_uA = _peak_uA, \
  368. .avg_uA = _avg_uA, \
  369. .pull_down_enable = _pull_down, \
  370. .pin_ctrl = _pin_ctrl, \
  371. .freq = RPM_VREG_FREQ_##_freq, \
  372. .pin_fn = _pin_fn, \
  373. .force_mode = _force_mode, \
  374. .sleep_set_force_mode = _sleep_set_force_mode, \
  375. .power_mode = _power_mode, \
  376. .state = _state, \
  377. .sleep_selectable = _sleep_selectable, \
  378. .system_uA = _system_uA, \
  379. }
  380. #define RPM_LDO(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
  381. _supply_regulator, _system_uA, _init_peak_uA) \
  382. RPM_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \
  383. | REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE \
  384. | REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE \
  385. | REGULATOR_CHANGE_DRMS, 0, _max_uV, _init_peak_uA, 0, _pd, \
  386. RPM_VREG_PIN_CTRL_NONE, NONE, RPM_VREG_PIN_FN_8930_NONE, \
  387. RPM_VREG_FORCE_MODE_8930_NONE, \
  388. RPM_VREG_FORCE_MODE_8930_NONE, RPM_VREG_POWER_MODE_8930_PWM, \
  389. RPM_VREG_STATE_OFF, _sleep_selectable, _always_on, \
  390. _supply_regulator, _system_uA)
  391. #define RPM_SMPS(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
  392. _supply_regulator, _system_uA, _freq, _force_mode, \
  393. _sleep_set_force_mode) \
  394. RPM_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \
  395. | REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE \
  396. | REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE \
  397. | REGULATOR_CHANGE_DRMS, 0, _min_uV, _system_uA, 0, _pd, \
  398. RPM_VREG_PIN_CTRL_NONE, _freq, RPM_VREG_PIN_FN_8930_NONE, \
  399. RPM_VREG_FORCE_MODE_8930_##_force_mode, \
  400. RPM_VREG_FORCE_MODE_8930_##_sleep_set_force_mode, \
  401. RPM_VREG_POWER_MODE_8930_PWM, RPM_VREG_STATE_OFF, \
  402. _sleep_selectable, _always_on, _supply_regulator, _system_uA)
  403. #define RPM_VS(_id, _always_on, _pd, _sleep_selectable, _supply_regulator) \
  404. RPM_INIT(_id, 0, 0, 0, REGULATOR_CHANGE_STATUS, 0, 0, 1000, 1000, _pd, \
  405. RPM_VREG_PIN_CTRL_NONE, NONE, RPM_VREG_PIN_FN_8930_NONE, \
  406. RPM_VREG_FORCE_MODE_8930_NONE, \
  407. RPM_VREG_FORCE_MODE_8930_NONE, RPM_VREG_POWER_MODE_8930_PWM, \
  408. RPM_VREG_STATE_OFF, _sleep_selectable, _always_on, \
  409. _supply_regulator, 0)
  410. #define RPM_NCP(_id, _always_on, _sleep_selectable, _min_uV, _max_uV, \
  411. _supply_regulator, _freq) \
  412. RPM_INIT(_id, _min_uV, _max_uV, 0, REGULATOR_CHANGE_VOLTAGE \
  413. | REGULATOR_CHANGE_STATUS, 0, _max_uV, 1000, 1000, 0, \
  414. RPM_VREG_PIN_CTRL_NONE, _freq, RPM_VREG_PIN_FN_8930_NONE, \
  415. RPM_VREG_FORCE_MODE_8930_NONE, \
  416. RPM_VREG_FORCE_MODE_8930_NONE, RPM_VREG_POWER_MODE_8930_PWM, \
  417. RPM_VREG_STATE_OFF, _sleep_selectable, _always_on, \
  418. _supply_regulator, 0)
  419. #define RPM_CORNER(_id, _always_on, _sleep_selectable, _min_uV, _max_uV, \
  420. _supply_regulator) \
  421. RPM_INIT(_id, _min_uV, _max_uV, 0, REGULATOR_CHANGE_VOLTAGE \
  422. | REGULATOR_CHANGE_STATUS, 0, _max_uV, 0, 0, 0, \
  423. RPM_VREG_PIN_CTRL_NONE, NONE, RPM_VREG_PIN_FN_8930_NONE, \
  424. RPM_VREG_FORCE_MODE_8930_NONE, \
  425. RPM_VREG_FORCE_MODE_8930_NONE, RPM_VREG_POWER_MODE_8930_PWM, \
  426. RPM_VREG_STATE_OFF, _sleep_selectable, _always_on, \
  427. _supply_regulator, 0)
  428. /* Pin control initialization */
  429. #define RPM_PC_INIT(_id, _always_on, _pin_fn, _pin_ctrl, _supply_regulator) \
  430. { \
  431. .init_data = { \
  432. .constraints = { \
  433. .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
  434. .always_on = _always_on, \
  435. }, \
  436. .num_consumer_supplies = \
  437. ARRAY_SIZE(vreg_consumers_##_id##_PC), \
  438. .consumer_supplies = vreg_consumers_##_id##_PC, \
  439. .supply_regulator = _supply_regulator, \
  440. }, \
  441. .id = RPM_VREG_ID_PM8917_##_id##_PC, \
  442. .pin_fn = RPM_VREG_PIN_FN_8930_##_pin_fn, \
  443. .pin_ctrl = _pin_ctrl, \
  444. }
  445. #define GPIO_VREG(_id, _reg_name, _gpio_label, _gpio, _supply_regulator) \
  446. [MSM8930_GPIO_VREG_ID_##_id] = { \
  447. .init_data = { \
  448. .constraints = { \
  449. .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
  450. }, \
  451. .num_consumer_supplies = \
  452. ARRAY_SIZE(vreg_consumers_##_id), \
  453. .consumer_supplies = vreg_consumers_##_id, \
  454. .supply_regulator = _supply_regulator, \
  455. }, \
  456. .regulator_name = _reg_name, \
  457. .gpio_label = _gpio_label, \
  458. .gpio = _gpio, \
  459. }
  460. #define SAW_VREG_INIT(_id, _name, _min_uV, _max_uV) \
  461. { \
  462. .constraints = { \
  463. .name = _name, \
  464. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, \
  465. .min_uV = _min_uV, \
  466. .max_uV = _max_uV, \
  467. }, \
  468. .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_##_id), \
  469. .consumer_supplies = vreg_consumers_##_id, \
  470. }
  471. /* GPIO regulator constraints */
  472. struct gpio_regulator_platform_data
  473. msm8930_pm8917_gpio_regulator_pdata[] __devinitdata = {
  474. /* ID vreg_name gpio_label gpio supply */
  475. };
  476. /* SAW regulator constraints */
  477. struct regulator_init_data msm8930_pm8917_saw_regulator_core0_pdata =
  478. /* ID vreg_name min_uV max_uV */
  479. SAW_VREG_INIT(S5, "8917_s5", 850000, 1300000);
  480. struct regulator_init_data msm8930_pm8917_saw_regulator_core1_pdata =
  481. SAW_VREG_INIT(S6, "8917_s6", 850000, 1300000);
  482. /* PM8917 regulator constraints */
  483. struct pm8xxx_regulator_platform_data
  484. msm8930_pm8917_regulator_pdata[] __devinitdata = {
  485. /*
  486. * ID name always_on pd min_uV max_uV en_t supply
  487. * system_uA reg_ID
  488. */
  489. PM8XXX_NLDO1200(L26, "8921_l26", 0, 1, 375000, 1050000, 200, "8917_s7",
  490. 0, 0),
  491. PM8XXX_NLDO1200(L27, "8921_l27", 0, 1, 375000, 1050000, 200, "8917_s7",
  492. 0, 1),
  493. PM8XXX_NLDO1200(L28, "8921_l28", 0, 1, 375000, 1050000, 200, "8917_s7",
  494. 0, 2),
  495. PM8XXX_LDO(L29, "8921_l29", 0, 1, 1800000, 1800000, 200, "8917_s8",
  496. 0, 3),
  497. PM8XXX_LDO(L30, "8917_l30", 0, 1, 1800000, 1800000, 200, NULL,
  498. 0, 4),
  499. PM8XXX_LDO(L31, "8917_l31", 0, 1, 1800000, 1800000, 200, NULL,
  500. 0, 5),
  501. PM8XXX_LDO(L32, "8917_l32", 0, 1, 2800000, 2800000, 200, NULL,
  502. 0, 6),
  503. PM8XXX_LDO(L33, "8917_l33", 0, 1, 2800000, 2800000, 200, NULL,
  504. 0, 7),
  505. PM8XXX_LDO(L34, "8917_l34", 0, 1, 1800000, 1800000, 200, NULL,
  506. 0, 8),
  507. PM8XXX_LDO(L35, "8917_l35", 0, 1, 3000000, 3000000, 200, NULL,
  508. 0, 9),
  509. PM8XXX_LDO(L36, "8917_l36", 0, 1, 1800000, 1800000, 200, NULL,
  510. 0, 10),
  511. /*
  512. * ID name always_on min_uV max_uV en_t supply reg_ID
  513. */
  514. PM8XXX_BOOST(BOOST, "8917_boost", 0, 5000000, 5000000, 500, NULL, 11),
  515. /* ID name always_on pd en_t supply reg_ID */
  516. PM8XXX_VS300(USB_OTG, "8921_usb_otg", 0, 1, 0, "8917_boost", 12),
  517. };
  518. static struct rpm_regulator_init_data
  519. msm8930_rpm_regulator_init_data[] __devinitdata = {
  520. /* ID a_on pd ss min_uV max_uV supply sys_uA freq fm ss_fm */
  521. RPM_SMPS(S1, 1, 1, 0, 1300000, 1300000, NULL, 100000, 3p20, NONE, NONE),
  522. RPM_SMPS(S2, 0, 1, 0, 1300000, 1300000, NULL, 0, 1p60, NONE, NONE),
  523. RPM_SMPS(S3, 0, 1, 1, 500000, 1150000, NULL, 100000, 4p80, NONE, NONE),
  524. RPM_SMPS(S4, 1, 1, 0, 1800000, 1800000, NULL, 100000, 1p60, NONE, NONE),
  525. RPM_SMPS(S7, 0, 1, 0, 1150000, 1150000, NULL, 100000, 3p20, AUTO, AUTO),
  526. RPM_SMPS(S8, 1, 1, 1, 2050000, 2050000, NULL, 100000, 1p60, NONE, NONE),
  527. /* ID a_on pd ss min_uV max_uV supply sys_uA init_ip */
  528. RPM_LDO(L1, 0, 1, 0, 1050000, 1050000, "8917_s4", 0, 10000),
  529. RPM_LDO(L2, 0, 1, 0, 1200000, 1200000, "8917_s4", 0, 0),
  530. RPM_LDO(L3, 0, 1, 0, 3075000, 3075000, NULL, 0, 0),
  531. RPM_LDO(L4, 1, 1, 0, 1800000, 1800000, NULL, 10000, 10000),
  532. RPM_LDO(L5, 0, 1, 0, 2950000, 2950000, NULL, 0, 0),
  533. RPM_LDO(L6, 0, 1, 0, 2950000, 2950000, NULL, 0, 0),
  534. RPM_LDO(L7, 1, 1, 0, 1850000, 2950000, NULL, 10000, 10000),
  535. RPM_LDO(L8, 0, 1, 0, 2800000, 2800000, NULL, 0, 0),
  536. RPM_LDO(L9, 0, 1, 0, 2850000, 2850000, NULL, 0, 0),
  537. RPM_LDO(L10, 0, 1, 0, 2900000, 2900000, NULL, 0, 0),
  538. RPM_LDO(L11, 0, 1, 0, 2850000, 2850000, NULL, 0, 0),
  539. RPM_LDO(L12, 0, 1, 0, 1200000, 1200000, "8917_s4", 0, 0),
  540. RPM_LDO(L14, 0, 1, 0, 1800000, 1800000, NULL, 0, 0),
  541. RPM_LDO(L15, 0, 1, 0, 1800000, 2950000, NULL, 0, 0),
  542. RPM_LDO(L16, 0, 1, 0, 2850000, 2850000, NULL, 0, 0),
  543. RPM_LDO(L17, 0, 1, 0, 1800000, 2950000, NULL, 0, 0),
  544. RPM_LDO(L18, 0, 1, 0, 1200000, 1200000, "8917_s4", 0, 0),
  545. RPM_LDO(L21, 0, 1, 0, 1900000, 1900000, "8917_s8", 0, 0),
  546. RPM_LDO(L22, 0, 1, 0, 2750000, 2750000, NULL, 0, 0),
  547. RPM_LDO(L23, 1, 1, 1, 1800000, 1800000, "8917_s8", 10000, 10000),
  548. RPM_LDO(L24, 0, 1, 1, 500000, 1150000, "8917_s1", 10000, 10000),
  549. RPM_LDO(L25, 1, 1, 0, 1250000, 1250000, "8917_s1", 10000, 10000),
  550. /* ID a_on pd ss supply */
  551. RPM_VS(LVS1, 0, 1, 0, "8917_s4"),
  552. RPM_VS(LVS3, 0, 1, 0, "8917_s4"),
  553. RPM_VS(LVS4, 0, 1, 0, "8917_s4"),
  554. RPM_VS(LVS5, 0, 1, 0, "8917_s4"),
  555. RPM_VS(LVS6, 0, 1, 0, "8917_s4"),
  556. RPM_VS(LVS7, 0, 1, 0, "8917_s4"),
  557. /* ID a_on ss min_corner max_corner supply */
  558. RPM_CORNER(VDD_DIG_CORNER, 0, 1, RPM_VREG_CORNER_NONE,
  559. RPM_VREG_CORNER_HIGH, NULL),
  560. };
  561. int msm8930_pm8917_regulator_pdata_len __devinitdata =
  562. ARRAY_SIZE(msm8930_pm8917_regulator_pdata);
  563. #define RPM_REG_MAP(_id, _sleep_also, _voter, _supply, _dev_name) \
  564. { \
  565. .vreg_id = RPM_VREG_ID_PM8917_##_id, \
  566. .sleep_also = _sleep_also, \
  567. .voter = _voter, \
  568. .supply = _supply, \
  569. .dev_name = _dev_name, \
  570. }
  571. static struct rpm_regulator_consumer_mapping
  572. msm_rpm_regulator_consumer_mapping[] __devinitdata = {
  573. RPM_REG_MAP(L23, 0, 1, "krait0_l23", "acpuclk-8930"),
  574. RPM_REG_MAP(S8, 0, 1, "krait0_s8", "acpuclk-8930"),
  575. RPM_REG_MAP(L23, 0, 2, "krait1_l23", "acpuclk-8930"),
  576. RPM_REG_MAP(S8, 0, 2, "krait1_s8", "acpuclk-8930"),
  577. RPM_REG_MAP(L23, 0, 6, "l2_l23", "acpuclk-8930"),
  578. RPM_REG_MAP(S8, 0, 6, "l2_s8", "acpuclk-8930"),
  579. RPM_REG_MAP(L24, 0, 1, "krait0_mem", "acpuclk-8930"),
  580. RPM_REG_MAP(L24, 0, 2, "krait1_mem", "acpuclk-8930"),
  581. RPM_REG_MAP(VDD_DIG_CORNER, 0, 1, "krait0_dig", "acpuclk-8930"),
  582. RPM_REG_MAP(VDD_DIG_CORNER, 0, 2, "krait1_dig", "acpuclk-8930"),
  583. RPM_REG_MAP(L23, 0, 1, "krait0_hfpll", "acpuclk-8627"),
  584. RPM_REG_MAP(L23, 0, 2, "krait1_hfpll", "acpuclk-8627"),
  585. RPM_REG_MAP(L23, 0, 6, "l2_hfpll", "acpuclk-8627"),
  586. RPM_REG_MAP(L24, 0, 1, "krait0_mem", "acpuclk-8627"),
  587. RPM_REG_MAP(L24, 0, 2, "krait1_mem", "acpuclk-8627"),
  588. RPM_REG_MAP(VDD_DIG_CORNER, 0, 1, "krait0_dig", "acpuclk-8627"),
  589. RPM_REG_MAP(VDD_DIG_CORNER, 0, 2, "krait1_dig", "acpuclk-8627"),
  590. RPM_REG_MAP(L23, 0, 1, "krait0_hfpll", "acpuclk-8930aa"),
  591. RPM_REG_MAP(L23, 0, 2, "krait1_hfpll", "acpuclk-8930aa"),
  592. RPM_REG_MAP(L23, 0, 6, "l2_hfpll", "acpuclk-8930aa"),
  593. RPM_REG_MAP(L24, 0, 1, "krait0_mem", "acpuclk-8930aa"),
  594. RPM_REG_MAP(L24, 0, 2, "krait1_mem", "acpuclk-8930aa"),
  595. RPM_REG_MAP(VDD_DIG_CORNER, 0, 1, "krait0_dig", "acpuclk-8930aa"),
  596. RPM_REG_MAP(VDD_DIG_CORNER, 0, 2, "krait1_dig", "acpuclk-8930aa"),
  597. RPM_REG_MAP(L23, 0, 1, "krait0_l23", "acpuclk-8930ab"),
  598. RPM_REG_MAP(S8, 0, 1, "krait0_s8", "acpuclk-8930ab"),
  599. RPM_REG_MAP(L23, 0, 2, "krait1_l23", "acpuclk-8930ab"),
  600. RPM_REG_MAP(S8, 0, 2, "krait1_s8", "acpuclk-8930ab"),
  601. RPM_REG_MAP(L23, 0, 6, "l2_l23", "acpuclk-8930ab"),
  602. RPM_REG_MAP(S8, 0, 6, "l2_s8", "acpuclk-8930ab"),
  603. RPM_REG_MAP(L24, 0, 1, "krait0_mem", "acpuclk-8930ab"),
  604. RPM_REG_MAP(L24, 0, 2, "krait1_mem", "acpuclk-8930ab"),
  605. RPM_REG_MAP(VDD_DIG_CORNER, 0, 1, "krait0_dig", "acpuclk-8930ab"),
  606. RPM_REG_MAP(VDD_DIG_CORNER, 0, 2, "krait1_dig", "acpuclk-8930ab"),
  607. };
  608. struct rpm_regulator_platform_data
  609. msm8930_pm8917_rpm_regulator_pdata __devinitdata = {
  610. .init_data = msm8930_rpm_regulator_init_data,
  611. .num_regulators = ARRAY_SIZE(msm8930_rpm_regulator_init_data),
  612. .version = RPM_VREG_VERSION_8930_PM8917,
  613. .vreg_id_vdd_mem = RPM_VREG_ID_PM8917_L24,
  614. .vreg_id_vdd_dig = RPM_VREG_ID_PM8917_VDD_DIG_CORNER,
  615. .consumer_map = msm_rpm_regulator_consumer_mapping,
  616. .consumer_map_len = ARRAY_SIZE(msm_rpm_regulator_consumer_mapping),
  617. };