/arch/arm/mach-msm/board-qrd7627a.c

https://github.com/AICP/kernel_google_msm · C · 1271 lines · 1089 code · 145 blank · 37 comment · 37 complexity · 110668e2033f53e70bde9fdfcfe23ba2 MD5 · raw file

  1. /* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/init.h>
  14. #include <linux/gpio_event.h>
  15. #include <linux/usb/android.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/io.h>
  18. #include <linux/gpio.h>
  19. #include <linux/mtd/nand.h>
  20. #include <linux/mtd/partitions.h>
  21. #include <linux/i2c.h>
  22. #include <linux/android_pmem.h>
  23. #include <linux/bootmem.h>
  24. #include <linux/mfd/marimba.h>
  25. #include <linux/power_supply.h>
  26. #include <linux/input/rmi_platformdata.h>
  27. #include <linux/input/rmi_i2c.h>
  28. #include <linux/i2c/atmel_mxt_ts.h>
  29. #include <linux/regulator/consumer.h>
  30. #include <linux/memblock.h>
  31. #include <linux/input/ft5x06_ts.h>
  32. #include <linux/msm_adc.h>
  33. #include <linux/regulator/msm-gpio-regulator.h>
  34. #include <linux/msm_ion.h>
  35. #include <asm/mach/mmc.h>
  36. #include <asm/mach-types.h>
  37. #include <asm/mach/arch.h>
  38. #include <asm/hardware/gic.h>
  39. #include <mach/board.h>
  40. #include <mach/msm_iomap.h>
  41. #include <mach/msm_hsusb.h>
  42. #include <mach/rpc_hsusb.h>
  43. #include <mach/rpc_pmapp.h>
  44. #include <mach/usbdiag.h>
  45. #include <mach/msm_memtypes.h>
  46. #include <mach/msm_serial_hs.h>
  47. #include <mach/pmic.h>
  48. #include <mach/socinfo.h>
  49. #include <mach/vreg.h>
  50. #include <mach/rpc_pmapp.h>
  51. #include <mach/msm_battery.h>
  52. #include <mach/rpc_server_handset.h>
  53. #include <mach/socinfo.h>
  54. #include "board-msm7x27a-regulator.h"
  55. #include "devices.h"
  56. #include "devices-msm7x2xa.h"
  57. #include "pm.h"
  58. #include "timer.h"
  59. #include "pm-boot.h"
  60. #include "board-msm7x27a-regulator.h"
  61. #include "board-msm7627a.h"
  62. #define PMEM_KERNEL_EBI1_SIZE 0x3A000
  63. #define MSM_PMEM_AUDIO_SIZE 0x1F4000
  64. #define BAHAMA_SLAVE_ID_FM_REG 0x02
  65. #define FM_GPIO 83
  66. #define BT_PCM_BCLK_MODE 0x88
  67. #define BT_PCM_DIN_MODE 0x89
  68. #define BT_PCM_DOUT_MODE 0x8A
  69. #define BT_PCM_SYNC_MODE 0x8B
  70. #define FM_I2S_SD_MODE 0x8E
  71. #define FM_I2S_WS_MODE 0x8F
  72. #define FM_I2S_SCK_MODE 0x90
  73. #define I2C_PIN_CTL 0x15
  74. #define I2C_NORMAL 0x40
  75. #define SNDDEV_CAP_NONE 0x0
  76. #define SNDDEV_CAP_RX 0x1 /* RX direction */
  77. #define SNDDEV_CAP_TX 0x2 /* TX direction */
  78. #define SNDDEV_CAP_VOICE 0x4 /* Support voice call */
  79. #define SNDDEV_CAP_FM 0x10 /* Support FM radio */
  80. #define SNDDEV_CAP_TTY 0x20 /* Support TTY */
  81. static struct platform_device msm_wlan_ar6000_pm_device = {
  82. .name = "wlan_ar6000_pm_dev",
  83. .id = -1,
  84. };
  85. static struct msm_gpio qup_i2c_gpios_io[] = {
  86. { GPIO_CFG(60, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
  87. "qup_scl" },
  88. { GPIO_CFG(61, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
  89. "qup_sda" },
  90. { GPIO_CFG(131, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
  91. "qup_scl" },
  92. { GPIO_CFG(132, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
  93. "qup_sda" },
  94. };
  95. static struct msm_gpio qup_i2c_gpios_hw[] = {
  96. { GPIO_CFG(60, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
  97. "qup_scl" },
  98. { GPIO_CFG(61, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
  99. "qup_sda" },
  100. { GPIO_CFG(131, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
  101. "qup_scl" },
  102. { GPIO_CFG(132, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
  103. "qup_sda" },
  104. };
  105. static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
  106. {
  107. int rc;
  108. if (adap_id < 0 || adap_id > 1)
  109. return;
  110. /* Each adapter gets 2 lines from the table */
  111. if (config_type)
  112. rc = msm_gpios_request_enable(&qup_i2c_gpios_hw[adap_id*2], 2);
  113. else
  114. rc = msm_gpios_request_enable(&qup_i2c_gpios_io[adap_id*2], 2);
  115. if (rc < 0)
  116. pr_err("QUP GPIO request/enable failed: %d\n", rc);
  117. }
  118. static struct msm_i2c_platform_data msm_gsbi0_qup_i2c_pdata = {
  119. .clk_freq = 100000,
  120. .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
  121. };
  122. static struct msm_i2c_platform_data msm_gsbi1_qup_i2c_pdata = {
  123. .clk_freq = 100000,
  124. .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
  125. };
  126. #ifdef CONFIG_ARCH_MSM7X27A
  127. #define MSM_PMEM_MDP_SIZE 0x1B00000
  128. #define MSM_PMEM_ADSP_SIZE 0x1200000
  129. #define CAMERA_ZSL_SIZE (SZ_1M * 60)
  130. #ifdef CONFIG_ION_MSM
  131. #define MSM_ION_HEAP_NUM 4
  132. static struct platform_device ion_dev;
  133. static int msm_ion_camera_size;
  134. static int msm_ion_audio_size;
  135. static int msm_ion_sf_size;
  136. #endif
  137. #endif
  138. static struct android_usb_platform_data android_usb_pdata = {
  139. .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
  140. .cdrom = 1,
  141. };
  142. static struct platform_device android_usb_device = {
  143. .name = "android_usb",
  144. .id = -1,
  145. .dev = {
  146. .platform_data = &android_usb_pdata,
  147. },
  148. };
  149. #ifdef CONFIG_USB_EHCI_MSM_72K
  150. static void msm_hsusb_vbus_power(unsigned phy_info, int on)
  151. {
  152. int rc = 0;
  153. unsigned gpio;
  154. gpio = QRD_GPIO_HOST_VBUS_EN;
  155. rc = gpio_request(gpio, "i2c_host_vbus_en");
  156. if (rc < 0) {
  157. pr_err("failed to request %d GPIO\n", gpio);
  158. return;
  159. }
  160. gpio_direction_output(gpio, !!on);
  161. gpio_set_value_cansleep(gpio, !!on);
  162. gpio_free(gpio);
  163. }
  164. static struct msm_usb_host_platform_data msm_usb_host_pdata = {
  165. .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_45NM),
  166. };
  167. static void __init msm7627a_init_host(void)
  168. {
  169. msm_add_host(0, &msm_usb_host_pdata);
  170. }
  171. #endif
  172. #ifdef CONFIG_USB_MSM_OTG_72K
  173. static int hsusb_rpc_connect(int connect)
  174. {
  175. if (connect)
  176. return msm_hsusb_rpc_connect();
  177. else
  178. return msm_hsusb_rpc_close();
  179. }
  180. static struct regulator *reg_hsusb;
  181. static int msm_hsusb_ldo_init(int init)
  182. {
  183. int rc = 0;
  184. if (init) {
  185. reg_hsusb = regulator_get(NULL, "usb");
  186. if (IS_ERR(reg_hsusb)) {
  187. rc = PTR_ERR(reg_hsusb);
  188. pr_err("%s: could not get regulator: %d\n",
  189. __func__, rc);
  190. goto out;
  191. }
  192. rc = regulator_set_voltage(reg_hsusb, 3300000, 3300000);
  193. if (rc) {
  194. pr_err("%s: could not set voltage: %d\n",
  195. __func__, rc);
  196. goto reg_free;
  197. }
  198. return 0;
  199. }
  200. /* else fall through */
  201. reg_free:
  202. regulator_put(reg_hsusb);
  203. out:
  204. reg_hsusb = NULL;
  205. return rc;
  206. }
  207. static int msm_hsusb_ldo_enable(int enable)
  208. {
  209. static int ldo_status;
  210. if (IS_ERR_OR_NULL(reg_hsusb))
  211. return reg_hsusb ? PTR_ERR(reg_hsusb) : -ENODEV;
  212. if (ldo_status == enable)
  213. return 0;
  214. ldo_status = enable;
  215. return enable ?
  216. regulator_enable(reg_hsusb) :
  217. regulator_disable(reg_hsusb);
  218. }
  219. #ifndef CONFIG_USB_EHCI_MSM_72K
  220. static int msm_hsusb_pmic_notif_init(void (*callback)(int online), int init)
  221. {
  222. int ret = 0;
  223. if (init)
  224. ret = msm_pm_app_rpc_init(callback);
  225. else
  226. msm_pm_app_rpc_deinit(callback);
  227. return ret;
  228. }
  229. #endif
  230. static struct msm_otg_platform_data msm_otg_pdata = {
  231. #ifndef CONFIG_USB_EHCI_MSM_72K
  232. .pmic_vbus_notif_init = msm_hsusb_pmic_notif_init,
  233. #else
  234. .vbus_power = msm_hsusb_vbus_power,
  235. #endif
  236. .rpc_connect = hsusb_rpc_connect,
  237. .pemp_level = PRE_EMPHASIS_WITH_20_PERCENT,
  238. .cdr_autoreset = CDR_AUTO_RESET_DISABLE,
  239. .drv_ampl = HS_DRV_AMPLITUDE_DEFAULT,
  240. .se1_gating = SE1_GATING_DISABLE,
  241. .ldo_init = msm_hsusb_ldo_init,
  242. .ldo_enable = msm_hsusb_ldo_enable,
  243. .chg_init = hsusb_chg_init,
  244. .chg_connected = hsusb_chg_connected,
  245. .chg_vbus_draw = hsusb_chg_vbus_draw,
  246. };
  247. #endif
  248. static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = {
  249. .is_phy_status_timer_on = 1,
  250. };
  251. #ifdef CONFIG_SERIAL_MSM_HS
  252. static struct msm_serial_hs_platform_data msm_uart_dm1_pdata = {
  253. .inject_rx_on_wakeup = 1,
  254. .rx_to_inject = 0xFD,
  255. };
  256. #endif
  257. static struct msm_pm_platform_data msm7627a_pm_data[MSM_PM_SLEEP_MODE_NR] = {
  258. [MSM_PM_SLEEP_MODE_POWER_COLLAPSE] = {
  259. .idle_supported = 1,
  260. .suspend_supported = 1,
  261. .idle_enabled = 1,
  262. .suspend_enabled = 1,
  263. .latency = 16000,
  264. .residency = 20000,
  265. },
  266. [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN] = {
  267. .idle_supported = 1,
  268. .suspend_supported = 1,
  269. .idle_enabled = 1,
  270. .suspend_enabled = 1,
  271. .latency = 12000,
  272. .residency = 20000,
  273. },
  274. [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT] = {
  275. .idle_supported = 1,
  276. .suspend_supported = 1,
  277. .idle_enabled = 0,
  278. .suspend_enabled = 1,
  279. .latency = 2000,
  280. .residency = 0,
  281. },
  282. [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT] = {
  283. .idle_supported = 1,
  284. .suspend_supported = 1,
  285. .idle_enabled = 1,
  286. .suspend_enabled = 1,
  287. .latency = 2,
  288. .residency = 0,
  289. },
  290. };
  291. static struct msm_pm_boot_platform_data msm_pm_boot_pdata __initdata = {
  292. .mode = MSM_PM_BOOT_CONFIG_RESET_VECTOR_PHYS,
  293. .p_addr = 0,
  294. };
  295. /* 8625 PM platform data */
  296. static struct msm_pm_platform_data msm8625_pm_data[MSM_PM_SLEEP_MODE_NR * 2] = {
  297. /* CORE0 entries */
  298. [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
  299. .idle_supported = 1,
  300. .suspend_supported = 1,
  301. .idle_enabled = 0,
  302. .suspend_enabled = 0,
  303. .latency = 16000,
  304. .residency = 20000,
  305. },
  306. [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN)] = {
  307. .idle_supported = 1,
  308. .suspend_supported = 1,
  309. .idle_enabled = 0,
  310. .suspend_enabled = 0,
  311. .latency = 12000,
  312. .residency = 20000,
  313. },
  314. /* picked latency & redisdency values from 7x30 */
  315. [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
  316. .idle_supported = 1,
  317. .suspend_supported = 1,
  318. .idle_enabled = 0,
  319. .suspend_enabled = 0,
  320. .latency = 500,
  321. .residency = 6000,
  322. },
  323. [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
  324. .idle_supported = 1,
  325. .suspend_supported = 1,
  326. .idle_enabled = 1,
  327. .suspend_enabled = 1,
  328. .latency = 2,
  329. .residency = 10,
  330. },
  331. /* picked latency & redisdency values from 7x30 */
  332. [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
  333. .idle_supported = 1,
  334. .suspend_supported = 1,
  335. .idle_enabled = 0,
  336. .suspend_enabled = 0,
  337. .latency = 500,
  338. .residency = 6000,
  339. },
  340. [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
  341. .idle_supported = 1,
  342. .suspend_supported = 1,
  343. .idle_enabled = 1,
  344. .suspend_enabled = 1,
  345. .latency = 2,
  346. .residency = 10,
  347. },
  348. };
  349. static struct msm_pm_boot_platform_data msm_pm_8625_boot_pdata __initdata = {
  350. .mode = MSM_PM_BOOT_CONFIG_REMAP_BOOT_ADDR,
  351. .v_addr = MSM_CFG_CTL_BASE,
  352. };
  353. static struct android_pmem_platform_data android_pmem_adsp_pdata = {
  354. .name = "pmem_adsp",
  355. .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
  356. .cached = 1,
  357. .memory_type = MEMTYPE_EBI1,
  358. };
  359. static struct platform_device android_pmem_adsp_device = {
  360. .name = "android_pmem",
  361. .id = 1,
  362. .dev = { .platform_data = &android_pmem_adsp_pdata },
  363. };
  364. static unsigned pmem_mdp_size = MSM_PMEM_MDP_SIZE;
  365. static int __init pmem_mdp_size_setup(char *p)
  366. {
  367. pmem_mdp_size = memparse(p, NULL);
  368. return 0;
  369. }
  370. early_param("pmem_mdp_size", pmem_mdp_size_setup);
  371. static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
  372. static int __init pmem_adsp_size_setup(char *p)
  373. {
  374. pmem_adsp_size = memparse(p, NULL);
  375. return 0;
  376. }
  377. early_param("pmem_adsp_size", pmem_adsp_size_setup);
  378. #define SND(desc, num) { .name = #desc, .id = num }
  379. static struct snd_endpoint snd_endpoints_list[] = {
  380. SND(HANDSET, 0),
  381. SND(MONO_HEADSET, 2),
  382. SND(HEADSET, 3),
  383. SND(SPEAKER, 6),
  384. SND(TTY_HEADSET, 8),
  385. SND(TTY_VCO, 9),
  386. SND(TTY_HCO, 10),
  387. SND(BT, 12),
  388. SND(IN_S_SADC_OUT_HANDSET, 16),
  389. SND(IN_S_SADC_OUT_SPEAKER_PHONE, 25),
  390. SND(FM_DIGITAL_STEREO_HEADSET, 26),
  391. SND(FM_DIGITAL_SPEAKER_PHONE, 27),
  392. SND(FM_DIGITAL_BT_A2DP_HEADSET, 28),
  393. SND(STEREO_HEADSET_AND_SPEAKER, 31),
  394. SND(CURRENT, 0x7FFFFFFE),
  395. SND(FM_ANALOG_STEREO_HEADSET, 35),
  396. SND(FM_ANALOG_STEREO_HEADSET_CODEC, 36),
  397. };
  398. #undef SND
  399. static struct msm_snd_endpoints msm_device_snd_endpoints = {
  400. .endpoints = snd_endpoints_list,
  401. .num = sizeof(snd_endpoints_list) / sizeof(struct snd_endpoint)
  402. };
  403. static struct platform_device msm_device_snd = {
  404. .name = "msm_snd",
  405. .id = -1,
  406. .dev = {
  407. .platform_data = &msm_device_snd_endpoints
  408. },
  409. };
  410. #define CAD(desc, num, cap) { .name = #desc, .id = num, .capability = cap, }
  411. static struct cad_endpoint cad_endpoints_list[] = {
  412. CAD(NONE, 0, SNDDEV_CAP_NONE),
  413. CAD(HANDSET_SPKR, 1, (SNDDEV_CAP_RX | SNDDEV_CAP_VOICE)),
  414. CAD(HANDSET_MIC, 2, (SNDDEV_CAP_TX | SNDDEV_CAP_VOICE)),
  415. CAD(HEADSET_MIC, 3, (SNDDEV_CAP_TX | SNDDEV_CAP_VOICE)),
  416. CAD(HEADSET_SPKR_MONO, 4, (SNDDEV_CAP_RX | SNDDEV_CAP_VOICE)),
  417. CAD(HEADSET_SPKR_STEREO, 5, (SNDDEV_CAP_RX | SNDDEV_CAP_VOICE)),
  418. CAD(SPEAKER_PHONE_MIC, 6, (SNDDEV_CAP_TX | SNDDEV_CAP_VOICE)),
  419. CAD(SPEAKER_PHONE_MONO, 7, (SNDDEV_CAP_RX | SNDDEV_CAP_VOICE)),
  420. CAD(SPEAKER_PHONE_STEREO, 8, (SNDDEV_CAP_RX | SNDDEV_CAP_VOICE)),
  421. CAD(BT_SCO_MIC, 9, (SNDDEV_CAP_TX | SNDDEV_CAP_VOICE)),
  422. CAD(BT_SCO_SPKR, 10, (SNDDEV_CAP_TX | SNDDEV_CAP_VOICE)),
  423. CAD(BT_A2DP_SPKR, 11, (SNDDEV_CAP_RX | SNDDEV_CAP_VOICE)),
  424. CAD(TTY_HEADSET_MIC, 12, (SNDDEV_CAP_TX | \
  425. SNDDEV_CAP_VOICE | SNDDEV_CAP_TTY)),
  426. CAD(TTY_HEADSET_SPKR, 13, (SNDDEV_CAP_RX | \
  427. SNDDEV_CAP_VOICE | SNDDEV_CAP_TTY)),
  428. CAD(HEADSET_STEREO_PLUS_SPKR_MONO_RX, 19, (SNDDEV_CAP_TX | \
  429. SNDDEV_CAP_VOICE)),
  430. CAD(LP_FM_HEADSET_SPKR_STEREO_RX, 25, (SNDDEV_CAP_TX | SNDDEV_CAP_FM)),
  431. CAD(I2S_RX, 26, (SNDDEV_CAP_RX)),
  432. CAD(SPEAKER_PHONE_MIC_ENDFIRE, 45, (SNDDEV_CAP_TX | SNDDEV_CAP_VOICE)),
  433. CAD(HANDSET_MIC_ENDFIRE, 46, (SNDDEV_CAP_TX | SNDDEV_CAP_VOICE)),
  434. CAD(I2S_TX, 48, (SNDDEV_CAP_TX)),
  435. CAD(LP_FM_HEADSET_SPKR_STEREO_PLUS_HEADSET_SPKR_STEREO_RX, 57, \
  436. (SNDDEV_CAP_FM | SNDDEV_CAP_RX)),
  437. CAD(FM_DIGITAL_HEADSET_SPKR_STEREO, 65, \
  438. (SNDDEV_CAP_FM | SNDDEV_CAP_RX)),
  439. CAD(FM_DIGITAL_SPEAKER_PHONE_MONO, 67, \
  440. (SNDDEV_CAP_FM | SNDDEV_CAP_RX)),
  441. CAD(FM_DIGITAL_BT_A2DP_SPKR, 69, \
  442. (SNDDEV_CAP_FM | SNDDEV_CAP_RX)),
  443. CAD(MAX, 80, SNDDEV_CAP_NONE),
  444. };
  445. #undef CAD
  446. static struct msm_cad_endpoints msm_device_cad_endpoints = {
  447. .endpoints = cad_endpoints_list,
  448. .num = sizeof(cad_endpoints_list) / sizeof(struct cad_endpoint)
  449. };
  450. static struct platform_device msm_device_cad = {
  451. .name = "msm_cad",
  452. .id = -1,
  453. .dev = {
  454. .platform_data = &msm_device_cad_endpoints
  455. },
  456. };
  457. #define DEC0_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
  458. (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
  459. (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
  460. (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
  461. (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
  462. (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))| \
  463. (1<<MSM_ADSP_CODEC_AC3)
  464. #define DEC1_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
  465. (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
  466. (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
  467. (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
  468. (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
  469. (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
  470. #define DEC2_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
  471. (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
  472. (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
  473. (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
  474. (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
  475. (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
  476. #define DEC3_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
  477. (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
  478. (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
  479. (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
  480. (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
  481. (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
  482. #define DEC4_FORMAT (1<<MSM_ADSP_CODEC_MIDI)
  483. static unsigned int dec_concurrency_table[] = {
  484. /* Audio LP */
  485. (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DMA)), 0,
  486. 0, 0, 0,
  487. /* Concurrency 1 */
  488. (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
  489. (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
  490. (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
  491. (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
  492. (DEC4_FORMAT),
  493. /* Concurrency 2 */
  494. (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
  495. (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
  496. (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
  497. (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
  498. (DEC4_FORMAT),
  499. /* Concurrency 3 */
  500. (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
  501. (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
  502. (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
  503. (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
  504. (DEC4_FORMAT),
  505. /* Concurrency 4 */
  506. (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
  507. (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
  508. (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
  509. (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
  510. (DEC4_FORMAT),
  511. /* Concurrency 5 */
  512. (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
  513. (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
  514. (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
  515. (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
  516. (DEC4_FORMAT),
  517. /* Concurrency 6 */
  518. (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|
  519. (1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
  520. 0, 0, 0, 0,
  521. /* Concurrency 7 */
  522. (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
  523. (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
  524. (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
  525. (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
  526. (DEC4_FORMAT),
  527. };
  528. #define DEC_INFO(name, queueid, decid, nr_codec) { .module_name = name, \
  529. .module_queueid = queueid, .module_decid = decid, \
  530. .nr_codec_support = nr_codec}
  531. static struct msm_adspdec_info dec_info_list[] = {
  532. DEC_INFO("AUDPLAY0TASK", 13, 0, 11), /* AudPlay0BitStreamCtrlQueue */
  533. DEC_INFO("AUDPLAY1TASK", 14, 1, 11), /* AudPlay1BitStreamCtrlQueue */
  534. DEC_INFO("AUDPLAY2TASK", 15, 2, 11), /* AudPlay2BitStreamCtrlQueue */
  535. DEC_INFO("AUDPLAY3TASK", 16, 3, 11), /* AudPlay3BitStreamCtrlQueue */
  536. DEC_INFO("AUDPLAY4TASK", 17, 4, 1), /* AudPlay4BitStreamCtrlQueue */
  537. };
  538. static struct msm_adspdec_database msm_device_adspdec_database = {
  539. .num_dec = ARRAY_SIZE(dec_info_list),
  540. .num_concurrency_support = (ARRAY_SIZE(dec_concurrency_table) / \
  541. ARRAY_SIZE(dec_info_list)),
  542. .dec_concurrency_table = dec_concurrency_table,
  543. .dec_info_list = dec_info_list,
  544. };
  545. static struct platform_device msm_device_adspdec = {
  546. .name = "msm_adspdec",
  547. .id = -1,
  548. .dev = {
  549. .platform_data = &msm_device_adspdec_database
  550. },
  551. };
  552. static struct android_pmem_platform_data android_pmem_audio_pdata = {
  553. .name = "pmem_audio",
  554. .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
  555. .cached = 0,
  556. .memory_type = MEMTYPE_EBI1,
  557. };
  558. static struct platform_device android_pmem_audio_device = {
  559. .name = "android_pmem",
  560. .id = 2,
  561. .dev = { .platform_data = &android_pmem_audio_pdata },
  562. };
  563. static struct android_pmem_platform_data android_pmem_pdata = {
  564. .name = "pmem",
  565. .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
  566. .cached = 1,
  567. .memory_type = MEMTYPE_EBI1,
  568. };
  569. static struct platform_device android_pmem_device = {
  570. .name = "android_pmem",
  571. .id = 0,
  572. .dev = { .platform_data = &android_pmem_pdata },
  573. };
  574. static u32 msm_calculate_batt_capacity(u32 current_voltage);
  575. static struct msm_psy_batt_pdata msm_psy_batt_data = {
  576. .voltage_min_design = 3500,
  577. .voltage_max_design = 4200,
  578. .voltage_fail_safe = 3598,
  579. .avail_chg_sources = AC_CHG | USB_CHG ,
  580. .batt_technology = POWER_SUPPLY_TECHNOLOGY_LION,
  581. .calculate_capacity = &msm_calculate_batt_capacity,
  582. };
  583. static u32 msm_calculate_batt_capacity(u32 current_voltage)
  584. {
  585. u32 low_voltage = msm_psy_batt_data.voltage_min_design;
  586. u32 high_voltage = msm_psy_batt_data.voltage_max_design;
  587. if (current_voltage <= low_voltage)
  588. return 0;
  589. else if (current_voltage >= high_voltage)
  590. return 100;
  591. else
  592. return (current_voltage - low_voltage) * 100
  593. / (high_voltage - low_voltage);
  594. }
  595. static struct platform_device msm_batt_device = {
  596. .name = "msm-battery",
  597. .id = -1,
  598. .dev.platform_data = &msm_psy_batt_data,
  599. };
  600. static char *msm_adc_surf_device_names[] = {
  601. "XO_ADC",
  602. };
  603. static struct msm_adc_platform_data msm_adc_pdata = {
  604. .dev_names = msm_adc_surf_device_names,
  605. .num_adc = ARRAY_SIZE(msm_adc_surf_device_names),
  606. .target_hw = MSM_8x25,
  607. };
  608. static struct platform_device msm_adc_device = {
  609. .name = "msm_adc",
  610. .id = -1,
  611. .dev = {
  612. .platform_data = &msm_adc_pdata,
  613. },
  614. };
  615. #ifdef CONFIG_MSM_RTB
  616. static struct msm_rtb_platform_data msm7627a_rtb_pdata = {
  617. .size = SZ_1M,
  618. };
  619. static int __init msm_rtb_set_buffer_size(char *p)
  620. {
  621. int s;
  622. s = memparse(p, NULL);
  623. msm7627a_rtb_pdata.size = ALIGN(s, SZ_4K);
  624. return 0;
  625. }
  626. early_param("msm_rtb_size", msm_rtb_set_buffer_size);
  627. struct platform_device msm7627a_rtb_device = {
  628. .name = "msm_rtb",
  629. .id = -1,
  630. .dev = {
  631. .platform_data = &msm7627a_rtb_pdata,
  632. },
  633. };
  634. #endif
  635. #define GPIO_VREG_INIT(_id, _reg_name, _gpio_label, _gpio, _active_low) \
  636. [GPIO_VREG_ID_##_id] = { \
  637. .init_data = { \
  638. .constraints = { \
  639. .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
  640. }, \
  641. .num_consumer_supplies = \
  642. ARRAY_SIZE(vreg_consumers_##_id), \
  643. .consumer_supplies = vreg_consumers_##_id, \
  644. }, \
  645. .regulator_name = _reg_name, \
  646. .active_low = _active_low, \
  647. .gpio_label = _gpio_label, \
  648. .gpio = _gpio, \
  649. }
  650. #define GPIO_VREG_ID_EXT_2P85V 0
  651. #define GPIO_VREG_ID_EXT_1P8V 1
  652. static struct regulator_consumer_supply vreg_consumers_EXT_2P85V[] = {
  653. REGULATOR_SUPPLY("cam_ov5647_avdd", "0-006c"),
  654. REGULATOR_SUPPLY("cam_ov7692_avdd", "0-0078"),
  655. REGULATOR_SUPPLY("cam_ov8825_avdd", "0-000d"),
  656. REGULATOR_SUPPLY("lcd_vdd", "mipi_dsi.1"),
  657. };
  658. static struct regulator_consumer_supply vreg_consumers_EXT_1P8V[] = {
  659. REGULATOR_SUPPLY("cam_ov5647_vdd", "0-006c"),
  660. REGULATOR_SUPPLY("cam_ov7692_vdd", "0-0078"),
  661. REGULATOR_SUPPLY("cam_ov8825_vdd", "0-000d"),
  662. REGULATOR_SUPPLY("lcd_vddi", "mipi_dsi.1"),
  663. };
  664. /* GPIO regulator constraints */
  665. static struct gpio_regulator_platform_data msm_gpio_regulator_pdata[] = {
  666. GPIO_VREG_INIT(EXT_2P85V, "ext_2p85v", "ext_2p85v_en", 35, 0),
  667. GPIO_VREG_INIT(EXT_1P8V, "ext_1p8v", "ext_1p8v_en", 40, 0),
  668. };
  669. /* GPIO regulator */
  670. static struct platform_device qrd_vreg_gpio_ext_2p85v __devinitdata = {
  671. .name = GPIO_REGULATOR_DEV_NAME,
  672. .id = 35,
  673. .dev = {
  674. .platform_data =
  675. &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_2P85V],
  676. },
  677. };
  678. static struct platform_device qrd_vreg_gpio_ext_1p8v __devinitdata = {
  679. .name = GPIO_REGULATOR_DEV_NAME,
  680. .id = 40,
  681. .dev = {
  682. .platform_data =
  683. &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_1P8V],
  684. },
  685. };
  686. static struct platform_device *common_devices[] __initdata = {
  687. &android_usb_device,
  688. &android_pmem_device,
  689. &android_pmem_adsp_device,
  690. &android_pmem_audio_device,
  691. &msm_batt_device,
  692. &msm_device_adspdec,
  693. &msm_device_snd,
  694. &msm_device_cad,
  695. &asoc_msm_pcm,
  696. &asoc_msm_dai0,
  697. &asoc_msm_dai1,
  698. &msm_adc_device,
  699. #ifdef CONFIG_MSM_RTB
  700. &msm7627a_rtb_device,
  701. #endif
  702. #ifdef CONFIG_ION_MSM
  703. &ion_dev,
  704. #endif
  705. };
  706. static struct platform_device *qrd7627a_devices[] __initdata = {
  707. &msm_device_dmov,
  708. &msm_device_smd,
  709. &msm_device_uart1,
  710. &msm_device_uart_dm1,
  711. &msm_gsbi0_qup_i2c_device,
  712. &msm_gsbi1_qup_i2c_device,
  713. &msm_device_otg,
  714. &msm_device_gadget_peripheral,
  715. &msm_kgsl_3d0,
  716. &qrd_vreg_gpio_ext_2p85v,
  717. &qrd_vreg_gpio_ext_1p8v,
  718. };
  719. static struct platform_device *qrd3_devices[] __initdata = {
  720. &msm_device_nand,
  721. };
  722. static struct platform_device *msm8625_evb_devices[] __initdata = {
  723. &msm8625_device_dmov,
  724. &msm8625_device_smd,
  725. &msm8625_gsbi0_qup_i2c_device,
  726. &msm8625_gsbi1_qup_i2c_device,
  727. &msm8625_device_uart1,
  728. &msm8625_device_uart_dm1,
  729. &msm8625_device_otg,
  730. &msm8625_device_gadget_peripheral,
  731. &msm8625_kgsl_3d0,
  732. &qrd_vreg_gpio_ext_2p85v,
  733. &qrd_vreg_gpio_ext_1p8v,
  734. };
  735. static unsigned pmem_kernel_ebi1_size = PMEM_KERNEL_EBI1_SIZE;
  736. static int __init pmem_kernel_ebi1_size_setup(char *p)
  737. {
  738. pmem_kernel_ebi1_size = memparse(p, NULL);
  739. return 0;
  740. }
  741. early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
  742. static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
  743. static int __init pmem_audio_size_setup(char *p)
  744. {
  745. pmem_audio_size = memparse(p, NULL);
  746. return 0;
  747. }
  748. early_param("pmem_audio_size", pmem_audio_size_setup);
  749. static void fix_sizes(void)
  750. {
  751. if (get_ddr_size() > SZ_512M)
  752. pmem_adsp_size = CAMERA_ZSL_SIZE;
  753. #ifdef CONFIG_ION_MSM
  754. msm_ion_camera_size = pmem_adsp_size;
  755. msm_ion_audio_size = (MSM_PMEM_AUDIO_SIZE + PMEM_KERNEL_EBI1_SIZE);
  756. msm_ion_sf_size = pmem_mdp_size;
  757. #endif
  758. }
  759. #ifdef CONFIG_ION_MSM
  760. #ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
  761. static struct ion_co_heap_pdata co_ion_pdata = {
  762. .adjacent_mem_id = INVALID_HEAP_ID,
  763. .align = PAGE_SIZE,
  764. };
  765. #endif
  766. /**
  767. * These heaps are listed in the order they will be allocated.
  768. * Don't swap the order unless you know what you are doing!
  769. */
  770. struct ion_platform_heap qrd7627a_heaps[] = {
  771. {
  772. .id = ION_SYSTEM_HEAP_ID,
  773. .type = ION_HEAP_TYPE_SYSTEM,
  774. .name = ION_VMALLOC_HEAP_NAME,
  775. },
  776. #ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
  777. /* PMEM_ADSP = CAMERA */
  778. {
  779. .id = ION_CAMERA_HEAP_ID,
  780. .type = ION_HEAP_TYPE_CARVEOUT,
  781. .name = ION_CAMERA_HEAP_NAME,
  782. .memory_type = ION_EBI_TYPE,
  783. .extra_data = (void *)&co_ion_pdata,
  784. },
  785. /* PMEM_AUDIO */
  786. {
  787. .id = ION_AUDIO_HEAP_ID,
  788. .type = ION_HEAP_TYPE_CARVEOUT,
  789. .name = ION_AUDIO_HEAP_NAME,
  790. .memory_type = ION_EBI_TYPE,
  791. .extra_data = (void *)&co_ion_pdata,
  792. },
  793. /* PMEM_MDP = SF */
  794. {
  795. .id = ION_SF_HEAP_ID,
  796. .type = ION_HEAP_TYPE_CARVEOUT,
  797. .name = ION_SF_HEAP_NAME,
  798. .memory_type = ION_EBI_TYPE,
  799. .extra_data = (void *)&co_ion_pdata,
  800. },
  801. #endif
  802. };
  803. static struct ion_platform_data ion_pdata = {
  804. .nr = MSM_ION_HEAP_NUM,
  805. .has_outer_cache = 1,
  806. .heaps = qrd7627a_heaps,
  807. };
  808. static struct platform_device ion_dev = {
  809. .name = "ion-msm",
  810. .id = 1,
  811. .dev = { .platform_data = &ion_pdata },
  812. };
  813. #endif
  814. static struct memtype_reserve msm7627a_reserve_table[] __initdata = {
  815. [MEMTYPE_SMI] = {
  816. },
  817. [MEMTYPE_EBI0] = {
  818. .flags = MEMTYPE_FLAGS_1M_ALIGN,
  819. },
  820. [MEMTYPE_EBI1] = {
  821. .flags = MEMTYPE_FLAGS_1M_ALIGN,
  822. },
  823. };
  824. #ifdef CONFIG_MSM_RTB
  825. static void __init reserve_rtb_memory(void)
  826. {
  827. msm7627a_reserve_table[MEMTYPE_EBI1].size += msm7627a_rtb_pdata.size;
  828. }
  829. #else
  830. static void __init reserve_rtb_memory(void)
  831. {
  832. }
  833. #endif
  834. #ifdef CONFIG_ANDROID_PMEM
  835. #ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
  836. static struct android_pmem_platform_data *pmem_pdata_array[] __initdata = {
  837. &android_pmem_adsp_pdata,
  838. &android_pmem_audio_pdata,
  839. &android_pmem_pdata,
  840. };
  841. #endif
  842. #endif
  843. static void __init size_pmem_devices(void)
  844. {
  845. #ifdef CONFIG_ANDROID_PMEM
  846. #ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
  847. android_pmem_adsp_pdata.size = pmem_adsp_size;
  848. android_pmem_pdata.size = pmem_mdp_size;
  849. android_pmem_audio_pdata.size = pmem_audio_size;
  850. #endif
  851. #endif
  852. }
  853. #ifdef CONFIG_ANDROID_PMEM
  854. #ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
  855. static void __init reserve_memory_for(struct android_pmem_platform_data *p)
  856. {
  857. msm7627a_reserve_table[p->memory_type].size += p->size;
  858. }
  859. #endif
  860. #endif
  861. static void __init reserve_pmem_memory(void)
  862. {
  863. #ifdef CONFIG_ANDROID_PMEM
  864. #ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
  865. unsigned int i;
  866. for (i = 0; i < ARRAY_SIZE(pmem_pdata_array); ++i)
  867. reserve_memory_for(pmem_pdata_array[i]);
  868. msm7627a_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
  869. #endif
  870. #endif
  871. }
  872. static void __init size_ion_devices(void)
  873. {
  874. #ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
  875. ion_pdata.heaps[1].size = msm_ion_camera_size;
  876. ion_pdata.heaps[2].size = msm_ion_audio_size;
  877. ion_pdata.heaps[3].size = msm_ion_sf_size;
  878. #endif
  879. }
  880. static void __init reserve_ion_memory(void)
  881. {
  882. #if defined(CONFIG_ION_MSM) && defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
  883. msm7627a_reserve_table[MEMTYPE_EBI1].size += msm_ion_camera_size;
  884. msm7627a_reserve_table[MEMTYPE_EBI1].size += msm_ion_audio_size;
  885. msm7627a_reserve_table[MEMTYPE_EBI1].size += msm_ion_sf_size;
  886. #endif
  887. }
  888. static void __init msm7627a_calculate_reserve_sizes(void)
  889. {
  890. fix_sizes();
  891. size_pmem_devices();
  892. reserve_pmem_memory();
  893. size_ion_devices();
  894. reserve_ion_memory();
  895. reserve_rtb_memory();
  896. }
  897. static int msm7627a_paddr_to_memtype(unsigned int paddr)
  898. {
  899. return MEMTYPE_EBI1;
  900. }
  901. static struct reserve_info msm7627a_reserve_info __initdata = {
  902. .memtype_reserve_table = msm7627a_reserve_table,
  903. .calculate_reserve_sizes = msm7627a_calculate_reserve_sizes,
  904. .paddr_to_memtype = msm7627a_paddr_to_memtype,
  905. };
  906. static void __init msm7627a_reserve(void)
  907. {
  908. reserve_info = &msm7627a_reserve_info;
  909. msm_reserve();
  910. memblock_remove(MSM8625_WARM_BOOT_PHYS, SZ_32);
  911. }
  912. static void __init msm8625_reserve(void)
  913. {
  914. memblock_remove(MSM8625_SECONDARY_PHYS, SZ_8);
  915. msm7627a_reserve();
  916. }
  917. static void msmqrd_adsp_add_pdev(void)
  918. {
  919. int rc = 0;
  920. struct rpc_board_dev *rpc_adsp_pdev;
  921. rpc_adsp_pdev = kzalloc(sizeof(struct rpc_board_dev), GFP_KERNEL);
  922. if (rpc_adsp_pdev == NULL) {
  923. pr_err("%s: Memory Allocation failure\n", __func__);
  924. return;
  925. }
  926. rpc_adsp_pdev->prog = ADSP_RPC_PROG;
  927. if (cpu_is_msm8625())
  928. rpc_adsp_pdev->pdev = msm8625_device_adsp;
  929. else
  930. rpc_adsp_pdev->pdev = msm_adsp_device;
  931. rc = msm_rpc_add_board_dev(rpc_adsp_pdev, 1);
  932. if (rc < 0) {
  933. pr_err("%s: return val: %d\n", __func__, rc);
  934. kfree(rpc_adsp_pdev);
  935. }
  936. }
  937. static void __init msm7627a_device_i2c_init(void)
  938. {
  939. msm_gsbi0_qup_i2c_device.dev.platform_data = &msm_gsbi0_qup_i2c_pdata;
  940. msm_gsbi1_qup_i2c_device.dev.platform_data = &msm_gsbi1_qup_i2c_pdata;
  941. }
  942. static void __init msm8625_device_i2c_init(void)
  943. {
  944. msm8625_gsbi0_qup_i2c_device.dev.platform_data
  945. = &msm_gsbi0_qup_i2c_pdata;
  946. msm8625_gsbi1_qup_i2c_device.dev.platform_data
  947. = &msm_gsbi1_qup_i2c_pdata;
  948. }
  949. static struct platform_device msm_proccomm_regulator_dev = {
  950. .name = PROCCOMM_REGULATOR_DEV_NAME,
  951. .id = -1,
  952. .dev = {
  953. .platform_data = &msm7x27a_proccomm_regulator_data
  954. }
  955. };
  956. static void __init msm7627a_init_regulators(void)
  957. {
  958. int rc = platform_device_register(&msm_proccomm_regulator_dev);
  959. if (rc)
  960. pr_err("%s: could not register regulator device: %d\n",
  961. __func__, rc);
  962. }
  963. static int __init msm_qrd_init_ar6000pm(void)
  964. {
  965. msm_wlan_ar6000_pm_device.dev.platform_data = &ar600x_wlan_power;
  966. return platform_device_register(&msm_wlan_ar6000_pm_device);
  967. }
  968. static void __init msm_add_footswitch_devices(void)
  969. {
  970. platform_add_devices(msm_footswitch_devices,
  971. msm_num_footswitch_devices);
  972. }
  973. static void __init add_platform_devices(void)
  974. {
  975. if (machine_is_msm8625_evb() || machine_is_msm8625_qrd7()
  976. || machine_is_msm8625_evt()) {
  977. platform_add_devices(msm8625_evb_devices,
  978. ARRAY_SIZE(msm8625_evb_devices));
  979. platform_add_devices(qrd3_devices,
  980. ARRAY_SIZE(qrd3_devices));
  981. } else {
  982. platform_add_devices(qrd7627a_devices,
  983. ARRAY_SIZE(qrd7627a_devices));
  984. }
  985. if (machine_is_msm7627a_qrd3() || machine_is_msm7627a_evb())
  986. platform_add_devices(qrd3_devices,
  987. ARRAY_SIZE(qrd3_devices));
  988. platform_add_devices(common_devices,
  989. ARRAY_SIZE(common_devices));
  990. }
  991. #define UART1DM_RX_GPIO 45
  992. static void __init qrd7627a_uart1dm_config(void)
  993. {
  994. msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(UART1DM_RX_GPIO);
  995. if (cpu_is_msm8625())
  996. msm8625_device_uart_dm1.dev.platform_data =
  997. &msm_uart_dm1_pdata;
  998. else
  999. msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
  1000. }
  1001. static void __init qrd7627a_otg_gadget(void)
  1002. {
  1003. if (cpu_is_msm8625()) {
  1004. msm_otg_pdata.swfi_latency = msm8625_pm_data
  1005. [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT].latency;
  1006. msm8625_device_otg.dev.platform_data = &msm_otg_pdata;
  1007. msm8625_device_gadget_peripheral.dev.platform_data =
  1008. &msm_gadget_pdata;
  1009. } else {
  1010. msm_otg_pdata.swfi_latency = msm7627a_pm_data
  1011. [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency;
  1012. msm_device_otg.dev.platform_data = &msm_otg_pdata;
  1013. msm_device_gadget_peripheral.dev.platform_data =
  1014. &msm_gadget_pdata;
  1015. }
  1016. }
  1017. static void __init msm_pm_init(void)
  1018. {
  1019. if (!cpu_is_msm8625()) {
  1020. msm_pm_set_platform_data(msm7627a_pm_data,
  1021. ARRAY_SIZE(msm7627a_pm_data));
  1022. BUG_ON(msm_pm_boot_init(&msm_pm_boot_pdata));
  1023. } else {
  1024. msm_pm_set_platform_data(msm8625_pm_data,
  1025. ARRAY_SIZE(msm8625_pm_data));
  1026. BUG_ON(msm_pm_boot_init(&msm_pm_8625_boot_pdata));
  1027. msm8x25_spm_device_init();
  1028. msm_pm_register_cpr_ops();
  1029. }
  1030. }
  1031. static void __init msm_qrd_init(void)
  1032. {
  1033. msm7x2x_misc_init();
  1034. msm7627a_init_regulators();
  1035. msmqrd_adsp_add_pdev();
  1036. if (cpu_is_msm8625())
  1037. msm8625_device_i2c_init();
  1038. else
  1039. msm7627a_device_i2c_init();
  1040. /* uart1dm*/
  1041. qrd7627a_uart1dm_config();
  1042. /*OTG gadget*/
  1043. qrd7627a_otg_gadget();
  1044. msm_add_footswitch_devices();
  1045. add_platform_devices();
  1046. /* Ensure ar6000pm device is registered before MMC/SDC */
  1047. msm_qrd_init_ar6000pm();
  1048. msm7627a_init_mmc();
  1049. #ifdef CONFIG_USB_EHCI_MSM_72K
  1050. msm7627a_init_host();
  1051. #endif
  1052. msm_pm_init();
  1053. msm_pm_register_irqs();
  1054. msm_fb_add_devices();
  1055. #if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
  1056. msm7627a_bt_power_init();
  1057. #endif
  1058. msm7627a_camera_init();
  1059. qrd7627a_add_io_devices();
  1060. msm7x25a_kgsl_3d0_init();
  1061. msm8x25_kgsl_3d0_init();
  1062. }
  1063. static void __init qrd7627a_init_early(void)
  1064. {
  1065. msm_msm7627a_allocate_memory_regions();
  1066. }
  1067. MACHINE_START(MSM7627A_QRD1, "QRD MSM7627a QRD1")
  1068. .atag_offset = 0x100,
  1069. .map_io = msm_common_io_init,
  1070. .reserve = msm7627a_reserve,
  1071. .init_irq = msm_init_irq,
  1072. .init_machine = msm_qrd_init,
  1073. .timer = &msm_timer,
  1074. .init_early = qrd7627a_init_early,
  1075. .handle_irq = vic_handle_irq,
  1076. MACHINE_END
  1077. MACHINE_START(MSM7627A_QRD3, "QRD MSM7627a QRD3")
  1078. .atag_offset = 0x100,
  1079. .map_io = msm_common_io_init,
  1080. .reserve = msm7627a_reserve,
  1081. .init_irq = msm_init_irq,
  1082. .init_machine = msm_qrd_init,
  1083. .timer = &msm_timer,
  1084. .init_early = qrd7627a_init_early,
  1085. .handle_irq = vic_handle_irq,
  1086. MACHINE_END
  1087. MACHINE_START(MSM7627A_EVB, "QRD MSM7627a EVB")
  1088. .atag_offset = 0x100,
  1089. .map_io = msm_common_io_init,
  1090. .reserve = msm7627a_reserve,
  1091. .init_irq = msm_init_irq,
  1092. .init_machine = msm_qrd_init,
  1093. .timer = &msm_timer,
  1094. .init_early = qrd7627a_init_early,
  1095. .handle_irq = vic_handle_irq,
  1096. MACHINE_END
  1097. MACHINE_START(MSM8625_EVB, "QRD MSM8625 EVB")
  1098. .atag_offset = 0x100,
  1099. .map_io = msm8625_map_io,
  1100. .reserve = msm8625_reserve,
  1101. .init_irq = msm8625_init_irq,
  1102. .init_machine = msm_qrd_init,
  1103. .timer = &msm_timer,
  1104. .init_early = qrd7627a_init_early,
  1105. .handle_irq = gic_handle_irq,
  1106. MACHINE_END
  1107. MACHINE_START(MSM8625_QRD7, "QRD MSM8625 QRD7")
  1108. .atag_offset = 0x100,
  1109. .map_io = msm8625_map_io,
  1110. .reserve = msm8625_reserve,
  1111. .init_irq = msm8625_init_irq,
  1112. .init_machine = msm_qrd_init,
  1113. .timer = &msm_timer,
  1114. .init_early = qrd7627a_init_early,
  1115. .handle_irq = gic_handle_irq,
  1116. MACHINE_END
  1117. MACHINE_START(MSM8625_EVT, "QRD MSM8625 EVT")
  1118. .atag_offset = 0x100,
  1119. .map_io = msm8625_map_io,
  1120. .reserve = msm8625_reserve,
  1121. .init_irq = msm8625_init_irq,
  1122. .init_machine = msm_qrd_init,
  1123. .timer = &msm_timer,
  1124. .init_early = qrd7627a_init_early,
  1125. .handle_irq = gic_handle_irq,
  1126. MACHINE_END