/arch/arm/mach-msm/board-qrd7627a.c
C | 1271 lines | 1089 code | 145 blank | 37 comment | 37 complexity | 110668e2033f53e70bde9fdfcfe23ba2 MD5 | raw file
1/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved. 2 * 3 * This program is free software; you can redistribute it and/or modify 4 * it under the terms of the GNU General Public License version 2 and 5 * only version 2 as published by the Free Software Foundation. 6 * 7 * This program is distributed in the hope that it will be useful, 8 * but WITHOUT ANY WARRANTY; without even the implied warranty of 9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 10 * GNU General Public License for more details. 11 */ 12 13#include <linux/kernel.h> 14#include <linux/init.h> 15#include <linux/gpio_event.h> 16#include <linux/usb/android.h> 17#include <linux/platform_device.h> 18#include <linux/io.h> 19#include <linux/gpio.h> 20#include <linux/mtd/nand.h> 21#include <linux/mtd/partitions.h> 22#include <linux/i2c.h> 23#include <linux/android_pmem.h> 24#include <linux/bootmem.h> 25#include <linux/mfd/marimba.h> 26#include <linux/power_supply.h> 27#include <linux/input/rmi_platformdata.h> 28#include <linux/input/rmi_i2c.h> 29#include <linux/i2c/atmel_mxt_ts.h> 30#include <linux/regulator/consumer.h> 31#include <linux/memblock.h> 32#include <linux/input/ft5x06_ts.h> 33#include <linux/msm_adc.h> 34#include <linux/regulator/msm-gpio-regulator.h> 35#include <linux/msm_ion.h> 36#include <asm/mach/mmc.h> 37#include <asm/mach-types.h> 38#include <asm/mach/arch.h> 39#include <asm/hardware/gic.h> 40#include <mach/board.h> 41#include <mach/msm_iomap.h> 42#include <mach/msm_hsusb.h> 43#include <mach/rpc_hsusb.h> 44#include <mach/rpc_pmapp.h> 45#include <mach/usbdiag.h> 46#include <mach/msm_memtypes.h> 47#include <mach/msm_serial_hs.h> 48#include <mach/pmic.h> 49#include <mach/socinfo.h> 50#include <mach/vreg.h> 51#include <mach/rpc_pmapp.h> 52#include <mach/msm_battery.h> 53#include <mach/rpc_server_handset.h> 54#include <mach/socinfo.h> 55#include "board-msm7x27a-regulator.h" 56#include "devices.h" 57#include "devices-msm7x2xa.h" 58#include "pm.h" 59#include "timer.h" 60#include "pm-boot.h" 61#include "board-msm7x27a-regulator.h" 62#include "board-msm7627a.h" 63 64#define PMEM_KERNEL_EBI1_SIZE 0x3A000 65#define MSM_PMEM_AUDIO_SIZE 0x1F4000 66#define BAHAMA_SLAVE_ID_FM_REG 0x02 67#define FM_GPIO 83 68#define BT_PCM_BCLK_MODE 0x88 69#define BT_PCM_DIN_MODE 0x89 70#define BT_PCM_DOUT_MODE 0x8A 71#define BT_PCM_SYNC_MODE 0x8B 72#define FM_I2S_SD_MODE 0x8E 73#define FM_I2S_WS_MODE 0x8F 74#define FM_I2S_SCK_MODE 0x90 75#define I2C_PIN_CTL 0x15 76#define I2C_NORMAL 0x40 77 78#define SNDDEV_CAP_NONE 0x0 79#define SNDDEV_CAP_RX 0x1 /* RX direction */ 80#define SNDDEV_CAP_TX 0x2 /* TX direction */ 81#define SNDDEV_CAP_VOICE 0x4 /* Support voice call */ 82#define SNDDEV_CAP_FM 0x10 /* Support FM radio */ 83#define SNDDEV_CAP_TTY 0x20 /* Support TTY */ 84 85static struct platform_device msm_wlan_ar6000_pm_device = { 86 .name = "wlan_ar6000_pm_dev", 87 .id = -1, 88}; 89 90static struct msm_gpio qup_i2c_gpios_io[] = { 91 { GPIO_CFG(60, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), 92 "qup_scl" }, 93 { GPIO_CFG(61, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), 94 "qup_sda" }, 95 { GPIO_CFG(131, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), 96 "qup_scl" }, 97 { GPIO_CFG(132, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), 98 "qup_sda" }, 99}; 100 101static struct msm_gpio qup_i2c_gpios_hw[] = { 102 { GPIO_CFG(60, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), 103 "qup_scl" }, 104 { GPIO_CFG(61, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), 105 "qup_sda" }, 106 { GPIO_CFG(131, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), 107 "qup_scl" }, 108 { GPIO_CFG(132, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), 109 "qup_sda" }, 110}; 111 112static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type) 113{ 114 int rc; 115 116 if (adap_id < 0 || adap_id > 1) 117 return; 118 119 /* Each adapter gets 2 lines from the table */ 120 if (config_type) 121 rc = msm_gpios_request_enable(&qup_i2c_gpios_hw[adap_id*2], 2); 122 else 123 rc = msm_gpios_request_enable(&qup_i2c_gpios_io[adap_id*2], 2); 124 if (rc < 0) 125 pr_err("QUP GPIO request/enable failed: %d\n", rc); 126} 127 128static struct msm_i2c_platform_data msm_gsbi0_qup_i2c_pdata = { 129 .clk_freq = 100000, 130 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config, 131}; 132 133static struct msm_i2c_platform_data msm_gsbi1_qup_i2c_pdata = { 134 .clk_freq = 100000, 135 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config, 136}; 137 138#ifdef CONFIG_ARCH_MSM7X27A 139#define MSM_PMEM_MDP_SIZE 0x1B00000 140#define MSM_PMEM_ADSP_SIZE 0x1200000 141#define CAMERA_ZSL_SIZE (SZ_1M * 60) 142 143#ifdef CONFIG_ION_MSM 144#define MSM_ION_HEAP_NUM 4 145static struct platform_device ion_dev; 146static int msm_ion_camera_size; 147static int msm_ion_audio_size; 148static int msm_ion_sf_size; 149#endif 150#endif 151 152static struct android_usb_platform_data android_usb_pdata = { 153 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num, 154 .cdrom = 1, 155}; 156 157static struct platform_device android_usb_device = { 158 .name = "android_usb", 159 .id = -1, 160 .dev = { 161 .platform_data = &android_usb_pdata, 162 }, 163}; 164 165#ifdef CONFIG_USB_EHCI_MSM_72K 166static void msm_hsusb_vbus_power(unsigned phy_info, int on) 167{ 168 int rc = 0; 169 unsigned gpio; 170 171 gpio = QRD_GPIO_HOST_VBUS_EN; 172 173 rc = gpio_request(gpio, "i2c_host_vbus_en"); 174 if (rc < 0) { 175 pr_err("failed to request %d GPIO\n", gpio); 176 return; 177 } 178 gpio_direction_output(gpio, !!on); 179 gpio_set_value_cansleep(gpio, !!on); 180 gpio_free(gpio); 181} 182 183static struct msm_usb_host_platform_data msm_usb_host_pdata = { 184 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_45NM), 185}; 186 187static void __init msm7627a_init_host(void) 188{ 189 msm_add_host(0, &msm_usb_host_pdata); 190} 191#endif 192 193#ifdef CONFIG_USB_MSM_OTG_72K 194static int hsusb_rpc_connect(int connect) 195{ 196 if (connect) 197 return msm_hsusb_rpc_connect(); 198 else 199 return msm_hsusb_rpc_close(); 200} 201 202static struct regulator *reg_hsusb; 203static int msm_hsusb_ldo_init(int init) 204{ 205 int rc = 0; 206 207 if (init) { 208 reg_hsusb = regulator_get(NULL, "usb"); 209 if (IS_ERR(reg_hsusb)) { 210 rc = PTR_ERR(reg_hsusb); 211 pr_err("%s: could not get regulator: %d\n", 212 __func__, rc); 213 goto out; 214 } 215 216 rc = regulator_set_voltage(reg_hsusb, 3300000, 3300000); 217 if (rc) { 218 pr_err("%s: could not set voltage: %d\n", 219 __func__, rc); 220 goto reg_free; 221 } 222 223 return 0; 224 } 225 /* else fall through */ 226reg_free: 227 regulator_put(reg_hsusb); 228out: 229 reg_hsusb = NULL; 230 return rc; 231} 232 233static int msm_hsusb_ldo_enable(int enable) 234{ 235 static int ldo_status; 236 237 if (IS_ERR_OR_NULL(reg_hsusb)) 238 return reg_hsusb ? PTR_ERR(reg_hsusb) : -ENODEV; 239 240 if (ldo_status == enable) 241 return 0; 242 243 ldo_status = enable; 244 245 return enable ? 246 regulator_enable(reg_hsusb) : 247 regulator_disable(reg_hsusb); 248} 249 250#ifndef CONFIG_USB_EHCI_MSM_72K 251static int msm_hsusb_pmic_notif_init(void (*callback)(int online), int init) 252{ 253 int ret = 0; 254 255 if (init) 256 ret = msm_pm_app_rpc_init(callback); 257 else 258 msm_pm_app_rpc_deinit(callback); 259 260 return ret; 261} 262#endif 263 264static struct msm_otg_platform_data msm_otg_pdata = { 265#ifndef CONFIG_USB_EHCI_MSM_72K 266 .pmic_vbus_notif_init = msm_hsusb_pmic_notif_init, 267#else 268 .vbus_power = msm_hsusb_vbus_power, 269#endif 270 .rpc_connect = hsusb_rpc_connect, 271 .pemp_level = PRE_EMPHASIS_WITH_20_PERCENT, 272 .cdr_autoreset = CDR_AUTO_RESET_DISABLE, 273 .drv_ampl = HS_DRV_AMPLITUDE_DEFAULT, 274 .se1_gating = SE1_GATING_DISABLE, 275 .ldo_init = msm_hsusb_ldo_init, 276 .ldo_enable = msm_hsusb_ldo_enable, 277 .chg_init = hsusb_chg_init, 278 .chg_connected = hsusb_chg_connected, 279 .chg_vbus_draw = hsusb_chg_vbus_draw, 280}; 281#endif 282 283static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = { 284 .is_phy_status_timer_on = 1, 285}; 286 287#ifdef CONFIG_SERIAL_MSM_HS 288static struct msm_serial_hs_platform_data msm_uart_dm1_pdata = { 289 .inject_rx_on_wakeup = 1, 290 .rx_to_inject = 0xFD, 291}; 292#endif 293static struct msm_pm_platform_data msm7627a_pm_data[MSM_PM_SLEEP_MODE_NR] = { 294 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE] = { 295 .idle_supported = 1, 296 .suspend_supported = 1, 297 .idle_enabled = 1, 298 .suspend_enabled = 1, 299 .latency = 16000, 300 .residency = 20000, 301 }, 302 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN] = { 303 .idle_supported = 1, 304 .suspend_supported = 1, 305 .idle_enabled = 1, 306 .suspend_enabled = 1, 307 .latency = 12000, 308 .residency = 20000, 309 }, 310 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT] = { 311 .idle_supported = 1, 312 .suspend_supported = 1, 313 .idle_enabled = 0, 314 .suspend_enabled = 1, 315 .latency = 2000, 316 .residency = 0, 317 }, 318 [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT] = { 319 .idle_supported = 1, 320 .suspend_supported = 1, 321 .idle_enabled = 1, 322 .suspend_enabled = 1, 323 .latency = 2, 324 .residency = 0, 325 }, 326}; 327 328static struct msm_pm_boot_platform_data msm_pm_boot_pdata __initdata = { 329 .mode = MSM_PM_BOOT_CONFIG_RESET_VECTOR_PHYS, 330 .p_addr = 0, 331}; 332 333/* 8625 PM platform data */ 334static struct msm_pm_platform_data msm8625_pm_data[MSM_PM_SLEEP_MODE_NR * 2] = { 335 /* CORE0 entries */ 336 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = { 337 .idle_supported = 1, 338 .suspend_supported = 1, 339 .idle_enabled = 0, 340 .suspend_enabled = 0, 341 .latency = 16000, 342 .residency = 20000, 343 }, 344 345 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN)] = { 346 .idle_supported = 1, 347 .suspend_supported = 1, 348 .idle_enabled = 0, 349 .suspend_enabled = 0, 350 .latency = 12000, 351 .residency = 20000, 352 }, 353 354 /* picked latency & redisdency values from 7x30 */ 355 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = { 356 .idle_supported = 1, 357 .suspend_supported = 1, 358 .idle_enabled = 0, 359 .suspend_enabled = 0, 360 .latency = 500, 361 .residency = 6000, 362 }, 363 364 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = { 365 .idle_supported = 1, 366 .suspend_supported = 1, 367 .idle_enabled = 1, 368 .suspend_enabled = 1, 369 .latency = 2, 370 .residency = 10, 371 }, 372 373 /* picked latency & redisdency values from 7x30 */ 374 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = { 375 .idle_supported = 1, 376 .suspend_supported = 1, 377 .idle_enabled = 0, 378 .suspend_enabled = 0, 379 .latency = 500, 380 .residency = 6000, 381 }, 382 383 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = { 384 .idle_supported = 1, 385 .suspend_supported = 1, 386 .idle_enabled = 1, 387 .suspend_enabled = 1, 388 .latency = 2, 389 .residency = 10, 390 }, 391 392}; 393 394static struct msm_pm_boot_platform_data msm_pm_8625_boot_pdata __initdata = { 395 .mode = MSM_PM_BOOT_CONFIG_REMAP_BOOT_ADDR, 396 .v_addr = MSM_CFG_CTL_BASE, 397}; 398 399static struct android_pmem_platform_data android_pmem_adsp_pdata = { 400 .name = "pmem_adsp", 401 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP, 402 .cached = 1, 403 .memory_type = MEMTYPE_EBI1, 404}; 405 406static struct platform_device android_pmem_adsp_device = { 407 .name = "android_pmem", 408 .id = 1, 409 .dev = { .platform_data = &android_pmem_adsp_pdata }, 410}; 411 412static unsigned pmem_mdp_size = MSM_PMEM_MDP_SIZE; 413static int __init pmem_mdp_size_setup(char *p) 414{ 415 pmem_mdp_size = memparse(p, NULL); 416 return 0; 417} 418 419early_param("pmem_mdp_size", pmem_mdp_size_setup); 420 421static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE; 422static int __init pmem_adsp_size_setup(char *p) 423{ 424 pmem_adsp_size = memparse(p, NULL); 425 return 0; 426} 427 428early_param("pmem_adsp_size", pmem_adsp_size_setup); 429 430#define SND(desc, num) { .name = #desc, .id = num } 431static struct snd_endpoint snd_endpoints_list[] = { 432 SND(HANDSET, 0), 433 SND(MONO_HEADSET, 2), 434 SND(HEADSET, 3), 435 SND(SPEAKER, 6), 436 SND(TTY_HEADSET, 8), 437 SND(TTY_VCO, 9), 438 SND(TTY_HCO, 10), 439 SND(BT, 12), 440 SND(IN_S_SADC_OUT_HANDSET, 16), 441 SND(IN_S_SADC_OUT_SPEAKER_PHONE, 25), 442 SND(FM_DIGITAL_STEREO_HEADSET, 26), 443 SND(FM_DIGITAL_SPEAKER_PHONE, 27), 444 SND(FM_DIGITAL_BT_A2DP_HEADSET, 28), 445 SND(STEREO_HEADSET_AND_SPEAKER, 31), 446 SND(CURRENT, 0x7FFFFFFE), 447 SND(FM_ANALOG_STEREO_HEADSET, 35), 448 SND(FM_ANALOG_STEREO_HEADSET_CODEC, 36), 449}; 450#undef SND 451 452static struct msm_snd_endpoints msm_device_snd_endpoints = { 453 .endpoints = snd_endpoints_list, 454 .num = sizeof(snd_endpoints_list) / sizeof(struct snd_endpoint) 455}; 456 457static struct platform_device msm_device_snd = { 458 .name = "msm_snd", 459 .id = -1, 460 .dev = { 461 .platform_data = &msm_device_snd_endpoints 462 }, 463}; 464 465#define CAD(desc, num, cap) { .name = #desc, .id = num, .capability = cap, } 466static struct cad_endpoint cad_endpoints_list[] = { 467 CAD(NONE, 0, SNDDEV_CAP_NONE), 468 CAD(HANDSET_SPKR, 1, (SNDDEV_CAP_RX | SNDDEV_CAP_VOICE)), 469 CAD(HANDSET_MIC, 2, (SNDDEV_CAP_TX | SNDDEV_CAP_VOICE)), 470 CAD(HEADSET_MIC, 3, (SNDDEV_CAP_TX | SNDDEV_CAP_VOICE)), 471 CAD(HEADSET_SPKR_MONO, 4, (SNDDEV_CAP_RX | SNDDEV_CAP_VOICE)), 472 CAD(HEADSET_SPKR_STEREO, 5, (SNDDEV_CAP_RX | SNDDEV_CAP_VOICE)), 473 CAD(SPEAKER_PHONE_MIC, 6, (SNDDEV_CAP_TX | SNDDEV_CAP_VOICE)), 474 CAD(SPEAKER_PHONE_MONO, 7, (SNDDEV_CAP_RX | SNDDEV_CAP_VOICE)), 475 CAD(SPEAKER_PHONE_STEREO, 8, (SNDDEV_CAP_RX | SNDDEV_CAP_VOICE)), 476 CAD(BT_SCO_MIC, 9, (SNDDEV_CAP_TX | SNDDEV_CAP_VOICE)), 477 CAD(BT_SCO_SPKR, 10, (SNDDEV_CAP_TX | SNDDEV_CAP_VOICE)), 478 CAD(BT_A2DP_SPKR, 11, (SNDDEV_CAP_RX | SNDDEV_CAP_VOICE)), 479 CAD(TTY_HEADSET_MIC, 12, (SNDDEV_CAP_TX | \ 480 SNDDEV_CAP_VOICE | SNDDEV_CAP_TTY)), 481 CAD(TTY_HEADSET_SPKR, 13, (SNDDEV_CAP_RX | \ 482 SNDDEV_CAP_VOICE | SNDDEV_CAP_TTY)), 483 CAD(HEADSET_STEREO_PLUS_SPKR_MONO_RX, 19, (SNDDEV_CAP_TX | \ 484 SNDDEV_CAP_VOICE)), 485 CAD(LP_FM_HEADSET_SPKR_STEREO_RX, 25, (SNDDEV_CAP_TX | SNDDEV_CAP_FM)), 486 CAD(I2S_RX, 26, (SNDDEV_CAP_RX)), 487 CAD(SPEAKER_PHONE_MIC_ENDFIRE, 45, (SNDDEV_CAP_TX | SNDDEV_CAP_VOICE)), 488 CAD(HANDSET_MIC_ENDFIRE, 46, (SNDDEV_CAP_TX | SNDDEV_CAP_VOICE)), 489 CAD(I2S_TX, 48, (SNDDEV_CAP_TX)), 490 CAD(LP_FM_HEADSET_SPKR_STEREO_PLUS_HEADSET_SPKR_STEREO_RX, 57, \ 491 (SNDDEV_CAP_FM | SNDDEV_CAP_RX)), 492 CAD(FM_DIGITAL_HEADSET_SPKR_STEREO, 65, \ 493 (SNDDEV_CAP_FM | SNDDEV_CAP_RX)), 494 CAD(FM_DIGITAL_SPEAKER_PHONE_MONO, 67, \ 495 (SNDDEV_CAP_FM | SNDDEV_CAP_RX)), 496 CAD(FM_DIGITAL_BT_A2DP_SPKR, 69, \ 497 (SNDDEV_CAP_FM | SNDDEV_CAP_RX)), 498 CAD(MAX, 80, SNDDEV_CAP_NONE), 499}; 500#undef CAD 501 502static struct msm_cad_endpoints msm_device_cad_endpoints = { 503 .endpoints = cad_endpoints_list, 504 .num = sizeof(cad_endpoints_list) / sizeof(struct cad_endpoint) 505}; 506 507static struct platform_device msm_device_cad = { 508 .name = "msm_cad", 509 .id = -1, 510 .dev = { 511 .platform_data = &msm_device_cad_endpoints 512 }, 513}; 514 515#define DEC0_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \ 516 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \ 517 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \ 518 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \ 519 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \ 520 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))| \ 521 (1<<MSM_ADSP_CODEC_AC3) 522#define DEC1_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \ 523 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \ 524 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \ 525 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \ 526 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \ 527 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP)) 528#define DEC2_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \ 529 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \ 530 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \ 531 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \ 532 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \ 533 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP)) 534#define DEC3_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \ 535 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \ 536 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \ 537 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \ 538 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \ 539 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP)) 540#define DEC4_FORMAT (1<<MSM_ADSP_CODEC_MIDI) 541 542static unsigned int dec_concurrency_table[] = { 543 /* Audio LP */ 544 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DMA)), 0, 545 0, 0, 0, 546 547 /* Concurrency 1 */ 548 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)), 549 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)), 550 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)), 551 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)), 552 (DEC4_FORMAT), 553 554 /* Concurrency 2 */ 555 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)), 556 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)), 557 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)), 558 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)), 559 (DEC4_FORMAT), 560 561 /* Concurrency 3 */ 562 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)), 563 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)), 564 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)), 565 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)), 566 (DEC4_FORMAT), 567 568 /* Concurrency 4 */ 569 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)), 570 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)), 571 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)), 572 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)), 573 (DEC4_FORMAT), 574 575 /* Concurrency 5 */ 576 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)), 577 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)), 578 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)), 579 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)), 580 (DEC4_FORMAT), 581 582 /* Concurrency 6 */ 583 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)| 584 (1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)), 585 0, 0, 0, 0, 586 587 /* Concurrency 7 */ 588 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)), 589 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)), 590 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)), 591 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)), 592 (DEC4_FORMAT), 593}; 594 595#define DEC_INFO(name, queueid, decid, nr_codec) { .module_name = name, \ 596 .module_queueid = queueid, .module_decid = decid, \ 597 .nr_codec_support = nr_codec} 598 599static struct msm_adspdec_info dec_info_list[] = { 600 DEC_INFO("AUDPLAY0TASK", 13, 0, 11), /* AudPlay0BitStreamCtrlQueue */ 601 DEC_INFO("AUDPLAY1TASK", 14, 1, 11), /* AudPlay1BitStreamCtrlQueue */ 602 DEC_INFO("AUDPLAY2TASK", 15, 2, 11), /* AudPlay2BitStreamCtrlQueue */ 603 DEC_INFO("AUDPLAY3TASK", 16, 3, 11), /* AudPlay3BitStreamCtrlQueue */ 604 DEC_INFO("AUDPLAY4TASK", 17, 4, 1), /* AudPlay4BitStreamCtrlQueue */ 605}; 606 607static struct msm_adspdec_database msm_device_adspdec_database = { 608 .num_dec = ARRAY_SIZE(dec_info_list), 609 .num_concurrency_support = (ARRAY_SIZE(dec_concurrency_table) / \ 610 ARRAY_SIZE(dec_info_list)), 611 .dec_concurrency_table = dec_concurrency_table, 612 .dec_info_list = dec_info_list, 613}; 614 615static struct platform_device msm_device_adspdec = { 616 .name = "msm_adspdec", 617 .id = -1, 618 .dev = { 619 .platform_data = &msm_device_adspdec_database 620 }, 621}; 622 623static struct android_pmem_platform_data android_pmem_audio_pdata = { 624 .name = "pmem_audio", 625 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP, 626 .cached = 0, 627 .memory_type = MEMTYPE_EBI1, 628}; 629 630static struct platform_device android_pmem_audio_device = { 631 .name = "android_pmem", 632 .id = 2, 633 .dev = { .platform_data = &android_pmem_audio_pdata }, 634}; 635 636static struct android_pmem_platform_data android_pmem_pdata = { 637 .name = "pmem", 638 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP, 639 .cached = 1, 640 .memory_type = MEMTYPE_EBI1, 641}; 642static struct platform_device android_pmem_device = { 643 .name = "android_pmem", 644 .id = 0, 645 .dev = { .platform_data = &android_pmem_pdata }, 646}; 647 648static u32 msm_calculate_batt_capacity(u32 current_voltage); 649 650static struct msm_psy_batt_pdata msm_psy_batt_data = { 651 .voltage_min_design = 3500, 652 .voltage_max_design = 4200, 653 .voltage_fail_safe = 3598, 654 .avail_chg_sources = AC_CHG | USB_CHG , 655 .batt_technology = POWER_SUPPLY_TECHNOLOGY_LION, 656 .calculate_capacity = &msm_calculate_batt_capacity, 657}; 658 659static u32 msm_calculate_batt_capacity(u32 current_voltage) 660{ 661 u32 low_voltage = msm_psy_batt_data.voltage_min_design; 662 u32 high_voltage = msm_psy_batt_data.voltage_max_design; 663 664 if (current_voltage <= low_voltage) 665 return 0; 666 else if (current_voltage >= high_voltage) 667 return 100; 668 else 669 return (current_voltage - low_voltage) * 100 670 / (high_voltage - low_voltage); 671} 672 673static struct platform_device msm_batt_device = { 674 .name = "msm-battery", 675 .id = -1, 676 .dev.platform_data = &msm_psy_batt_data, 677}; 678 679static char *msm_adc_surf_device_names[] = { 680 "XO_ADC", 681}; 682 683static struct msm_adc_platform_data msm_adc_pdata = { 684 .dev_names = msm_adc_surf_device_names, 685 .num_adc = ARRAY_SIZE(msm_adc_surf_device_names), 686 .target_hw = MSM_8x25, 687}; 688 689static struct platform_device msm_adc_device = { 690 .name = "msm_adc", 691 .id = -1, 692 .dev = { 693 .platform_data = &msm_adc_pdata, 694 }, 695}; 696 697#ifdef CONFIG_MSM_RTB 698static struct msm_rtb_platform_data msm7627a_rtb_pdata = { 699 .size = SZ_1M, 700}; 701 702static int __init msm_rtb_set_buffer_size(char *p) 703{ 704 int s; 705 706 s = memparse(p, NULL); 707 msm7627a_rtb_pdata.size = ALIGN(s, SZ_4K); 708 return 0; 709} 710early_param("msm_rtb_size", msm_rtb_set_buffer_size); 711 712struct platform_device msm7627a_rtb_device = { 713 .name = "msm_rtb", 714 .id = -1, 715 .dev = { 716 .platform_data = &msm7627a_rtb_pdata, 717 }, 718}; 719#endif 720 721#define GPIO_VREG_INIT(_id, _reg_name, _gpio_label, _gpio, _active_low) \ 722 [GPIO_VREG_ID_##_id] = { \ 723 .init_data = { \ 724 .constraints = { \ 725 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \ 726 }, \ 727 .num_consumer_supplies = \ 728 ARRAY_SIZE(vreg_consumers_##_id), \ 729 .consumer_supplies = vreg_consumers_##_id, \ 730 }, \ 731 .regulator_name = _reg_name, \ 732 .active_low = _active_low, \ 733 .gpio_label = _gpio_label, \ 734 .gpio = _gpio, \ 735 } 736 737#define GPIO_VREG_ID_EXT_2P85V 0 738#define GPIO_VREG_ID_EXT_1P8V 1 739 740static struct regulator_consumer_supply vreg_consumers_EXT_2P85V[] = { 741 REGULATOR_SUPPLY("cam_ov5647_avdd", "0-006c"), 742 REGULATOR_SUPPLY("cam_ov7692_avdd", "0-0078"), 743 REGULATOR_SUPPLY("cam_ov8825_avdd", "0-000d"), 744 REGULATOR_SUPPLY("lcd_vdd", "mipi_dsi.1"), 745}; 746 747static struct regulator_consumer_supply vreg_consumers_EXT_1P8V[] = { 748 REGULATOR_SUPPLY("cam_ov5647_vdd", "0-006c"), 749 REGULATOR_SUPPLY("cam_ov7692_vdd", "0-0078"), 750 REGULATOR_SUPPLY("cam_ov8825_vdd", "0-000d"), 751 REGULATOR_SUPPLY("lcd_vddi", "mipi_dsi.1"), 752}; 753 754/* GPIO regulator constraints */ 755static struct gpio_regulator_platform_data msm_gpio_regulator_pdata[] = { 756 GPIO_VREG_INIT(EXT_2P85V, "ext_2p85v", "ext_2p85v_en", 35, 0), 757 GPIO_VREG_INIT(EXT_1P8V, "ext_1p8v", "ext_1p8v_en", 40, 0), 758}; 759 760/* GPIO regulator */ 761static struct platform_device qrd_vreg_gpio_ext_2p85v __devinitdata = { 762 .name = GPIO_REGULATOR_DEV_NAME, 763 .id = 35, 764 .dev = { 765 .platform_data = 766 &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_2P85V], 767 }, 768}; 769 770static struct platform_device qrd_vreg_gpio_ext_1p8v __devinitdata = { 771 .name = GPIO_REGULATOR_DEV_NAME, 772 .id = 40, 773 .dev = { 774 .platform_data = 775 &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_1P8V], 776 }, 777}; 778 779static struct platform_device *common_devices[] __initdata = { 780 &android_usb_device, 781 &android_pmem_device, 782 &android_pmem_adsp_device, 783 &android_pmem_audio_device, 784 &msm_batt_device, 785 &msm_device_adspdec, 786 &msm_device_snd, 787 &msm_device_cad, 788 &asoc_msm_pcm, 789 &asoc_msm_dai0, 790 &asoc_msm_dai1, 791 &msm_adc_device, 792#ifdef CONFIG_MSM_RTB 793 &msm7627a_rtb_device, 794#endif 795#ifdef CONFIG_ION_MSM 796 &ion_dev, 797#endif 798}; 799 800static struct platform_device *qrd7627a_devices[] __initdata = { 801 &msm_device_dmov, 802 &msm_device_smd, 803 &msm_device_uart1, 804 &msm_device_uart_dm1, 805 &msm_gsbi0_qup_i2c_device, 806 &msm_gsbi1_qup_i2c_device, 807 &msm_device_otg, 808 &msm_device_gadget_peripheral, 809 &msm_kgsl_3d0, 810 &qrd_vreg_gpio_ext_2p85v, 811 &qrd_vreg_gpio_ext_1p8v, 812}; 813 814static struct platform_device *qrd3_devices[] __initdata = { 815 &msm_device_nand, 816}; 817 818static struct platform_device *msm8625_evb_devices[] __initdata = { 819 &msm8625_device_dmov, 820 &msm8625_device_smd, 821 &msm8625_gsbi0_qup_i2c_device, 822 &msm8625_gsbi1_qup_i2c_device, 823 &msm8625_device_uart1, 824 &msm8625_device_uart_dm1, 825 &msm8625_device_otg, 826 &msm8625_device_gadget_peripheral, 827 &msm8625_kgsl_3d0, 828 &qrd_vreg_gpio_ext_2p85v, 829 &qrd_vreg_gpio_ext_1p8v, 830}; 831 832static unsigned pmem_kernel_ebi1_size = PMEM_KERNEL_EBI1_SIZE; 833static int __init pmem_kernel_ebi1_size_setup(char *p) 834{ 835 pmem_kernel_ebi1_size = memparse(p, NULL); 836 return 0; 837} 838early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup); 839 840static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE; 841static int __init pmem_audio_size_setup(char *p) 842{ 843 pmem_audio_size = memparse(p, NULL); 844 return 0; 845} 846early_param("pmem_audio_size", pmem_audio_size_setup); 847 848static void fix_sizes(void) 849{ 850 if (get_ddr_size() > SZ_512M) 851 pmem_adsp_size = CAMERA_ZSL_SIZE; 852#ifdef CONFIG_ION_MSM 853 msm_ion_camera_size = pmem_adsp_size; 854 msm_ion_audio_size = (MSM_PMEM_AUDIO_SIZE + PMEM_KERNEL_EBI1_SIZE); 855 msm_ion_sf_size = pmem_mdp_size; 856#endif 857} 858 859#ifdef CONFIG_ION_MSM 860#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION 861static struct ion_co_heap_pdata co_ion_pdata = { 862 .adjacent_mem_id = INVALID_HEAP_ID, 863 .align = PAGE_SIZE, 864}; 865#endif 866 867/** 868 * These heaps are listed in the order they will be allocated. 869 * Don't swap the order unless you know what you are doing! 870 */ 871struct ion_platform_heap qrd7627a_heaps[] = { 872 { 873 .id = ION_SYSTEM_HEAP_ID, 874 .type = ION_HEAP_TYPE_SYSTEM, 875 .name = ION_VMALLOC_HEAP_NAME, 876 }, 877#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION 878 /* PMEM_ADSP = CAMERA */ 879 { 880 .id = ION_CAMERA_HEAP_ID, 881 .type = ION_HEAP_TYPE_CARVEOUT, 882 .name = ION_CAMERA_HEAP_NAME, 883 .memory_type = ION_EBI_TYPE, 884 .extra_data = (void *)&co_ion_pdata, 885 }, 886 /* PMEM_AUDIO */ 887 { 888 .id = ION_AUDIO_HEAP_ID, 889 .type = ION_HEAP_TYPE_CARVEOUT, 890 .name = ION_AUDIO_HEAP_NAME, 891 .memory_type = ION_EBI_TYPE, 892 .extra_data = (void *)&co_ion_pdata, 893 }, 894 /* PMEM_MDP = SF */ 895 { 896 .id = ION_SF_HEAP_ID, 897 .type = ION_HEAP_TYPE_CARVEOUT, 898 .name = ION_SF_HEAP_NAME, 899 .memory_type = ION_EBI_TYPE, 900 .extra_data = (void *)&co_ion_pdata, 901 }, 902#endif 903}; 904 905static struct ion_platform_data ion_pdata = { 906 .nr = MSM_ION_HEAP_NUM, 907 .has_outer_cache = 1, 908 .heaps = qrd7627a_heaps, 909}; 910 911static struct platform_device ion_dev = { 912 .name = "ion-msm", 913 .id = 1, 914 .dev = { .platform_data = &ion_pdata }, 915}; 916#endif 917 918static struct memtype_reserve msm7627a_reserve_table[] __initdata = { 919 [MEMTYPE_SMI] = { 920 }, 921 [MEMTYPE_EBI0] = { 922 .flags = MEMTYPE_FLAGS_1M_ALIGN, 923 }, 924 [MEMTYPE_EBI1] = { 925 .flags = MEMTYPE_FLAGS_1M_ALIGN, 926 }, 927}; 928 929#ifdef CONFIG_MSM_RTB 930static void __init reserve_rtb_memory(void) 931{ 932 msm7627a_reserve_table[MEMTYPE_EBI1].size += msm7627a_rtb_pdata.size; 933} 934#else 935static void __init reserve_rtb_memory(void) 936{ 937} 938#endif 939 940#ifdef CONFIG_ANDROID_PMEM 941#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION 942static struct android_pmem_platform_data *pmem_pdata_array[] __initdata = { 943 &android_pmem_adsp_pdata, 944 &android_pmem_audio_pdata, 945 &android_pmem_pdata, 946}; 947#endif 948#endif 949 950static void __init size_pmem_devices(void) 951{ 952#ifdef CONFIG_ANDROID_PMEM 953#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION 954 android_pmem_adsp_pdata.size = pmem_adsp_size; 955 android_pmem_pdata.size = pmem_mdp_size; 956 android_pmem_audio_pdata.size = pmem_audio_size; 957#endif 958#endif 959} 960 961#ifdef CONFIG_ANDROID_PMEM 962#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION 963static void __init reserve_memory_for(struct android_pmem_platform_data *p) 964{ 965 msm7627a_reserve_table[p->memory_type].size += p->size; 966} 967#endif 968#endif 969 970static void __init reserve_pmem_memory(void) 971{ 972#ifdef CONFIG_ANDROID_PMEM 973#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION 974 unsigned int i; 975 for (i = 0; i < ARRAY_SIZE(pmem_pdata_array); ++i) 976 reserve_memory_for(pmem_pdata_array[i]); 977 978 msm7627a_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size; 979#endif 980#endif 981} 982 983static void __init size_ion_devices(void) 984{ 985#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION 986 ion_pdata.heaps[1].size = msm_ion_camera_size; 987 ion_pdata.heaps[2].size = msm_ion_audio_size; 988 ion_pdata.heaps[3].size = msm_ion_sf_size; 989#endif 990} 991 992static void __init reserve_ion_memory(void) 993{ 994#if defined(CONFIG_ION_MSM) && defined(CONFIG_MSM_MULTIMEDIA_USE_ION) 995 msm7627a_reserve_table[MEMTYPE_EBI1].size += msm_ion_camera_size; 996 msm7627a_reserve_table[MEMTYPE_EBI1].size += msm_ion_audio_size; 997 msm7627a_reserve_table[MEMTYPE_EBI1].size += msm_ion_sf_size; 998#endif 999} 1000 1001static void __init msm7627a_calculate_reserve_sizes(void) 1002{ 1003 fix_sizes(); 1004 size_pmem_devices(); 1005 reserve_pmem_memory(); 1006 size_ion_devices(); 1007 reserve_ion_memory(); 1008 reserve_rtb_memory(); 1009} 1010 1011static int msm7627a_paddr_to_memtype(unsigned int paddr) 1012{ 1013 return MEMTYPE_EBI1; 1014} 1015 1016static struct reserve_info msm7627a_reserve_info __initdata = { 1017 .memtype_reserve_table = msm7627a_reserve_table, 1018 .calculate_reserve_sizes = msm7627a_calculate_reserve_sizes, 1019 .paddr_to_memtype = msm7627a_paddr_to_memtype, 1020}; 1021 1022static void __init msm7627a_reserve(void) 1023{ 1024 reserve_info = &msm7627a_reserve_info; 1025 msm_reserve(); 1026 memblock_remove(MSM8625_WARM_BOOT_PHYS, SZ_32); 1027} 1028 1029static void __init msm8625_reserve(void) 1030{ 1031 memblock_remove(MSM8625_SECONDARY_PHYS, SZ_8); 1032 msm7627a_reserve(); 1033} 1034 1035static void msmqrd_adsp_add_pdev(void) 1036{ 1037 int rc = 0; 1038 struct rpc_board_dev *rpc_adsp_pdev; 1039 1040 rpc_adsp_pdev = kzalloc(sizeof(struct rpc_board_dev), GFP_KERNEL); 1041 if (rpc_adsp_pdev == NULL) { 1042 pr_err("%s: Memory Allocation failure\n", __func__); 1043 return; 1044 } 1045 rpc_adsp_pdev->prog = ADSP_RPC_PROG; 1046 1047 if (cpu_is_msm8625()) 1048 rpc_adsp_pdev->pdev = msm8625_device_adsp; 1049 else 1050 rpc_adsp_pdev->pdev = msm_adsp_device; 1051 rc = msm_rpc_add_board_dev(rpc_adsp_pdev, 1); 1052 if (rc < 0) { 1053 pr_err("%s: return val: %d\n", __func__, rc); 1054 kfree(rpc_adsp_pdev); 1055 } 1056} 1057 1058static void __init msm7627a_device_i2c_init(void) 1059{ 1060 msm_gsbi0_qup_i2c_device.dev.platform_data = &msm_gsbi0_qup_i2c_pdata; 1061 msm_gsbi1_qup_i2c_device.dev.platform_data = &msm_gsbi1_qup_i2c_pdata; 1062} 1063 1064static void __init msm8625_device_i2c_init(void) 1065{ 1066 msm8625_gsbi0_qup_i2c_device.dev.platform_data 1067 = &msm_gsbi0_qup_i2c_pdata; 1068 msm8625_gsbi1_qup_i2c_device.dev.platform_data 1069 = &msm_gsbi1_qup_i2c_pdata; 1070} 1071 1072static struct platform_device msm_proccomm_regulator_dev = { 1073 .name = PROCCOMM_REGULATOR_DEV_NAME, 1074 .id = -1, 1075 .dev = { 1076 .platform_data = &msm7x27a_proccomm_regulator_data 1077 } 1078}; 1079 1080static void __init msm7627a_init_regulators(void) 1081{ 1082 int rc = platform_device_register(&msm_proccomm_regulator_dev); 1083 if (rc) 1084 pr_err("%s: could not register regulator device: %d\n", 1085 __func__, rc); 1086} 1087 1088static int __init msm_qrd_init_ar6000pm(void) 1089{ 1090 msm_wlan_ar6000_pm_device.dev.platform_data = &ar600x_wlan_power; 1091 return platform_device_register(&msm_wlan_ar6000_pm_device); 1092} 1093 1094static void __init msm_add_footswitch_devices(void) 1095{ 1096 platform_add_devices(msm_footswitch_devices, 1097 msm_num_footswitch_devices); 1098} 1099 1100static void __init add_platform_devices(void) 1101{ 1102 if (machine_is_msm8625_evb() || machine_is_msm8625_qrd7() 1103 || machine_is_msm8625_evt()) { 1104 platform_add_devices(msm8625_evb_devices, 1105 ARRAY_SIZE(msm8625_evb_devices)); 1106 platform_add_devices(qrd3_devices, 1107 ARRAY_SIZE(qrd3_devices)); 1108 } else { 1109 platform_add_devices(qrd7627a_devices, 1110 ARRAY_SIZE(qrd7627a_devices)); 1111 } 1112 1113 if (machine_is_msm7627a_qrd3() || machine_is_msm7627a_evb()) 1114 platform_add_devices(qrd3_devices, 1115 ARRAY_SIZE(qrd3_devices)); 1116 1117 platform_add_devices(common_devices, 1118 ARRAY_SIZE(common_devices)); 1119} 1120 1121#define UART1DM_RX_GPIO 45 1122static void __init qrd7627a_uart1dm_config(void) 1123{ 1124 msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(UART1DM_RX_GPIO); 1125 if (cpu_is_msm8625()) 1126 msm8625_device_uart_dm1.dev.platform_data = 1127 &msm_uart_dm1_pdata; 1128 else 1129 msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata; 1130} 1131 1132static void __init qrd7627a_otg_gadget(void) 1133{ 1134 if (cpu_is_msm8625()) { 1135 msm_otg_pdata.swfi_latency = msm8625_pm_data 1136 [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT].latency; 1137 msm8625_device_otg.dev.platform_data = &msm_otg_pdata; 1138 msm8625_device_gadget_peripheral.dev.platform_data = 1139 &msm_gadget_pdata; 1140 1141 } else { 1142 msm_otg_pdata.swfi_latency = msm7627a_pm_data 1143 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency; 1144 msm_device_otg.dev.platform_data = &msm_otg_pdata; 1145 msm_device_gadget_peripheral.dev.platform_data = 1146 &msm_gadget_pdata; 1147 } 1148} 1149 1150static void __init msm_pm_init(void) 1151{ 1152 1153 if (!cpu_is_msm8625()) { 1154 msm_pm_set_platform_data(msm7627a_pm_data, 1155 ARRAY_SIZE(msm7627a_pm_data)); 1156 BUG_ON(msm_pm_boot_init(&msm_pm_boot_pdata)); 1157 } else { 1158 msm_pm_set_platform_data(msm8625_pm_data, 1159 ARRAY_SIZE(msm8625_pm_data)); 1160 BUG_ON(msm_pm_boot_init(&msm_pm_8625_boot_pdata)); 1161 msm8x25_spm_device_init(); 1162 msm_pm_register_cpr_ops(); 1163 } 1164} 1165 1166static void __init msm_qrd_init(void) 1167{ 1168 msm7x2x_misc_init(); 1169 msm7627a_init_regulators(); 1170 msmqrd_adsp_add_pdev(); 1171 1172 if (cpu_is_msm8625()) 1173 msm8625_device_i2c_init(); 1174 else 1175 msm7627a_device_i2c_init(); 1176 1177 /* uart1dm*/ 1178 qrd7627a_uart1dm_config(); 1179 /*OTG gadget*/ 1180 qrd7627a_otg_gadget(); 1181 1182 msm_add_footswitch_devices(); 1183 add_platform_devices(); 1184 1185 /* Ensure ar6000pm device is registered before MMC/SDC */ 1186 msm_qrd_init_ar6000pm(); 1187 msm7627a_init_mmc(); 1188 1189#ifdef CONFIG_USB_EHCI_MSM_72K 1190 msm7627a_init_host(); 1191#endif 1192 msm_pm_init(); 1193 1194 msm_pm_register_irqs(); 1195 msm_fb_add_devices(); 1196 1197#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE) 1198 msm7627a_bt_power_init(); 1199#endif 1200 1201 msm7627a_camera_init(); 1202 qrd7627a_add_io_devices(); 1203 msm7x25a_kgsl_3d0_init(); 1204 msm8x25_kgsl_3d0_init(); 1205} 1206 1207static void __init qrd7627a_init_early(void) 1208{ 1209 msm_msm7627a_allocate_memory_regions(); 1210} 1211 1212MACHINE_START(MSM7627A_QRD1, "QRD MSM7627a QRD1") 1213 .atag_offset = 0x100, 1214 .map_io = msm_common_io_init, 1215 .reserve = msm7627a_reserve, 1216 .init_irq = msm_init_irq, 1217 .init_machine = msm_qrd_init, 1218 .timer = &msm_timer, 1219 .init_early = qrd7627a_init_early, 1220 .handle_irq = vic_handle_irq, 1221MACHINE_END 1222MACHINE_START(MSM7627A_QRD3, "QRD MSM7627a QRD3") 1223 .atag_offset = 0x100, 1224 .map_io = msm_common_io_init, 1225 .reserve = msm7627a_reserve, 1226 .init_irq = msm_init_irq, 1227 .init_machine = msm_qrd_init, 1228 .timer = &msm_timer, 1229 .init_early = qrd7627a_init_early, 1230 .handle_irq = vic_handle_irq, 1231MACHINE_END 1232MACHINE_START(MSM7627A_EVB, "QRD MSM7627a EVB") 1233 .atag_offset = 0x100, 1234 .map_io = msm_common_io_init, 1235 .reserve = msm7627a_reserve, 1236 .init_irq = msm_init_irq, 1237 .init_machine = msm_qrd_init, 1238 .timer = &msm_timer, 1239 .init_early = qrd7627a_init_early, 1240 .handle_irq = vic_handle_irq, 1241MACHINE_END 1242MACHINE_START(MSM8625_EVB, "QRD MSM8625 EVB") 1243 .atag_offset = 0x100, 1244 .map_io = msm8625_map_io, 1245 .reserve = msm8625_reserve, 1246 .init_irq = msm8625_init_irq, 1247 .init_machine = msm_qrd_init, 1248 .timer = &msm_timer, 1249 .init_early = qrd7627a_init_early, 1250 .handle_irq = gic_handle_irq, 1251MACHINE_END 1252MACHINE_START(MSM8625_QRD7, "QRD MSM8625 QRD7") 1253 .atag_offset = 0x100, 1254 .map_io = msm8625_map_io, 1255 .reserve = msm8625_reserve, 1256 .init_irq = msm8625_init_irq, 1257 .init_machine = msm_qrd_init, 1258 .timer = &msm_timer, 1259 .init_early = qrd7627a_init_early, 1260 .handle_irq = gic_handle_irq, 1261MACHINE_END 1262MACHINE_START(MSM8625_EVT, "QRD MSM8625 EVT") 1263 .atag_offset = 0x100, 1264 .map_io = msm8625_map_io, 1265 .reserve = msm8625_reserve, 1266 .init_irq = msm8625_init_irq, 1267 .init_machine = msm_qrd_init, 1268 .timer = &msm_timer, 1269 .init_early = qrd7627a_init_early, 1270 .handle_irq = gic_handle_irq, 1271MACHINE_END