PageRenderTime 22ms CodeModel.GetById 15ms app.highlight 3ms RepoModel.GetById 1ms app.codeStats 0ms

/arch/powerpc/include/asm/tce.h

https://github.com/aicjofs/android_kernel_lge_v500_20d_f2fs
C Header | 54 lines | 21 code | 8 blank | 25 comment | 0 complexity | 8a3866a671102d30dc5ff97bf1b88dcc MD5 | raw file
 1/*
 2 * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
 3 * Rewrite, cleanup:
 4 * Copyright (C) 2004 Olof Johansson <olof@lixom.net>, IBM Corporation
 5 *
 6 * This program is free software; you can redistribute it and/or modify
 7 * it under the terms of the GNU General Public License as published by
 8 * the Free Software Foundation; either version 2 of the License, or
 9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
19 */
20
21#ifndef _ASM_POWERPC_TCE_H
22#define _ASM_POWERPC_TCE_H
23#ifdef __KERNEL__
24
25#include <asm/iommu.h>
26
27/*
28 * Tces come in two formats, one for the virtual bus and a different
29 * format for PCI.  PCI TCEs can have hardware or software maintianed
30 * coherency.
31 */
32#define TCE_VB			0
33#define TCE_PCI			1
34#define TCE_PCI_SWINV_CREATE	2
35#define TCE_PCI_SWINV_FREE	4
36#define TCE_PCI_SWINV_PAIR	8
37
38/* TCE page size is 4096 bytes (1 << 12) */
39
40#define TCE_SHIFT	12
41#define TCE_PAGE_SIZE	(1 << TCE_SHIFT)
42
43#define TCE_ENTRY_SIZE		8		/* each TCE is 64 bits */
44
45#define TCE_RPN_MASK		0xfffffffffful  /* 40-bit RPN (4K pages) */
46#define TCE_RPN_SHIFT		12
47#define TCE_VALID		0x800		/* TCE valid */
48#define TCE_ALLIO		0x400		/* TCE valid for all lpars */
49#define TCE_PCI_WRITE		0x2		/* write from PCI allowed */
50#define TCE_PCI_READ		0x1		/* read from PCI allowed */
51#define TCE_VB_WRITE		0x1		/* write from VB allowed */
52
53#endif /* __KERNEL__ */
54#endif /* _ASM_POWERPC_TCE_H */