PageRenderTime 50ms CodeModel.GetById 11ms app.highlight 31ms RepoModel.GetById 1ms app.codeStats 1ms

/include/linux/mfd/wm8350/pmic.h

https://github.com/airy09/android_kernel_sony_apq8064
C Header | 781 lines | 487 code | 100 blank | 194 comment | 0 complexity | 1442909c8786c030368a9fe570fe7ef0 MD5 | raw file
  1/*
  2 * pmic.h  --  Power Management Driver for Wolfson WM8350 PMIC
  3 *
  4 * Copyright 2007 Wolfson Microelectronics PLC
  5 *
  6 *  This program is free software; you can redistribute  it and/or modify it
  7 *  under  the terms of  the GNU General  Public License as published by the
  8 *  Free Software Foundation;  either version 2 of the  License, or (at your
  9 *  option) any later version.
 10 *
 11 */
 12
 13#ifndef __LINUX_MFD_WM8350_PMIC_H
 14#define __LINUX_MFD_WM8350_PMIC_H
 15
 16#include <linux/platform_device.h>
 17#include <linux/leds.h>
 18#include <linux/regulator/machine.h>
 19
 20/*
 21 * Register values.
 22 */
 23
 24#define WM8350_CURRENT_SINK_DRIVER_A            0xAC
 25#define WM8350_CSA_FLASH_CONTROL                0xAD
 26#define WM8350_CURRENT_SINK_DRIVER_B            0xAE
 27#define WM8350_CSB_FLASH_CONTROL                0xAF
 28#define WM8350_DCDC_LDO_REQUESTED               0xB0
 29#define WM8350_DCDC_ACTIVE_OPTIONS              0xB1
 30#define WM8350_DCDC_SLEEP_OPTIONS               0xB2
 31#define WM8350_POWER_CHECK_COMPARATOR           0xB3
 32#define WM8350_DCDC1_CONTROL                    0xB4
 33#define WM8350_DCDC1_TIMEOUTS                   0xB5
 34#define WM8350_DCDC1_LOW_POWER                  0xB6
 35#define WM8350_DCDC2_CONTROL                    0xB7
 36#define WM8350_DCDC2_TIMEOUTS                   0xB8
 37#define WM8350_DCDC3_CONTROL                    0xBA
 38#define WM8350_DCDC3_TIMEOUTS                   0xBB
 39#define WM8350_DCDC3_LOW_POWER                  0xBC
 40#define WM8350_DCDC4_CONTROL                    0xBD
 41#define WM8350_DCDC4_TIMEOUTS                   0xBE
 42#define WM8350_DCDC4_LOW_POWER                  0xBF
 43#define WM8350_DCDC5_CONTROL                    0xC0
 44#define WM8350_DCDC5_TIMEOUTS                   0xC1
 45#define WM8350_DCDC6_CONTROL                    0xC3
 46#define WM8350_DCDC6_TIMEOUTS                   0xC4
 47#define WM8350_DCDC6_LOW_POWER                  0xC5
 48#define WM8350_LIMIT_SWITCH_CONTROL             0xC7
 49#define WM8350_LDO1_CONTROL                     0xC8
 50#define WM8350_LDO1_TIMEOUTS                    0xC9
 51#define WM8350_LDO1_LOW_POWER                   0xCA
 52#define WM8350_LDO2_CONTROL                     0xCB
 53#define WM8350_LDO2_TIMEOUTS                    0xCC
 54#define WM8350_LDO2_LOW_POWER                   0xCD
 55#define WM8350_LDO3_CONTROL                     0xCE
 56#define WM8350_LDO3_TIMEOUTS                    0xCF
 57#define WM8350_LDO3_LOW_POWER                   0xD0
 58#define WM8350_LDO4_CONTROL                     0xD1
 59#define WM8350_LDO4_TIMEOUTS                    0xD2
 60#define WM8350_LDO4_LOW_POWER                   0xD3
 61#define WM8350_VCC_FAULT_MASKS                  0xD7
 62#define WM8350_MAIN_BANDGAP_CONTROL             0xD8
 63#define WM8350_OSC_CONTROL                      0xD9
 64#define WM8350_RTC_TICK_CONTROL                 0xDA
 65#define WM8350_SECURITY                         0xDB
 66#define WM8350_RAM_BIST_1                       0xDC
 67#define WM8350_DCDC_LDO_STATUS                  0xE1
 68#define WM8350_GPIO_PIN_STATUS                  0xE6
 69
 70#define WM8350_DCDC1_FORCE_PWM                  0xF8
 71#define WM8350_DCDC3_FORCE_PWM                  0xFA
 72#define WM8350_DCDC4_FORCE_PWM                  0xFB
 73#define WM8350_DCDC6_FORCE_PWM                  0xFD
 74
 75/*
 76 * R172 (0xAC) - Current Sink Driver A
 77 */
 78#define WM8350_CS1_HIB_MODE                     0x1000
 79#define WM8350_CS1_HIB_MODE_MASK                0x1000
 80#define WM8350_CS1_HIB_MODE_SHIFT                   12
 81#define WM8350_CS1_ISEL_MASK                    0x003F
 82#define WM8350_CS1_ISEL_SHIFT                        0
 83
 84/* Bit values for R172 (0xAC) */
 85#define WM8350_CS1_HIB_MODE_DISABLE                  0
 86#define WM8350_CS1_HIB_MODE_LEAVE                    1
 87
 88#define WM8350_CS1_ISEL_220M                      0x3F
 89
 90/*
 91 * R173 (0xAD) - CSA Flash control
 92 */
 93#define WM8350_CS1_FLASH_MODE                   0x8000
 94#define WM8350_CS1_TRIGSRC                      0x4000
 95#define WM8350_CS1_DRIVE                        0x2000
 96#define WM8350_CS1_FLASH_DUR_MASK               0x0300
 97#define WM8350_CS1_OFF_RAMP_MASK                0x0030
 98#define WM8350_CS1_ON_RAMP_MASK                 0x0003
 99
100/*
101 * R174 (0xAE) - Current Sink Driver B
102 */
103#define WM8350_CS2_HIB_MODE                     0x1000
104#define WM8350_CS2_ISEL_MASK                    0x003F
105
106/*
107 * R175 (0xAF) - CSB Flash control
108 */
109#define WM8350_CS2_FLASH_MODE                   0x8000
110#define WM8350_CS2_TRIGSRC                      0x4000
111#define WM8350_CS2_DRIVE                        0x2000
112#define WM8350_CS2_FLASH_DUR_MASK               0x0300
113#define WM8350_CS2_OFF_RAMP_MASK                0x0030
114#define WM8350_CS2_ON_RAMP_MASK                 0x0003
115
116/*
117 * R176 (0xB0) - DCDC/LDO requested
118 */
119#define WM8350_LS_ENA                           0x8000
120#define WM8350_LDO4_ENA                         0x0800
121#define WM8350_LDO3_ENA                         0x0400
122#define WM8350_LDO2_ENA                         0x0200
123#define WM8350_LDO1_ENA                         0x0100
124#define WM8350_DC6_ENA                          0x0020
125#define WM8350_DC5_ENA                          0x0010
126#define WM8350_DC4_ENA                          0x0008
127#define WM8350_DC3_ENA                          0x0004
128#define WM8350_DC2_ENA                          0x0002
129#define WM8350_DC1_ENA                          0x0001
130
131/*
132 * R177 (0xB1) - DCDC Active options
133 */
134#define WM8350_PUTO_MASK                        0x3000
135#define WM8350_PWRUP_DELAY_MASK                 0x0300
136#define WM8350_DC6_ACTIVE                       0x0020
137#define WM8350_DC4_ACTIVE                       0x0008
138#define WM8350_DC3_ACTIVE                       0x0004
139#define WM8350_DC1_ACTIVE                       0x0001
140
141/*
142 * R178 (0xB2) - DCDC Sleep options
143 */
144#define WM8350_DC6_SLEEP                        0x0020
145#define WM8350_DC4_SLEEP                        0x0008
146#define WM8350_DC3_SLEEP                        0x0004
147#define WM8350_DC1_SLEEP                        0x0001
148
149/*
150 * R179 (0xB3) - Power-check comparator
151 */
152#define WM8350_PCCMP_ERRACT                     0x4000
153#define WM8350_PCCMP_RAIL                       0x0100
154#define WM8350_PCCMP_OFF_THR_MASK               0x0070
155#define WM8350_PCCMP_ON_THR_MASK                0x0007
156
157/*
158 * R180 (0xB4) - DCDC1 Control
159 */
160#define WM8350_DC1_OPFLT                        0x0400
161#define WM8350_DC1_VSEL_MASK                    0x007F
162#define WM8350_DC1_VSEL_SHIFT                        0
163
164/*
165 * R181 (0xB5) - DCDC1 Timeouts
166 */
167#define WM8350_DC1_ERRACT_MASK                  0xC000
168#define WM8350_DC1_ERRACT_SHIFT                     14
169#define WM8350_DC1_ENSLOT_MASK                  0x3C00
170#define WM8350_DC1_ENSLOT_SHIFT                     10
171#define WM8350_DC1_SDSLOT_MASK                  0x03C0
172#define WM8350_DC1_UVTO_MASK                    0x0030
173#define WM8350_DC1_SDSLOT_SHIFT                      6
174
175/* Bit values for R181 (0xB5) */
176#define WM8350_DC1_ERRACT_NONE                       0
177#define WM8350_DC1_ERRACT_SHUTDOWN_CONV              1
178#define WM8350_DC1_ERRACT_SHUTDOWN_SYS               2
179
180/*
181 * R182 (0xB6) - DCDC1 Low Power
182 */
183#define WM8350_DC1_HIB_MODE_MASK                0x7000
184#define WM8350_DC1_HIB_TRIG_MASK                0x0300
185#define WM8350_DC1_VIMG_MASK                    0x007F
186
187/*
188 * R183 (0xB7) - DCDC2 Control
189 */
190#define WM8350_DC2_MODE                         0x4000
191#define WM8350_DC2_MODE_MASK                    0x4000
192#define WM8350_DC2_MODE_SHIFT                       14
193#define WM8350_DC2_HIB_MODE                     0x1000
194#define WM8350_DC2_HIB_MODE_MASK                0x1000
195#define WM8350_DC2_HIB_MODE_SHIFT                   12
196#define WM8350_DC2_HIB_TRIG_MASK                0x0300
197#define WM8350_DC2_HIB_TRIG_SHIFT                    8
198#define WM8350_DC2_ILIM                         0x0040
199#define WM8350_DC2_ILIM_MASK                    0x0040
200#define WM8350_DC2_ILIM_SHIFT                        6
201#define WM8350_DC2_RMP_MASK                     0x0018
202#define WM8350_DC2_RMP_SHIFT                         3
203#define WM8350_DC2_FBSRC_MASK                   0x0003
204#define WM8350_DC2_FBSRC_SHIFT                       0
205
206/* Bit values for R183 (0xB7) */
207#define WM8350_DC2_MODE_BOOST                        0
208#define WM8350_DC2_MODE_SWITCH                       1
209
210#define WM8350_DC2_HIB_MODE_ACTIVE                   1
211#define WM8350_DC2_HIB_MODE_DISABLE                  0
212
213#define WM8350_DC2_HIB_TRIG_NONE                     0
214#define WM8350_DC2_HIB_TRIG_LPWR1                    1
215#define WM8350_DC2_HIB_TRIG_LPWR2                    2
216#define WM8350_DC2_HIB_TRIG_LPWR3                    3
217
218#define WM8350_DC2_ILIM_HIGH                         0
219#define WM8350_DC2_ILIM_LOW                          1
220
221#define WM8350_DC2_RMP_30V                           0
222#define WM8350_DC2_RMP_20V                           1
223#define WM8350_DC2_RMP_10V                           2
224#define WM8350_DC2_RMP_5V                            3
225
226#define WM8350_DC2_FBSRC_FB2                         0
227#define WM8350_DC2_FBSRC_ISINKA                      1
228#define WM8350_DC2_FBSRC_ISINKB                      2
229#define WM8350_DC2_FBSRC_USB                         3
230
231/*
232 * R184 (0xB8) - DCDC2 Timeouts
233 */
234#define WM8350_DC2_ERRACT_MASK                  0xC000
235#define WM8350_DC2_ERRACT_SHIFT                     14
236#define WM8350_DC2_ENSLOT_MASK                  0x3C00
237#define WM8350_DC2_ENSLOT_SHIFT                     10
238#define WM8350_DC2_SDSLOT_MASK                  0x03C0
239#define WM8350_DC2_UVTO_MASK                    0x0030
240
241/* Bit values for R184 (0xB8) */
242#define WM8350_DC2_ERRACT_NONE                       0
243#define WM8350_DC2_ERRACT_SHUTDOWN_CONV              1
244#define WM8350_DC2_ERRACT_SHUTDOWN_SYS               2
245
246/*
247 * R186 (0xBA) - DCDC3 Control
248 */
249#define WM8350_DC3_OPFLT                        0x0400
250#define WM8350_DC3_VSEL_MASK                    0x007F
251#define WM8350_DC3_VSEL_SHIFT                        0
252
253/*
254 * R187 (0xBB) - DCDC3 Timeouts
255 */
256#define WM8350_DC3_ERRACT_MASK                  0xC000
257#define WM8350_DC3_ERRACT_SHIFT                     14
258#define WM8350_DC3_ENSLOT_MASK                  0x3C00
259#define WM8350_DC3_ENSLOT_SHIFT                     10
260#define WM8350_DC3_SDSLOT_MASK                  0x03C0
261#define WM8350_DC3_UVTO_MASK                    0x0030
262#define WM8350_DC3_SDSLOT_SHIFT                      6
263
264/* Bit values for R187 (0xBB) */
265#define WM8350_DC3_ERRACT_NONE                       0
266#define WM8350_DC3_ERRACT_SHUTDOWN_CONV              1
267#define WM8350_DC3_ERRACT_SHUTDOWN_SYS               2
268/*
269 * R188 (0xBC) - DCDC3 Low Power
270 */
271#define WM8350_DC3_HIB_MODE_MASK                0x7000
272#define WM8350_DC3_HIB_TRIG_MASK                0x0300
273#define WM8350_DC3_VIMG_MASK                    0x007F
274
275/*
276 * R189 (0xBD) - DCDC4 Control
277 */
278#define WM8350_DC4_OPFLT                        0x0400
279#define WM8350_DC4_VSEL_MASK                    0x007F
280#define WM8350_DC4_VSEL_SHIFT                        0
281
282/*
283 * R190 (0xBE) - DCDC4 Timeouts
284 */
285#define WM8350_DC4_ERRACT_MASK                  0xC000
286#define WM8350_DC4_ERRACT_SHIFT                     14
287#define WM8350_DC4_ENSLOT_MASK                  0x3C00
288#define WM8350_DC4_ENSLOT_SHIFT                     10
289#define WM8350_DC4_SDSLOT_MASK                  0x03C0
290#define WM8350_DC4_UVTO_MASK                    0x0030
291#define WM8350_DC4_SDSLOT_SHIFT                      6
292
293/* Bit values for R190 (0xBE) */
294#define WM8350_DC4_ERRACT_NONE                       0
295#define WM8350_DC4_ERRACT_SHUTDOWN_CONV              1
296#define WM8350_DC4_ERRACT_SHUTDOWN_SYS               2
297
298/*
299 * R191 (0xBF) - DCDC4 Low Power
300 */
301#define WM8350_DC4_HIB_MODE_MASK                0x7000
302#define WM8350_DC4_HIB_TRIG_MASK                0x0300
303#define WM8350_DC4_VIMG_MASK                    0x007F
304
305/*
306 * R192 (0xC0) - DCDC5 Control
307 */
308#define WM8350_DC5_MODE                         0x4000
309#define WM8350_DC5_MODE_MASK                    0x4000
310#define WM8350_DC5_MODE_SHIFT                       14
311#define WM8350_DC5_HIB_MODE                     0x1000
312#define WM8350_DC5_HIB_MODE_MASK                0x1000
313#define WM8350_DC5_HIB_MODE_SHIFT                   12
314#define WM8350_DC5_HIB_TRIG_MASK                0x0300
315#define WM8350_DC5_HIB_TRIG_SHIFT                    8
316#define WM8350_DC5_ILIM                         0x0040
317#define WM8350_DC5_ILIM_MASK                    0x0040
318#define WM8350_DC5_ILIM_SHIFT                        6
319#define WM8350_DC5_RMP_MASK                     0x0018
320#define WM8350_DC5_RMP_SHIFT                         3
321#define WM8350_DC5_FBSRC_MASK                   0x0003
322#define WM8350_DC5_FBSRC_SHIFT                       0
323
324/* Bit values for R192 (0xC0) */
325#define WM8350_DC5_MODE_BOOST                        0
326#define WM8350_DC5_MODE_SWITCH                       1
327
328#define WM8350_DC5_HIB_MODE_ACTIVE                   1
329#define WM8350_DC5_HIB_MODE_DISABLE                  0
330
331#define WM8350_DC5_HIB_TRIG_NONE                     0
332#define WM8350_DC5_HIB_TRIG_LPWR1                    1
333#define WM8350_DC5_HIB_TRIG_LPWR2                    2
334#define WM8350_DC5_HIB_TRIG_LPWR3                    3
335
336#define WM8350_DC5_ILIM_HIGH                         0
337#define WM8350_DC5_ILIM_LOW                          1
338
339#define WM8350_DC5_RMP_30V                           0
340#define WM8350_DC5_RMP_20V                           1
341#define WM8350_DC5_RMP_10V                           2
342#define WM8350_DC5_RMP_5V                            3
343
344#define WM8350_DC5_FBSRC_FB2                         0
345#define WM8350_DC5_FBSRC_ISINKA                      1
346#define WM8350_DC5_FBSRC_ISINKB                      2
347#define WM8350_DC5_FBSRC_USB                         3
348
349/*
350 * R193 (0xC1) - DCDC5 Timeouts
351 */
352#define WM8350_DC5_ERRACT_MASK                  0xC000
353#define WM8350_DC5_ERRACT_SHIFT                     14
354#define WM8350_DC5_ENSLOT_MASK                  0x3C00
355#define WM8350_DC5_ENSLOT_SHIFT                     10
356#define WM8350_DC5_SDSLOT_MASK                  0x03C0
357#define WM8350_DC5_UVTO_MASK                    0x0030
358#define WM8350_DC5_SDSLOT_SHIFT                      6
359
360/* Bit values for R193 (0xC1) */
361#define WM8350_DC5_ERRACT_NONE                       0
362#define WM8350_DC5_ERRACT_SHUTDOWN_CONV              1
363#define WM8350_DC5_ERRACT_SHUTDOWN_SYS               2
364
365/*
366 * R195 (0xC3) - DCDC6 Control
367 */
368#define WM8350_DC6_OPFLT                        0x0400
369#define WM8350_DC6_VSEL_MASK                    0x007F
370#define WM8350_DC6_VSEL_SHIFT                        0
371
372/*
373 * R196 (0xC4) - DCDC6 Timeouts
374 */
375#define WM8350_DC6_ERRACT_MASK                  0xC000
376#define WM8350_DC6_ERRACT_SHIFT                     14
377#define WM8350_DC6_ENSLOT_MASK                  0x3C00
378#define WM8350_DC6_ENSLOT_SHIFT                     10
379#define WM8350_DC6_SDSLOT_MASK                  0x03C0
380#define WM8350_DC6_UVTO_MASK                    0x0030
381#define WM8350_DC6_SDSLOT_SHIFT                      6
382
383/* Bit values for R196 (0xC4) */
384#define WM8350_DC6_ERRACT_NONE                       0
385#define WM8350_DC6_ERRACT_SHUTDOWN_CONV              1
386#define WM8350_DC6_ERRACT_SHUTDOWN_SYS               2
387
388/*
389 * R197 (0xC5) - DCDC6 Low Power
390 */
391#define WM8350_DC6_HIB_MODE_MASK                0x7000
392#define WM8350_DC6_HIB_TRIG_MASK                0x0300
393#define WM8350_DC6_VIMG_MASK                    0x007F
394
395/*
396 * R199 (0xC7) - Limit Switch Control
397 */
398#define WM8350_LS_ERRACT_MASK                   0xC000
399#define WM8350_LS_ERRACT_SHIFT                      14
400#define WM8350_LS_ENSLOT_MASK                   0x3C00
401#define WM8350_LS_ENSLOT_SHIFT                      10
402#define WM8350_LS_SDSLOT_MASK                   0x03C0
403#define WM8350_LS_SDSLOT_SHIFT                       6
404#define WM8350_LS_HIB_MODE                      0x0010
405#define WM8350_LS_HIB_MODE_MASK                 0x0010
406#define WM8350_LS_HIB_MODE_SHIFT                     4
407#define WM8350_LS_HIB_PROT                      0x0002
408#define WM8350_LS_HIB_PROT_MASK                 0x0002
409#define WM8350_LS_HIB_PROT_SHIFT                     1
410#define WM8350_LS_PROT                          0x0001
411#define WM8350_LS_PROT_MASK                     0x0001
412#define WM8350_LS_PROT_SHIFT                         0
413
414/* Bit values for R199 (0xC7) */
415#define WM8350_LS_ERRACT_NONE                       0
416#define WM8350_LS_ERRACT_SHUTDOWN_CONV              1
417#define WM8350_LS_ERRACT_SHUTDOWN_SYS               2
418
419/*
420 * R200 (0xC8) - LDO1 Control
421 */
422#define WM8350_LDO1_SWI                         0x4000
423#define WM8350_LDO1_OPFLT                       0x0400
424#define WM8350_LDO1_VSEL_MASK                   0x001F
425#define WM8350_LDO1_VSEL_SHIFT                       0
426
427/*
428 * R201 (0xC9) - LDO1 Timeouts
429 */
430#define WM8350_LDO1_ERRACT_MASK                 0xC000
431#define WM8350_LDO1_ERRACT_SHIFT                    14
432#define WM8350_LDO1_ENSLOT_MASK                 0x3C00
433#define WM8350_LDO1_ENSLOT_SHIFT                    10
434#define WM8350_LDO1_SDSLOT_MASK                 0x03C0
435#define WM8350_LDO1_UVTO_MASK                   0x0030
436#define WM8350_LDO1_SDSLOT_SHIFT                     6
437
438/* Bit values for R201 (0xC9) */
439#define WM8350_LDO1_ERRACT_NONE                       0
440#define WM8350_LDO1_ERRACT_SHUTDOWN_CONV              1
441#define WM8350_LDO1_ERRACT_SHUTDOWN_SYS               2
442
443/*
444 * R202 (0xCA) - LDO1 Low Power
445 */
446#define WM8350_LDO1_HIB_MODE_MASK               0x3000
447#define WM8350_LDO1_HIB_TRIG_MASK               0x0300
448#define WM8350_LDO1_VIMG_MASK                   0x001F
449#define WM8350_LDO1_HIB_MODE_DIS		(0x1 << 12)
450
451
452/*
453 * R203 (0xCB) - LDO2 Control
454 */
455#define WM8350_LDO2_SWI                         0x4000
456#define WM8350_LDO2_OPFLT                       0x0400
457#define WM8350_LDO2_VSEL_MASK                   0x001F
458#define WM8350_LDO2_VSEL_SHIFT                       0
459
460/*
461 * R204 (0xCC) - LDO2 Timeouts
462 */
463#define WM8350_LDO2_ERRACT_MASK                 0xC000
464#define WM8350_LDO2_ERRACT_SHIFT                    14
465#define WM8350_LDO2_ENSLOT_MASK                 0x3C00
466#define WM8350_LDO2_ENSLOT_SHIFT                    10
467#define WM8350_LDO2_SDSLOT_MASK                 0x03C0
468#define WM8350_LDO2_SDSLOT_SHIFT                     6
469
470/* Bit values for R204 (0xCC) */
471#define WM8350_LDO2_ERRACT_NONE                       0
472#define WM8350_LDO2_ERRACT_SHUTDOWN_CONV              1
473#define WM8350_LDO2_ERRACT_SHUTDOWN_SYS               2
474
475/*
476 * R205 (0xCD) - LDO2 Low Power
477 */
478#define WM8350_LDO2_HIB_MODE_MASK               0x3000
479#define WM8350_LDO2_HIB_TRIG_MASK               0x0300
480#define WM8350_LDO2_VIMG_MASK                   0x001F
481
482/*
483 * R206 (0xCE) - LDO3 Control
484 */
485#define WM8350_LDO3_SWI                         0x4000
486#define WM8350_LDO3_OPFLT                       0x0400
487#define WM8350_LDO3_VSEL_MASK                   0x001F
488#define WM8350_LDO3_VSEL_SHIFT                       0
489
490/*
491 * R207 (0xCF) - LDO3 Timeouts
492 */
493#define WM8350_LDO3_ERRACT_MASK                 0xC000
494#define WM8350_LDO3_ERRACT_SHIFT                    14
495#define WM8350_LDO3_ENSLOT_MASK                 0x3C00
496#define WM8350_LDO3_ENSLOT_SHIFT                    10
497#define WM8350_LDO3_SDSLOT_MASK                 0x03C0
498#define WM8350_LDO3_UVTO_MASK                   0x0030
499#define WM8350_LDO3_SDSLOT_SHIFT                     6
500
501/* Bit values for R207 (0xCF) */
502#define WM8350_LDO3_ERRACT_NONE                       0
503#define WM8350_LDO3_ERRACT_SHUTDOWN_CONV              1
504#define WM8350_LDO3_ERRACT_SHUTDOWN_SYS               2
505
506/*
507 * R208 (0xD0) - LDO3 Low Power
508 */
509#define WM8350_LDO3_HIB_MODE_MASK               0x3000
510#define WM8350_LDO3_HIB_TRIG_MASK               0x0300
511#define WM8350_LDO3_VIMG_MASK                   0x001F
512
513/*
514 * R209 (0xD1) - LDO4 Control
515 */
516#define WM8350_LDO4_SWI                         0x4000
517#define WM8350_LDO4_OPFLT                       0x0400
518#define WM8350_LDO4_VSEL_MASK                   0x001F
519#define WM8350_LDO4_VSEL_SHIFT                       0
520
521/*
522 * R210 (0xD2) - LDO4 Timeouts
523 */
524#define WM8350_LDO4_ERRACT_MASK                 0xC000
525#define WM8350_LDO4_ERRACT_SHIFT                    14
526#define WM8350_LDO4_ENSLOT_MASK                 0x3C00
527#define WM8350_LDO4_ENSLOT_SHIFT                    10
528#define WM8350_LDO4_SDSLOT_MASK                 0x03C0
529#define WM8350_LDO4_UVTO_MASK                   0x0030
530#define WM8350_LDO4_SDSLOT_SHIFT                     6
531
532/* Bit values for R210 (0xD2) */
533#define WM8350_LDO4_ERRACT_NONE                       0
534#define WM8350_LDO4_ERRACT_SHUTDOWN_CONV              1
535#define WM8350_LDO4_ERRACT_SHUTDOWN_SYS               2
536
537/*
538 * R211 (0xD3) - LDO4 Low Power
539 */
540#define WM8350_LDO4_HIB_MODE_MASK               0x3000
541#define WM8350_LDO4_HIB_TRIG_MASK               0x0300
542#define WM8350_LDO4_VIMG_MASK                   0x001F
543
544/*
545 * R215 (0xD7) - VCC_FAULT Masks
546 */
547#define WM8350_LS_FAULT                         0x8000
548#define WM8350_LDO4_FAULT                       0x0800
549#define WM8350_LDO3_FAULT                       0x0400
550#define WM8350_LDO2_FAULT                       0x0200
551#define WM8350_LDO1_FAULT                       0x0100
552#define WM8350_DC6_FAULT                        0x0020
553#define WM8350_DC5_FAULT                        0x0010
554#define WM8350_DC4_FAULT                        0x0008
555#define WM8350_DC3_FAULT                        0x0004
556#define WM8350_DC2_FAULT                        0x0002
557#define WM8350_DC1_FAULT                        0x0001
558
559/*
560 * R216 (0xD8) - Main Bandgap Control
561 */
562#define WM8350_MBG_LOAD_FUSES                   0x8000
563#define WM8350_MBG_FUSE_WPREP                   0x4000
564#define WM8350_MBG_FUSE_WRITE                   0x2000
565#define WM8350_MBG_FUSE_TRIM_MASK               0x1F00
566#define WM8350_MBG_TRIM_SRC                     0x0020
567#define WM8350_MBG_USER_TRIM_MASK               0x001F
568
569/*
570 * R217 (0xD9) - OSC Control
571 */
572#define WM8350_OSC_LOAD_FUSES                   0x8000
573#define WM8350_OSC_FUSE_WPREP                   0x4000
574#define WM8350_OSC_FUSE_WRITE                   0x2000
575#define WM8350_OSC_FUSE_TRIM_MASK               0x0F00
576#define WM8350_OSC_TRIM_SRC                     0x0020
577#define WM8350_OSC_USER_TRIM_MASK               0x000F
578
579/*
580 * R248 (0xF8) - DCDC1 Force PWM
581 */
582#define WM8350_DCDC1_FORCE_PWM_ENA              0x0010
583
584/*
585 * R250 (0xFA) - DCDC3 Force PWM
586 */
587#define WM8350_DCDC3_FORCE_PWM_ENA              0x0010
588
589/*
590 * R251 (0xFB) - DCDC4 Force PWM
591 */
592#define WM8350_DCDC4_FORCE_PWM_ENA              0x0010
593
594/*
595 * R253 (0xFD) - DCDC1 Force PWM
596 */
597#define WM8350_DCDC6_FORCE_PWM_ENA              0x0010
598
599/*
600 * DCDC's
601 */
602#define WM8350_DCDC_1				0
603#define WM8350_DCDC_2				1
604#define WM8350_DCDC_3				2
605#define WM8350_DCDC_4				3
606#define WM8350_DCDC_5				4
607#define WM8350_DCDC_6				5
608
609/* DCDC modes */
610#define WM8350_DCDC_ACTIVE_STANDBY		0
611#define WM8350_DCDC_ACTIVE_PULSE		1
612#define WM8350_DCDC_SLEEP_NORMAL		0
613#define WM8350_DCDC_SLEEP_LOW			1
614
615/* DCDC Low power (Hibernate) mode */
616#define WM8350_DCDC_HIB_MODE_CUR		(0 << 12)
617#define WM8350_DCDC_HIB_MODE_IMAGE		(1 << 12)
618#define WM8350_DCDC_HIB_MODE_STANDBY		(2 << 12)
619#define WM8350_DCDC_HIB_MODE_LDO		(4 << 12)
620#define WM8350_DCDC_HIB_MODE_LDO_IM		(5 << 12)
621#define WM8350_DCDC_HIB_MODE_DIS		(7 << 12)
622#define WM8350_DCDC_HIB_MODE_MASK		(7 << 12)
623
624/* DCDC Low Power (Hibernate) signal */
625#define WM8350_DCDC_HIB_SIG_REG			(0 << 8)
626#define WM8350_DCDC_HIB_SIG_LPWR1		(1 << 8)
627#define WM8350_DCDC_HIB_SIG_LPWR2		(2 << 8)
628#define WM8350_DCDC_HIB_SIG_LPWR3		(3 << 8)
629
630/* LDO Low power (Hibernate) mode */
631#define WM8350_LDO_HIB_MODE_IMAGE		(0 << 0)
632#define WM8350_LDO_HIB_MODE_DIS			(1 << 0)
633
634/* LDO Low Power (Hibernate) signal */
635#define WM8350_LDO_HIB_SIG_REG			(0 << 8)
636#define WM8350_LDO_HIB_SIG_LPWR1		(1 << 8)
637#define WM8350_LDO_HIB_SIG_LPWR2		(2 << 8)
638#define WM8350_LDO_HIB_SIG_LPWR3		(3 << 8)
639
640/*
641 * LDOs
642 */
643#define WM8350_LDO_1				6
644#define WM8350_LDO_2				7
645#define WM8350_LDO_3				8
646#define WM8350_LDO_4				9
647
648/*
649 * ISINKs
650 */
651#define WM8350_ISINK_A				10
652#define WM8350_ISINK_B				11
653
654#define WM8350_ISINK_MODE_BOOST			0
655#define WM8350_ISINK_MODE_SWITCH		1
656#define WM8350_ISINK_ILIM_NORMAL		0
657#define WM8350_ISINK_ILIM_LOW			1
658
659#define WM8350_ISINK_FLASH_DISABLE		0
660#define WM8350_ISINK_FLASH_ENABLE		1
661#define WM8350_ISINK_FLASH_TRIG_BIT		0
662#define WM8350_ISINK_FLASH_TRIG_GPIO		1
663#define WM8350_ISINK_FLASH_MODE_EN		(1 << 13)
664#define WM8350_ISINK_FLASH_MODE_DIS		(0 << 13)
665#define WM8350_ISINK_FLASH_DUR_32MS		(0 << 8)
666#define WM8350_ISINK_FLASH_DUR_64MS		(1 << 8)
667#define WM8350_ISINK_FLASH_DUR_96MS		(2 << 8)
668#define WM8350_ISINK_FLASH_DUR_1024MS		(3 << 8)
669#define WM8350_ISINK_FLASH_ON_INSTANT		(0 << 0)
670#define WM8350_ISINK_FLASH_ON_0_25S		(1 << 0)
671#define WM8350_ISINK_FLASH_ON_0_50S		(2 << 0)
672#define WM8350_ISINK_FLASH_ON_1_00S		(3 << 0)
673#define WM8350_ISINK_FLASH_ON_1_95S		(1 << 0)
674#define WM8350_ISINK_FLASH_ON_3_91S		(2 << 0)
675#define WM8350_ISINK_FLASH_ON_7_80S		(3 << 0)
676#define WM8350_ISINK_FLASH_OFF_INSTANT		(0 << 4)
677#define WM8350_ISINK_FLASH_OFF_0_25S		(1 << 4)
678#define WM8350_ISINK_FLASH_OFF_0_50S		(2 << 4)
679#define WM8350_ISINK_FLASH_OFF_1_00S		(3 << 4)
680#define WM8350_ISINK_FLASH_OFF_1_95S		(1 << 4)
681#define WM8350_ISINK_FLASH_OFF_3_91S		(2 << 4)
682#define WM8350_ISINK_FLASH_OFF_7_80S		(3 << 4)
683
684/*
685 * Regulator Interrupts.
686 */
687#define WM8350_IRQ_CS1				13
688#define WM8350_IRQ_CS2				14
689#define WM8350_IRQ_UV_LDO4			25
690#define WM8350_IRQ_UV_LDO3			26
691#define WM8350_IRQ_UV_LDO2			27
692#define WM8350_IRQ_UV_LDO1			28
693#define WM8350_IRQ_UV_DC6			29
694#define WM8350_IRQ_UV_DC5			30
695#define WM8350_IRQ_UV_DC4			31
696#define WM8350_IRQ_UV_DC3			32
697#define WM8350_IRQ_UV_DC2			33
698#define WM8350_IRQ_UV_DC1			34
699#define WM8350_IRQ_OC_LS			35
700
701#define NUM_WM8350_REGULATORS			12
702
703struct wm8350;
704struct platform_device;
705struct regulator_init_data;
706
707/*
708 * WM8350 LED platform data
709 */
710struct wm8350_led_platform_data {
711	const char *name;
712	const char *default_trigger;
713	int max_uA;
714};
715
716struct wm8350_led {
717	struct platform_device *pdev;
718	struct mutex mutex;
719	struct work_struct work;
720	spinlock_t value_lock;
721	enum led_brightness value;
722	struct led_classdev cdev;
723	int max_uA_index;
724	int enabled;
725
726	struct regulator *isink;
727	struct regulator_consumer_supply isink_consumer;
728	struct regulator_init_data isink_init;
729	struct regulator *dcdc;
730	struct regulator_consumer_supply dcdc_consumer;
731	struct regulator_init_data dcdc_init;
732};
733
734struct wm8350_pmic {
735	/* Number of regulators of each type on this device */
736	int max_dcdc;
737	int max_isink;
738
739	/* ISINK to DCDC mapping */
740	int isink_A_dcdc;
741	int isink_B_dcdc;
742
743	/* hibernate configs */
744	u16 dcdc1_hib_mode;
745	u16 dcdc3_hib_mode;
746	u16 dcdc4_hib_mode;
747	u16 dcdc6_hib_mode;
748
749	/* regulator devices */
750	struct platform_device *pdev[NUM_WM8350_REGULATORS];
751
752	/* LED devices */
753	struct wm8350_led led[2];
754};
755
756int wm8350_register_regulator(struct wm8350 *wm8350, int reg,
757			      struct regulator_init_data *initdata);
758int wm8350_register_led(struct wm8350 *wm8350, int lednum, int dcdc, int isink,
759			struct wm8350_led_platform_data *pdata);
760
761/*
762 * Additional DCDC control not supported via regulator API
763 */
764int wm8350_dcdc_set_slot(struct wm8350 *wm8350, int dcdc, u16 start,
765			 u16 stop, u16 fault);
766int wm8350_dcdc25_set_mode(struct wm8350 *wm8350, int dcdc, u16 mode,
767			   u16 ilim, u16 ramp, u16 feedback);
768
769/*
770 * Additional LDO control not supported via regulator API
771 */
772int wm8350_ldo_set_slot(struct wm8350 *wm8350, int ldo, u16 start, u16 stop);
773
774/*
775 * Additional ISINK control not supported via regulator API
776 */
777int wm8350_isink_set_flash(struct wm8350 *wm8350, int isink, u16 mode,
778			   u16 trigger, u16 duration, u16 on_ramp,
779			   u16 off_ramp, u16 drive);
780
781#endif