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/x86info-1.30/Intel/cachesize.c

#
C | 336 lines | 264 code | 45 blank | 27 comment | 52 complexity | fe7e3cb67f0cbe08d7a0c712c7655258 MD5 | raw file
Possible License(s): GPL-2.0 
    

  1. /*
    2. 

  2.  *  (C) 2001-2011 Dave Jones.
    3. 

  3.  *
    4. 

  4.  *  Licensed under the terms of the GNU GPL License version 2.
    5. 

  5.  *
    6. 

  6.  * Intel specific parts
    7. 

  7.  *
    8. 

  8.  * References:
    9. 

  9.  *	http://www.intel.com/Assets/PDF/appnote/241618.pdf
    10. 

  10.  */
    11. 

  11. 

  12. #include <stdio.h>
    13. 

  13. #include <string.h>
    14. 

  14. #include "../x86info.h"
    15. 

  15. #include "Intel.h"
    16. 

  16. 

  17. #define MB(x)   ((x) * 1024)
    18. 

  18. 

  19. struct _cache_table
    20. 

  20. {
    21. 

  21. 	unsigned char descriptor;
    22. 

  22. 	int size;
    23. 

  23. 	char *string;
    24. 

  24. };
    25. 

  25. 

  26. static struct _cache_table TRACE_cache_table[] =
    27. 

  27. {
    28. 

  28. 	{ 0x70, 12, "Instruction trace cache: 12K uOps, 8-way associative." },
    29. 

  29. 	{ 0x71, 16, "Instruction trace cache: 16K uOps, 8-way associative." },
    30. 

  30. 	{ 0x72, 32, "Instruction trace cache: 32K uOps, 8-way associative." },
    31. 

  31. 	{ 0x73, 64, "Instruction trace cache: 64K uOps, 8-way associative." },
    32. 

  32. 	{ 0, 0, NULL }
    33. 

  33. };
    34. 

  34. 

  35. static struct _cache_table L1I_cache_table[] =
    36. 

  36. {
    37. 

  37. 	{ 0x6,   8, "L1 Instruction cache: 8KB, 4-way associative. 32 byte line size." },
    38. 

  38. 	{ 0x8,  16, "L1 Instruction cache: 16KB, 4-way associative. 32 byte line size." },
    39. 

  39. 	{ 0x9,  32, "L1 Instruction cache: 32KB, 4-way associative. 64 byte line size." },
    40. 

  40. 	{ 0x30, 32, "L1 Instruction cache: 32KB, 8-way associative. 64 byte line size." },
    41. 

  41. 	{ 0, 0, NULL }
    42. 

  42. };
    43. 

  43. 

  44. static struct _cache_table L1D_cache_table[] =
    45. 

  45. {
    46. 

  46. 	{ 0xa,   8, "L1 Data cache: 8KB, 2-way associative. 32 byte line size." },
    47. 

  47. 	{ 0xc,  16, "L1 Data cache: 16KB, 4-way associative. 32 byte line size." },
    48. 

  48. 	{ 0xd,  16, "L1 Data cache: 16KB, 4-way associative. 64 byte line size. ECC." },
    49. 

  49. 	{ 0xe,  24, "L1 Data cache: 24KB, 6-way associative. 64 byte line size. ECC." },
    50. 

  50. 	{ 0x2c, 32, "L1 Data cache: 32KB, 8-way associative. 64 byte line size." },
    51. 

  51. 	{ 0x60, 16, "L1 Data cache: 16KB, sectored, 8-way associative. 64 byte line size." },
    52. 

  52. 	{ 0x66 , 8, "L1 Data cache: 8KB, sectored, 4-way associative. 64 byte line size." },
    53. 

  53. 	{ 0x67, 16, "L1 Data cache: 16KB, sectored, 4-way associative. 64 byte line size." },
    54. 

  54. 	{ 0x68, 32, "L1 Data cache: 32KB, sectored, 4-way associative. 64 byte line size." },
    55. 

  55. 	{ 0, 0, NULL }
    56. 

  56. };
    57. 

  57. 

  58. static struct _cache_table L2_cache_table[] =
    59. 

  59. {
    60. 

  60. 	{ 0x21,  256, "L2 (MLC): 256KB, 8-way associative. 64 byte line size." },
    61. 

  61. 	{ 0x39,  128, "L2 cache: 128KB, 4-way associative. Sectored. 64 byte line size." },
    62. 

  62. /*	{ 0x3a,  192, "L2 cache: 192KB, 6-way associative. Sectored. 64 byte line size." },
    63. 

  63. 	{ 0x3b,  128, "L2 cache: 128KB, 2-way associative. Sectored. 64 byte line size." },
    64. 

  64. 	{ 0x3c,  256, "L2 cache: 256KB, 4-way associative. Sectored. 64 byte line size." },
    65. 

  65. 	{ 0x3d,  384, "L2 cache: 384KB, 6-way associative. Sectored. 64 byte line size." },
    66. 

  66. 	{ 0x3e,  512, "L2 cache: 512KB, 4-way associative. Sectored. 64 byte line size." },
    67. 

  67. 	{ 0x3f, 256, "L2 cache: 256KB, 2-way associative. Sectored. 64 byte line size." },	*/
    68. 

  68. /* 3a->3f are no longer listed. */
    69. 

  69. 	{ 0x41,  128, "L2 cache: 128KB, 4-way associative. 32 byte line size." },
    70. 

  70. 	{ 0x42,  256, "L2 cache: 256KB, 4-way associative. 32 byte line size." },
    71. 

  71. 	{ 0x43,  512, "L2 cache: 512KB, 4-way associative. 32 byte line size." },
    72. 

  72. 	{ 0x44, MB(1), "L2 cache: 1MB, 4-way associative. 32 byte line size." },
    73. 

  73. 	{ 0x45, MB(2), "L2 cache: 2MB, 4-way associative. 32 byte line size." },
    74. 

  74. 	{ 0x48, MB(3), "L2 cache: 3MB, 12-way associative. 64 byte line size. Unified on-die." },
    75. 

  75. 	{ 0x4e, MB(6), "L2 cache: 6MB, 24-way set associative, 64-byte line size." },
    76. 

  76. 	{ 0x79,  128, "L2 cache: 128KB, sectored, 8-way associative. 64 byte line size." },
    77. 

  77. 	{ 0x7a,  256, "L2 cache: 256KB, sectored, 8-way associative. 64 byte line size." },
    78. 

  78. 	{ 0x7b,  512, "L2 cache: 512KB, sectored, 8-way associative. 64 byte line size." },
    79. 

  79. 	{ 0x7c, MB(1), "L2 cache: 1MB, sectored, 8-way associative. 64 byte line size." },
    80. 

  80. 	{ 0x7d, MB(2), "L2 cache: 2MB, 8-way associative. 64 byte line size." },
    81. 

  81. 	{ 0x7f,  512, "L2 cache: 512KB, 2-way associative. 64 byte line size." },
    82. 

  82. 	{ 0x80,  512, "L2 cache: 512KB, 8-way associative. 64 byte line size." },
    83. 

  83. 	{ 0x82,  256, "L2 cache: 256KB, 8-way associative. 32 byte line size." },
    84. 

  84. 	{ 0x83,  512, "L2 cache: 512KB, 8-way associative. 32 byte line size." },
    85. 

  85. 	{ 0x84, MB(1), "L2 cache: 1MB, 8-way associative. 32 byte line size." },
    86. 

  86. 	{ 0x85, MB(2), "L2 cache: 2MB, 8-way associative. 32 byte line size." },
    87. 

  87. 	{ 0x86,  512, "L2 cache: 512KB, 4-way associative. 64 byte line size." },
    88. 

  88. 	{ 0x87, MB(1), "L2 cache: 1MB, 8-way associative. 64 byte line size." },
    89. 

  89. 	{ 0, 0, NULL }
    90. 

  90. };
    91. 

  91. 

  92. static struct _cache_table L2L3_cache_table[] =
    93. 

  93. {
    94. 

  94. 	{ 0x46,  MB(4), "L2 cache: 4MB, 4-way associative. 64 byte line size." },
    95. 

  95. 	{ 0x47,  MB(8), "L2 cache: 8MB, 8-way associative. 64 byte line size." },
    96. 

  96. 	{ 0x48,  MB(3), "L2 cache: 3MB, 12-way associative. 64 byte line size." },
    97. 

  97. 	{ 0x49,  MB(4), "L2 cache: 4MB, 16-way associative. 64 byte line size." },
    98. 

  98. 	{ 0x4a,  MB(6), "L2 cache: 6MB, 12-way associative. 64 byte line size." },
    99. 

  99. 	{ 0x4b,  MB(8), "L2 cache: 8MB, 16-way associative. 64 byte line size." },
    100. 

  100. 	{ 0x4c, MB(12), "L2 cache: 12MB, 12-way associative. 64 byte line size." },
    101. 

  101. 	{ 0x4d, MB(16), "L2 cache: 16MB, 16-way associative. 64 byte line size." },
    102. 

  102. 	{ 0x78,  MB(1), "L2 cache: 1MB, sectored, 8-way associative. 64 byte line size." },
    103. 

  103. 	{ 0, 0, NULL }
    104. 

  104. };
    105. 

  105. static struct _cache_table L3L2_cache_table[] =
    106. 

  106. {
    107. 

  107. 	{ 0x46,  MB(4), "L3 cache: 4MB, 4-way associative. 64 byte line size." },
    108. 

  108. 	{ 0x47,  MB(8), "L3 cache: 8MB, 8-way associative. 64 byte line size." },
    109. 

  109. 	{ 0x49,  MB(4), "L3 cache: 4MB, 16-way associative. 64 byte line size." },
    110. 

  110. 	{ 0x4a,  MB(6), "L3 cache: 6MB, 12-way associative. 64 byte line size." },
    111. 

  111. 	{ 0x4b,  MB(8), "L3 cache: 8MB, 16-way associative. 64 byte line size." },
    112. 

  112. 	{ 0x4c, MB(12), "L3 cache: 12MB, 12-way associative. 64 byte line size." },
    113. 

  113. 	{ 0x4d, MB(16), "L3 cache: 16MB, 16-way associative. 64 byte line size." },
    114. 

  114. 	{ 0x78,  MB(1), "L3 cache: 1MB, sectored, 8-way associative. 64 byte line size." },
    115. 

  115. 	{ 0xd0,   512, "L3 cache: 512KB, 4-way associative. 64 byte line size." },
    116. 

  116. 	{ 0xd1,  MB(1), "L3 cache: 1MB, 4-way associative. 64 byte line size." },
    117. 

  117. 	{ 0xd2,  MB(2), "L3 cache: 2MB, 4-way associative. 64 byte line size." },
    118. 

  118. 	{ 0xd6,  MB(1), "L3 cache: 1MB, 8-way associative. 64 byte line size." },
    119. 

  119. 	{ 0xd7,  MB(2), "L3 cache: 2MB, 8-way associative. 64 byte line size." },
    120. 

  120. 	{ 0xd8,  MB(4), "L3 cache: 4MB, 8-way associative. 64 byte line size." },
    121. 

  121. 	{ 0xdc,  MB(2), "L3 cache: 2MB, 12-way associative. 64 byte line size." },
    122. 

  122. 	{ 0xdd,  MB(4), "L3 cache: 4MB, 12-way associative. 64 byte line size." },
    123. 

  123. 	{ 0xe2,  MB(2), "L3 cache: 2MB, 16-way associative. 64 byte line size." },
    124. 

  124. 	{ 0xe3,  MB(4), "L3 cache: 4MB, 16-way associative. 64 byte line size." },
    125. 

  125. 	{ 0xe4,  MB(8), "L3 cache: 8MB, 16-way associative. 64 byte line size." },
    126. 

  126. 	{ 0xea, MB(12), "L3 cache: 12MB, 24-way associative. 64 byte line size." },
    127. 

  127. 	{ 0xeb, MB(18), "L3 cache: 18MB, 24-way associative. 64 byte line size." },
    128. 

  128. 	{ 0xec, MB(24), "L3 cache: 24MB, 24-way associative. 64 byte line size." },
    129. 

  129. 	{ 0xde,  MB(8), "L3 cache: 8MB, 12-way associative. 64 byte line size." },
    130. 

  130. 	{ 0, 0, NULL }
    131. 

  131. };
    132. 

  132. 

  133. static struct _cache_table L3_cache_table[] =
    134. 

  134. {
    135. 

  135. 	{ 0x22,  512, "L3 cache: 512KB, 4-way associative. 64 byte line size." },
    136. 

  136. 	{ 0x23, MB(1), "L3 cache: 1MB, 8-way associative. 64 byte line size." },
    137. 

  137. 	{ 0x25, MB(2), "L3 cache: 2MB, 8-way associative. 64 byte line size." },
    138. 

  138. 	{ 0x29, MB(4), "L3 cache: 4MB, 8-way associative. 64 byte line size." },
    139. 

  139. 	{ 0, 0, NULL }
    140. 

  140. };
    141. 

  141. 

  142. static struct _cache_table ITLB_cache_table[] =
    143. 

  143. {
    144. 

  144. 	{ 0x1,   32, "Instruction TLB: 4KB pages, 4-way associative, 32 entries" },
    145. 

  145. 	{ 0x2,    2, "Instruction TLB: 4MB pages, fully associative, 2 entries" },
    146. 

  146. 	{ 0x50,  64, "Instruction TLB: 4K, 2MB or 4MB pages, fully associative, 64 entries." },
    147. 

  147. 	{ 0x51, 128, "Instruction TLB: 4K, 2MB or 4MB pages, fully associative, 128 entries." },
    148. 

  148. 	{ 0x52, 256, "Instruction TLB: 4K, 2MB or 4MB pages, fully associative, 256 entries." },
    149. 

  149. 	{ 0x55,	  7, "Instruction TLB: 2MB or 4MB pages, fully associative, 7 entries" },
    150. 

  150. 	{ 0xb0, 128, "Instruction TLB: 4K pages, 4-way associative, 128 entries." },
    151. 

  151. 	{ 0xb1,   4, "Instruction TLB: 4x 4MB page entries, or 8x 2MB pages entries, 4-way associative" },
    152. 

  152. 	{ 0xb2,  64, "Instruction TLB: 4K pages, 4-way associative, 64 entries." },
    153. 

  153. 	{ 0, 0, NULL }
    154. 

  154. };
    155. 

  155. 

  156. static struct _cache_table DTLB_cache_table[] =
    157. 

  157. {
    158. 

  158. 	{ 0x3,   64, "Data TLB: 4KB pages, 4-way associative, 64 entries" },
    159. 

  159. 	{ 0x4,    8, "Data TLB: 4MB pages, 4-way associative, 8 entries" },
    160. 

  160. 	{ 0x5,   32, "Data TLB: 4MB pages, 4-way associative, 32 entries" },
    161. 

  161. 	{ 0x56,	 16, "L1 Data TLB: 4MB pages, 4-way set associative, 16 entries" },
    162. 

  162. 	{ 0x57,	 16, "L1 Data TLB: 4KB pages, 4-way set associative, 16 entries" },
    163. 

  163. 	{ 0x5a,  32, "Data TLB: 4KB or 4MB pages, fully associative, 32 entries." },
    164. 

  164. 	{ 0x5b,  64, "Data TLB: 4KB or 4MB pages, fully associative, 64 entries." },
    165. 

  165. 	{ 0x5c, 128, "Data TLB: 4KB or 4MB pages, fully associative, 128 entries." },
    166. 

  166. 	{ 0x5d, 256, "Data TLB: 4KB or 4MB pages, fully associative, 256 entries." },
    167. 

  167. 	{ 0xb3, 128, "Data TLB: 4K pages, 4-way associative, 128 entries." },
    168. 

  168. 	{ 0xb4, 256, "Data TLB: 4K pages, 4-way associative, 256 entries." },
    169. 

  169. 	{ 0xca, 512, "Data TLB: 4K pages, 4-way associative, 512 entries." },
    170. 

  170. 	{ 0, 0, NULL }
    171. 

  171. };
    172. 

  172. 

  173. static struct _cache_table prefetch_table[] =
    174. 

  174. {
    175. 

  175. 	{0xf0, 64, "64 byte prefetching."},
    176. 

  176. 	{0xf1, 64, "128 byte prefetching."},
    177. 

  177. };
    178. 

  178. 

  179. static unsigned char found_unknown=0;
    180. 

  180. static unsigned char unknown_array[256];
    181. 

  181. 

  182. /* Decode Intel TLB and cache info descriptors */
    183. 

  183. //TODO : Errata workaround. http://www.sandpile.org/post/msgs/20002736.htm
    184. 

  184. static void decode_Intel_cache(int des, struct cpudata *cpu, int output,
    185. 

  185. 			struct _cache_table *table)
    186. 

  186. {
    187. 

  187. 	int k = 0;
    188. 

  188. 	int found = 0;
    189. 

  189. 

  190. 	/* "No 2nd-level cache or, if processor contains a valid 2nd-level
    191. 

  191. 	   cache, no 3rd-level cache". Skip this pointless entry.*/
    192. 

  192. 	if (des == 0x40)
    193. 

  193. 		return;
    194. 

  194. 

  195. 	//TODO: Add description to link-list in cpu->
    196. 

  196. 

  197. 	while ((table[k].descriptor != 0) && (found == 0)) {
    198. 

  198. 		if (table[k].descriptor == des) {
    199. 

  199. 

  200. 			if (table == TRACE_cache_table)
    201. 

  201. 				cpu->cachesize_trace += table[k].size;
    202. 

  202. 

  203. 			if (table == L1I_cache_table)
    204. 

  204. 				cpu->cachesize_L1_I += table[k].size;
    205. 

  205. 

  206. 			if (table == L1D_cache_table)
    207. 

  207. 				cpu->cachesize_L1_D += table[k].size;
    208. 

  208. 

  209. 			if (table == L2_cache_table)
    210. 

  210. 				cpu->cachesize_L2 += table[k].size;
    211. 

  211. 			if (table == L2L3_cache_table)
    212. 

  212. 				cpu->cachesize_L2 += table[k].size;
    213. 

  213. 

  214. 			if (table == L3_cache_table)
    215. 

  215. 				cpu->cachesize_L3 += table[k].size;
    216. 

  216. 			if (table == L3L2_cache_table)
    217. 

  217. 				cpu->cachesize_L3 += table[k].size;
    218. 

  218. 

  219. 			if (output)
    220. 

  220. 				printf(" %s\n", table[k].string);
    221. 

  221. 			found = 1;
    222. 

  222. 		}
    223. 

  223. 		k++;
    224. 

  224. 	}
    225. 

  225. 

  226. 	if ((found == 0) && (unknown_array[des] == 0)) {
    227. 

  227. 		unknown_array[des] = 1;
    228. 

  228. 		found_unknown++;
    229. 

  229. 	}
    230. 

  230. }
    231. 

  231. 

  232. static void decode_cache(struct cpudata *cpu, struct _cache_table *table, int output)
    233. 

  233. {
    234. 

  234. 	unsigned int i, j, n;
    235. 

  235. 	unsigned int regs[4];
    236. 

  236. 

  237. 	/* Decode TLB and cache info */
    238. 

  238. 	cpuid(cpu->number, 2, &regs[0], &regs[1], &regs[2], &regs[3]);
    239. 

  239. 

  240. 	/* Number of times to iterate */
    241. 

  241. 	n = regs[0] & 0xff;
    242. 

  242. 

  243. 	for (i=0; i<n; i++) {
    244. 

  244. 		cpuid(cpu->number, 2, &regs[0], &regs[1], &regs[2], &regs[3]);
    245. 

  245. 

  246. 		/* If bit 31 is set, this is an unknown format */
    247. 

  247. 		for (j=0; j<3; j++)
    248. 

  248. 			if (regs[j] & 0x80000000)
    249. 

  249. 				regs[j] = 0;
    250. 

  250. 

  251. 		/* Byte 0 is level count, not a descriptor */
    252. 

  252. 		for (j=1; j<16; j++) {
    253. 

  253. 			unsigned char val = regs[j / 4] >> (unsigned int)(8 * (j % 4));
    254. 

  254. 			if (val)
    255. 

  255. 				decode_Intel_cache(val, cpu, output, table);
    256. 

  256. 		}
    257. 

  257. 	}
    258. 

  258. }
    259. 

  259. 

  260. static void clean_unknowns(struct _cache_table *table)
    261. 

  261. {
    262. 

  262. 	int j=0;
    263. 

  263. 	int des;
    264. 

  264. 

  265. 	while (table[j].descriptor != 0) {
    266. 

  266. 		des = table[j++].descriptor;
    267. 

  267. 		if (unknown_array[des] == 1) {
    268. 

  268. 			unknown_array[des] = 0;
    269. 

  269. 			found_unknown--;
    270. 

  270. 		}
    271. 

  271. 	}
    272. 

  272. }
    273. 

  273. 

  274. 

  275. void decode_Intel_caches(struct cpudata *cpu, int output)
    276. 

  276. {
    277. 

  277. 	unsigned int i = 0;
    278. 

  278. 	unsigned char oldknown;
    279. 

  279. 

  280. 	if (cpu->cpuid_level < 2)
    281. 

  281. 		return;
    282. 

  282. 

  283. 	memset(&unknown_array, 0, sizeof(unknown_array));
    284. 

  284. 

  285. 	if (output)
    286. 

  286. 		printf("Cache info\n");
    287. 

  287. 

  288. 	decode_cache(cpu, TRACE_cache_table, output);
    289. 

  289. 	decode_cache(cpu, L1I_cache_table, output);
    290. 

  290. 	decode_cache(cpu, L1D_cache_table, output);
    291. 

  291. 	oldknown = found_unknown;
    292. 

  292. 	decode_cache(cpu, L2_cache_table, output);
    293. 

  293. 	if (found_unknown > 0) {
    294. 

  294. 		if (oldknown == found_unknown)
    295. 

  295. 			 decode_cache(cpu, L2L3_cache_table, output);
    296. 

  296. 		else
    297. 

  297. 			 decode_cache(cpu, L3L2_cache_table, output);
    298. 

  298. 	}
    299. 

  299. 

  300. 	decode_cache(cpu, L3_cache_table, output);
    301. 

  301. 	if (output)
    302. 

  302. 		printf("TLB info\n");
    303. 

  303. 	decode_cache(cpu, ITLB_cache_table, output);
    304. 

  304. 	decode_cache(cpu, DTLB_cache_table, output);
    305. 

  305. 	decode_cache(cpu, prefetch_table, output);
    306. 

  306. 

  307. 	if (found_unknown == 0)
    308. 

  308. 		return;
    309. 

  309. 

  310. 	/* Remove any known entries */
    311. 

  311. 	clean_unknowns(TRACE_cache_table);
    312. 

  312. 	clean_unknowns(L1I_cache_table);
    313. 

  313. 	clean_unknowns(L1D_cache_table);
    314. 

  314. 	clean_unknowns(L2_cache_table);
    315. 

  315. 	clean_unknowns(L3_cache_table);
    316. 

  316. 	clean_unknowns(L2L3_cache_table);
    317. 

  317. 	clean_unknowns(ITLB_cache_table);
    318. 

  318. 	clean_unknowns(DTLB_cache_table);
    319. 

  319. 	clean_unknowns(prefetch_table);
    320. 

  320. 

  321. 	if (found_unknown == 0)
    322. 

  322. 		return;
    323. 

  323. 

  324. 	if (output)
    325. 

  325. 		printf("Found unknown cache descriptors: ");
    326. 

  326. 

  327. 	for (i=0; i<256; i++) {
    328. 

  328. 		if (unknown_array[i] == 1)
    329. 

  329. 			if (output)
    330. 

  330. 				printf("%02x ", i);
    331. 

  331. 	}
    332. 

  332. 	if (output)
    333. 

  333. 		printf("\n");
    334. 

  334. 	found_unknown = 0;
    335. 

  335. }
    336. 

  336. 

  337.