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/u-boot-2012.07-rc1/include/configs/mcc200.h

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C Header | 427 lines | 213 code | 68 blank | 146 comment | 6 complexity | 70d1cddcbc3ee630ccf905b7e6406d88 MD5 | raw file
Possible License(s): AGPL-1.0
  1. /*
  2. * (C) Copyright 2006-2008
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #ifndef __CONFIG_H
  24. #define __CONFIG_H
  25. /*
  26. * High Level Configuration Options
  27. * (easy to change)
  28. */
  29. #define CONFIG_MPC5200
  30. #define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
  31. #define CONFIG_MCC200 1 /* ... on MCC200 board */
  32. /*
  33. * Valid values for CONFIG_SYS_TEXT_BASE are:
  34. * 0xFC000000 boot low (standard configuration)
  35. * 0xFFF00000 boot high
  36. * 0x00100000 boot from RAM (for testing only)
  37. */
  38. #ifndef CONFIG_SYS_TEXT_BASE
  39. #define CONFIG_SYS_TEXT_BASE 0xFC000000
  40. #endif
  41. #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33MHz */
  42. #define CONFIG_MISC_INIT_R
  43. #define CONFIG_HIGH_BATS 1 /* High BATs supported */
  44. /*
  45. * Serial console configuration
  46. *
  47. * To select console on the one of 8 external UARTs,
  48. * define CONFIG_QUART_CONSOLE as 1, 2, 3, or 4 for the first Quad UART,
  49. * or as 5, 6, 7, or 8 for the second Quad UART.
  50. * COM11, COM12, COM13, COM14 are located on the second Quad UART.
  51. *
  52. * CONFIG_PSC_CONSOLE must be undefined in this case.
  53. */
  54. #if !defined(CONFIG_PRS200)
  55. /* MCC200 configuration: */
  56. #ifdef CONFIG_CONSOLE_COM12
  57. #define CONFIG_QUART_CONSOLE 6 /* console is on UARTF of QUART2 */
  58. #else
  59. #define CONFIG_QUART_CONSOLE 8 /* console is on UARTH of QUART2 */
  60. #endif
  61. #else
  62. /* PRS200 configuration: */
  63. #undef CONFIG_QUART_CONSOLE
  64. #endif /* CONFIG_PRS200 */
  65. /*
  66. * To select console on PSC1, define CONFIG_PSC_CONSOLE as 1
  67. * and undefine CONFIG_QUART_CONSOLE.
  68. */
  69. #if !defined(CONFIG_PRS200)
  70. /* MCC200 configuration: */
  71. #define CONFIG_SERIAL_MULTI 1
  72. #define CONFIG_PSC_CONSOLE 1 /* PSC1 may be COM */
  73. #define CONFIG_PSC_CONSOLE2 2 /* PSC2 is PSoC */
  74. #else
  75. /* PRS200 configuration: */
  76. #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
  77. #endif
  78. #if defined(CONFIG_QUART_CONSOLE) && defined(CONFIG_PSC_CONSOLE) && \
  79. !defined(CONFIG_SERIAL_MULTI)
  80. #error "Select only one console device!"
  81. #endif
  82. #define CONFIG_BAUDRATE 115200
  83. #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
  84. #define CONFIG_MII 1
  85. #define CONFIG_DOS_PARTITION
  86. /* USB */
  87. #define CONFIG_USB_OHCI
  88. #define CONFIG_USB_STORAGE
  89. /* automatic software updates (see board/mcc200/auto_update.c) */
  90. #define CONFIG_AUTO_UPDATE 1
  91. /*
  92. * BOOTP options
  93. */
  94. #define CONFIG_BOOTP_BOOTFILESIZE
  95. #define CONFIG_BOOTP_BOOTPATH
  96. #define CONFIG_BOOTP_GATEWAY
  97. #define CONFIG_BOOTP_HOSTNAME
  98. /*
  99. * Command line configuration.
  100. */
  101. #include <config_cmd_default.h>
  102. #define CONFIG_CMD_BEDBUG
  103. #define CONFIG_CMD_FAT
  104. #define CONFIG_CMD_I2C
  105. #define CONFIG_CMD_USB
  106. #undef CONFIG_CMD_NET
  107. #undef CONFIG_CMD_NFS
  108. /*
  109. * Autobooting
  110. */
  111. #define CONFIG_BOOTDELAY 1 /* autoboot after 1 second */
  112. #define CONFIG_PREBOOT "echo;" \
  113. "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
  114. "echo"
  115. #undef CONFIG_BOOTARGS
  116. #define XMK_STR(x) #x
  117. #define MK_STR(x) XMK_STR(x)
  118. #ifdef CONFIG_PRS200
  119. # define CONFIG_SYS__BOARDNAME "prs200"
  120. # define CONFIG_SYS__LINUX_CONSOLE "ttyS0"
  121. #else
  122. # define CONFIG_SYS__BOARDNAME "mcc200"
  123. # define CONFIG_SYS__LINUX_CONSOLE "ttyEU5"
  124. #endif
  125. /* Network */
  126. #define CONFIG_ETHADDR 00:17:17:ff:00:00
  127. #define CONFIG_IPADDR 10.76.9.29
  128. #define CONFIG_SERVERIP 10.76.9.1
  129. #include <version.h> /* For U-Boot version */
  130. #define CONFIG_EXTRA_ENV_SETTINGS \
  131. "ubootver=" U_BOOT_VERSION "\0" \
  132. "netdev=eth0\0" \
  133. "hostname=" CONFIG_SYS__BOARDNAME "\0" \
  134. "nfsargs=setenv bootargs root=/dev/nfs rw " \
  135. "nfsroot=${serverip}:${rootpath}\0" \
  136. "ramargs=setenv bootargs root=/dev/mtdblock2 " \
  137. "rootfstype=cramfs\0" \
  138. "addip=setenv bootargs ${bootargs} " \
  139. "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
  140. ":${hostname}:${netdev}:off panic=1\0" \
  141. "addcons=setenv bootargs ${bootargs} " \
  142. "console=${console},${baudrate} " \
  143. "ubootver=${ubootver} board=${board}\0" \
  144. "flash_nfs=run nfsargs addip addcons;" \
  145. "bootm ${kernel_addr}\0" \
  146. "flash_self=run ramargs addip addcons;" \
  147. "bootm ${kernel_addr} ${ramdisk_addr}\0" \
  148. "net_nfs=tftp 200000 ${bootfile};" \
  149. "run nfsargs addip addcons;bootm\0" \
  150. "console=" CONFIG_SYS__LINUX_CONSOLE "\0" \
  151. "rootpath=/opt/eldk/ppc_6xx\0" \
  152. "bootfile=/tftpboot/" CONFIG_SYS__BOARDNAME "/uImage\0" \
  153. "load=tftp 200000 /tftpboot/" CONFIG_SYS__BOARDNAME "/u-boot.bin\0" \
  154. "text_base=" MK_STR(CONFIG_SYS_TEXT_BASE) "\0" \
  155. "kernel_addr=0xFC0C0000\0" \
  156. "update=protect off ${text_base} +${filesize};" \
  157. "era ${text_base} +${filesize};" \
  158. "cp.b 200000 ${text_base} ${filesize}\0" \
  159. "unlock=yes\0" \
  160. ""
  161. #undef MK_STR
  162. #undef XMK_STR
  163. #define CONFIG_BOOTCOMMAND "run flash_self"
  164. #define CONFIG_SYS_HUSH_PARSER 1 /* use "hush" command parser */
  165. /*
  166. * IPB Bus clocking configuration.
  167. */
  168. #define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
  169. /*
  170. * I2C configuration
  171. */
  172. #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
  173. #define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
  174. #define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
  175. #define CONFIG_SYS_I2C_SLAVE 0x7F
  176. /*
  177. * Flash configuration (8,16 or 32 MB)
  178. * TEXT base always at 0xFFF00000
  179. * ENV_ADDR always at 0xFFF40000
  180. * FLASH_BASE at 0xFC000000 for 64 MB (only 32MB are supported, not enough addr lines!!!)
  181. * 0xFE000000 for 32 MB
  182. * 0xFF000000 for 16 MB
  183. * 0xFF800000 for 8 MB
  184. */
  185. #define CONFIG_SYS_FLASH_BASE 0xfc000000
  186. #define CONFIG_SYS_FLASH_SIZE 0x04000000
  187. #define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */
  188. #define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
  189. #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
  190. #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
  191. #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
  192. #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
  193. #define CONFIG_SYS_FLASH_PROTECTION 1 /* hardware flash protection */
  194. #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
  195. #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
  196. #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
  197. #define CONFIG_SYS_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash */
  198. #define CONFIG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
  199. #define CONFIG_ENV_SECT_SIZE 0x40000 /* size of one complete sector */
  200. #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
  201. #define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
  202. /* Address and size of Redundant Environment Sector */
  203. #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
  204. #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
  205. #define CONFIG_ENV_OVERWRITE 1 /* allow modification of vendor params */
  206. #if CONFIG_SYS_TEXT_BASE == CONFIG_SYS_FLASH_BASE
  207. #define CONFIG_SYS_LOWBOOT 1
  208. #endif
  209. /*
  210. * Memory map
  211. */
  212. #define CONFIG_SYS_MBAR 0xf0000000
  213. #define CONFIG_SYS_SDRAM_BASE 0x00000000
  214. #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
  215. /* Use SRAM until RAM will be available */
  216. #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
  217. #define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */
  218. #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  219. #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
  220. #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
  221. #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
  222. # define CONFIG_SYS_RAMBOOT 1
  223. #endif
  224. #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
  225. #define CONFIG_SYS_MALLOC_LEN (512 << 10) /* Reserve 512 kB for malloc() */
  226. #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
  227. /*
  228. * Ethernet configuration
  229. */
  230. /* #define CONFIG_MPC5xxx_FEC 1 */
  231. /* #define CONFIG_MPC5xxx_FEC_MII100 */
  232. /*
  233. * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
  234. */
  235. /* #define CONFIG_MPC5xxx_FEC_MII10 */
  236. #define CONFIG_PHY_ADDR 1
  237. /*
  238. * LCD Splash Screen
  239. */
  240. #if !defined(CONFIG_PRS200)
  241. #define CONFIG_LCD 1
  242. #define CONFIG_PROGRESSBAR 1
  243. #endif
  244. #if defined(CONFIG_LCD)
  245. #define CONFIG_SPLASH_SCREEN 1
  246. #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
  247. #define LCD_BPP LCD_MONOCHROME
  248. #endif
  249. /*
  250. * GPIO configuration
  251. */
  252. /* 0x10000004 = 32MB SDRAM */
  253. /* 0x90000004 = 64MB SDRAM */
  254. #if defined(CONFIG_LCD)
  255. /* set PSC2 in UART mode */
  256. #define CONFIG_SYS_GPS_PORT_CONFIG 0x00000044
  257. #else
  258. #define CONFIG_SYS_GPS_PORT_CONFIG 0x00000004
  259. #endif
  260. /*
  261. * Miscellaneous configurable options
  262. */
  263. #define CONFIG_SYS_LONGHELP /* undef to save memory */
  264. #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
  265. #if defined(CONFIG_CMD_KGDB)
  266. #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
  267. #else
  268. #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
  269. #endif
  270. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
  271. #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
  272. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
  273. #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
  274. #define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
  275. #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
  276. #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
  277. #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
  278. #if defined(CONFIG_CMD_KGDB)
  279. # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
  280. #endif
  281. /*
  282. * Various low-level settings
  283. */
  284. #define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
  285. #define CONFIG_SYS_HID0_FINAL HID0_ICE
  286. #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
  287. #define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
  288. #define CONFIG_SYS_BOOTCS_CFG 0x0004fb00
  289. #define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
  290. #define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
  291. /* Quad UART @0x80000000 (MBAR is relocated to 0xF0000000) */
  292. #define CONFIG_SYS_CS2_START 0x80000000
  293. #define CONFIG_SYS_CS2_SIZE 0x00001000
  294. #define CONFIG_SYS_CS2_CFG 0x1d300
  295. /* Second Quad UART @0x80010000 */
  296. #define CONFIG_SYS_CS1_START 0x80010000
  297. #define CONFIG_SYS_CS1_SIZE 0x00001000
  298. #define CONFIG_SYS_CS1_CFG 0x1d300
  299. /* Leica - build revision resistors */
  300. /*
  301. #define CONFIG_SYS_CS3_START 0x80020000
  302. #define CONFIG_SYS_CS3_SIZE 0x00000004
  303. #define CONFIG_SYS_CS3_CFG 0x1d300
  304. */
  305. /*
  306. * Select one of quarts as a default
  307. * console. If undefined - PSC console
  308. * wil be default
  309. */
  310. #define CONFIG_SYS_CS_BURST 0x00000000
  311. #define CONFIG_SYS_CS_DEADCYCLE 0x33333333
  312. #define CONFIG_SYS_RESET_ADDRESS 0xff000000
  313. /*
  314. * QUART Expanders support
  315. */
  316. #if defined(CONFIG_QUART_CONSOLE)
  317. /*
  318. * We'll use NS16550 chip routines,
  319. */
  320. #define CONFIG_SYS_NS16550 1
  321. #define CONFIG_SYS_NS16550_SERIAL 1
  322. #define CONFIG_CONS_INDEX 1
  323. /*
  324. * To achieve necessary offset on SC16C554
  325. * A0-A2 (register select) pins with NS16550
  326. * functions (in struct NS16550), REG_SIZE
  327. * should be 4, because A0-A2 pins are connected
  328. * to DA2-DA4 address bus lines.
  329. */
  330. #define CONFIG_SYS_NS16550_REG_SIZE 4
  331. /*
  332. * LocalPlus Bus already inited in cpu_init_f(),
  333. * so can work with QUART's chip selects.
  334. * One of four SC16C554 UARTs is selected with
  335. * A3-A4 (DA5-DA6) lines.
  336. */
  337. #if (CONFIG_QUART_CONSOLE > 0) && (CONFIG_QUART_CONSOLE < 5) && !defined(CONFIG_PRS200)
  338. #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CS2_START | (CONFIG_QUART_CONSOLE - 1)<<5)
  339. #elif (CONFIG_QUART_CONSOLE > 4) && (CONFIG_QUART_CONSOLE < 9)
  340. #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CS1_START | (CONFIG_QUART_CONSOLE - 5)<<5)
  341. #else
  342. #error "Wrong QUART expander number."
  343. #endif
  344. /*
  345. * SC16C554 chip's external crystal oscillator frequency
  346. * is 7.3728 MHz
  347. */
  348. #define CONFIG_SYS_NS16550_CLK 7372800
  349. #endif /* CONFIG_QUART_CONSOLE */
  350. /*-----------------------------------------------------------------------
  351. * USB stuff
  352. *-----------------------------------------------------------------------
  353. */
  354. #define CONFIG_USB_CLOCK 0x0001BBBB
  355. #define CONFIG_USB_CONFIG 0x00005000
  356. #define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */
  357. #define CONFIG_AUTOBOOT_STOP_STR "432"
  358. #define CONFIG_SILENT_CONSOLE 1
  359. #endif /* __CONFIG_H */