/3/2/RAM4K.hdl

 1// This file is part of the materials accompanying the book 
 2// "The Elements of Computing Systems" by Nisan and Schocken, 
 3// MIT Press. Book site: www.idc.ac.il/tecs
 4// File name: projects/03/2/RAM4K.hdl
 5
 6/**
 7 * Memory of 4K registers, each 16-bit wide.  
 8 * The chip facilitates read and write operations, as follows:
 9 *     Read:  out(t) = RAM4K[address(t)](t)
10 *     Write: If load(t-1) then RAM4K[address(t-1)](t) = in(t-1)
11 * In words: the chip always outputs the value stored at the memory 
12 * location specified by address. If load=1, the in value is loaded 
13 * into the memory location specified by address.  This value becomes 
14 * available through the out output starting from the next time step.
15 */
16
17CHIP RAM4K {
18
19    IN  in[16], load, address[12];
20    OUT out[16];
21
22    PARTS:
23    DMux8Way(in=load, sel=address[0..2],
24             a=load0,
25             b=load1,
26             c=load2,
27             d=load3,
28             e=load4,
29             f=load5,
30             g=load6,
31             h=load7);
32
33     RAM512(in=in, load=load0, address=address[3..11], out=out0);
34     RAM512(in=in, load=load1, address=address[3..11], out=out1);
35     RAM512(in=in, load=load2, address=address[3..11], out=out2);
36     RAM512(in=in, load=load3, address=address[3..11], out=out3);
37     RAM512(in=in, load=load4, address=address[3..11], out=out4);
38     RAM512(in=in, load=load5, address=address[3..11], out=out5);
39     RAM512(in=in, load=load6, address=address[3..11], out=out6);
40     RAM512(in=in, load=load7, address=address[3..11], out=out7);
41
42     Mux8Way16(a=out0,
43               b=out1,
44               c=out2,
45               d=out3,
46               e=out4,
47               f=out5,
48               g=out6,
49               h=out7,
50               sel=address[0..2], out=out);
51}