/arch/alpha/include/asm/pgtable.h

http://github.com/mirrors/linux · C Header · 363 lines · 192 code · 63 blank · 108 comment · 7 complexity · fe490970be85f75b6cb781085f3d1b67 MD5 · raw file

  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. #ifndef _ALPHA_PGTABLE_H
  3. #define _ALPHA_PGTABLE_H
  4. #include <asm-generic/pgtable-nopud.h>
  5. /*
  6. * This file contains the functions and defines necessary to modify and use
  7. * the Alpha page table tree.
  8. *
  9. * This hopefully works with any standard Alpha page-size, as defined
  10. * in <asm/page.h> (currently 8192).
  11. */
  12. #include <linux/mmzone.h>
  13. #include <asm/page.h>
  14. #include <asm/processor.h> /* For TASK_SIZE */
  15. #include <asm/machvec.h>
  16. #include <asm/setup.h>
  17. struct mm_struct;
  18. struct vm_area_struct;
  19. /* Certain architectures need to do special things when PTEs
  20. * within a page table are directly modified. Thus, the following
  21. * hook is made available.
  22. */
  23. #define set_pte(pteptr, pteval) ((*(pteptr)) = (pteval))
  24. #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
  25. /* PMD_SHIFT determines the size of the area a second-level page table can map */
  26. #define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-3))
  27. #define PMD_SIZE (1UL << PMD_SHIFT)
  28. #define PMD_MASK (~(PMD_SIZE-1))
  29. /* PGDIR_SHIFT determines what a third-level page table entry can map */
  30. #define PGDIR_SHIFT (PAGE_SHIFT + 2*(PAGE_SHIFT-3))
  31. #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
  32. #define PGDIR_MASK (~(PGDIR_SIZE-1))
  33. /*
  34. * Entries per page directory level: the Alpha is three-level, with
  35. * all levels having a one-page page table.
  36. */
  37. #define PTRS_PER_PTE (1UL << (PAGE_SHIFT-3))
  38. #define PTRS_PER_PMD (1UL << (PAGE_SHIFT-3))
  39. #define PTRS_PER_PGD (1UL << (PAGE_SHIFT-3))
  40. #define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE)
  41. #define FIRST_USER_ADDRESS 0UL
  42. /* Number of pointers that fit on a page: this will go away. */
  43. #define PTRS_PER_PAGE (1UL << (PAGE_SHIFT-3))
  44. #ifdef CONFIG_ALPHA_LARGE_VMALLOC
  45. #define VMALLOC_START 0xfffffe0000000000
  46. #else
  47. #define VMALLOC_START (-2*PGDIR_SIZE)
  48. #endif
  49. #define VMALLOC_END (-PGDIR_SIZE)
  50. /*
  51. * OSF/1 PAL-code-imposed page table bits
  52. */
  53. #define _PAGE_VALID 0x0001
  54. #define _PAGE_FOR 0x0002 /* used for page protection (fault on read) */
  55. #define _PAGE_FOW 0x0004 /* used for page protection (fault on write) */
  56. #define _PAGE_FOE 0x0008 /* used for page protection (fault on exec) */
  57. #define _PAGE_ASM 0x0010
  58. #define _PAGE_KRE 0x0100 /* xxx - see below on the "accessed" bit */
  59. #define _PAGE_URE 0x0200 /* xxx */
  60. #define _PAGE_KWE 0x1000 /* used to do the dirty bit in software */
  61. #define _PAGE_UWE 0x2000 /* used to do the dirty bit in software */
  62. /* .. and these are ours ... */
  63. #define _PAGE_DIRTY 0x20000
  64. #define _PAGE_ACCESSED 0x40000
  65. /*
  66. * NOTE! The "accessed" bit isn't necessarily exact: it can be kept exactly
  67. * by software (use the KRE/URE/KWE/UWE bits appropriately), but I'll fake it.
  68. * Under Linux/AXP, the "accessed" bit just means "read", and I'll just use
  69. * the KRE/URE bits to watch for it. That way we don't need to overload the
  70. * KWE/UWE bits with both handling dirty and accessed.
  71. *
  72. * Note that the kernel uses the accessed bit just to check whether to page
  73. * out a page or not, so it doesn't have to be exact anyway.
  74. */
  75. #define __DIRTY_BITS (_PAGE_DIRTY | _PAGE_KWE | _PAGE_UWE)
  76. #define __ACCESS_BITS (_PAGE_ACCESSED | _PAGE_KRE | _PAGE_URE)
  77. #define _PFN_MASK 0xFFFFFFFF00000000UL
  78. #define _PAGE_TABLE (_PAGE_VALID | __DIRTY_BITS | __ACCESS_BITS)
  79. #define _PAGE_CHG_MASK (_PFN_MASK | __DIRTY_BITS | __ACCESS_BITS)
  80. /*
  81. * All the normal masks have the "page accessed" bits on, as any time they are used,
  82. * the page is accessed. They are cleared only by the page-out routines
  83. */
  84. #define PAGE_NONE __pgprot(_PAGE_VALID | __ACCESS_BITS | _PAGE_FOR | _PAGE_FOW | _PAGE_FOE)
  85. #define PAGE_SHARED __pgprot(_PAGE_VALID | __ACCESS_BITS)
  86. #define PAGE_COPY __pgprot(_PAGE_VALID | __ACCESS_BITS | _PAGE_FOW)
  87. #define PAGE_READONLY __pgprot(_PAGE_VALID | __ACCESS_BITS | _PAGE_FOW)
  88. #define PAGE_KERNEL __pgprot(_PAGE_VALID | _PAGE_ASM | _PAGE_KRE | _PAGE_KWE)
  89. #define _PAGE_NORMAL(x) __pgprot(_PAGE_VALID | __ACCESS_BITS | (x))
  90. #define _PAGE_P(x) _PAGE_NORMAL((x) | (((x) & _PAGE_FOW)?0:_PAGE_FOW))
  91. #define _PAGE_S(x) _PAGE_NORMAL(x)
  92. /*
  93. * The hardware can handle write-only mappings, but as the Alpha
  94. * architecture does byte-wide writes with a read-modify-write
  95. * sequence, it's not practical to have write-without-read privs.
  96. * Thus the "-w- -> rw-" and "-wx -> rwx" mapping here (and in
  97. * arch/alpha/mm/fault.c)
  98. */
  99. /* xwr */
  100. #define __P000 _PAGE_P(_PAGE_FOE | _PAGE_FOW | _PAGE_FOR)
  101. #define __P001 _PAGE_P(_PAGE_FOE | _PAGE_FOW)
  102. #define __P010 _PAGE_P(_PAGE_FOE)
  103. #define __P011 _PAGE_P(_PAGE_FOE)
  104. #define __P100 _PAGE_P(_PAGE_FOW | _PAGE_FOR)
  105. #define __P101 _PAGE_P(_PAGE_FOW)
  106. #define __P110 _PAGE_P(0)
  107. #define __P111 _PAGE_P(0)
  108. #define __S000 _PAGE_S(_PAGE_FOE | _PAGE_FOW | _PAGE_FOR)
  109. #define __S001 _PAGE_S(_PAGE_FOE | _PAGE_FOW)
  110. #define __S010 _PAGE_S(_PAGE_FOE)
  111. #define __S011 _PAGE_S(_PAGE_FOE)
  112. #define __S100 _PAGE_S(_PAGE_FOW | _PAGE_FOR)
  113. #define __S101 _PAGE_S(_PAGE_FOW)
  114. #define __S110 _PAGE_S(0)
  115. #define __S111 _PAGE_S(0)
  116. /*
  117. * pgprot_noncached() is only for infiniband pci support, and a real
  118. * implementation for RAM would be more complicated.
  119. */
  120. #define pgprot_noncached(prot) (prot)
  121. /*
  122. * BAD_PAGETABLE is used when we need a bogus page-table, while
  123. * BAD_PAGE is used for a bogus page.
  124. *
  125. * ZERO_PAGE is a global shared page that is always zero: used
  126. * for zero-mapped memory areas etc..
  127. */
  128. extern pte_t __bad_page(void);
  129. extern pmd_t * __bad_pagetable(void);
  130. extern unsigned long __zero_page(void);
  131. #define BAD_PAGETABLE __bad_pagetable()
  132. #define BAD_PAGE __bad_page()
  133. #define ZERO_PAGE(vaddr) (virt_to_page(ZERO_PGE))
  134. /* number of bits that fit into a memory pointer */
  135. #define BITS_PER_PTR (8*sizeof(unsigned long))
  136. /* to align the pointer to a pointer address */
  137. #define PTR_MASK (~(sizeof(void*)-1))
  138. /* sizeof(void*)==1<<SIZEOF_PTR_LOG2 */
  139. #define SIZEOF_PTR_LOG2 3
  140. /* to find an entry in a page-table */
  141. #define PAGE_PTR(address) \
  142. ((unsigned long)(address)>>(PAGE_SHIFT-SIZEOF_PTR_LOG2)&PTR_MASK&~PAGE_MASK)
  143. /*
  144. * On certain platforms whose physical address space can overlap KSEG,
  145. * namely EV6 and above, we must re-twiddle the physaddr to restore the
  146. * correct high-order bits.
  147. *
  148. * This is extremely confusing until you realize that this is actually
  149. * just working around a userspace bug. The X server was intending to
  150. * provide the physical address but instead provided the KSEG address.
  151. * Or tried to, except it's not representable.
  152. *
  153. * On Tsunami there's nothing meaningful at 0x40000000000, so this is
  154. * a safe thing to do. Come the first core logic that does put something
  155. * in this area -- memory or whathaveyou -- then this hack will have
  156. * to go away. So be prepared!
  157. */
  158. #if defined(CONFIG_ALPHA_GENERIC) && defined(USE_48_BIT_KSEG)
  159. #error "EV6-only feature in a generic kernel"
  160. #endif
  161. #if defined(CONFIG_ALPHA_GENERIC) || \
  162. (defined(CONFIG_ALPHA_EV6) && !defined(USE_48_BIT_KSEG))
  163. #define KSEG_PFN (0xc0000000000UL >> PAGE_SHIFT)
  164. #define PHYS_TWIDDLE(pfn) \
  165. ((((pfn) & KSEG_PFN) == (0x40000000000UL >> PAGE_SHIFT)) \
  166. ? ((pfn) ^= KSEG_PFN) : (pfn))
  167. #else
  168. #define PHYS_TWIDDLE(pfn) (pfn)
  169. #endif
  170. /*
  171. * Conversion functions: convert a page and protection to a page entry,
  172. * and a page entry and page directory to the page they refer to.
  173. */
  174. #ifndef CONFIG_DISCONTIGMEM
  175. #define page_to_pa(page) (((page) - mem_map) << PAGE_SHIFT)
  176. #define pte_pfn(pte) (pte_val(pte) >> 32)
  177. #define pte_page(pte) pfn_to_page(pte_pfn(pte))
  178. #define mk_pte(page, pgprot) \
  179. ({ \
  180. pte_t pte; \
  181. \
  182. pte_val(pte) = (page_to_pfn(page) << 32) | pgprot_val(pgprot); \
  183. pte; \
  184. })
  185. #endif
  186. extern inline pte_t pfn_pte(unsigned long physpfn, pgprot_t pgprot)
  187. { pte_t pte; pte_val(pte) = (PHYS_TWIDDLE(physpfn) << 32) | pgprot_val(pgprot); return pte; }
  188. extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
  189. { pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; }
  190. extern inline void pmd_set(pmd_t * pmdp, pte_t * ptep)
  191. { pmd_val(*pmdp) = _PAGE_TABLE | ((((unsigned long) ptep) - PAGE_OFFSET) << (32-PAGE_SHIFT)); }
  192. extern inline void pud_set(pud_t * pudp, pmd_t * pmdp)
  193. { pud_val(*pudp) = _PAGE_TABLE | ((((unsigned long) pmdp) - PAGE_OFFSET) << (32-PAGE_SHIFT)); }
  194. extern inline unsigned long
  195. pmd_page_vaddr(pmd_t pmd)
  196. {
  197. return ((pmd_val(pmd) & _PFN_MASK) >> (32-PAGE_SHIFT)) + PAGE_OFFSET;
  198. }
  199. #ifndef CONFIG_DISCONTIGMEM
  200. #define pmd_page(pmd) (mem_map + ((pmd_val(pmd) & _PFN_MASK) >> 32))
  201. #define pud_page(pud) (mem_map + ((pud_val(pud) & _PFN_MASK) >> 32))
  202. #endif
  203. extern inline unsigned long pud_page_vaddr(pud_t pgd)
  204. { return PAGE_OFFSET + ((pud_val(pgd) & _PFN_MASK) >> (32-PAGE_SHIFT)); }
  205. extern inline int pte_none(pte_t pte) { return !pte_val(pte); }
  206. extern inline int pte_present(pte_t pte) { return pte_val(pte) & _PAGE_VALID; }
  207. extern inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
  208. {
  209. pte_val(*ptep) = 0;
  210. }
  211. extern inline int pmd_none(pmd_t pmd) { return !pmd_val(pmd); }
  212. extern inline int pmd_bad(pmd_t pmd) { return (pmd_val(pmd) & ~_PFN_MASK) != _PAGE_TABLE; }
  213. extern inline int pmd_present(pmd_t pmd) { return pmd_val(pmd) & _PAGE_VALID; }
  214. extern inline void pmd_clear(pmd_t * pmdp) { pmd_val(*pmdp) = 0; }
  215. extern inline int pud_none(pud_t pud) { return !pud_val(pud); }
  216. extern inline int pud_bad(pud_t pud) { return (pud_val(pud) & ~_PFN_MASK) != _PAGE_TABLE; }
  217. extern inline int pud_present(pud_t pud) { return pud_val(pud) & _PAGE_VALID; }
  218. extern inline void pud_clear(pud_t * pudp) { pud_val(*pudp) = 0; }
  219. /*
  220. * The following only work if pte_present() is true.
  221. * Undefined behaviour if not..
  222. */
  223. extern inline int pte_write(pte_t pte) { return !(pte_val(pte) & _PAGE_FOW); }
  224. extern inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
  225. extern inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
  226. extern inline pte_t pte_wrprotect(pte_t pte) { pte_val(pte) |= _PAGE_FOW; return pte; }
  227. extern inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) &= ~(__DIRTY_BITS); return pte; }
  228. extern inline pte_t pte_mkold(pte_t pte) { pte_val(pte) &= ~(__ACCESS_BITS); return pte; }
  229. extern inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) &= ~_PAGE_FOW; return pte; }
  230. extern inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) |= __DIRTY_BITS; return pte; }
  231. extern inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) |= __ACCESS_BITS; return pte; }
  232. #define PAGE_DIR_OFFSET(tsk,address) pgd_offset((tsk),(address))
  233. /* to find an entry in a kernel page-table-directory */
  234. #define pgd_offset_k(address) pgd_offset(&init_mm, (address))
  235. /* to find an entry in a page-table-directory. */
  236. #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
  237. #define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
  238. /*
  239. * The smp_read_barrier_depends() in the following functions are required to
  240. * order the load of *dir (the pointer in the top level page table) with any
  241. * subsequent load of the returned pmd_t *ret (ret is data dependent on *dir).
  242. *
  243. * If this ordering is not enforced, the CPU might load an older value of
  244. * *ret, which may be uninitialized data. See mm/memory.c:__pte_alloc for
  245. * more details.
  246. *
  247. * Note that we never change the mm->pgd pointer after the task is running, so
  248. * pgd_offset does not require such a barrier.
  249. */
  250. /* Find an entry in the second-level page table.. */
  251. extern inline pmd_t * pmd_offset(pud_t * dir, unsigned long address)
  252. {
  253. pmd_t *ret = (pmd_t *) pud_page_vaddr(*dir) + ((address >> PMD_SHIFT) & (PTRS_PER_PAGE - 1));
  254. smp_read_barrier_depends(); /* see above */
  255. return ret;
  256. }
  257. /* Find an entry in the third-level page table.. */
  258. extern inline pte_t * pte_offset_kernel(pmd_t * dir, unsigned long address)
  259. {
  260. pte_t *ret = (pte_t *) pmd_page_vaddr(*dir)
  261. + ((address >> PAGE_SHIFT) & (PTRS_PER_PAGE - 1));
  262. smp_read_barrier_depends(); /* see above */
  263. return ret;
  264. }
  265. #define pte_offset_map(dir,addr) pte_offset_kernel((dir),(addr))
  266. #define pte_unmap(pte) do { } while (0)
  267. extern pgd_t swapper_pg_dir[1024];
  268. /*
  269. * The Alpha doesn't have any external MMU info: the kernel page
  270. * tables contain all the necessary information.
  271. */
  272. extern inline void update_mmu_cache(struct vm_area_struct * vma,
  273. unsigned long address, pte_t *ptep)
  274. {
  275. }
  276. /*
  277. * Non-present pages: high 24 bits are offset, next 8 bits type,
  278. * low 32 bits zero.
  279. */
  280. extern inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
  281. { pte_t pte; pte_val(pte) = (type << 32) | (offset << 40); return pte; }
  282. #define __swp_type(x) (((x).val >> 32) & 0xff)
  283. #define __swp_offset(x) ((x).val >> 40)
  284. #define __swp_entry(type, off) ((swp_entry_t) { pte_val(mk_swap_pte((type), (off))) })
  285. #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
  286. #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
  287. #ifndef CONFIG_DISCONTIGMEM
  288. #define kern_addr_valid(addr) (1)
  289. #endif
  290. #define pte_ERROR(e) \
  291. printk("%s:%d: bad pte %016lx.\n", __FILE__, __LINE__, pte_val(e))
  292. #define pmd_ERROR(e) \
  293. printk("%s:%d: bad pmd %016lx.\n", __FILE__, __LINE__, pmd_val(e))
  294. #define pgd_ERROR(e) \
  295. printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e))
  296. extern void paging_init(void);
  297. #include <asm-generic/pgtable.h>
  298. /* We have our own get_unmapped_area to cope with ADDR_LIMIT_32BIT. */
  299. #define HAVE_ARCH_UNMAPPED_AREA
  300. #endif /* _ALPHA_PGTABLE_H */