/arch/mips/kernel/asm-offsets.c

http://github.com/mirrors/linux · C · 405 lines · 372 code · 22 blank · 11 comment · 0 complexity · ac4010d2e6a7261a8e9225186821778f MD5 · raw file

  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * asm-offsets.c: Calculate pt_regs and task_struct offsets.
  4. *
  5. * Copyright (C) 1996 David S. Miller
  6. * Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003 Ralf Baechle
  7. * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
  8. *
  9. * Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
  10. * Copyright (C) 2000 MIPS Technologies, Inc.
  11. */
  12. #include <linux/compat.h>
  13. #include <linux/types.h>
  14. #include <linux/sched.h>
  15. #include <linux/mm.h>
  16. #include <linux/kbuild.h>
  17. #include <linux/suspend.h>
  18. #include <asm/cpu-info.h>
  19. #include <asm/pm.h>
  20. #include <asm/ptrace.h>
  21. #include <asm/processor.h>
  22. #include <asm/smp-cps.h>
  23. #include <linux/kvm_host.h>
  24. void output_ptreg_defines(void)
  25. {
  26. COMMENT("MIPS pt_regs offsets.");
  27. OFFSET(PT_R0, pt_regs, regs[0]);
  28. OFFSET(PT_R1, pt_regs, regs[1]);
  29. OFFSET(PT_R2, pt_regs, regs[2]);
  30. OFFSET(PT_R3, pt_regs, regs[3]);
  31. OFFSET(PT_R4, pt_regs, regs[4]);
  32. OFFSET(PT_R5, pt_regs, regs[5]);
  33. OFFSET(PT_R6, pt_regs, regs[6]);
  34. OFFSET(PT_R7, pt_regs, regs[7]);
  35. OFFSET(PT_R8, pt_regs, regs[8]);
  36. OFFSET(PT_R9, pt_regs, regs[9]);
  37. OFFSET(PT_R10, pt_regs, regs[10]);
  38. OFFSET(PT_R11, pt_regs, regs[11]);
  39. OFFSET(PT_R12, pt_regs, regs[12]);
  40. OFFSET(PT_R13, pt_regs, regs[13]);
  41. OFFSET(PT_R14, pt_regs, regs[14]);
  42. OFFSET(PT_R15, pt_regs, regs[15]);
  43. OFFSET(PT_R16, pt_regs, regs[16]);
  44. OFFSET(PT_R17, pt_regs, regs[17]);
  45. OFFSET(PT_R18, pt_regs, regs[18]);
  46. OFFSET(PT_R19, pt_regs, regs[19]);
  47. OFFSET(PT_R20, pt_regs, regs[20]);
  48. OFFSET(PT_R21, pt_regs, regs[21]);
  49. OFFSET(PT_R22, pt_regs, regs[22]);
  50. OFFSET(PT_R23, pt_regs, regs[23]);
  51. OFFSET(PT_R24, pt_regs, regs[24]);
  52. OFFSET(PT_R25, pt_regs, regs[25]);
  53. OFFSET(PT_R26, pt_regs, regs[26]);
  54. OFFSET(PT_R27, pt_regs, regs[27]);
  55. OFFSET(PT_R28, pt_regs, regs[28]);
  56. OFFSET(PT_R29, pt_regs, regs[29]);
  57. OFFSET(PT_R30, pt_regs, regs[30]);
  58. OFFSET(PT_R31, pt_regs, regs[31]);
  59. OFFSET(PT_LO, pt_regs, lo);
  60. OFFSET(PT_HI, pt_regs, hi);
  61. #ifdef CONFIG_CPU_HAS_SMARTMIPS
  62. OFFSET(PT_ACX, pt_regs, acx);
  63. #endif
  64. OFFSET(PT_EPC, pt_regs, cp0_epc);
  65. OFFSET(PT_BVADDR, pt_regs, cp0_badvaddr);
  66. OFFSET(PT_STATUS, pt_regs, cp0_status);
  67. OFFSET(PT_CAUSE, pt_regs, cp0_cause);
  68. #ifdef CONFIG_CPU_CAVIUM_OCTEON
  69. OFFSET(PT_MPL, pt_regs, mpl);
  70. OFFSET(PT_MTP, pt_regs, mtp);
  71. #endif /* CONFIG_CPU_CAVIUM_OCTEON */
  72. DEFINE(PT_SIZE, sizeof(struct pt_regs));
  73. BLANK();
  74. }
  75. void output_task_defines(void)
  76. {
  77. COMMENT("MIPS task_struct offsets.");
  78. OFFSET(TASK_STATE, task_struct, state);
  79. OFFSET(TASK_THREAD_INFO, task_struct, stack);
  80. OFFSET(TASK_FLAGS, task_struct, flags);
  81. OFFSET(TASK_MM, task_struct, mm);
  82. OFFSET(TASK_PID, task_struct, pid);
  83. #if defined(CONFIG_STACKPROTECTOR)
  84. OFFSET(TASK_STACK_CANARY, task_struct, stack_canary);
  85. #endif
  86. DEFINE(TASK_STRUCT_SIZE, sizeof(struct task_struct));
  87. BLANK();
  88. }
  89. void output_thread_info_defines(void)
  90. {
  91. COMMENT("MIPS thread_info offsets.");
  92. OFFSET(TI_TASK, thread_info, task);
  93. OFFSET(TI_FLAGS, thread_info, flags);
  94. OFFSET(TI_TP_VALUE, thread_info, tp_value);
  95. OFFSET(TI_CPU, thread_info, cpu);
  96. OFFSET(TI_PRE_COUNT, thread_info, preempt_count);
  97. OFFSET(TI_ADDR_LIMIT, thread_info, addr_limit);
  98. OFFSET(TI_REGS, thread_info, regs);
  99. DEFINE(_THREAD_SIZE, THREAD_SIZE);
  100. DEFINE(_THREAD_MASK, THREAD_MASK);
  101. DEFINE(_IRQ_STACK_SIZE, IRQ_STACK_SIZE);
  102. DEFINE(_IRQ_STACK_START, IRQ_STACK_START);
  103. BLANK();
  104. }
  105. void output_thread_defines(void)
  106. {
  107. COMMENT("MIPS specific thread_struct offsets.");
  108. OFFSET(THREAD_REG16, task_struct, thread.reg16);
  109. OFFSET(THREAD_REG17, task_struct, thread.reg17);
  110. OFFSET(THREAD_REG18, task_struct, thread.reg18);
  111. OFFSET(THREAD_REG19, task_struct, thread.reg19);
  112. OFFSET(THREAD_REG20, task_struct, thread.reg20);
  113. OFFSET(THREAD_REG21, task_struct, thread.reg21);
  114. OFFSET(THREAD_REG22, task_struct, thread.reg22);
  115. OFFSET(THREAD_REG23, task_struct, thread.reg23);
  116. OFFSET(THREAD_REG29, task_struct, thread.reg29);
  117. OFFSET(THREAD_REG30, task_struct, thread.reg30);
  118. OFFSET(THREAD_REG31, task_struct, thread.reg31);
  119. OFFSET(THREAD_STATUS, task_struct,
  120. thread.cp0_status);
  121. OFFSET(THREAD_BVADDR, task_struct, \
  122. thread.cp0_badvaddr);
  123. OFFSET(THREAD_BUADDR, task_struct, \
  124. thread.cp0_baduaddr);
  125. OFFSET(THREAD_ECODE, task_struct, \
  126. thread.error_code);
  127. OFFSET(THREAD_TRAPNO, task_struct, thread.trap_nr);
  128. BLANK();
  129. }
  130. #ifdef CONFIG_MIPS_FP_SUPPORT
  131. void output_thread_fpu_defines(void)
  132. {
  133. OFFSET(THREAD_FPU, task_struct, thread.fpu);
  134. OFFSET(THREAD_FPR0, task_struct, thread.fpu.fpr[0]);
  135. OFFSET(THREAD_FPR1, task_struct, thread.fpu.fpr[1]);
  136. OFFSET(THREAD_FPR2, task_struct, thread.fpu.fpr[2]);
  137. OFFSET(THREAD_FPR3, task_struct, thread.fpu.fpr[3]);
  138. OFFSET(THREAD_FPR4, task_struct, thread.fpu.fpr[4]);
  139. OFFSET(THREAD_FPR5, task_struct, thread.fpu.fpr[5]);
  140. OFFSET(THREAD_FPR6, task_struct, thread.fpu.fpr[6]);
  141. OFFSET(THREAD_FPR7, task_struct, thread.fpu.fpr[7]);
  142. OFFSET(THREAD_FPR8, task_struct, thread.fpu.fpr[8]);
  143. OFFSET(THREAD_FPR9, task_struct, thread.fpu.fpr[9]);
  144. OFFSET(THREAD_FPR10, task_struct, thread.fpu.fpr[10]);
  145. OFFSET(THREAD_FPR11, task_struct, thread.fpu.fpr[11]);
  146. OFFSET(THREAD_FPR12, task_struct, thread.fpu.fpr[12]);
  147. OFFSET(THREAD_FPR13, task_struct, thread.fpu.fpr[13]);
  148. OFFSET(THREAD_FPR14, task_struct, thread.fpu.fpr[14]);
  149. OFFSET(THREAD_FPR15, task_struct, thread.fpu.fpr[15]);
  150. OFFSET(THREAD_FPR16, task_struct, thread.fpu.fpr[16]);
  151. OFFSET(THREAD_FPR17, task_struct, thread.fpu.fpr[17]);
  152. OFFSET(THREAD_FPR18, task_struct, thread.fpu.fpr[18]);
  153. OFFSET(THREAD_FPR19, task_struct, thread.fpu.fpr[19]);
  154. OFFSET(THREAD_FPR20, task_struct, thread.fpu.fpr[20]);
  155. OFFSET(THREAD_FPR21, task_struct, thread.fpu.fpr[21]);
  156. OFFSET(THREAD_FPR22, task_struct, thread.fpu.fpr[22]);
  157. OFFSET(THREAD_FPR23, task_struct, thread.fpu.fpr[23]);
  158. OFFSET(THREAD_FPR24, task_struct, thread.fpu.fpr[24]);
  159. OFFSET(THREAD_FPR25, task_struct, thread.fpu.fpr[25]);
  160. OFFSET(THREAD_FPR26, task_struct, thread.fpu.fpr[26]);
  161. OFFSET(THREAD_FPR27, task_struct, thread.fpu.fpr[27]);
  162. OFFSET(THREAD_FPR28, task_struct, thread.fpu.fpr[28]);
  163. OFFSET(THREAD_FPR29, task_struct, thread.fpu.fpr[29]);
  164. OFFSET(THREAD_FPR30, task_struct, thread.fpu.fpr[30]);
  165. OFFSET(THREAD_FPR31, task_struct, thread.fpu.fpr[31]);
  166. OFFSET(THREAD_FCR31, task_struct, thread.fpu.fcr31);
  167. OFFSET(THREAD_MSA_CSR, task_struct, thread.fpu.msacsr);
  168. BLANK();
  169. }
  170. #endif
  171. void output_mm_defines(void)
  172. {
  173. COMMENT("Size of struct page");
  174. DEFINE(STRUCT_PAGE_SIZE, sizeof(struct page));
  175. BLANK();
  176. COMMENT("Linux mm_struct offsets.");
  177. OFFSET(MM_USERS, mm_struct, mm_users);
  178. OFFSET(MM_PGD, mm_struct, pgd);
  179. OFFSET(MM_CONTEXT, mm_struct, context);
  180. BLANK();
  181. DEFINE(_PGD_T_SIZE, sizeof(pgd_t));
  182. DEFINE(_PMD_T_SIZE, sizeof(pmd_t));
  183. DEFINE(_PTE_T_SIZE, sizeof(pte_t));
  184. BLANK();
  185. DEFINE(_PGD_T_LOG2, PGD_T_LOG2);
  186. #ifndef __PAGETABLE_PMD_FOLDED
  187. DEFINE(_PMD_T_LOG2, PMD_T_LOG2);
  188. #endif
  189. DEFINE(_PTE_T_LOG2, PTE_T_LOG2);
  190. BLANK();
  191. DEFINE(_PGD_ORDER, PGD_ORDER);
  192. #ifndef __PAGETABLE_PMD_FOLDED
  193. DEFINE(_PMD_ORDER, PMD_ORDER);
  194. #endif
  195. DEFINE(_PTE_ORDER, PTE_ORDER);
  196. BLANK();
  197. DEFINE(_PMD_SHIFT, PMD_SHIFT);
  198. DEFINE(_PGDIR_SHIFT, PGDIR_SHIFT);
  199. BLANK();
  200. DEFINE(_PTRS_PER_PGD, PTRS_PER_PGD);
  201. DEFINE(_PTRS_PER_PMD, PTRS_PER_PMD);
  202. DEFINE(_PTRS_PER_PTE, PTRS_PER_PTE);
  203. BLANK();
  204. DEFINE(_PAGE_SHIFT, PAGE_SHIFT);
  205. DEFINE(_PAGE_SIZE, PAGE_SIZE);
  206. BLANK();
  207. }
  208. #ifdef CONFIG_32BIT
  209. void output_sc_defines(void)
  210. {
  211. COMMENT("Linux sigcontext offsets.");
  212. OFFSET(SC_REGS, sigcontext, sc_regs);
  213. OFFSET(SC_FPREGS, sigcontext, sc_fpregs);
  214. OFFSET(SC_ACX, sigcontext, sc_acx);
  215. OFFSET(SC_MDHI, sigcontext, sc_mdhi);
  216. OFFSET(SC_MDLO, sigcontext, sc_mdlo);
  217. OFFSET(SC_PC, sigcontext, sc_pc);
  218. OFFSET(SC_FPC_CSR, sigcontext, sc_fpc_csr);
  219. OFFSET(SC_FPC_EIR, sigcontext, sc_fpc_eir);
  220. OFFSET(SC_HI1, sigcontext, sc_hi1);
  221. OFFSET(SC_LO1, sigcontext, sc_lo1);
  222. OFFSET(SC_HI2, sigcontext, sc_hi2);
  223. OFFSET(SC_LO2, sigcontext, sc_lo2);
  224. OFFSET(SC_HI3, sigcontext, sc_hi3);
  225. OFFSET(SC_LO3, sigcontext, sc_lo3);
  226. BLANK();
  227. }
  228. #endif
  229. #ifdef CONFIG_64BIT
  230. void output_sc_defines(void)
  231. {
  232. COMMENT("Linux sigcontext offsets.");
  233. OFFSET(SC_REGS, sigcontext, sc_regs);
  234. OFFSET(SC_FPREGS, sigcontext, sc_fpregs);
  235. OFFSET(SC_MDHI, sigcontext, sc_mdhi);
  236. OFFSET(SC_MDLO, sigcontext, sc_mdlo);
  237. OFFSET(SC_PC, sigcontext, sc_pc);
  238. OFFSET(SC_FPC_CSR, sigcontext, sc_fpc_csr);
  239. BLANK();
  240. }
  241. #endif
  242. void output_signal_defined(void)
  243. {
  244. COMMENT("Linux signal numbers.");
  245. DEFINE(_SIGHUP, SIGHUP);
  246. DEFINE(_SIGINT, SIGINT);
  247. DEFINE(_SIGQUIT, SIGQUIT);
  248. DEFINE(_SIGILL, SIGILL);
  249. DEFINE(_SIGTRAP, SIGTRAP);
  250. DEFINE(_SIGIOT, SIGIOT);
  251. DEFINE(_SIGABRT, SIGABRT);
  252. DEFINE(_SIGEMT, SIGEMT);
  253. DEFINE(_SIGFPE, SIGFPE);
  254. DEFINE(_SIGKILL, SIGKILL);
  255. DEFINE(_SIGBUS, SIGBUS);
  256. DEFINE(_SIGSEGV, SIGSEGV);
  257. DEFINE(_SIGSYS, SIGSYS);
  258. DEFINE(_SIGPIPE, SIGPIPE);
  259. DEFINE(_SIGALRM, SIGALRM);
  260. DEFINE(_SIGTERM, SIGTERM);
  261. DEFINE(_SIGUSR1, SIGUSR1);
  262. DEFINE(_SIGUSR2, SIGUSR2);
  263. DEFINE(_SIGCHLD, SIGCHLD);
  264. DEFINE(_SIGPWR, SIGPWR);
  265. DEFINE(_SIGWINCH, SIGWINCH);
  266. DEFINE(_SIGURG, SIGURG);
  267. DEFINE(_SIGIO, SIGIO);
  268. DEFINE(_SIGSTOP, SIGSTOP);
  269. DEFINE(_SIGTSTP, SIGTSTP);
  270. DEFINE(_SIGCONT, SIGCONT);
  271. DEFINE(_SIGTTIN, SIGTTIN);
  272. DEFINE(_SIGTTOU, SIGTTOU);
  273. DEFINE(_SIGVTALRM, SIGVTALRM);
  274. DEFINE(_SIGPROF, SIGPROF);
  275. DEFINE(_SIGXCPU, SIGXCPU);
  276. DEFINE(_SIGXFSZ, SIGXFSZ);
  277. BLANK();
  278. }
  279. #ifdef CONFIG_CPU_CAVIUM_OCTEON
  280. void output_octeon_cop2_state_defines(void)
  281. {
  282. COMMENT("Octeon specific octeon_cop2_state offsets.");
  283. OFFSET(OCTEON_CP2_CRC_IV, octeon_cop2_state, cop2_crc_iv);
  284. OFFSET(OCTEON_CP2_CRC_LENGTH, octeon_cop2_state, cop2_crc_length);
  285. OFFSET(OCTEON_CP2_CRC_POLY, octeon_cop2_state, cop2_crc_poly);
  286. OFFSET(OCTEON_CP2_LLM_DAT, octeon_cop2_state, cop2_llm_dat);
  287. OFFSET(OCTEON_CP2_3DES_IV, octeon_cop2_state, cop2_3des_iv);
  288. OFFSET(OCTEON_CP2_3DES_KEY, octeon_cop2_state, cop2_3des_key);
  289. OFFSET(OCTEON_CP2_3DES_RESULT, octeon_cop2_state, cop2_3des_result);
  290. OFFSET(OCTEON_CP2_AES_INP0, octeon_cop2_state, cop2_aes_inp0);
  291. OFFSET(OCTEON_CP2_AES_IV, octeon_cop2_state, cop2_aes_iv);
  292. OFFSET(OCTEON_CP2_AES_KEY, octeon_cop2_state, cop2_aes_key);
  293. OFFSET(OCTEON_CP2_AES_KEYLEN, octeon_cop2_state, cop2_aes_keylen);
  294. OFFSET(OCTEON_CP2_AES_RESULT, octeon_cop2_state, cop2_aes_result);
  295. OFFSET(OCTEON_CP2_GFM_MULT, octeon_cop2_state, cop2_gfm_mult);
  296. OFFSET(OCTEON_CP2_GFM_POLY, octeon_cop2_state, cop2_gfm_poly);
  297. OFFSET(OCTEON_CP2_GFM_RESULT, octeon_cop2_state, cop2_gfm_result);
  298. OFFSET(OCTEON_CP2_HSH_DATW, octeon_cop2_state, cop2_hsh_datw);
  299. OFFSET(OCTEON_CP2_HSH_IVW, octeon_cop2_state, cop2_hsh_ivw);
  300. OFFSET(OCTEON_CP2_SHA3, octeon_cop2_state, cop2_sha3);
  301. OFFSET(THREAD_CP2, task_struct, thread.cp2);
  302. OFFSET(THREAD_CVMSEG, task_struct, thread.cvmseg.cvmseg);
  303. BLANK();
  304. }
  305. #endif
  306. #ifdef CONFIG_HIBERNATION
  307. void output_pbe_defines(void)
  308. {
  309. COMMENT(" Linux struct pbe offsets. ");
  310. OFFSET(PBE_ADDRESS, pbe, address);
  311. OFFSET(PBE_ORIG_ADDRESS, pbe, orig_address);
  312. OFFSET(PBE_NEXT, pbe, next);
  313. DEFINE(PBE_SIZE, sizeof(struct pbe));
  314. BLANK();
  315. }
  316. #endif
  317. #ifdef CONFIG_CPU_PM
  318. void output_pm_defines(void)
  319. {
  320. COMMENT(" PM offsets. ");
  321. #ifdef CONFIG_EVA
  322. OFFSET(SSS_SEGCTL0, mips_static_suspend_state, segctl[0]);
  323. OFFSET(SSS_SEGCTL1, mips_static_suspend_state, segctl[1]);
  324. OFFSET(SSS_SEGCTL2, mips_static_suspend_state, segctl[2]);
  325. #endif
  326. OFFSET(SSS_SP, mips_static_suspend_state, sp);
  327. BLANK();
  328. }
  329. #endif
  330. #ifdef CONFIG_MIPS_FP_SUPPORT
  331. void output_kvm_defines(void)
  332. {
  333. COMMENT(" KVM/MIPS Specific offsets. ");
  334. OFFSET(VCPU_FPR0, kvm_vcpu_arch, fpu.fpr[0]);
  335. OFFSET(VCPU_FPR1, kvm_vcpu_arch, fpu.fpr[1]);
  336. OFFSET(VCPU_FPR2, kvm_vcpu_arch, fpu.fpr[2]);
  337. OFFSET(VCPU_FPR3, kvm_vcpu_arch, fpu.fpr[3]);
  338. OFFSET(VCPU_FPR4, kvm_vcpu_arch, fpu.fpr[4]);
  339. OFFSET(VCPU_FPR5, kvm_vcpu_arch, fpu.fpr[5]);
  340. OFFSET(VCPU_FPR6, kvm_vcpu_arch, fpu.fpr[6]);
  341. OFFSET(VCPU_FPR7, kvm_vcpu_arch, fpu.fpr[7]);
  342. OFFSET(VCPU_FPR8, kvm_vcpu_arch, fpu.fpr[8]);
  343. OFFSET(VCPU_FPR9, kvm_vcpu_arch, fpu.fpr[9]);
  344. OFFSET(VCPU_FPR10, kvm_vcpu_arch, fpu.fpr[10]);
  345. OFFSET(VCPU_FPR11, kvm_vcpu_arch, fpu.fpr[11]);
  346. OFFSET(VCPU_FPR12, kvm_vcpu_arch, fpu.fpr[12]);
  347. OFFSET(VCPU_FPR13, kvm_vcpu_arch, fpu.fpr[13]);
  348. OFFSET(VCPU_FPR14, kvm_vcpu_arch, fpu.fpr[14]);
  349. OFFSET(VCPU_FPR15, kvm_vcpu_arch, fpu.fpr[15]);
  350. OFFSET(VCPU_FPR16, kvm_vcpu_arch, fpu.fpr[16]);
  351. OFFSET(VCPU_FPR17, kvm_vcpu_arch, fpu.fpr[17]);
  352. OFFSET(VCPU_FPR18, kvm_vcpu_arch, fpu.fpr[18]);
  353. OFFSET(VCPU_FPR19, kvm_vcpu_arch, fpu.fpr[19]);
  354. OFFSET(VCPU_FPR20, kvm_vcpu_arch, fpu.fpr[20]);
  355. OFFSET(VCPU_FPR21, kvm_vcpu_arch, fpu.fpr[21]);
  356. OFFSET(VCPU_FPR22, kvm_vcpu_arch, fpu.fpr[22]);
  357. OFFSET(VCPU_FPR23, kvm_vcpu_arch, fpu.fpr[23]);
  358. OFFSET(VCPU_FPR24, kvm_vcpu_arch, fpu.fpr[24]);
  359. OFFSET(VCPU_FPR25, kvm_vcpu_arch, fpu.fpr[25]);
  360. OFFSET(VCPU_FPR26, kvm_vcpu_arch, fpu.fpr[26]);
  361. OFFSET(VCPU_FPR27, kvm_vcpu_arch, fpu.fpr[27]);
  362. OFFSET(VCPU_FPR28, kvm_vcpu_arch, fpu.fpr[28]);
  363. OFFSET(VCPU_FPR29, kvm_vcpu_arch, fpu.fpr[29]);
  364. OFFSET(VCPU_FPR30, kvm_vcpu_arch, fpu.fpr[30]);
  365. OFFSET(VCPU_FPR31, kvm_vcpu_arch, fpu.fpr[31]);
  366. OFFSET(VCPU_FCR31, kvm_vcpu_arch, fpu.fcr31);
  367. OFFSET(VCPU_MSA_CSR, kvm_vcpu_arch, fpu.msacsr);
  368. BLANK();
  369. }
  370. #endif
  371. #ifdef CONFIG_MIPS_CPS
  372. void output_cps_defines(void)
  373. {
  374. COMMENT(" MIPS CPS offsets. ");
  375. OFFSET(COREBOOTCFG_VPEMASK, core_boot_config, vpe_mask);
  376. OFFSET(COREBOOTCFG_VPECONFIG, core_boot_config, vpe_config);
  377. DEFINE(COREBOOTCFG_SIZE, sizeof(struct core_boot_config));
  378. OFFSET(VPEBOOTCFG_PC, vpe_boot_config, pc);
  379. OFFSET(VPEBOOTCFG_SP, vpe_boot_config, sp);
  380. OFFSET(VPEBOOTCFG_GP, vpe_boot_config, gp);
  381. DEFINE(VPEBOOTCFG_SIZE, sizeof(struct vpe_boot_config));
  382. }
  383. #endif