/arch/mips/include/asm/fpu_emulator.h

http://github.com/mirrors/linux · C Header · 191 lines · 166 code · 10 blank · 15 comment · 2 complexity · 3136026f241e1322fe76b39d933306ec MD5 · raw file 

    

  1. /* SPDX-License-Identifier: GPL-2.0-only */
    2. 

  2. /*
    3. 

  3.  *
    4. 

  4.  * Further private data for which no space exists in mips_fpu_struct.
    5. 

  5.  * This should be subsumed into the mips_fpu_struct structure as
    6. 

  6.  * defined in processor.h as soon as the absurd wired absolute assembler
    7. 

  7.  * offsets become dynamic at compile time.
    8. 

  8.  *
    9. 

  9.  * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
    10. 

  10.  * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
    11. 

  11.  */
    12. 

  12. #ifndef _ASM_FPU_EMULATOR_H
    13. 

  13. #define _ASM_FPU_EMULATOR_H
    14. 

  14. 

  15. #include <linux/sched.h>
    16. 

  16. #include <asm/dsemul.h>
    17. 

  17. #include <asm/thread_info.h>
    18. 

  18. #include <asm/inst.h>
    19. 

  19. #include <asm/local.h>
    20. 

  20. #include <asm/processor.h>
    21. 

  21. 

  22. #ifdef CONFIG_DEBUG_FS
    23. 

  23. 

  24. struct mips_fpu_emulator_stats {
    25. 

  25. 	unsigned long emulated;
    26. 

  26. 	unsigned long loads;
    27. 

  27. 	unsigned long stores;
    28. 

  28. 	unsigned long branches;
    29. 

  29. 	unsigned long cp1ops;
    30. 

  30. 	unsigned long cp1xops;
    31. 

  31. 	unsigned long errors;
    32. 

  32. 	unsigned long ieee754_inexact;
    33. 

  33. 	unsigned long ieee754_underflow;
    34. 

  34. 	unsigned long ieee754_overflow;
    35. 

  35. 	unsigned long ieee754_zerodiv;
    36. 

  36. 	unsigned long ieee754_invalidop;
    37. 

  37. 	unsigned long ds_emul;
    38. 

  38. 

  39. 	unsigned long abs_s;
    40. 

  40. 	unsigned long abs_d;
    41. 

  41. 	unsigned long add_s;
    42. 

  42. 	unsigned long add_d;
    43. 

  43. 	unsigned long bc1eqz;
    44. 

  44. 	unsigned long bc1nez;
    45. 

  45. 	unsigned long ceil_w_s;
    46. 

  46. 	unsigned long ceil_w_d;
    47. 

  47. 	unsigned long ceil_l_s;
    48. 

  48. 	unsigned long ceil_l_d;
    49. 

  49. 	unsigned long class_s;
    50. 

  50. 	unsigned long class_d;
    51. 

  51. 	unsigned long cmp_af_s;
    52. 

  52. 	unsigned long cmp_af_d;
    53. 

  53. 	unsigned long cmp_eq_s;
    54. 

  54. 	unsigned long cmp_eq_d;
    55. 

  55. 	unsigned long cmp_le_s;
    56. 

  56. 	unsigned long cmp_le_d;
    57. 

  57. 	unsigned long cmp_lt_s;
    58. 

  58. 	unsigned long cmp_lt_d;
    59. 

  59. 	unsigned long cmp_ne_s;
    60. 

  60. 	unsigned long cmp_ne_d;
    61. 

  61. 	unsigned long cmp_or_s;
    62. 

  62. 	unsigned long cmp_or_d;
    63. 

  63. 	unsigned long cmp_ueq_s;
    64. 

  64. 	unsigned long cmp_ueq_d;
    65. 

  65. 	unsigned long cmp_ule_s;
    66. 

  66. 	unsigned long cmp_ule_d;
    67. 

  67. 	unsigned long cmp_ult_s;
    68. 

  68. 	unsigned long cmp_ult_d;
    69. 

  69. 	unsigned long cmp_un_s;
    70. 

  70. 	unsigned long cmp_un_d;
    71. 

  71. 	unsigned long cmp_une_s;
    72. 

  72. 	unsigned long cmp_une_d;
    73. 

  73. 	unsigned long cmp_saf_s;
    74. 

  74. 	unsigned long cmp_saf_d;
    75. 

  75. 	unsigned long cmp_seq_s;
    76. 

  76. 	unsigned long cmp_seq_d;
    77. 

  77. 	unsigned long cmp_sle_s;
    78. 

  78. 	unsigned long cmp_sle_d;
    79. 

  79. 	unsigned long cmp_slt_s;
    80. 

  80. 	unsigned long cmp_slt_d;
    81. 

  81. 	unsigned long cmp_sne_s;
    82. 

  82. 	unsigned long cmp_sne_d;
    83. 

  83. 	unsigned long cmp_sor_s;
    84. 

  84. 	unsigned long cmp_sor_d;
    85. 

  85. 	unsigned long cmp_sueq_s;
    86. 

  86. 	unsigned long cmp_sueq_d;
    87. 

  87. 	unsigned long cmp_sule_s;
    88. 

  88. 	unsigned long cmp_sule_d;
    89. 

  89. 	unsigned long cmp_sult_s;
    90. 

  90. 	unsigned long cmp_sult_d;
    91. 

  91. 	unsigned long cmp_sun_s;
    92. 

  92. 	unsigned long cmp_sun_d;
    93. 

  93. 	unsigned long cmp_sune_s;
    94. 

  94. 	unsigned long cmp_sune_d;
    95. 

  95. 	unsigned long cvt_d_l;
    96. 

  96. 	unsigned long cvt_d_s;
    97. 

  97. 	unsigned long cvt_d_w;
    98. 

  98. 	unsigned long cvt_l_s;
    99. 

  99. 	unsigned long cvt_l_d;
    100. 

  100. 	unsigned long cvt_s_d;
    101. 

  101. 	unsigned long cvt_s_l;
    102. 

  102. 	unsigned long cvt_s_w;
    103. 

  103. 	unsigned long cvt_w_s;
    104. 

  104. 	unsigned long cvt_w_d;
    105. 

  105. 	unsigned long div_s;
    106. 

  106. 	unsigned long div_d;
    107. 

  107. 	unsigned long floor_w_s;
    108. 

  108. 	unsigned long floor_w_d;
    109. 

  109. 	unsigned long floor_l_s;
    110. 

  110. 	unsigned long floor_l_d;
    111. 

  111. 	unsigned long maddf_s;
    112. 

  112. 	unsigned long maddf_d;
    113. 

  113. 	unsigned long max_s;
    114. 

  114. 	unsigned long max_d;
    115. 

  115. 	unsigned long maxa_s;
    116. 

  116. 	unsigned long maxa_d;
    117. 

  117. 	unsigned long min_s;
    118. 

  118. 	unsigned long min_d;
    119. 

  119. 	unsigned long mina_s;
    120. 

  120. 	unsigned long mina_d;
    121. 

  121. 	unsigned long mov_s;
    122. 

  122. 	unsigned long mov_d;
    123. 

  123. 	unsigned long msubf_s;
    124. 

  124. 	unsigned long msubf_d;
    125. 

  125. 	unsigned long mul_s;
    126. 

  126. 	unsigned long mul_d;
    127. 

  127. 	unsigned long neg_s;
    128. 

  128. 	unsigned long neg_d;
    129. 

  129. 	unsigned long recip_s;
    130. 

  130. 	unsigned long recip_d;
    131. 

  131. 	unsigned long rint_s;
    132. 

  132. 	unsigned long rint_d;
    133. 

  133. 	unsigned long round_w_s;
    134. 

  134. 	unsigned long round_w_d;
    135. 

  135. 	unsigned long round_l_s;
    136. 

  136. 	unsigned long round_l_d;
    137. 

  137. 	unsigned long rsqrt_s;
    138. 

  138. 	unsigned long rsqrt_d;
    139. 

  139. 	unsigned long sel_s;
    140. 

  140. 	unsigned long sel_d;
    141. 

  141. 	unsigned long seleqz_s;
    142. 

  142. 	unsigned long seleqz_d;
    143. 

  143. 	unsigned long selnez_s;
    144. 

  144. 	unsigned long selnez_d;
    145. 

  145. 	unsigned long sqrt_s;
    146. 

  146. 	unsigned long sqrt_d;
    147. 

  147. 	unsigned long sub_s;
    148. 

  148. 	unsigned long sub_d;
    149. 

  149. 	unsigned long trunc_w_s;
    150. 

  150. 	unsigned long trunc_w_d;
    151. 

  151. 	unsigned long trunc_l_s;
    152. 

  152. 	unsigned long trunc_l_d;
    153. 

  153. };
    154. 

  154. 

  155. DECLARE_PER_CPU(struct mips_fpu_emulator_stats, fpuemustats);
    156. 

  156. 

  157. #define MIPS_FPU_EMU_INC_STATS(M)					\
    158. 

  158. do {									\
    159. 

  159. 	preempt_disable();						\
    160. 

  160. 	__this_cpu_inc(fpuemustats.M);					\
    161. 

  161. 	preempt_enable();						\
    162. 

  162. } while (0)
    163. 

  163. 

  164. #else
    165. 

  165. #define MIPS_FPU_EMU_INC_STATS(M) do { } while (0)
    166. 

  166. #endif /* CONFIG_DEBUG_FS */
    167. 

  167. 

  168. extern int fpu_emulator_cop1Handler(struct pt_regs *xcp,
    169. 

  169. 				    struct mips_fpu_struct *ctx, int has_fpu,
    170. 

  170. 				    void __user **fault_addr);
    171. 

  171. void force_fcr31_sig(unsigned long fcr31, void __user *fault_addr,
    172. 

  172. 		     struct task_struct *tsk);
    173. 

  173. int process_fpemu_return(int sig, void __user *fault_addr,
    174. 

  174. 			 unsigned long fcr31);
    175. 

  175. int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
    176. 

  176. 		  unsigned long *contpc);
    177. 

  177. int mm_isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
    178. 

  178. 		     unsigned long *contpc);
    179. 

  179. 

  180. /*
    181. 

  181.  * Mask the FCSR Cause bits according to the Enable bits, observing
    182. 

  182.  * that Unimplemented is always enabled.
    183. 

  183.  */
    184. 

  184. static inline unsigned long mask_fcr31_x(unsigned long fcr31)
    185. 

  185. {
    186. 

  186. 	return fcr31 & (FPU_CSR_UNI_X |
    187. 

  187. 			((fcr31 & FPU_CSR_ALL_E) <<
    188. 

  188. 			 (ffs(FPU_CSR_ALL_X) - ffs(FPU_CSR_ALL_E))));
    189. 

  189. }
    190. 

  190. 

  191. #endif /* _ASM_FPU_EMULATOR_H */
    192.