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/arch/mips/include/asm/octeon/cvmx-bootinfo.h

http://github.com/mirrors/linux
C Header | 420 lines | 282 code | 34 blank | 104 comment | 3 complexity | 96473cfdbbd568b1db6148085ce7dd23 MD5 | raw file
  1/***********************license start***************
  2 * Author: Cavium Networks
  3 *
  4 * Contact: support@caviumnetworks.com
  5 * This file is part of the OCTEON SDK
  6 *
  7 * Copyright (c) 2003-2008 Cavium Networks
  8 *
  9 * This file is free software; you can redistribute it and/or modify
 10 * it under the terms of the GNU General Public License, Version 2, as
 11 * published by the Free Software Foundation.
 12 *
 13 * This file is distributed in the hope that it will be useful, but
 14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
 15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
 16 * NONINFRINGEMENT.  See the GNU General Public License for more
 17 * details.
 18 *
 19 * You should have received a copy of the GNU General Public License
 20 * along with this file; if not, write to the Free Software
 21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
 22 * or visit http://www.gnu.org/licenses/.
 23 *
 24 * This file may also be available under a different license from Cavium.
 25 * Contact Cavium Networks for more information
 26 ***********************license end**************************************/
 27
 28/*
 29 * Header file containing the ABI with the bootloader.
 30 */
 31
 32#ifndef __CVMX_BOOTINFO_H__
 33#define __CVMX_BOOTINFO_H__
 34
 35#include "cvmx-coremask.h"
 36
 37/*
 38 * Current major and minor versions of the CVMX bootinfo block that is
 39 * passed from the bootloader to the application.  This is versioned
 40 * so that applications can properly handle multiple bootloader
 41 * versions.
 42 */
 43#define CVMX_BOOTINFO_MAJ_VER 1
 44#define CVMX_BOOTINFO_MIN_VER 4
 45
 46#if (CVMX_BOOTINFO_MAJ_VER == 1)
 47#define CVMX_BOOTINFO_OCTEON_SERIAL_LEN 20
 48/*
 49 * This structure is populated by the bootloader.  For binary
 50 * compatibility the only changes that should be made are
 51 * adding members to the end of the structure, and the minor
 52 * version should be incremented at that time.
 53 * If an incompatible change is made, the major version
 54 * must be incremented, and the minor version should be reset
 55 * to 0.
 56 */
 57struct cvmx_bootinfo {
 58#ifdef __BIG_ENDIAN_BITFIELD
 59	uint32_t major_version;
 60	uint32_t minor_version;
 61
 62	uint64_t stack_top;
 63	uint64_t heap_base;
 64	uint64_t heap_end;
 65	uint64_t desc_vaddr;
 66
 67	uint32_t exception_base_addr;
 68	uint32_t stack_size;
 69	uint32_t flags;
 70	uint32_t core_mask;
 71	/* DRAM size in megabytes */
 72	uint32_t dram_size;
 73	/* physical address of free memory descriptor block*/
 74	uint32_t phy_mem_desc_addr;
 75	/* used to pass flags from app to debugger */
 76	uint32_t debugger_flags_base_addr;
 77
 78	/* CPU clock speed, in hz */
 79	uint32_t eclock_hz;
 80
 81	/* DRAM clock speed, in hz */
 82	uint32_t dclock_hz;
 83
 84	uint32_t reserved0;
 85	uint16_t board_type;
 86	uint8_t board_rev_major;
 87	uint8_t board_rev_minor;
 88	uint16_t reserved1;
 89	uint8_t reserved2;
 90	uint8_t reserved3;
 91	char board_serial_number[CVMX_BOOTINFO_OCTEON_SERIAL_LEN];
 92	uint8_t mac_addr_base[6];
 93	uint8_t mac_addr_count;
 94#if (CVMX_BOOTINFO_MIN_VER >= 1)
 95	/*
 96	 * Several boards support compact flash on the Octeon boot
 97	 * bus.	 The CF memory spaces may be mapped to different
 98	 * addresses on different boards.  These are the physical
 99	 * addresses, so care must be taken to use the correct
100	 * XKPHYS/KSEG0 addressing depending on the application's
101	 * ABI.	 These values will be 0 if CF is not present.
102	 */
103	uint64_t compact_flash_common_base_addr;
104	uint64_t compact_flash_attribute_base_addr;
105	/*
106	 * Base address of the LED display (as on EBT3000 board)
107	 * This will be 0 if LED display not present.
108	 */
109	uint64_t led_display_base_addr;
110#endif
111#if (CVMX_BOOTINFO_MIN_VER >= 2)
112	/* DFA reference clock in hz (if applicable)*/
113	uint32_t dfa_ref_clock_hz;
114
115	/*
116	 * flags indicating various configuration options.  These
117	 * flags supercede the 'flags' variable and should be used
118	 * instead if available.
119	 */
120	uint32_t config_flags;
121#endif
122#if (CVMX_BOOTINFO_MIN_VER >= 3)
123	/*
124	 * Address of the OF Flattened Device Tree structure
125	 * describing the board.
126	 */
127	uint64_t fdt_addr;
128#endif
129#if (CVMX_BOOTINFO_MIN_VER >= 4)
130	/*
131	 * Coremask used for processors with more than 32 cores
132	 * or with OCI.  This replaces core_mask.
133	 */
134	struct cvmx_coremask ext_core_mask;
135#endif
136#else				/* __BIG_ENDIAN */
137	/*
138	 * Little-Endian: When the CPU mode is switched to
139	 * little-endian, the view of the structure has some of the
140	 * fields swapped.
141	 */
142	uint32_t minor_version;
143	uint32_t major_version;
144
145	uint64_t stack_top;
146	uint64_t heap_base;
147	uint64_t heap_end;
148	uint64_t desc_vaddr;
149
150	uint32_t stack_size;
151	uint32_t exception_base_addr;
152
153	uint32_t core_mask;
154	uint32_t flags;
155
156	uint32_t phy_mem_desc_addr;
157	uint32_t dram_size;
158
159	uint32_t eclock_hz;
160	uint32_t debugger_flags_base_addr;
161
162	uint32_t reserved0;
163	uint32_t dclock_hz;
164
165	uint8_t reserved3;
166	uint8_t reserved2;
167	uint16_t reserved1;
168	uint8_t board_rev_minor;
169	uint8_t board_rev_major;
170	uint16_t board_type;
171
172	char board_serial_number[CVMX_BOOTINFO_OCTEON_SERIAL_LEN];
173	uint8_t mac_addr_base[6];
174	uint8_t mac_addr_count;
175	uint8_t pad[5];
176
177#if (CVMX_BOOTINFO_MIN_VER >= 1)
178	uint64_t compact_flash_common_base_addr;
179	uint64_t compact_flash_attribute_base_addr;
180	uint64_t led_display_base_addr;
181#endif
182#if (CVMX_BOOTINFO_MIN_VER >= 2)
183	uint32_t config_flags;
184	uint32_t dfa_ref_clock_hz;
185#endif
186#if (CVMX_BOOTINFO_MIN_VER >= 3)
187	uint64_t fdt_addr;
188#endif
189#if (CVMX_BOOTINFO_MIN_VER >= 4)
190	struct cvmx_coremask ext_core_mask;
191#endif
192#endif
193};
194
195#define CVMX_BOOTINFO_CFG_FLAG_PCI_HOST			(1ull << 0)
196#define CVMX_BOOTINFO_CFG_FLAG_PCI_TARGET		(1ull << 1)
197#define CVMX_BOOTINFO_CFG_FLAG_DEBUG			(1ull << 2)
198#define CVMX_BOOTINFO_CFG_FLAG_NO_MAGIC			(1ull << 3)
199/* This flag is set if the TLB mappings are not contained in the
200 * 0x10000000 - 0x20000000 boot bus region. */
201#define CVMX_BOOTINFO_CFG_FLAG_OVERSIZE_TLB_MAPPING	(1ull << 4)
202#define CVMX_BOOTINFO_CFG_FLAG_BREAK			(1ull << 5)
203
204#endif /*   (CVMX_BOOTINFO_MAJ_VER == 1) */
205
206/* Type defines for board and chip types */
207enum cvmx_board_types_enum {
208	CVMX_BOARD_TYPE_NULL = 0,
209	CVMX_BOARD_TYPE_SIM = 1,
210	CVMX_BOARD_TYPE_EBT3000 = 2,
211	CVMX_BOARD_TYPE_KODAMA = 3,
212	CVMX_BOARD_TYPE_NIAGARA = 4,
213	CVMX_BOARD_TYPE_NAC38 = 5,	/* formerly NAO38 */
214	CVMX_BOARD_TYPE_THUNDER = 6,
215	CVMX_BOARD_TYPE_TRANTOR = 7,
216	CVMX_BOARD_TYPE_EBH3000 = 8,
217	CVMX_BOARD_TYPE_EBH3100 = 9,
218	CVMX_BOARD_TYPE_HIKARI = 10,
219	CVMX_BOARD_TYPE_CN3010_EVB_HS5 = 11,
220	CVMX_BOARD_TYPE_CN3005_EVB_HS5 = 12,
221	CVMX_BOARD_TYPE_KBP = 13,
222	/* Deprecated, CVMX_BOARD_TYPE_CN3010_EVB_HS5 supports the CN3020 */
223	CVMX_BOARD_TYPE_CN3020_EVB_HS5 = 14,
224	CVMX_BOARD_TYPE_EBT5800 = 15,
225	CVMX_BOARD_TYPE_NICPRO2 = 16,
226	CVMX_BOARD_TYPE_EBH5600 = 17,
227	CVMX_BOARD_TYPE_EBH5601 = 18,
228	CVMX_BOARD_TYPE_EBH5200 = 19,
229	CVMX_BOARD_TYPE_BBGW_REF = 20,
230	CVMX_BOARD_TYPE_NIC_XLE_4G = 21,
231	CVMX_BOARD_TYPE_EBT5600 = 22,
232	CVMX_BOARD_TYPE_EBH5201 = 23,
233	CVMX_BOARD_TYPE_EBT5200 = 24,
234	CVMX_BOARD_TYPE_CB5600	= 25,
235	CVMX_BOARD_TYPE_CB5601	= 26,
236	CVMX_BOARD_TYPE_CB5200	= 27,
237	/* Special 'generic' board type, supports many boards */
238	CVMX_BOARD_TYPE_GENERIC = 28,
239	CVMX_BOARD_TYPE_EBH5610 = 29,
240	CVMX_BOARD_TYPE_LANAI2_A = 30,
241	CVMX_BOARD_TYPE_LANAI2_U = 31,
242	CVMX_BOARD_TYPE_EBB5600 = 32,
243	CVMX_BOARD_TYPE_EBB6300 = 33,
244	CVMX_BOARD_TYPE_NIC_XLE_10G = 34,
245	CVMX_BOARD_TYPE_LANAI2_G = 35,
246	CVMX_BOARD_TYPE_EBT5810 = 36,
247	CVMX_BOARD_TYPE_NIC10E = 37,
248	CVMX_BOARD_TYPE_EP6300C = 38,
249	CVMX_BOARD_TYPE_EBB6800 = 39,
250	CVMX_BOARD_TYPE_NIC4E = 40,
251	CVMX_BOARD_TYPE_NIC2E = 41,
252	CVMX_BOARD_TYPE_EBB6600 = 42,
253	CVMX_BOARD_TYPE_REDWING = 43,
254	CVMX_BOARD_TYPE_NIC68_4 = 44,
255	CVMX_BOARD_TYPE_NIC10E_66 = 45,
256	CVMX_BOARD_TYPE_MAX,
257
258	/*
259	 * The range from CVMX_BOARD_TYPE_MAX to
260	 * CVMX_BOARD_TYPE_CUST_DEFINED_MIN is reserved for future
261	 * SDK use.
262	 */
263
264	/*
265	 * Set aside a range for customer boards.  These numbers are managed
266	 * by Cavium.
267	 */
268	CVMX_BOARD_TYPE_CUST_DEFINED_MIN = 10000,
269	CVMX_BOARD_TYPE_CUST_WSX16 = 10001,
270	CVMX_BOARD_TYPE_CUST_NS0216 = 10002,
271	CVMX_BOARD_TYPE_CUST_NB5 = 10003,
272	CVMX_BOARD_TYPE_CUST_WMR500 = 10004,
273	CVMX_BOARD_TYPE_CUST_ITB101 = 10005,
274	CVMX_BOARD_TYPE_CUST_NTE102 = 10006,
275	CVMX_BOARD_TYPE_CUST_AGS103 = 10007,
276	CVMX_BOARD_TYPE_CUST_GST104 = 10008,
277	CVMX_BOARD_TYPE_CUST_GCT105 = 10009,
278	CVMX_BOARD_TYPE_CUST_AGS106 = 10010,
279	CVMX_BOARD_TYPE_CUST_SGM107 = 10011,
280	CVMX_BOARD_TYPE_CUST_GCT108 = 10012,
281	CVMX_BOARD_TYPE_CUST_AGS109 = 10013,
282	CVMX_BOARD_TYPE_CUST_GCT110 = 10014,
283	CVMX_BOARD_TYPE_CUST_L2_AIR_SENDER = 10015,
284	CVMX_BOARD_TYPE_CUST_L2_AIR_RECEIVER = 10016,
285	CVMX_BOARD_TYPE_CUST_L2_ACCTON2_TX = 10017,
286	CVMX_BOARD_TYPE_CUST_L2_ACCTON2_RX = 10018,
287	CVMX_BOARD_TYPE_CUST_L2_WSTRNSNIC_TX = 10019,
288	CVMX_BOARD_TYPE_CUST_L2_WSTRNSNIC_RX = 10020,
289	CVMX_BOARD_TYPE_CUST_L2_ZINWELL = 10021,
290	CVMX_BOARD_TYPE_CUST_DEFINED_MAX = 20000,
291
292	/*
293	 * Set aside a range for customer private use.	The SDK won't
294	 * use any numbers in this range.
295	 */
296	CVMX_BOARD_TYPE_CUST_PRIVATE_MIN = 20001,
297	CVMX_BOARD_TYPE_UBNT_E100 = 20002,
298	CVMX_BOARD_TYPE_CUST_DSR1000N = 20006,
299	CVMX_BOARD_TYPE_KONTRON_S1901 = 21901,
300	CVMX_BOARD_TYPE_CUST_PRIVATE_MAX = 30000,
301
302	/* The remaining range is reserved for future use. */
303};
304
305enum cvmx_chip_types_enum {
306	CVMX_CHIP_TYPE_NULL = 0,
307	CVMX_CHIP_SIM_TYPE_DEPRECATED = 1,
308	CVMX_CHIP_TYPE_OCTEON_SAMPLE = 2,
309	CVMX_CHIP_TYPE_MAX,
310};
311
312/* Compatibility alias for NAC38 name change, planned to be removed
313 * from SDK 1.7 */
314#define CVMX_BOARD_TYPE_NAO38	CVMX_BOARD_TYPE_NAC38
315
316/* Functions to return string based on type */
317#define ENUM_BRD_TYPE_CASE(x) \
318	case x: return(#x + 16);	/* Skip CVMX_BOARD_TYPE_ */
319static inline const char *cvmx_board_type_to_string(enum
320						    cvmx_board_types_enum type)
321{
322	switch (type) {
323		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NULL)
324		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_SIM)
325		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBT3000)
326		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_KODAMA)
327		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIAGARA)
328		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NAC38)
329		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_THUNDER)
330		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_TRANTOR)
331		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH3000)
332		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH3100)
333		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_HIKARI)
334		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CN3010_EVB_HS5)
335		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CN3005_EVB_HS5)
336		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_KBP)
337		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CN3020_EVB_HS5)
338		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBT5800)
339		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NICPRO2)
340		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5600)
341		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5601)
342		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5200)
343		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_BBGW_REF)
344		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC_XLE_4G)
345		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBT5600)
346		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5201)
347		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBT5200)
348		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CB5600)
349		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CB5601)
350		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CB5200)
351		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_GENERIC)
352		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5610)
353		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_LANAI2_A)
354		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_LANAI2_U)
355		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBB5600)
356		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBB6300)
357		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC_XLE_10G)
358		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_LANAI2_G)
359		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBT5810)
360		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC10E)
361		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EP6300C)
362		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBB6800)
363		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC4E)
364		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC2E)
365		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBB6600)
366		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_REDWING)
367		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC68_4)
368		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC10E_66)
369		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MAX)
370
371			/* Customer boards listed here */
372		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_DEFINED_MIN)
373		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_WSX16)
374		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_NS0216)
375		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_NB5)
376		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_WMR500)
377		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_ITB101)
378		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_NTE102)
379		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_AGS103)
380		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_GST104)
381		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_GCT105)
382		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_AGS106)
383		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_SGM107)
384		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_GCT108)
385		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_AGS109)
386		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_GCT110)
387		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_AIR_SENDER)
388		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_AIR_RECEIVER)
389		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_ACCTON2_TX)
390		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_ACCTON2_RX)
391		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_WSTRNSNIC_TX)
392		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_WSTRNSNIC_RX)
393		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_ZINWELL)
394		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_DEFINED_MAX)
395
396		    /* Customer private range */
397		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_PRIVATE_MIN)
398		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E100)
399		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_DSR1000N)
400		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_KONTRON_S1901)
401		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_PRIVATE_MAX)
402	}
403	return NULL;
404}
405
406#define ENUM_CHIP_TYPE_CASE(x) \
407	case x: return(#x + 15);	/* Skip CVMX_CHIP_TYPE */
408static inline const char *cvmx_chip_type_to_string(enum
409						   cvmx_chip_types_enum type)
410{
411	switch (type) {
412		ENUM_CHIP_TYPE_CASE(CVMX_CHIP_TYPE_NULL)
413		ENUM_CHIP_TYPE_CASE(CVMX_CHIP_SIM_TYPE_DEPRECATED)
414		ENUM_CHIP_TYPE_CASE(CVMX_CHIP_TYPE_OCTEON_SAMPLE)
415		ENUM_CHIP_TYPE_CASE(CVMX_CHIP_TYPE_MAX)
416	}
417	return "Unsupported Chip";
418}
419
420#endif /* __CVMX_BOOTINFO_H__ */