/arch/mips/include/asm/sibyte/sb1250_ldt.h

http://github.com/mirrors/linux · C Header · 409 lines · 259 code · 77 blank · 73 comment · 4 complexity · 62ef6d6385e95d3913a0b9acaede9bb1 MD5 · raw file

  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. /* *********************************************************************
  3. * SB1250 Board Support Package
  4. *
  5. * LDT constants File: sb1250_ldt.h
  6. *
  7. * This module contains constants and macros to describe
  8. * the LDT interface on the SB1250.
  9. *
  10. * SB1250 specification level: User's manual 1/02/02
  11. *
  12. *********************************************************************
  13. *
  14. * Copyright 2000, 2001, 2002, 2003
  15. * Broadcom Corporation. All rights reserved.
  16. *
  17. ********************************************************************* */
  18. #ifndef _SB1250_LDT_H
  19. #define _SB1250_LDT_H
  20. #include <asm/sibyte/sb1250_defs.h>
  21. #define K_LDT_VENDOR_SIBYTE 0x166D
  22. #define K_LDT_DEVICE_SB1250 0x0002
  23. /*
  24. * LDT Interface Type 1 (bridge) configuration header
  25. */
  26. #define R_LDT_TYPE1_DEVICEID 0x0000
  27. #define R_LDT_TYPE1_CMDSTATUS 0x0004
  28. #define R_LDT_TYPE1_CLASSREV 0x0008
  29. #define R_LDT_TYPE1_DEVHDR 0x000C
  30. #define R_LDT_TYPE1_BAR0 0x0010 /* not used */
  31. #define R_LDT_TYPE1_BAR1 0x0014 /* not used */
  32. #define R_LDT_TYPE1_BUSID 0x0018 /* bus ID register */
  33. #define R_LDT_TYPE1_SECSTATUS 0x001C /* secondary status / I/O base/limit */
  34. #define R_LDT_TYPE1_MEMLIMIT 0x0020
  35. #define R_LDT_TYPE1_PREFETCH 0x0024
  36. #define R_LDT_TYPE1_PREF_BASE 0x0028
  37. #define R_LDT_TYPE1_PREF_LIMIT 0x002C
  38. #define R_LDT_TYPE1_IOLIMIT 0x0030
  39. #define R_LDT_TYPE1_CAPPTR 0x0034
  40. #define R_LDT_TYPE1_ROMADDR 0x0038
  41. #define R_LDT_TYPE1_BRCTL 0x003C
  42. #define R_LDT_TYPE1_CMD 0x0040
  43. #define R_LDT_TYPE1_LINKCTRL 0x0044
  44. #define R_LDT_TYPE1_LINKFREQ 0x0048
  45. #define R_LDT_TYPE1_RESERVED1 0x004C
  46. #define R_LDT_TYPE1_SRICMD 0x0050
  47. #define R_LDT_TYPE1_SRITXNUM 0x0054
  48. #define R_LDT_TYPE1_SRIRXNUM 0x0058
  49. #define R_LDT_TYPE1_ERRSTATUS 0x0068
  50. #define R_LDT_TYPE1_SRICTRL 0x006C
  51. #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
  52. #define R_LDT_TYPE1_ADDSTATUS 0x0070
  53. #endif /* 1250 PASS2 || 112x PASS1 */
  54. #define R_LDT_TYPE1_TXBUFCNT 0x00C8
  55. #define R_LDT_TYPE1_EXPCRC 0x00DC
  56. #define R_LDT_TYPE1_RXCRC 0x00F0
  57. /*
  58. * LDT Device ID register
  59. */
  60. #define S_LDT_DEVICEID_VENDOR 0
  61. #define M_LDT_DEVICEID_VENDOR _SB_MAKEMASK_32(16, S_LDT_DEVICEID_VENDOR)
  62. #define V_LDT_DEVICEID_VENDOR(x) _SB_MAKEVALUE_32(x, S_LDT_DEVICEID_VENDOR)
  63. #define G_LDT_DEVICEID_VENDOR(x) _SB_GETVALUE_32(x, S_LDT_DEVICEID_VENDOR, M_LDT_DEVICEID_VENDOR)
  64. #define S_LDT_DEVICEID_DEVICEID 16
  65. #define M_LDT_DEVICEID_DEVICEID _SB_MAKEMASK_32(16, S_LDT_DEVICEID_DEVICEID)
  66. #define V_LDT_DEVICEID_DEVICEID(x) _SB_MAKEVALUE_32(x, S_LDT_DEVICEID_DEVICEID)
  67. #define G_LDT_DEVICEID_DEVICEID(x) _SB_GETVALUE_32(x, S_LDT_DEVICEID_DEVICEID, M_LDT_DEVICEID_DEVICEID)
  68. /*
  69. * LDT Command Register (Table 8-13)
  70. */
  71. #define M_LDT_CMD_IOSPACE_EN _SB_MAKEMASK1_32(0)
  72. #define M_LDT_CMD_MEMSPACE_EN _SB_MAKEMASK1_32(1)
  73. #define M_LDT_CMD_MASTER_EN _SB_MAKEMASK1_32(2)
  74. #define M_LDT_CMD_SPECCYC_EN _SB_MAKEMASK1_32(3)
  75. #define M_LDT_CMD_MEMWRINV_EN _SB_MAKEMASK1_32(4)
  76. #define M_LDT_CMD_VGAPALSNP_EN _SB_MAKEMASK1_32(5)
  77. #define M_LDT_CMD_PARERRRESP _SB_MAKEMASK1_32(6)
  78. #define M_LDT_CMD_WAITCYCCTRL _SB_MAKEMASK1_32(7)
  79. #define M_LDT_CMD_SERR_EN _SB_MAKEMASK1_32(8)
  80. #define M_LDT_CMD_FASTB2B_EN _SB_MAKEMASK1_32(9)
  81. /*
  82. * LDT class and revision registers
  83. */
  84. #define S_LDT_CLASSREV_REV 0
  85. #define M_LDT_CLASSREV_REV _SB_MAKEMASK_32(8, S_LDT_CLASSREV_REV)
  86. #define V_LDT_CLASSREV_REV(x) _SB_MAKEVALUE_32(x, S_LDT_CLASSREV_REV)
  87. #define G_LDT_CLASSREV_REV(x) _SB_GETVALUE_32(x, S_LDT_CLASSREV_REV, M_LDT_CLASSREV_REV)
  88. #define S_LDT_CLASSREV_CLASS 8
  89. #define M_LDT_CLASSREV_CLASS _SB_MAKEMASK_32(24, S_LDT_CLASSREV_CLASS)
  90. #define V_LDT_CLASSREV_CLASS(x) _SB_MAKEVALUE_32(x, S_LDT_CLASSREV_CLASS)
  91. #define G_LDT_CLASSREV_CLASS(x) _SB_GETVALUE_32(x, S_LDT_CLASSREV_CLASS, M_LDT_CLASSREV_CLASS)
  92. #define K_LDT_REV 0x01
  93. #define K_LDT_CLASS 0x060000
  94. /*
  95. * Device Header (offset 0x0C)
  96. */
  97. #define S_LDT_DEVHDR_CLINESZ 0
  98. #define M_LDT_DEVHDR_CLINESZ _SB_MAKEMASK_32(8, S_LDT_DEVHDR_CLINESZ)
  99. #define V_LDT_DEVHDR_CLINESZ(x) _SB_MAKEVALUE_32(x, S_LDT_DEVHDR_CLINESZ)
  100. #define G_LDT_DEVHDR_CLINESZ(x) _SB_GETVALUE_32(x, S_LDT_DEVHDR_CLINESZ, M_LDT_DEVHDR_CLINESZ)
  101. #define S_LDT_DEVHDR_LATTMR 8
  102. #define M_LDT_DEVHDR_LATTMR _SB_MAKEMASK_32(8, S_LDT_DEVHDR_LATTMR)
  103. #define V_LDT_DEVHDR_LATTMR(x) _SB_MAKEVALUE_32(x, S_LDT_DEVHDR_LATTMR)
  104. #define G_LDT_DEVHDR_LATTMR(x) _SB_GETVALUE_32(x, S_LDT_DEVHDR_LATTMR, M_LDT_DEVHDR_LATTMR)
  105. #define S_LDT_DEVHDR_HDRTYPE 16
  106. #define M_LDT_DEVHDR_HDRTYPE _SB_MAKEMASK_32(8, S_LDT_DEVHDR_HDRTYPE)
  107. #define V_LDT_DEVHDR_HDRTYPE(x) _SB_MAKEVALUE_32(x, S_LDT_DEVHDR_HDRTYPE)
  108. #define G_LDT_DEVHDR_HDRTYPE(x) _SB_GETVALUE_32(x, S_LDT_DEVHDR_HDRTYPE, M_LDT_DEVHDR_HDRTYPE)
  109. #define K_LDT_DEVHDR_HDRTYPE_TYPE1 1
  110. #define S_LDT_DEVHDR_BIST 24
  111. #define M_LDT_DEVHDR_BIST _SB_MAKEMASK_32(8, S_LDT_DEVHDR_BIST)
  112. #define V_LDT_DEVHDR_BIST(x) _SB_MAKEVALUE_32(x, S_LDT_DEVHDR_BIST)
  113. #define G_LDT_DEVHDR_BIST(x) _SB_GETVALUE_32(x, S_LDT_DEVHDR_BIST, M_LDT_DEVHDR_BIST)
  114. /*
  115. * LDT Status Register (Table 8-14). Note that these constants
  116. * assume you've read the command and status register
  117. * together (32-bit read at offset 0x04)
  118. *
  119. * These bits also apply to the secondary status
  120. * register (Table 8-15), offset 0x1C
  121. */
  122. #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
  123. #define M_LDT_STATUS_VGAEN _SB_MAKEMASK1_32(3)
  124. #endif /* 1250 PASS2 || 112x PASS1 */
  125. #define M_LDT_STATUS_CAPLIST _SB_MAKEMASK1_32(20)
  126. #define M_LDT_STATUS_66MHZCAP _SB_MAKEMASK1_32(21)
  127. #define M_LDT_STATUS_RESERVED2 _SB_MAKEMASK1_32(22)
  128. #define M_LDT_STATUS_FASTB2BCAP _SB_MAKEMASK1_32(23)
  129. #define M_LDT_STATUS_MSTRDPARERR _SB_MAKEMASK1_32(24)
  130. #define S_LDT_STATUS_DEVSELTIMING 25
  131. #define M_LDT_STATUS_DEVSELTIMING _SB_MAKEMASK_32(2, S_LDT_STATUS_DEVSELTIMING)
  132. #define V_LDT_STATUS_DEVSELTIMING(x) _SB_MAKEVALUE_32(x, S_LDT_STATUS_DEVSELTIMING)
  133. #define G_LDT_STATUS_DEVSELTIMING(x) _SB_GETVALUE_32(x, S_LDT_STATUS_DEVSELTIMING, M_LDT_STATUS_DEVSELTIMING)
  134. #define M_LDT_STATUS_SIGDTGTABORT _SB_MAKEMASK1_32(27)
  135. #define M_LDT_STATUS_RCVDTGTABORT _SB_MAKEMASK1_32(28)
  136. #define M_LDT_STATUS_RCVDMSTRABORT _SB_MAKEMASK1_32(29)
  137. #define M_LDT_STATUS_SIGDSERR _SB_MAKEMASK1_32(30)
  138. #define M_LDT_STATUS_DETPARERR _SB_MAKEMASK1_32(31)
  139. /*
  140. * Bridge Control Register (Table 8-16). Note that these
  141. * constants assume you've read the register as a 32-bit
  142. * read (offset 0x3C)
  143. */
  144. #define M_LDT_BRCTL_PARERRRESP_EN _SB_MAKEMASK1_32(16)
  145. #define M_LDT_BRCTL_SERR_EN _SB_MAKEMASK1_32(17)
  146. #define M_LDT_BRCTL_ISA_EN _SB_MAKEMASK1_32(18)
  147. #define M_LDT_BRCTL_VGA_EN _SB_MAKEMASK1_32(19)
  148. #define M_LDT_BRCTL_MSTRABORTMODE _SB_MAKEMASK1_32(21)
  149. #define M_LDT_BRCTL_SECBUSRESET _SB_MAKEMASK1_32(22)
  150. #define M_LDT_BRCTL_FASTB2B_EN _SB_MAKEMASK1_32(23)
  151. #define M_LDT_BRCTL_PRIDISCARD _SB_MAKEMASK1_32(24)
  152. #define M_LDT_BRCTL_SECDISCARD _SB_MAKEMASK1_32(25)
  153. #define M_LDT_BRCTL_DISCARDSTAT _SB_MAKEMASK1_32(26)
  154. #define M_LDT_BRCTL_DISCARDSERR_EN _SB_MAKEMASK1_32(27)
  155. /*
  156. * LDT Command Register (Table 8-17). Note that these constants
  157. * assume you've read the command and status register together
  158. * 32-bit read at offset 0x40
  159. */
  160. #define M_LDT_CMD_WARMRESET _SB_MAKEMASK1_32(16)
  161. #define M_LDT_CMD_DOUBLEENDED _SB_MAKEMASK1_32(17)
  162. #define S_LDT_CMD_CAPTYPE 29
  163. #define M_LDT_CMD_CAPTYPE _SB_MAKEMASK_32(3, S_LDT_CMD_CAPTYPE)
  164. #define V_LDT_CMD_CAPTYPE(x) _SB_MAKEVALUE_32(x, S_LDT_CMD_CAPTYPE)
  165. #define G_LDT_CMD_CAPTYPE(x) _SB_GETVALUE_32(x, S_LDT_CMD_CAPTYPE, M_LDT_CMD_CAPTYPE)
  166. /*
  167. * LDT link control register (Table 8-18), and (Table 8-19)
  168. */
  169. #define M_LDT_LINKCTRL_CAPSYNCFLOOD_EN _SB_MAKEMASK1_32(1)
  170. #define M_LDT_LINKCTRL_CRCSTARTTEST _SB_MAKEMASK1_32(2)
  171. #define M_LDT_LINKCTRL_CRCFORCEERR _SB_MAKEMASK1_32(3)
  172. #define M_LDT_LINKCTRL_LINKFAIL _SB_MAKEMASK1_32(4)
  173. #define M_LDT_LINKCTRL_INITDONE _SB_MAKEMASK1_32(5)
  174. #define M_LDT_LINKCTRL_EOC _SB_MAKEMASK1_32(6)
  175. #define M_LDT_LINKCTRL_XMITOFF _SB_MAKEMASK1_32(7)
  176. #define S_LDT_LINKCTRL_CRCERR 8
  177. #define M_LDT_LINKCTRL_CRCERR _SB_MAKEMASK_32(4, S_LDT_LINKCTRL_CRCERR)
  178. #define V_LDT_LINKCTRL_CRCERR(x) _SB_MAKEVALUE_32(x, S_LDT_LINKCTRL_CRCERR)
  179. #define G_LDT_LINKCTRL_CRCERR(x) _SB_GETVALUE_32(x, S_LDT_LINKCTRL_CRCERR, M_LDT_LINKCTRL_CRCERR)
  180. #define S_LDT_LINKCTRL_MAXIN 16
  181. #define M_LDT_LINKCTRL_MAXIN _SB_MAKEMASK_32(3, S_LDT_LINKCTRL_MAXIN)
  182. #define V_LDT_LINKCTRL_MAXIN(x) _SB_MAKEVALUE_32(x, S_LDT_LINKCTRL_MAXIN)
  183. #define G_LDT_LINKCTRL_MAXIN(x) _SB_GETVALUE_32(x, S_LDT_LINKCTRL_MAXIN, M_LDT_LINKCTRL_MAXIN)
  184. #define M_LDT_LINKCTRL_DWFCLN _SB_MAKEMASK1_32(19)
  185. #define S_LDT_LINKCTRL_MAXOUT 20
  186. #define M_LDT_LINKCTRL_MAXOUT _SB_MAKEMASK_32(3, S_LDT_LINKCTRL_MAXOUT)
  187. #define V_LDT_LINKCTRL_MAXOUT(x) _SB_MAKEVALUE_32(x, S_LDT_LINKCTRL_MAXOUT)
  188. #define G_LDT_LINKCTRL_MAXOUT(x) _SB_GETVALUE_32(x, S_LDT_LINKCTRL_MAXOUT, M_LDT_LINKCTRL_MAXOUT)
  189. #define M_LDT_LINKCTRL_DWFCOUT _SB_MAKEMASK1_32(23)
  190. #define S_LDT_LINKCTRL_WIDTHIN 24
  191. #define M_LDT_LINKCTRL_WIDTHIN _SB_MAKEMASK_32(3, S_LDT_LINKCTRL_WIDTHIN)
  192. #define V_LDT_LINKCTRL_WIDTHIN(x) _SB_MAKEVALUE_32(x, S_LDT_LINKCTRL_WIDTHIN)
  193. #define G_LDT_LINKCTRL_WIDTHIN(x) _SB_GETVALUE_32(x, S_LDT_LINKCTRL_WIDTHIN, M_LDT_LINKCTRL_WIDTHIN)
  194. #define M_LDT_LINKCTRL_DWFCLIN_EN _SB_MAKEMASK1_32(27)
  195. #define S_LDT_LINKCTRL_WIDTHOUT 28
  196. #define M_LDT_LINKCTRL_WIDTHOUT _SB_MAKEMASK_32(3, S_LDT_LINKCTRL_WIDTHOUT)
  197. #define V_LDT_LINKCTRL_WIDTHOUT(x) _SB_MAKEVALUE_32(x, S_LDT_LINKCTRL_WIDTHOUT)
  198. #define G_LDT_LINKCTRL_WIDTHOUT(x) _SB_GETVALUE_32(x, S_LDT_LINKCTRL_WIDTHOUT, M_LDT_LINKCTRL_WIDTHOUT)
  199. #define M_LDT_LINKCTRL_DWFCOUT_EN _SB_MAKEMASK1_32(31)
  200. /*
  201. * LDT Link frequency register (Table 8-20) offset 0x48
  202. */
  203. #define S_LDT_LINKFREQ_FREQ 8
  204. #define M_LDT_LINKFREQ_FREQ _SB_MAKEMASK_32(4, S_LDT_LINKFREQ_FREQ)
  205. #define V_LDT_LINKFREQ_FREQ(x) _SB_MAKEVALUE_32(x, S_LDT_LINKFREQ_FREQ)
  206. #define G_LDT_LINKFREQ_FREQ(x) _SB_GETVALUE_32(x, S_LDT_LINKFREQ_FREQ, M_LDT_LINKFREQ_FREQ)
  207. #define K_LDT_LINKFREQ_200MHZ 0
  208. #define K_LDT_LINKFREQ_300MHZ 1
  209. #define K_LDT_LINKFREQ_400MHZ 2
  210. #define K_LDT_LINKFREQ_500MHZ 3
  211. #define K_LDT_LINKFREQ_600MHZ 4
  212. #define K_LDT_LINKFREQ_800MHZ 5
  213. #define K_LDT_LINKFREQ_1000MHZ 6
  214. /*
  215. * LDT SRI Command Register (Table 8-21). Note that these constants
  216. * assume you've read the command and status register together
  217. * 32-bit read at offset 0x50
  218. */
  219. #define M_LDT_SRICMD_SIPREADY _SB_MAKEMASK1_32(16)
  220. #define M_LDT_SRICMD_SYNCPTRCTL _SB_MAKEMASK1_32(17)
  221. #define M_LDT_SRICMD_REDUCESYNCZERO _SB_MAKEMASK1_32(18)
  222. #if SIBYTE_HDR_FEATURE_UP_TO(1250, PASS1)
  223. #define M_LDT_SRICMD_DISSTARVATIONCNT _SB_MAKEMASK1_32(19) /* PASS1 */
  224. #endif /* up to 1250 PASS1 */
  225. #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
  226. #define M_LDT_SRICMD_DISMULTTXVLD _SB_MAKEMASK1_32(19)
  227. #define M_LDT_SRICMD_EXPENDIAN _SB_MAKEMASK1_32(26)
  228. #endif /* 1250 PASS2 || 112x PASS1 */
  229. #define S_LDT_SRICMD_RXMARGIN 20
  230. #define M_LDT_SRICMD_RXMARGIN _SB_MAKEMASK_32(5, S_LDT_SRICMD_RXMARGIN)
  231. #define V_LDT_SRICMD_RXMARGIN(x) _SB_MAKEVALUE_32(x, S_LDT_SRICMD_RXMARGIN)
  232. #define G_LDT_SRICMD_RXMARGIN(x) _SB_GETVALUE_32(x, S_LDT_SRICMD_RXMARGIN, M_LDT_SRICMD_RXMARGIN)
  233. #define M_LDT_SRICMD_LDTPLLCOMPAT _SB_MAKEMASK1_32(25)
  234. #define S_LDT_SRICMD_TXINITIALOFFSET 28
  235. #define M_LDT_SRICMD_TXINITIALOFFSET _SB_MAKEMASK_32(3, S_LDT_SRICMD_TXINITIALOFFSET)
  236. #define V_LDT_SRICMD_TXINITIALOFFSET(x) _SB_MAKEVALUE_32(x, S_LDT_SRICMD_TXINITIALOFFSET)
  237. #define G_LDT_SRICMD_TXINITIALOFFSET(x) _SB_GETVALUE_32(x, S_LDT_SRICMD_TXINITIALOFFSET, M_LDT_SRICMD_TXINITIALOFFSET)
  238. #define M_LDT_SRICMD_LINKFREQDIRECT _SB_MAKEMASK1_32(31)
  239. /*
  240. * LDT Error control and status register (Table 8-22) (Table 8-23)
  241. */
  242. #define M_LDT_ERRCTL_PROTFATAL_EN _SB_MAKEMASK1_32(0)
  243. #define M_LDT_ERRCTL_PROTNONFATAL_EN _SB_MAKEMASK1_32(1)
  244. #define M_LDT_ERRCTL_PROTSYNCFLOOD_EN _SB_MAKEMASK1_32(2)
  245. #define M_LDT_ERRCTL_OVFFATAL_EN _SB_MAKEMASK1_32(3)
  246. #define M_LDT_ERRCTL_OVFNONFATAL_EN _SB_MAKEMASK1_32(4)
  247. #define M_LDT_ERRCTL_OVFSYNCFLOOD_EN _SB_MAKEMASK1_32(5)
  248. #define M_LDT_ERRCTL_EOCNXAFATAL_EN _SB_MAKEMASK1_32(6)
  249. #define M_LDT_ERRCTL_EOCNXANONFATAL_EN _SB_MAKEMASK1_32(7)
  250. #define M_LDT_ERRCTL_EOCNXASYNCFLOOD_EN _SB_MAKEMASK1_32(8)
  251. #define M_LDT_ERRCTL_CRCFATAL_EN _SB_MAKEMASK1_32(9)
  252. #define M_LDT_ERRCTL_CRCNONFATAL_EN _SB_MAKEMASK1_32(10)
  253. #define M_LDT_ERRCTL_SERRFATAL_EN _SB_MAKEMASK1_32(11)
  254. #define M_LDT_ERRCTL_SRCTAGFATAL_EN _SB_MAKEMASK1_32(12)
  255. #define M_LDT_ERRCTL_SRCTAGNONFATAL_EN _SB_MAKEMASK1_32(13)
  256. #define M_LDT_ERRCTL_SRCTAGSYNCFLOOD_EN _SB_MAKEMASK1_32(14)
  257. #define M_LDT_ERRCTL_MAPNXAFATAL_EN _SB_MAKEMASK1_32(15)
  258. #define M_LDT_ERRCTL_MAPNXANONFATAL_EN _SB_MAKEMASK1_32(16)
  259. #define M_LDT_ERRCTL_MAPNXASYNCFLOOD_EN _SB_MAKEMASK1_32(17)
  260. #define M_LDT_ERRCTL_PROTOERR _SB_MAKEMASK1_32(24)
  261. #define M_LDT_ERRCTL_OVFERR _SB_MAKEMASK1_32(25)
  262. #define M_LDT_ERRCTL_EOCNXAERR _SB_MAKEMASK1_32(26)
  263. #define M_LDT_ERRCTL_SRCTAGERR _SB_MAKEMASK1_32(27)
  264. #define M_LDT_ERRCTL_MAPNXAERR _SB_MAKEMASK1_32(28)
  265. /*
  266. * SRI Control register (Table 8-24, 8-25) Offset 0x6C
  267. */
  268. #define S_LDT_SRICTRL_NEEDRESP 0
  269. #define M_LDT_SRICTRL_NEEDRESP _SB_MAKEMASK_32(2, S_LDT_SRICTRL_NEEDRESP)
  270. #define V_LDT_SRICTRL_NEEDRESP(x) _SB_MAKEVALUE_32(x, S_LDT_SRICTRL_NEEDRESP)
  271. #define G_LDT_SRICTRL_NEEDRESP(x) _SB_GETVALUE_32(x, S_LDT_SRICTRL_NEEDRESP, M_LDT_SRICTRL_NEEDRESP)
  272. #define S_LDT_SRICTRL_NEEDNPREQ 2
  273. #define M_LDT_SRICTRL_NEEDNPREQ _SB_MAKEMASK_32(2, S_LDT_SRICTRL_NEEDNPREQ)
  274. #define V_LDT_SRICTRL_NEEDNPREQ(x) _SB_MAKEVALUE_32(x, S_LDT_SRICTRL_NEEDNPREQ)
  275. #define G_LDT_SRICTRL_NEEDNPREQ(x) _SB_GETVALUE_32(x, S_LDT_SRICTRL_NEEDNPREQ, M_LDT_SRICTRL_NEEDNPREQ)
  276. #define S_LDT_SRICTRL_NEEDPREQ 4
  277. #define M_LDT_SRICTRL_NEEDPREQ _SB_MAKEMASK_32(2, S_LDT_SRICTRL_NEEDPREQ)
  278. #define V_LDT_SRICTRL_NEEDPREQ(x) _SB_MAKEVALUE_32(x, S_LDT_SRICTRL_NEEDPREQ)
  279. #define G_LDT_SRICTRL_NEEDPREQ(x) _SB_GETVALUE_32(x, S_LDT_SRICTRL_NEEDPREQ, M_LDT_SRICTRL_NEEDPREQ)
  280. #define S_LDT_SRICTRL_WANTRESP 8
  281. #define M_LDT_SRICTRL_WANTRESP _SB_MAKEMASK_32(2, S_LDT_SRICTRL_WANTRESP)
  282. #define V_LDT_SRICTRL_WANTRESP(x) _SB_MAKEVALUE_32(x, S_LDT_SRICTRL_WANTRESP)
  283. #define G_LDT_SRICTRL_WANTRESP(x) _SB_GETVALUE_32(x, S_LDT_SRICTRL_WANTRESP, M_LDT_SRICTRL_WANTRESP)
  284. #define S_LDT_SRICTRL_WANTNPREQ 10
  285. #define M_LDT_SRICTRL_WANTNPREQ _SB_MAKEMASK_32(2, S_LDT_SRICTRL_WANTNPREQ)
  286. #define V_LDT_SRICTRL_WANTNPREQ(x) _SB_MAKEVALUE_32(x, S_LDT_SRICTRL_WANTNPREQ)
  287. #define G_LDT_SRICTRL_WANTNPREQ(x) _SB_GETVALUE_32(x, S_LDT_SRICTRL_WANTNPREQ, M_LDT_SRICTRL_WANTNPREQ)
  288. #define S_LDT_SRICTRL_WANTPREQ 12
  289. #define M_LDT_SRICTRL_WANTPREQ _SB_MAKEMASK_32(2, S_LDT_SRICTRL_WANTPREQ)
  290. #define V_LDT_SRICTRL_WANTPREQ(x) _SB_MAKEVALUE_32(x, S_LDT_SRICTRL_WANTPREQ)
  291. #define G_LDT_SRICTRL_WANTPREQ(x) _SB_GETVALUE_32(x, S_LDT_SRICTRL_WANTPREQ, M_LDT_SRICTRL_WANTPREQ)
  292. #define S_LDT_SRICTRL_BUFRELSPACE 16
  293. #define M_LDT_SRICTRL_BUFRELSPACE _SB_MAKEMASK_32(4, S_LDT_SRICTRL_BUFRELSPACE)
  294. #define V_LDT_SRICTRL_BUFRELSPACE(x) _SB_MAKEVALUE_32(x, S_LDT_SRICTRL_BUFRELSPACE)
  295. #define G_LDT_SRICTRL_BUFRELSPACE(x) _SB_GETVALUE_32(x, S_LDT_SRICTRL_BUFRELSPACE, M_LDT_SRICTRL_BUFRELSPACE)
  296. /*
  297. * LDT SRI Transmit Buffer Count register (Table 8-26)
  298. */
  299. #define S_LDT_TXBUFCNT_PCMD 0
  300. #define M_LDT_TXBUFCNT_PCMD _SB_MAKEMASK_32(4, S_LDT_TXBUFCNT_PCMD)
  301. #define V_LDT_TXBUFCNT_PCMD(x) _SB_MAKEVALUE_32(x, S_LDT_TXBUFCNT_PCMD)
  302. #define G_LDT_TXBUFCNT_PCMD(x) _SB_GETVALUE_32(x, S_LDT_TXBUFCNT_PCMD, M_LDT_TXBUFCNT_PCMD)
  303. #define S_LDT_TXBUFCNT_PDATA 4
  304. #define M_LDT_TXBUFCNT_PDATA _SB_MAKEMASK_32(4, S_LDT_TXBUFCNT_PDATA)
  305. #define V_LDT_TXBUFCNT_PDATA(x) _SB_MAKEVALUE_32(x, S_LDT_TXBUFCNT_PDATA)
  306. #define G_LDT_TXBUFCNT_PDATA(x) _SB_GETVALUE_32(x, S_LDT_TXBUFCNT_PDATA, M_LDT_TXBUFCNT_PDATA)
  307. #define S_LDT_TXBUFCNT_NPCMD 8
  308. #define M_LDT_TXBUFCNT_NPCMD _SB_MAKEMASK_32(4, S_LDT_TXBUFCNT_NPCMD)
  309. #define V_LDT_TXBUFCNT_NPCMD(x) _SB_MAKEVALUE_32(x, S_LDT_TXBUFCNT_NPCMD)
  310. #define G_LDT_TXBUFCNT_NPCMD(x) _SB_GETVALUE_32(x, S_LDT_TXBUFCNT_NPCMD, M_LDT_TXBUFCNT_NPCMD)
  311. #define S_LDT_TXBUFCNT_NPDATA 12
  312. #define M_LDT_TXBUFCNT_NPDATA _SB_MAKEMASK_32(4, S_LDT_TXBUFCNT_NPDATA)
  313. #define V_LDT_TXBUFCNT_NPDATA(x) _SB_MAKEVALUE_32(x, S_LDT_TXBUFCNT_NPDATA)
  314. #define G_LDT_TXBUFCNT_NPDATA(x) _SB_GETVALUE_32(x, S_LDT_TXBUFCNT_NPDATA, M_LDT_TXBUFCNT_NPDATA)
  315. #define S_LDT_TXBUFCNT_RCMD 16
  316. #define M_LDT_TXBUFCNT_RCMD _SB_MAKEMASK_32(4, S_LDT_TXBUFCNT_RCMD)
  317. #define V_LDT_TXBUFCNT_RCMD(x) _SB_MAKEVALUE_32(x, S_LDT_TXBUFCNT_RCMD)
  318. #define G_LDT_TXBUFCNT_RCMD(x) _SB_GETVALUE_32(x, S_LDT_TXBUFCNT_RCMD, M_LDT_TXBUFCNT_RCMD)
  319. #define S_LDT_TXBUFCNT_RDATA 20
  320. #define M_LDT_TXBUFCNT_RDATA _SB_MAKEMASK_32(4, S_LDT_TXBUFCNT_RDATA)
  321. #define V_LDT_TXBUFCNT_RDATA(x) _SB_MAKEVALUE_32(x, S_LDT_TXBUFCNT_RDATA)
  322. #define G_LDT_TXBUFCNT_RDATA(x) _SB_GETVALUE_32(x, S_LDT_TXBUFCNT_RDATA, M_LDT_TXBUFCNT_RDATA)
  323. #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
  324. /*
  325. * Additional Status Register
  326. */
  327. #define S_LDT_ADDSTATUS_TGTDONE 0
  328. #define M_LDT_ADDSTATUS_TGTDONE _SB_MAKEMASK_32(8, S_LDT_ADDSTATUS_TGTDONE)
  329. #define V_LDT_ADDSTATUS_TGTDONE(x) _SB_MAKEVALUE_32(x, S_LDT_ADDSTATUS_TGTDONE)
  330. #define G_LDT_ADDSTATUS_TGTDONE(x) _SB_GETVALUE_32(x, S_LDT_ADDSTATUS_TGTDONE, M_LDT_ADDSTATUS_TGTDONE)
  331. #endif /* 1250 PASS2 || 112x PASS1 */
  332. #endif