/arch/powerpc/boot/dts/digsy_mtc.dts

http://github.com/mirrors/linux · Device Tree · 157 lines · 123 code · 25 blank · 9 comment · 0 complexity · 8831f30f483b2b9c15b8a846e6c2fe85 MD5 · raw file

  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Digsy MTC board Device Tree Source
  4. *
  5. * Copyright (C) 2009 Semihalf
  6. *
  7. * Based on the CM5200 by M. Balakowicz
  8. */
  9. /include/ "mpc5200b.dtsi"
  10. &gpt0 { gpio-controller; fsl,has-wdt; };
  11. &gpt1 { gpio-controller; };
  12. / {
  13. model = "intercontrol,digsy-mtc";
  14. compatible = "intercontrol,digsy-mtc";
  15. memory {
  16. reg = <0x00000000 0x02000000>; // 32MB
  17. };
  18. soc5200@f0000000 {
  19. rtc@800 {
  20. status = "disabled";
  21. };
  22. spi@f00 {
  23. msp430@0 {
  24. compatible = "spidev";
  25. spi-max-frequency = <32000>;
  26. reg = <0>;
  27. };
  28. };
  29. psc@2000 { // PSC1
  30. status = "disabled";
  31. };
  32. psc@2200 { // PSC2
  33. status = "disabled";
  34. };
  35. psc@2400 { // PSC3
  36. status = "disabled";
  37. };
  38. psc@2600 { // PSC4
  39. compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
  40. };
  41. psc@2800 { // PSC5
  42. compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
  43. };
  44. psc@2c00 { // PSC6
  45. status = "disabled";
  46. };
  47. ethernet@3000 {
  48. phy-handle = <&phy0>;
  49. };
  50. mdio@3000 {
  51. phy0: ethernet-phy@0 {
  52. reg = <0>;
  53. };
  54. };
  55. i2c@3d00 {
  56. eeprom@50 {
  57. compatible = "atmel,24c08";
  58. reg = <0x50>;
  59. };
  60. rtc@56 {
  61. compatible = "microcrystal,rv3029";
  62. reg = <0x56>;
  63. };
  64. rtc@68 {
  65. compatible = "dallas,ds1339";
  66. reg = <0x68>;
  67. };
  68. };
  69. i2c@3d40 {
  70. status = "disabled";
  71. };
  72. };
  73. pci@f0000d00 {
  74. interrupt-map-mask = <0xf800 0 0 7>;
  75. interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3
  76. 0xc000 0 0 2 &mpc5200_pic 0 0 3
  77. 0xc000 0 0 3 &mpc5200_pic 0 0 3
  78. 0xc000 0 0 4 &mpc5200_pic 0 0 3>;
  79. clock-frequency = <0>; // From boot loader
  80. interrupts = <2 8 0 2 9 0 2 10 0>;
  81. bus-range = <0 0>;
  82. ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000
  83. 0x02000000 0 0x90000000 0x90000000 0 0x10000000
  84. 0x01000000 0 0x00000000 0xa0000000 0 0x01000000>;
  85. };
  86. localbus {
  87. ranges = <0 0 0xff000000 0x1000000
  88. 4 0 0x60000000 0x0001000>;
  89. // 16-bit flash device at LocalPlus Bus CS0
  90. flash@0,0 {
  91. compatible = "cfi-flash";
  92. reg = <0 0 0x1000000>;
  93. bank-width = <2>;
  94. device-width = <2>;
  95. #size-cells = <1>;
  96. #address-cells = <1>;
  97. partition@0 {
  98. label = "kernel";
  99. reg = <0x0 0x00200000>;
  100. };
  101. partition@200000 {
  102. label = "root";
  103. reg = <0x00200000 0x00300000>;
  104. };
  105. partition@500000 {
  106. label = "user";
  107. reg = <0x00500000 0x00a00000>;
  108. };
  109. partition@f00000 {
  110. label = "u-boot";
  111. reg = <0x00f00000 0x100000>;
  112. };
  113. };
  114. can@4,0 {
  115. compatible = "nxp,sja1000";
  116. reg = <4 0x000 0x80>;
  117. nxp,external-clock-frequency = <24000000>;
  118. interrupts = <1 2 3>; // Level-low
  119. };
  120. can@4,100 {
  121. compatible = "nxp,sja1000";
  122. reg = <4 0x100 0x80>;
  123. nxp,external-clock-frequency = <24000000>;
  124. interrupts = <1 2 3>; // Level-low
  125. };
  126. serial@4,200 {
  127. compatible = "nxp,sc28l92";
  128. reg = <4 0x200 0x10>;
  129. interrupts = <1 3 3>;
  130. };
  131. };
  132. };