/arch/powerpc/kernel/ptrace.c
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1/* 2 * PowerPC version 3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 4 * 5 * Derived from "arch/m68k/kernel/ptrace.c" 6 * Copyright (C) 1994 by Hamish Macdonald 7 * Taken from linux/kernel/ptrace.c and modified for M680x0. 8 * linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds 9 * 10 * Modified by Cort Dougan (cort@hq.fsmlabs.com) 11 * and Paul Mackerras (paulus@samba.org). 12 * 13 * This file is subject to the terms and conditions of the GNU General 14 * Public License. See the file README.legal in the main directory of 15 * this archive for more details. 16 */ 17 18#include <linux/kernel.h> 19#include <linux/sched.h> 20#include <linux/mm.h> 21#include <linux/smp.h> 22#include <linux/errno.h> 23#include <linux/ptrace.h> 24#include <linux/regset.h> 25#include <linux/tracehook.h> 26#include <linux/elf.h> 27#include <linux/user.h> 28#include <linux/security.h> 29#include <linux/signal.h> 30#include <linux/seccomp.h> 31#include <linux/audit.h> 32#include <trace/syscall.h> 33#include <linux/hw_breakpoint.h> 34#include <linux/perf_event.h> 35#include <linux/context_tracking.h> 36 37#include <asm/uaccess.h> 38#include <asm/page.h> 39#include <asm/pgtable.h> 40#include <asm/switch_to.h> 41 42#define CREATE_TRACE_POINTS 43#include <trace/events/syscalls.h> 44 45/* 46 * The parameter save area on the stack is used to store arguments being passed 47 * to callee function and is located at fixed offset from stack pointer. 48 */ 49#ifdef CONFIG_PPC32 50#define PARAMETER_SAVE_AREA_OFFSET 24 /* bytes */ 51#else /* CONFIG_PPC32 */ 52#define PARAMETER_SAVE_AREA_OFFSET 48 /* bytes */ 53#endif 54 55struct pt_regs_offset { 56 const char *name; 57 int offset; 58}; 59 60#define STR(s) #s /* convert to string */ 61#define REG_OFFSET_NAME(r) {.name = #r, .offset = offsetof(struct pt_regs, r)} 62#define GPR_OFFSET_NAME(num) \ 63 {.name = STR(r##num), .offset = offsetof(struct pt_regs, gpr[num])}, \ 64 {.name = STR(gpr##num), .offset = offsetof(struct pt_regs, gpr[num])} 65#define REG_OFFSET_END {.name = NULL, .offset = 0} 66 67#define TVSO(f) (offsetof(struct thread_vr_state, f)) 68#define TFSO(f) (offsetof(struct thread_fp_state, f)) 69#define TSO(f) (offsetof(struct thread_struct, f)) 70 71static const struct pt_regs_offset regoffset_table[] = { 72 GPR_OFFSET_NAME(0), 73 GPR_OFFSET_NAME(1), 74 GPR_OFFSET_NAME(2), 75 GPR_OFFSET_NAME(3), 76 GPR_OFFSET_NAME(4), 77 GPR_OFFSET_NAME(5), 78 GPR_OFFSET_NAME(6), 79 GPR_OFFSET_NAME(7), 80 GPR_OFFSET_NAME(8), 81 GPR_OFFSET_NAME(9), 82 GPR_OFFSET_NAME(10), 83 GPR_OFFSET_NAME(11), 84 GPR_OFFSET_NAME(12), 85 GPR_OFFSET_NAME(13), 86 GPR_OFFSET_NAME(14), 87 GPR_OFFSET_NAME(15), 88 GPR_OFFSET_NAME(16), 89 GPR_OFFSET_NAME(17), 90 GPR_OFFSET_NAME(18), 91 GPR_OFFSET_NAME(19), 92 GPR_OFFSET_NAME(20), 93 GPR_OFFSET_NAME(21), 94 GPR_OFFSET_NAME(22), 95 GPR_OFFSET_NAME(23), 96 GPR_OFFSET_NAME(24), 97 GPR_OFFSET_NAME(25), 98 GPR_OFFSET_NAME(26), 99 GPR_OFFSET_NAME(27), 100 GPR_OFFSET_NAME(28), 101 GPR_OFFSET_NAME(29), 102 GPR_OFFSET_NAME(30), 103 GPR_OFFSET_NAME(31), 104 REG_OFFSET_NAME(nip), 105 REG_OFFSET_NAME(msr), 106 REG_OFFSET_NAME(ctr), 107 REG_OFFSET_NAME(link), 108 REG_OFFSET_NAME(xer), 109 REG_OFFSET_NAME(ccr), 110#ifdef CONFIG_PPC64 111 REG_OFFSET_NAME(softe), 112#else 113 REG_OFFSET_NAME(mq), 114#endif 115 REG_OFFSET_NAME(trap), 116 REG_OFFSET_NAME(dar), 117 REG_OFFSET_NAME(dsisr), 118 REG_OFFSET_END, 119}; 120 121/** 122 * regs_query_register_offset() - query register offset from its name 123 * @name: the name of a register 124 * 125 * regs_query_register_offset() returns the offset of a register in struct 126 * pt_regs from its name. If the name is invalid, this returns -EINVAL; 127 */ 128int regs_query_register_offset(const char *name) 129{ 130 const struct pt_regs_offset *roff; 131 for (roff = regoffset_table; roff->name != NULL; roff++) 132 if (!strcmp(roff->name, name)) 133 return roff->offset; 134 return -EINVAL; 135} 136 137/** 138 * regs_query_register_name() - query register name from its offset 139 * @offset: the offset of a register in struct pt_regs. 140 * 141 * regs_query_register_name() returns the name of a register from its 142 * offset in struct pt_regs. If the @offset is invalid, this returns NULL; 143 */ 144const char *regs_query_register_name(unsigned int offset) 145{ 146 const struct pt_regs_offset *roff; 147 for (roff = regoffset_table; roff->name != NULL; roff++) 148 if (roff->offset == offset) 149 return roff->name; 150 return NULL; 151} 152 153/* 154 * does not yet catch signals sent when the child dies. 155 * in exit.c or in signal.c. 156 */ 157 158/* 159 * Set of msr bits that gdb can change on behalf of a process. 160 */ 161#ifdef CONFIG_PPC_ADV_DEBUG_REGS 162#define MSR_DEBUGCHANGE 0 163#else 164#define MSR_DEBUGCHANGE (MSR_SE | MSR_BE) 165#endif 166 167/* 168 * Max register writeable via put_reg 169 */ 170#ifdef CONFIG_PPC32 171#define PT_MAX_PUT_REG PT_MQ 172#else 173#define PT_MAX_PUT_REG PT_CCR 174#endif 175 176static unsigned long get_user_msr(struct task_struct *task) 177{ 178 return task->thread.regs->msr | task->thread.fpexc_mode; 179} 180 181static int set_user_msr(struct task_struct *task, unsigned long msr) 182{ 183 task->thread.regs->msr &= ~MSR_DEBUGCHANGE; 184 task->thread.regs->msr |= msr & MSR_DEBUGCHANGE; 185 return 0; 186} 187 188#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 189static unsigned long get_user_ckpt_msr(struct task_struct *task) 190{ 191 return task->thread.ckpt_regs.msr | task->thread.fpexc_mode; 192} 193 194static int set_user_ckpt_msr(struct task_struct *task, unsigned long msr) 195{ 196 task->thread.ckpt_regs.msr &= ~MSR_DEBUGCHANGE; 197 task->thread.ckpt_regs.msr |= msr & MSR_DEBUGCHANGE; 198 return 0; 199} 200 201static int set_user_ckpt_trap(struct task_struct *task, unsigned long trap) 202{ 203 task->thread.ckpt_regs.trap = trap & 0xfff0; 204 return 0; 205} 206#endif 207 208#ifdef CONFIG_PPC64 209static int get_user_dscr(struct task_struct *task, unsigned long *data) 210{ 211 *data = task->thread.dscr; 212 return 0; 213} 214 215static int set_user_dscr(struct task_struct *task, unsigned long dscr) 216{ 217 task->thread.dscr = dscr; 218 task->thread.dscr_inherit = 1; 219 return 0; 220} 221#else 222static int get_user_dscr(struct task_struct *task, unsigned long *data) 223{ 224 return -EIO; 225} 226 227static int set_user_dscr(struct task_struct *task, unsigned long dscr) 228{ 229 return -EIO; 230} 231#endif 232 233/* 234 * We prevent mucking around with the reserved area of trap 235 * which are used internally by the kernel. 236 */ 237static int set_user_trap(struct task_struct *task, unsigned long trap) 238{ 239 task->thread.regs->trap = trap & 0xfff0; 240 return 0; 241} 242 243/* 244 * Get contents of register REGNO in task TASK. 245 */ 246int ptrace_get_reg(struct task_struct *task, int regno, unsigned long *data) 247{ 248 if ((task->thread.regs == NULL) || !data) 249 return -EIO; 250 251 if (regno == PT_MSR) { 252 *data = get_user_msr(task); 253 return 0; 254 } 255 256 if (regno == PT_DSCR) 257 return get_user_dscr(task, data); 258 259 if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long))) { 260 *data = ((unsigned long *)task->thread.regs)[regno]; 261 return 0; 262 } 263 264 return -EIO; 265} 266 267/* 268 * Write contents of register REGNO in task TASK. 269 */ 270int ptrace_put_reg(struct task_struct *task, int regno, unsigned long data) 271{ 272 if (task->thread.regs == NULL) 273 return -EIO; 274 275 if (regno == PT_MSR) 276 return set_user_msr(task, data); 277 if (regno == PT_TRAP) 278 return set_user_trap(task, data); 279 if (regno == PT_DSCR) 280 return set_user_dscr(task, data); 281 282 if (regno <= PT_MAX_PUT_REG) { 283 ((unsigned long *)task->thread.regs)[regno] = data; 284 return 0; 285 } 286 return -EIO; 287} 288 289static int gpr_get(struct task_struct *target, const struct user_regset *regset, 290 unsigned int pos, unsigned int count, 291 void *kbuf, void __user *ubuf) 292{ 293 int i, ret; 294 295 if (target->thread.regs == NULL) 296 return -EIO; 297 298 if (!FULL_REGS(target->thread.regs)) { 299 /* We have a partial register set. Fill 14-31 with bogus values */ 300 for (i = 14; i < 32; i++) 301 target->thread.regs->gpr[i] = NV_REG_POISON; 302 } 303 304 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, 305 target->thread.regs, 306 0, offsetof(struct pt_regs, msr)); 307 if (!ret) { 308 unsigned long msr = get_user_msr(target); 309 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &msr, 310 offsetof(struct pt_regs, msr), 311 offsetof(struct pt_regs, msr) + 312 sizeof(msr)); 313 } 314 315 BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) != 316 offsetof(struct pt_regs, msr) + sizeof(long)); 317 318 if (!ret) 319 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, 320 &target->thread.regs->orig_gpr3, 321 offsetof(struct pt_regs, orig_gpr3), 322 sizeof(struct pt_regs)); 323 if (!ret) 324 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf, 325 sizeof(struct pt_regs), -1); 326 327 return ret; 328} 329 330static int gpr_set(struct task_struct *target, const struct user_regset *regset, 331 unsigned int pos, unsigned int count, 332 const void *kbuf, const void __user *ubuf) 333{ 334 unsigned long reg; 335 int ret; 336 337 if (target->thread.regs == NULL) 338 return -EIO; 339 340 CHECK_FULL_REGS(target->thread.regs); 341 342 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 343 target->thread.regs, 344 0, PT_MSR * sizeof(reg)); 345 346 if (!ret && count > 0) { 347 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, ®, 348 PT_MSR * sizeof(reg), 349 (PT_MSR + 1) * sizeof(reg)); 350 if (!ret) 351 ret = set_user_msr(target, reg); 352 } 353 354 BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) != 355 offsetof(struct pt_regs, msr) + sizeof(long)); 356 357 if (!ret) 358 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 359 &target->thread.regs->orig_gpr3, 360 PT_ORIG_R3 * sizeof(reg), 361 (PT_MAX_PUT_REG + 1) * sizeof(reg)); 362 363 if (PT_MAX_PUT_REG + 1 < PT_TRAP && !ret) 364 ret = user_regset_copyin_ignore( 365 &pos, &count, &kbuf, &ubuf, 366 (PT_MAX_PUT_REG + 1) * sizeof(reg), 367 PT_TRAP * sizeof(reg)); 368 369 if (!ret && count > 0) { 370 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, ®, 371 PT_TRAP * sizeof(reg), 372 (PT_TRAP + 1) * sizeof(reg)); 373 if (!ret) 374 ret = set_user_trap(target, reg); 375 } 376 377 if (!ret) 378 ret = user_regset_copyin_ignore( 379 &pos, &count, &kbuf, &ubuf, 380 (PT_TRAP + 1) * sizeof(reg), -1); 381 382 return ret; 383} 384 385/* 386 * When the transaction is active, 'transact_fp' holds the current running 387 * value of all FPR registers and 'fp_state' holds the last checkpointed 388 * value of all FPR registers for the current transaction. When transaction 389 * is not active 'fp_state' holds the current running state of all the FPR 390 * registers. So this function which returns the current running values of 391 * all the FPR registers, needs to know whether any transaction is active 392 * or not. 393 * 394 * Userspace interface buffer layout: 395 * 396 * struct data { 397 * u64 fpr[32]; 398 * u64 fpscr; 399 * }; 400 * 401 * There are two config options CONFIG_VSX and CONFIG_PPC_TRANSACTIONAL_MEM 402 * which determines the final code in this function. All the combinations of 403 * these two config options are possible except the one below as transactional 404 * memory config pulls in CONFIG_VSX automatically. 405 * 406 * !defined(CONFIG_VSX) && defined(CONFIG_PPC_TRANSACTIONAL_MEM) 407 */ 408static int fpr_get(struct task_struct *target, const struct user_regset *regset, 409 unsigned int pos, unsigned int count, 410 void *kbuf, void __user *ubuf) 411{ 412#ifdef CONFIG_VSX 413 u64 buf[33]; 414 int i; 415#endif 416 flush_fp_to_thread(target); 417 418#if defined(CONFIG_VSX) && defined(CONFIG_PPC_TRANSACTIONAL_MEM) 419 /* copy to local buffer then write that out */ 420 if (MSR_TM_ACTIVE(target->thread.regs->msr)) { 421 flush_altivec_to_thread(target); 422 flush_tmregs_to_thread(target); 423 for (i = 0; i < 32 ; i++) 424 buf[i] = target->thread.TS_TRANS_FPR(i); 425 buf[32] = target->thread.transact_fp.fpscr; 426 } else { 427 for (i = 0; i < 32 ; i++) 428 buf[i] = target->thread.TS_FPR(i); 429 buf[32] = target->thread.fp_state.fpscr; 430 } 431 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, buf, 0, -1); 432#endif 433 434#if defined(CONFIG_VSX) && !defined(CONFIG_PPC_TRANSACTIONAL_MEM) 435 /* copy to local buffer then write that out */ 436 for (i = 0; i < 32 ; i++) 437 buf[i] = target->thread.TS_FPR(i); 438 buf[32] = target->thread.fp_state.fpscr; 439 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, buf, 0, -1); 440#endif 441 442#if !defined(CONFIG_VSX) && !defined(CONFIG_PPC_TRANSACTIONAL_MEM) 443 BUILD_BUG_ON(offsetof(struct thread_fp_state, fpscr) != 444 offsetof(struct thread_fp_state, fpr[32])); 445 446 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, 447 &target->thread.fp_state, 0, -1); 448#endif 449} 450 451/* 452 * When the transaction is active, 'transact_fp' holds the current running 453 * value of all FPR registers and 'fp_state' holds the last checkpointed 454 * value of all FPR registers for the current transaction. When transaction 455 * is not active 'fp_state' holds the current running state of all the FPR 456 * registers. So this function which setss the current running values of 457 * all the FPR registers, needs to know whether any transaction is active 458 * or not. 459 * 460 * Userspace interface buffer layout: 461 * 462 * struct data { 463 * u64 fpr[32]; 464 * u64 fpscr; 465 * }; 466 * 467 * There are two config options CONFIG_VSX and CONFIG_PPC_TRANSACTIONAL_MEM 468 * which determines the final code in this function. All the combinations of 469 * these two config options are possible except the one below as transactional 470 * memory config pulls in CONFIG_VSX automatically. 471 * 472 * !defined(CONFIG_VSX) && defined(CONFIG_PPC_TRANSACTIONAL_MEM) 473 */ 474static int fpr_set(struct task_struct *target, const struct user_regset *regset, 475 unsigned int pos, unsigned int count, 476 const void *kbuf, const void __user *ubuf) 477{ 478#ifdef CONFIG_VSX 479 u64 buf[33]; 480 int i; 481#endif 482 flush_fp_to_thread(target); 483 484#if defined(CONFIG_VSX) && defined(CONFIG_PPC_TRANSACTIONAL_MEM) 485 /* copy to local buffer then write that out */ 486 i = user_regset_copyin(&pos, &count, &kbuf, &ubuf, buf, 0, -1); 487 if (i) 488 return i; 489 490 if (MSR_TM_ACTIVE(target->thread.regs->msr)) { 491 flush_altivec_to_thread(target); 492 flush_tmregs_to_thread(target); 493 for (i = 0; i < 32 ; i++) 494 target->thread.TS_TRANS_FPR(i) = buf[i]; 495 target->thread.transact_fp.fpscr = buf[32]; 496 } else { 497 for (i = 0; i < 32 ; i++) 498 target->thread.TS_FPR(i) = buf[i]; 499 target->thread.fp_state.fpscr = buf[32]; 500 } 501 return 0; 502#endif 503 504#if defined(CONFIG_VSX) && !defined(CONFIG_PPC_TRANSACTIONAL_MEM) 505 /* copy to local buffer then write that out */ 506 i = user_regset_copyin(&pos, &count, &kbuf, &ubuf, buf, 0, -1); 507 if (i) 508 return i; 509 for (i = 0; i < 32 ; i++) 510 target->thread.TS_FPR(i) = buf[i]; 511 target->thread.fp_state.fpscr = buf[32]; 512 return 0; 513#endif 514 515#if !defined(CONFIG_VSX) && !defined(CONFIG_PPC_TRANSACTIONAL_MEM) 516 BUILD_BUG_ON(offsetof(struct thread_fp_state, fpscr) != 517 offsetof(struct thread_fp_state, fpr[32])); 518 519 return user_regset_copyin(&pos, &count, &kbuf, &ubuf, 520 &target->thread.fp_state, 0, -1); 521#endif 522} 523 524#ifdef CONFIG_ALTIVEC 525/* 526 * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go. 527 * The transfer totals 34 quadword. Quadwords 0-31 contain the 528 * corresponding vector registers. Quadword 32 contains the vscr as the 529 * last word (offset 12) within that quadword. Quadword 33 contains the 530 * vrsave as the first word (offset 0) within the quadword. 531 * 532 * This definition of the VMX state is compatible with the current PPC32 533 * ptrace interface. This allows signal handling and ptrace to use the 534 * same structures. This also simplifies the implementation of a bi-arch 535 * (combined (32- and 64-bit) gdb. 536 */ 537 538static int vr_active(struct task_struct *target, 539 const struct user_regset *regset) 540{ 541 flush_altivec_to_thread(target); 542 return target->thread.used_vr ? regset->n : 0; 543} 544 545/* 546 * When the transaction is active, 'transact_vr' holds the current running 547 * value of all the VMX registers and 'vr_state' holds the last checkpointed 548 * value of all the VMX registers for the current transaction to fall back 549 * on in case it aborts. When transaction is not active 'vr_state' holds 550 * the current running state of all the VMX registers. So this function which 551 * gets the current running values of all the VMX registers, needs to know 552 * whether any transaction is active or not. 553 * 554 * Userspace interface buffer layout: 555 * 556 * struct data { 557 * vector128 vr[32]; 558 * vector128 vscr; 559 * vector128 vrsave; 560 * }; 561 */ 562static int vr_get(struct task_struct *target, const struct user_regset *regset, 563 unsigned int pos, unsigned int count, 564 void *kbuf, void __user *ubuf) 565{ 566 struct thread_vr_state *addr; 567 int ret; 568 569 flush_altivec_to_thread(target); 570 571 BUILD_BUG_ON(offsetof(struct thread_vr_state, vscr) != 572 offsetof(struct thread_vr_state, vr[32])); 573 574#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 575 if (MSR_TM_ACTIVE(target->thread.regs->msr)) { 576 flush_fp_to_thread(target); 577 flush_tmregs_to_thread(target); 578 addr = &target->thread.transact_vr; 579 } else { 580 addr = &target->thread.vr_state; 581 } 582#else 583 addr = &target->thread.vr_state; 584#endif 585 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, 586 addr, 0, 587 33 * sizeof(vector128)); 588 if (!ret) { 589 /* 590 * Copy out only the low-order word of vrsave. 591 */ 592 union { 593 elf_vrreg_t reg; 594 u32 word; 595 } vrsave; 596 memset(&vrsave, 0, sizeof(vrsave)); 597 598#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 599 if (MSR_TM_ACTIVE(target->thread.regs->msr)) 600 vrsave.word = target->thread.transact_vrsave; 601 else 602 vrsave.word = target->thread.vrsave; 603#else 604 vrsave.word = target->thread.vrsave; 605#endif 606 607 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &vrsave, 608 33 * sizeof(vector128), -1); 609 } 610 611 return ret; 612} 613 614/* 615 * When the transaction is active, 'transact_vr' holds the current running 616 * value of all the VMX registers and 'vr_state' holds the last checkpointed 617 * value of all the VMX registers for the current transaction to fall back 618 * on in case it aborts. When transaction is not active 'vr_state' holds 619 * the current running state of all the VMX registers. So this function which 620 * sets the current running values of all the VMX registers, needs to know 621 * whether any transaction is active or not. 622 * 623 * Userspace interface buffer layout: 624 * 625 * struct data { 626 * vector128 vr[32]; 627 * vector128 vscr; 628 * vector128 vrsave; 629 * }; 630 */ 631static int vr_set(struct task_struct *target, const struct user_regset *regset, 632 unsigned int pos, unsigned int count, 633 const void *kbuf, const void __user *ubuf) 634{ 635 struct thread_vr_state *addr; 636 int ret; 637 638 flush_altivec_to_thread(target); 639 640 BUILD_BUG_ON(offsetof(struct thread_vr_state, vscr) != 641 offsetof(struct thread_vr_state, vr[32])); 642 643#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 644 if (MSR_TM_ACTIVE(target->thread.regs->msr)) { 645 flush_fp_to_thread(target); 646 flush_tmregs_to_thread(target); 647 addr = &target->thread.transact_vr; 648 } else { 649 addr = &target->thread.vr_state; 650 } 651#else 652 addr = &target->thread.vr_state; 653#endif 654 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 655 addr, 0, 656 33 * sizeof(vector128)); 657 if (!ret && count > 0) { 658 /* 659 * We use only the first word of vrsave. 660 */ 661 union { 662 elf_vrreg_t reg; 663 u32 word; 664 } vrsave; 665 memset(&vrsave, 0, sizeof(vrsave)); 666 667#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 668 if (MSR_TM_ACTIVE(target->thread.regs->msr)) 669 vrsave.word = target->thread.transact_vrsave; 670 else 671 vrsave.word = target->thread.vrsave; 672#else 673 vrsave.word = target->thread.vrsave; 674#endif 675 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &vrsave, 676 33 * sizeof(vector128), -1); 677 if (!ret) { 678 679#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 680 if (MSR_TM_ACTIVE(target->thread.regs->msr)) 681 target->thread.transact_vrsave = vrsave.word; 682 else 683 target->thread.vrsave = vrsave.word; 684#else 685 target->thread.vrsave = vrsave.word; 686#endif 687 } 688 } 689 690 return ret; 691} 692#endif /* CONFIG_ALTIVEC */ 693 694#ifdef CONFIG_VSX 695/* 696 * Currently to set and and get all the vsx state, you need to call 697 * the fp and VMX calls as well. This only get/sets the lower 32 698 * 128bit VSX registers. 699 */ 700 701static int vsr_active(struct task_struct *target, 702 const struct user_regset *regset) 703{ 704 flush_vsx_to_thread(target); 705 return target->thread.used_vsr ? regset->n : 0; 706} 707 708/* 709 * When the transaction is active, 'transact_fp' holds the current running 710 * value of all FPR registers and 'fp_state' holds the last checkpointed 711 * value of all FPR registers for the current transaction. When transaction 712 * is not active 'fp_state' holds the current running state of all the FPR 713 * registers. So this function which returns the current running values of 714 * all the FPR registers, needs to know whether any transaction is active 715 * or not. 716 * 717 * Userspace interface buffer layout: 718 * 719 * struct data { 720 * u64 vsx[32]; 721 * }; 722 */ 723static int vsr_get(struct task_struct *target, const struct user_regset *regset, 724 unsigned int pos, unsigned int count, 725 void *kbuf, void __user *ubuf) 726{ 727 u64 buf[32]; 728 int ret, i; 729 730#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 731 flush_fp_to_thread(target); 732 flush_altivec_to_thread(target); 733 flush_tmregs_to_thread(target); 734#endif 735 flush_vsx_to_thread(target); 736 737#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 738 if (MSR_TM_ACTIVE(target->thread.regs->msr)) { 739 for (i = 0; i < 32 ; i++) 740 buf[i] = target->thread. 741 transact_fp.fpr[i][TS_VSRLOWOFFSET]; 742 } else { 743 for (i = 0; i < 32 ; i++) 744 buf[i] = target->thread. 745 fp_state.fpr[i][TS_VSRLOWOFFSET]; 746 } 747#else 748 for (i = 0; i < 32 ; i++) 749 buf[i] = target->thread.fp_state.fpr[i][TS_VSRLOWOFFSET]; 750#endif 751 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, 752 buf, 0, 32 * sizeof(double)); 753 754 return ret; 755} 756 757/* 758 * When the transaction is active, 'transact_fp' holds the current running 759 * value of all FPR registers and 'fp_state' holds the last checkpointed 760 * value of all FPR registers for the current transaction. When transaction 761 * is not active 'fp_state' holds the current running state of all the FPR 762 * registers. So this function which sets the current running values of all 763 * the FPR registers, needs to know whether any transaction is active or not. 764 * 765 * Userspace interface buffer layout: 766 * 767 * struct data { 768 * u64 vsx[32]; 769 * }; 770 */ 771static int vsr_set(struct task_struct *target, const struct user_regset *regset, 772 unsigned int pos, unsigned int count, 773 const void *kbuf, const void __user *ubuf) 774{ 775 u64 buf[32]; 776 int ret,i; 777 778#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 779 flush_fp_to_thread(target); 780 flush_altivec_to_thread(target); 781 flush_tmregs_to_thread(target); 782#endif 783 flush_vsx_to_thread(target); 784 785 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 786 buf, 0, 32 * sizeof(double)); 787 788#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 789 if (MSR_TM_ACTIVE(target->thread.regs->msr)) { 790 for (i = 0; i < 32 ; i++) 791 target->thread.transact_fp. 792 fpr[i][TS_VSRLOWOFFSET] = buf[i]; 793 } else { 794 for (i = 0; i < 32 ; i++) 795 target->thread.fp_state. 796 fpr[i][TS_VSRLOWOFFSET] = buf[i]; 797 } 798#else 799 for (i = 0; i < 32 ; i++) 800 target->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = buf[i]; 801#endif 802 803 804 return ret; 805} 806#endif /* CONFIG_VSX */ 807 808#ifdef CONFIG_SPE 809 810/* 811 * For get_evrregs/set_evrregs functions 'data' has the following layout: 812 * 813 * struct { 814 * u32 evr[32]; 815 * u64 acc; 816 * u32 spefscr; 817 * } 818 */ 819 820static int evr_active(struct task_struct *target, 821 const struct user_regset *regset) 822{ 823 flush_spe_to_thread(target); 824 return target->thread.used_spe ? regset->n : 0; 825} 826 827static int evr_get(struct task_struct *target, const struct user_regset *regset, 828 unsigned int pos, unsigned int count, 829 void *kbuf, void __user *ubuf) 830{ 831 int ret; 832 833 flush_spe_to_thread(target); 834 835 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, 836 &target->thread.evr, 837 0, sizeof(target->thread.evr)); 838 839 BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) != 840 offsetof(struct thread_struct, spefscr)); 841 842 if (!ret) 843 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, 844 &target->thread.acc, 845 sizeof(target->thread.evr), -1); 846 847 return ret; 848} 849 850static int evr_set(struct task_struct *target, const struct user_regset *regset, 851 unsigned int pos, unsigned int count, 852 const void *kbuf, const void __user *ubuf) 853{ 854 int ret; 855 856 flush_spe_to_thread(target); 857 858 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 859 &target->thread.evr, 860 0, sizeof(target->thread.evr)); 861 862 BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) != 863 offsetof(struct thread_struct, spefscr)); 864 865 if (!ret) 866 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 867 &target->thread.acc, 868 sizeof(target->thread.evr), -1); 869 870 return ret; 871} 872#endif /* CONFIG_SPE */ 873 874#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 875/** 876 * tm_cgpr_active - get active number of registers in CGPR 877 * @target: The target task. 878 * @regset: The user regset structure. 879 * 880 * This function checks for the active number of available 881 * regisers in transaction checkpointed GPR category. 882 */ 883static int tm_cgpr_active(struct task_struct *target, 884 const struct user_regset *regset) 885{ 886 if (!cpu_has_feature(CPU_FTR_TM)) 887 return -ENODEV; 888 889 if (!MSR_TM_ACTIVE(target->thread.regs->msr)) 890 return 0; 891 892 return regset->n; 893} 894 895/** 896 * tm_cgpr_get - get CGPR registers 897 * @target: The target task. 898 * @regset: The user regset structure. 899 * @pos: The buffer position. 900 * @count: Number of bytes to copy. 901 * @kbuf: Kernel buffer to copy from. 902 * @ubuf: User buffer to copy into. 903 * 904 * This function gets transaction checkpointed GPR registers. 905 * 906 * When the transaction is active, 'ckpt_regs' holds all the checkpointed 907 * GPR register values for the current transaction to fall back on if it 908 * aborts in between. This function gets those checkpointed GPR registers. 909 * The userspace interface buffer layout is as follows. 910 * 911 * struct data { 912 * struct pt_regs ckpt_regs; 913 * }; 914 */ 915static int tm_cgpr_get(struct task_struct *target, 916 const struct user_regset *regset, 917 unsigned int pos, unsigned int count, 918 void *kbuf, void __user *ubuf) 919{ 920 int ret; 921 922 if (!cpu_has_feature(CPU_FTR_TM)) 923 return -ENODEV; 924 925 if (!MSR_TM_ACTIVE(target->thread.regs->msr)) 926 return -ENODATA; 927 928 flush_fp_to_thread(target); 929 flush_altivec_to_thread(target); 930 flush_tmregs_to_thread(target); 931 932 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, 933 &target->thread.ckpt_regs, 934 0, offsetof(struct pt_regs, msr)); 935 if (!ret) { 936 unsigned long msr = get_user_ckpt_msr(target); 937 938 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &msr, 939 offsetof(struct pt_regs, msr), 940 offsetof(struct pt_regs, msr) + 941 sizeof(msr)); 942 } 943 944 BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) != 945 offsetof(struct pt_regs, msr) + sizeof(long)); 946 947 if (!ret) 948 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, 949 &target->thread.ckpt_regs.orig_gpr3, 950 offsetof(struct pt_regs, orig_gpr3), 951 sizeof(struct pt_regs)); 952 if (!ret) 953 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf, 954 sizeof(struct pt_regs), -1); 955 956 return ret; 957} 958 959/* 960 * tm_cgpr_set - set the CGPR registers 961 * @target: The target task. 962 * @regset: The user regset structure. 963 * @pos: The buffer position. 964 * @count: Number of bytes to copy. 965 * @kbuf: Kernel buffer to copy into. 966 * @ubuf: User buffer to copy from. 967 * 968 * This function sets in transaction checkpointed GPR registers. 969 * 970 * When the transaction is active, 'ckpt_regs' holds the checkpointed 971 * GPR register values for the current transaction to fall back on if it 972 * aborts in between. This function sets those checkpointed GPR registers. 973 * The userspace interface buffer layout is as follows. 974 * 975 * struct data { 976 * struct pt_regs ckpt_regs; 977 * }; 978 */ 979static int tm_cgpr_set(struct task_struct *target, 980 const struct user_regset *regset, 981 unsigned int pos, unsigned int count, 982 const void *kbuf, const void __user *ubuf) 983{ 984 unsigned long reg; 985 int ret; 986 987 if (!cpu_has_feature(CPU_FTR_TM)) 988 return -ENODEV; 989 990 if (!MSR_TM_ACTIVE(target->thread.regs->msr)) 991 return -ENODATA; 992 993 flush_fp_to_thread(target); 994 flush_altivec_to_thread(target); 995 flush_tmregs_to_thread(target); 996 997 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 998 &target->thread.ckpt_regs, 999 0, PT_MSR * sizeof(reg)); 1000 1001 if (!ret && count > 0) { 1002 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, ®, 1003 PT_MSR * sizeof(reg), 1004 (PT_MSR + 1) * sizeof(reg)); 1005 if (!ret) 1006 ret = set_user_ckpt_msr(target, reg); 1007 } 1008 1009 BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) != 1010 offsetof(struct pt_regs, msr) + sizeof(long)); 1011 1012 if (!ret) 1013 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 1014 &target->thread.ckpt_regs.orig_gpr3, 1015 PT_ORIG_R3 * sizeof(reg), 1016 (PT_MAX_PUT_REG + 1) * sizeof(reg)); 1017 1018 if (PT_MAX_PUT_REG + 1 < PT_TRAP && !ret) 1019 ret = user_regset_copyin_ignore( 1020 &pos, &count, &kbuf, &ubuf, 1021 (PT_MAX_PUT_REG + 1) * sizeof(reg), 1022 PT_TRAP * sizeof(reg)); 1023 1024 if (!ret && count > 0) { 1025 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, ®, 1026 PT_TRAP * sizeof(reg), 1027 (PT_TRAP + 1) * sizeof(reg)); 1028 if (!ret) 1029 ret = set_user_ckpt_trap(target, reg); 1030 } 1031 1032 if (!ret) 1033 ret = user_regset_copyin_ignore( 1034 &pos, &count, &kbuf, &ubuf, 1035 (PT_TRAP + 1) * sizeof(reg), -1); 1036 1037 return ret; 1038} 1039 1040/** 1041 * tm_cfpr_active - get active number of registers in CFPR 1042 * @target: The target task. 1043 * @regset: The user regset structure. 1044 * 1045 * This function checks for the active number of available 1046 * regisers in transaction checkpointed FPR category. 1047 */ 1048static int tm_cfpr_active(struct task_struct *target, 1049 const struct user_regset *regset) 1050{ 1051 if (!cpu_has_feature(CPU_FTR_TM)) 1052 return -ENODEV; 1053 1054 if (!MSR_TM_ACTIVE(target->thread.regs->msr)) 1055 return 0; 1056 1057 return regset->n; 1058} 1059 1060/** 1061 * tm_cfpr_get - get CFPR registers 1062 * @target: The target task. 1063 * @regset: The user regset structure. 1064 * @pos: The buffer position. 1065 * @count: Number of bytes to copy. 1066 * @kbuf: Kernel buffer to copy from. 1067 * @ubuf: User buffer to copy into. 1068 * 1069 * This function gets in transaction checkpointed FPR registers. 1070 * 1071 * When the transaction is active 'fp_state' holds the checkpointed 1072 * values for the current transaction to fall back on if it aborts 1073 * in between. This function gets those checkpointed FPR registers. 1074 * The userspace interface buffer layout is as follows. 1075 * 1076 * struct data { 1077 * u64 fpr[32]; 1078 * u64 fpscr; 1079 *}; 1080 */ 1081static int tm_cfpr_get(struct task_struct *target, 1082 const struct user_regset *regset, 1083 unsigned int pos, unsigned int count, 1084 void *kbuf, void __user *ubuf) 1085{ 1086 u64 buf[33]; 1087 int i; 1088 1089 if (!cpu_has_feature(CPU_FTR_TM)) 1090 return -ENODEV; 1091 1092 if (!MSR_TM_ACTIVE(target->thread.regs->msr)) 1093 return -ENODATA; 1094 1095 flush_fp_to_thread(target); 1096 flush_altivec_to_thread(target); 1097 flush_tmregs_to_thread(target); 1098 1099 /* copy to local buffer then write that out */ 1100 for (i = 0; i < 32 ; i++) 1101 buf[i] = target->thread.TS_FPR(i); 1102 buf[32] = target->thread.fp_state.fpscr; 1103 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, buf, 0, -1); 1104} 1105 1106/** 1107 * tm_cfpr_set - set CFPR registers 1108 * @target: The target task. 1109 * @regset: The user regset structure. 1110 * @pos: The buffer position. 1111 * @count: Number of bytes to copy. 1112 * @kbuf: Kernel buffer to copy into. 1113 * @ubuf: User buffer to copy from. 1114 * 1115 * This function sets in transaction checkpointed FPR registers. 1116 * 1117 * When the transaction is active 'fp_state' holds the checkpointed 1118 * FPR register values for the current transaction to fall back on 1119 * if it aborts in between. This function sets these checkpointed 1120 * FPR registers. The userspace interface buffer layout is as follows. 1121 * 1122 * struct data { 1123 * u64 fpr[32]; 1124 * u64 fpscr; 1125 *}; 1126 */ 1127static int tm_cfpr_set(struct task_struct *target, 1128 const struct user_regset *regset, 1129 unsigned int pos, unsigned int count, 1130 const void *kbuf, const void __user *ubuf) 1131{ 1132 u64 buf[33]; 1133 int i; 1134 1135 if (!cpu_has_feature(CPU_FTR_TM)) 1136 return -ENODEV; 1137 1138 if (!MSR_TM_ACTIVE(target->thread.regs->msr)) 1139 return -ENODATA; 1140 1141 flush_fp_to_thread(target); 1142 flush_altivec_to_thread(target); 1143 flush_tmregs_to_thread(target); 1144 1145 /* copy to local buffer then write that out */ 1146 i = user_regset_copyin(&pos, &count, &kbuf, &ubuf, buf, 0, -1); 1147 if (i) 1148 return i; 1149 for (i = 0; i < 32 ; i++) 1150 target->thread.TS_FPR(i) = buf[i]; 1151 target->thread.fp_state.fpscr = buf[32]; 1152 return 0; 1153} 1154 1155/** 1156 * tm_cvmx_active - get active number of registers in CVMX 1157 * @target: The target task. 1158 * @regset: The user regset structure. 1159 * 1160 * This function checks for the active number of available 1161 * regisers in checkpointed VMX category. 1162 */ 1163static int tm_cvmx_active(struct task_struct *target, 1164 const struct user_regset *regset) 1165{ 1166 if (!cpu_has_feature(CPU_FTR_TM)) 1167 return -ENODEV; 1168 1169 if (!MSR_TM_ACTIVE(target->thread.regs->msr)) 1170 return 0; 1171 1172 return regset->n; 1173} 1174 1175/** 1176 * tm_cvmx_get - get CMVX registers 1177 * @target: The target task. 1178 * @regset: The user regset structure. 1179 * @pos: The buffer position. 1180 * @count: Number of bytes to copy. 1181 * @kbuf: Kernel buffer to copy from. 1182 * @ubuf: User buffer to copy into. 1183 * 1184 * This function gets in transaction checkpointed VMX registers. 1185 * 1186 * When the transaction is active 'vr_state' and 'vr_save' hold 1187 * the checkpointed values for the current transaction to fall 1188 * back on if it aborts in between. The userspace interface buffer 1189 * layout is as follows. 1190 * 1191 * struct data { 1192 * vector128 vr[32]; 1193 * vector128 vscr; 1194 * vector128 vrsave; 1195 *}; 1196 */ 1197static int tm_cvmx_get(struct task_struct *target, 1198 const struct user_regset *regset, 1199 unsigned int pos, unsigned int count, 1200 void *kbuf, void __user *ubuf) 1201{ 1202 int ret; 1203 1204 BUILD_BUG_ON(TVSO(vscr) != TVSO(vr[32])); 1205 1206 if (!cpu_has_feature(CPU_FTR_TM)) 1207 return -ENODEV; 1208 1209 if (!MSR_TM_ACTIVE(target->thread.regs->msr)) 1210 return -ENODATA; 1211 1212 /* Flush the state */ 1213 flush_fp_to_thread(target); 1214 flush_altivec_to_thread(target); 1215 flush_tmregs_to_thread(target); 1216 1217 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, 1218 &target->thread.vr_state, 0, 1219 33 * sizeof(vector128)); 1220 if (!ret) { 1221 /* 1222 * Copy out only the low-order word of vrsave. 1223 */ 1224 union { 1225 elf_vrreg_t reg; 1226 u32 word; 1227 } vrsave; 1228 memset(&vrsave, 0, sizeof(vrsave)); 1229 vrsave.word = target->thread.vrsave; 1230 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &vrsave, 1231 33 * sizeof(vector128), -1); 1232 } 1233 1234 return ret; 1235} 1236 1237/** 1238 * tm_cvmx_set - set CMVX registers 1239 * @target: The target task. 1240 * @regset: The user regset structure. 1241 * @pos: The buffer position. 1242 * @count: Number of bytes to copy. 1243 * @kbuf: Kernel buffer to copy into. 1244 * @ubuf: User buffer to copy from. 1245 * 1246 * This function sets in transaction checkpointed VMX registers. 1247 * 1248 * When the transaction is active 'vr_state' and 'vr_save' hold 1249 * the checkpointed values for the current transaction to fall 1250 * back on if it aborts in between. The userspace interface buffer 1251 * layout is as follows. 1252 * 1253 * struct data { 1254 * vector128 vr[32]; 1255 * vector128 vscr; 1256 * vector128 vrsave; 1257 *}; 1258 */ 1259static int tm_cvmx_set(struct task_struct *target, 1260 const struct user_regset *regset, 1261 unsigned int pos, unsigned int count, 1262 const void *kbuf, const void __user *ubuf) 1263{ 1264 int ret; 1265 1266 BUILD_BUG_ON(TVSO(vscr) != TVSO(vr[32])); 1267 1268 if (!cpu_has_feature(CPU_FTR_TM)) 1269 return -ENODEV; 1270 1271 if (!MSR_TM_ACTIVE(target->thread.regs->msr)) 1272 return -ENODATA; 1273 1274 flush_fp_to_thread(target); 1275 flush_altivec_to_thread(target); 1276 flush_tmregs_to_thread(target); 1277 1278 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 1279 &target->thread.vr_state, 0, 1280 33 * sizeof(vector128)); 1281 if (!ret && count > 0) { 1282 /* 1283 * We use only the low-order word of vrsave. 1284 */ 1285 union { 1286 elf_vrreg_t reg; 1287 u32 word; 1288 } vrsave; 1289 memset(&vrsave, 0, sizeof(vrsave)); 1290 vrsave.word = target->thread.vrsave; 1291 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &vrsave, 1292 33 * sizeof(vector128), -1); 1293 if (!ret) 1294 target->thread.vrsave = vrsave.word; 1295 } 1296 1297 return ret; 1298} 1299 1300/** 1301 * tm_cvsx_active - get active number of registers in CVSX 1302 * @target: The target task. 1303 * @regset: The user regset structure. 1304 * 1305 * This function checks for the active number of available 1306 * regisers in transaction checkpointed VSX category. 1307 */ 1308static int tm_cvsx_active(struct task_struct *target, 1309 const struct user_regset *regset) 1310{ 1311 if (!cpu_has_feature(CPU_FTR_TM)) 1312 return -ENODEV; 1313 1314 if (!MSR_TM_ACTIVE(target->thread.regs->msr)) 1315 return 0; 1316 1317 flush_vsx_to_thread(target); 1318 return target->thread.used_vsr ? regset->n : 0; 1319} 1320 1321/** 1322 * tm_cvsx_get - get CVSX registers 1323 * @target: The target task. 1324 * @regset: The user regset structure. 1325 * @pos: The buffer position. 1326 * @count: Number of bytes to copy. 1327 * @kbuf: Kernel buffer to copy from. 1328 * @ubuf: User buffer to copy into. 1329 * 1330 * This function gets in transaction checkpointed VSX registers. 1331 * 1332 * When the transaction is active 'fp_state' holds the checkpointed 1333 * values for the current transaction to fall back on if it aborts 1334 * in between. This function gets those checkpointed VSX registers. 1335 * The userspace interface buffer layout is as follows. 1336 * 1337 * struct data { 1338 * u64 vsx[32]; 1339 *}; 1340 */ 1341static int tm_cvsx_get(struct task_struct *target, 1342 const struct user_regset *regset, 1343 unsigned int pos, unsigned int count, 1344 void *kbuf, void __user *ubuf) 1345{ 1346 u64 buf[32]; 1347 int ret, i; 1348 1349 if (!cpu_has_feature(CPU_FTR_TM)) 1350 return -ENODEV; 1351 1352 if (!MSR_TM_ACTIVE(target->thread.regs->msr)) 1353 return -ENODATA; 1354 1355 /* Flush the state */ 1356 flush_fp_to_thread(target); 1357 flush_altivec_to_thread(target); 1358 flush_tmregs_to_thread(target); 1359 flush_vsx_to_thread(target); 1360 1361 for (i = 0; i < 32 ; i++) 1362 buf[i] = target->thread.fp_state.fpr[i][TS_VSRLOWOFFSET]; 1363 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, 1364 buf, 0, 32 * sizeof(double)); 1365 1366 return ret; 1367} 1368 1369/** 1370 * tm_cvsx_set - set CFPR registers 1371 * @target: The target task. 1372 * @regset: The user regset structure. 1373 * @pos: The buffer position. 1374 * @count: Number of bytes to copy. 1375 * @kbuf: Kernel buffer to copy into. 1376 * @ubuf: User buffer to copy from. 1377 * 1378 * This function sets in transaction checkpointed VSX registers. 1379 * 1380 * When the transaction is active 'fp_state' holds the checkpointed 1381 * VSX register values for the current transaction to fall back on 1382 * if it aborts in between. This function sets these checkpointed 1383 * FPR registers. The userspace interface buffer layout is as follows. 1384 * 1385 * struct data { 1386 * u64 vsx[32]; 1387 *}; 1388 */ 1389static int tm_cvsx_set(struct task_struct *target, 1390 const struct user_regset *regset, 1391 unsigned int pos, unsigned int count, 1392 const void *kbuf, const void __user *ubuf) 1393{ 1394 u64 buf[32]; 1395 int ret, i; 1396 1397 if (!cpu_has_feature(CPU_FTR_TM)) 1398 return -ENODEV; 1399 1400 if (!MSR_TM_ACTIVE(target->thread.regs->msr)) 1401 return -ENODATA; 1402 1403 /* Flush the state */ 1404 flush_fp_to_thread(target); 1405 flush_altivec_to_thread(target); 1406 flush_tmregs_to_thread(target); 1407 flush_vsx_to_thread(target); 1408 1409 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 1410 buf, 0, 32 * sizeof(double)); 1411 for (i = 0; i < 32 ; i++) 1412 target->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = buf[i]; 1413 1414 return ret; 1415} 1416 1417/** 1418 * tm_spr_active - get active number of registers in TM SPR 1419 * @target: The target task. 1420 * @regset: The user regset structure. 1421 * 1422 * This function checks the active number of available 1423 * regisers in the transactional memory SPR category. 1424 */ 1425static int tm_spr_active(struct task_struct *target, 1426 const struct user_regset *regset) 1427{ 1428 if (!cpu_has_feature(CPU_FTR_TM)) 1429 return -ENODEV; 1430 1431 return regset->n; 1432} 1433 1434/** 1435 * tm_spr_get - get the TM related SPR registers 1436 * @target: The target task. 1437 * @regset: The user regset structure. 1438 * @pos: The buffer position. 1439 * @count: Number of bytes to copy. 1440 * @kbuf: Kernel buffer to copy from. 1441 * @ubuf: User buffer to copy into. 1442 * 1443 * This function gets transactional memory related SPR registers. 1444 * The userspace interface buffer layout is as follows. 1445 * 1446 * struct { 1447 * u64 tm_tfhar; 1448 * u64 tm_texasr; 1449 * u64 tm_tfiar; 1450 * }; 1451 */ 1452static int tm_spr_get(struct task_struct *target, 1453 const struct user_regset *regset, 1454 unsigned int pos, unsigned int count, 1455 void *kbuf, void __user *ubuf) 1456{ 1457 int ret; 1458 1459 /* Build tests */ 1460 BUILD_BUG_ON(TSO(tm_tfhar) + sizeof(u64) != TSO(tm_texasr)); 1461 BUILD_BUG_ON(TSO(tm_texasr) + sizeof(u64) != TSO(tm_tfiar)); 1462 BUILD_BUG_ON(TSO(tm_tfiar) + sizeof(u64) != TSO(ckpt_regs)); 1463 1464 if (!cpu_has_feature(CPU_FTR_TM)) 1465 return -ENODEV; 1466 1467 /* Flush the states */ 1468 flush_fp_to_thread(target); 1469 flush_altivec_to_thread(target); 1470 flush_tmregs_to_thread(target); 1471 1472 /* TFHAR register */ 1473 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, 1474 &target->thread.tm_tfhar, 0, sizeof(u64)); 1475 1476 /* TEXASR register */ 1477 if (!ret) 1478 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, 1479 &target->thread.tm_texasr, sizeof(u64), 1480 2 * sizeof(u64)); 1481 1482 /* TFIAR register */ 1483 if (!ret) 1484 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, 1485 &target->thread.tm_tfiar, 1486 2 * sizeof(u64), 3 * sizeof(u64)); 1487 return ret; 1488} 1489 1490/** 1491 * tm_spr_set - set the TM related SPR registers 1492 * @target: The target task. 1493 * @regset: The user regset structure. 1494 * @pos: The buffer position. 1495 * @count: Number of bytes to copy. 1496 * @kbuf: Kernel buffer to copy into. 1497 * @ubuf: User buffer to copy from. 1498 * 1499 * This function sets transactional memory related SPR registers. 1500 * The userspace interface buffer layout is as follows. 1501 * 1502 * struct { 1503 * u64 tm_tfhar; 1504 * u64 tm_texasr; 1505 * u64 tm_tfiar; 1506 * }; 1507 */ 1508static int tm_spr_set(struct task_struct *target, 1509 const struct user_regset *regset, 1510 unsigned int pos, unsigned int count, 1511 const void *kbuf, const void __user *ubuf) 1512{ 1513 int ret; 1514 1515 /* Build tests */ 1516 BUILD_BUG_ON(TSO(tm_tfhar) + sizeof(u64) != TSO(tm_texasr)); 1517 BUILD_BUG_ON(TSO(tm_texasr) + sizeof(u64) != TSO(tm_tfiar)); 1518 BUILD_BUG_ON(TSO(tm_tfiar) + sizeof(u64) != TSO(ckpt_regs)); 1519 1520 if (!cpu_has_feature(CPU_FTR_TM)) 1521 return -ENODEV; 1522 1523 /* Flush the states */ 1524 flush_fp_to_thread(target); 1525 flush_altivec_to_thread(target); 1526 flush_tmregs_to_thread(target); 1527 1528 /* TFHAR register */ 1529 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 1530 &target->thread.tm_tfhar, 0, sizeof(u64)); 1531 1532 /* TEXASR register */ 1533 if (!ret) 1534 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 1535 &target->thread.tm_texasr, sizeof(u64), 1536 2 * sizeof(u64)); 1537 1538 /* TFIAR register */ 1539 if (!ret) 1540 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 1541 &target->thread.tm_tfiar, 1542 2 * sizeof(u64), 3 * sizeof(u64)); 1543 return ret; 1544} 1545 1546static int tm_tar_active(struct task_struct *target, 1547 const struct user_regset *regset) 1548{ 1549 if (!cpu_has_feature(CPU_FTR_TM)) 1550 return -ENODEV; 1551 1552 if (MSR_TM_ACTIVE(target->thread.regs->msr)) 1553 return regset->n; 1554 1555 return 0; 1556} 1557 1558static int tm_tar_get(struct task_struct *target, 1559 const struct user_regset *regset, 1560 unsigned int pos, unsigned int count, 1561 void *kbuf, void __user *ubuf) 1562{ 1563 int ret; 1564 1565 if (!cpu_has_feature(CPU_FTR_TM)) 1566 return -ENODEV; 1567 1568 if (!MSR_TM_ACTIVE(target->thread.regs->msr)) 1569 return -ENODATA; 1570 1571 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, 1572 &target->thread.tm_tar, 0, sizeof(u64)); 1573 return ret; 1574} 1575 1576static int tm_tar_set(struct task_struct *target, 1577 const struct user_regset *regset, 1578 unsigned int pos, unsigned int count, 1579 const void *kbuf, const void __user *ubuf) 1580{ 1581 int ret; 1582 1583 if (!cpu_has_feature(CPU_FTR_TM)) 1584 return -ENODEV; 1585 1586 if (!MSR_TM_ACTIVE(target->thread.regs->msr)) 1587 return -ENODATA; 1588 1589 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 1590 &target->thread.tm_tar, 0, sizeof(u64)); 1591 return ret; 1592} 1593 1594static int tm_ppr_active(struct task_struct *target, 1595 const struct user_regset *regset) 1596{ 1597 if (!cpu_has_feature(CPU_FTR_TM)) 1598 return -ENODEV; 1599 1600 if (MSR_TM_ACTIVE(target->thread.regs->msr)) 1601 return regset->n; 1602 1603 return 0; 1604} 1605 1606 1607static int tm_ppr_get(struct task_struct *target, 1608 const struct user_regset *regset, 1609 unsigned int pos, unsigned int count, 1610 void *kbuf, void __user *ubuf) 1611{ 1612 int ret; 1613 1614 if (!cpu_has_feature(CPU_FTR_TM)) 1615 return -ENODEV; 1616 1617 if (!MSR_TM_ACTIVE(target->thread.regs->msr)) 1618 return -ENODATA; 1619 1620 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, 1621 &target->thread.tm_ppr, 0, sizeof(u64)); 1622 return ret; 1623} 1624 1625static int tm_ppr_set(struct task_struct *target, 1626 const struct user_regset *regset, 1627 unsigned int pos, unsigned int count, 1628 const void *kbuf, const void __user *ubuf) 1629{ 1630 int ret; 1631 1632 if (!cpu_has_feature(CPU_FTR_TM)) 1633 return -ENODEV; 1634 1635 if (!MSR_TM_ACTIVE(target->thread.regs->msr)) 1636 return -ENODATA; 1637 1638 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 1639 &target->thread.tm_ppr, 0, sizeof(u64)); 1640 return ret; 1641} 1642 1643static int tm_dscr_active(struct task_struct *target, 1644 const struct user_regset *regset) 1645{ 1646 if (!cpu_has_feature(CPU_FTR_TM)) 1647 return -ENODEV; 1648 1649 if (MSR_TM_ACTIVE(target->thread.regs->msr)) 1650 return regset->n; 1651 1652 return 0; 1653} 1654 1655static int tm_dscr_get(struct task_struct *target, 1656 const struct user_regset *regset, 1657 unsigned int pos, unsigned int count, 1658 void *kbuf, void __user *ubuf) 1659{ 1660 int ret; 1661 1662 if (!cpu_has_feature(CPU_FTR_TM)) 1663 return -ENODEV; 1664 1665 if (!MSR_TM_ACTIVE(target->thread.regs->msr)) 1666 return -ENODATA; 1667 1668 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, 1669 &target->thread.tm_dscr, 0, sizeof(u64)); 1670 return ret; 1671} 1672 1673static int tm_dscr_set(struct task_struct *target, 1674 const struct user_regset *regset, 1675 unsigned int pos, unsigned int count, 1676 const void *kbuf, const void __user *ubuf) 1677{ 1678 int ret; 1679 1680 if (!cpu_has_feature(CPU_FTR_TM)) 1681 return -ENODEV; 1682 1683 if (!MSR_TM_ACTIVE(target->thread.regs->msr)) 1684 return -ENODATA; 1685 1686 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 1687 &target->thread.tm_dscr, 0, sizeof(u64)); 1688 return ret; 1689} 1690#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 1691 1692#ifdef CONFIG_PPC64 1693static int ppr_get(struct task_struct *target, 1694 const struct user_regset *regset, 1695 unsigned int pos, unsigned int count, 1696 void *kbuf, void __user *ubuf) 1697{ 1698 int ret; 1699 1700 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, 1701 &target->thread.ppr, 0, sizeof(u64)); 1702 return ret; 1703} 1704 1705static int ppr_set(struct task_struct *target, 1706 const struct user_regset *regset, 1707 unsigned int pos, unsigned int count, 1708 const void *kbuf, const void __user *ubuf) 1709{ 1710 int ret; 1711 1712 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 1713 &target->thread.ppr, 0, sizeof(u64)); 1714 return ret; 1715} 1716 1717static int dscr_get(struct task_struct *target, 1718 const struct user_regset *regset, 1719 unsigned int pos, unsigned int count, 1720 void *kbuf, void __user *ubuf) 1721{ 1722 int ret; 1723 1724 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, 1725 &target->thread.dscr, 0, sizeof(u64)); 1726 return ret; 1727} 1728static int dscr_set(struct task_struct *target, 1729 const struct user_regset *regset, 1730 unsigned int pos, unsigned int count, 1731 const void *kbuf, const void __user *ubuf) 1732{ 1733 int ret; 1734 1735 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 1736 &target->thread.dscr, 0, sizeof(u64)); 1737 return ret; 1738} 1739#endif 1740#ifdef CONFIG_PPC_BOOK3S_64 1741static int tar_get(struct task_struct *target, 1742 const struct user_regset *regset, 1743 unsigned int pos, unsigned int count, 1744 void *kbuf, void __user *ubuf) 1745{ 1746 int ret; 1747 1748 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, 1749 &target->thread.tar, 0, sizeof(u64)); 1750 return ret; 1751} 1752static int tar_set(struct task_struct *target, 1753 const struct user_regset *regset, 1754 unsigned int pos, unsigned int count, 1755 const void *kbuf, const void __user *ubuf) 1756{ 1757 int ret; 1758 1759 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 1760 &target->thread.tar, 0, sizeof(u64)); 1761 return ret; 1762} 1763 1764static int ebb_active(struct task_struct *target, 1765 const struct user_regset *regset) 1766{ 1767 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 1768 return -ENODEV; 1769 1770 if (target->thread.used_ebb) 1771 return regset->n; 1772 1773 return 0; 1774} 1775 1776static int ebb_get(struct task_struct *target, 1777 const struct user_regset *regset, 1778 unsigned int pos, unsigned int count, 1779 void *kbuf, void __user *ubuf) 1780{ 1781 /* Build tests */ 1782 BUILD_BUG_ON(TSO(ebbrr) + sizeof(unsigned long) != TSO(ebbhr)); 1783 BUILD_BUG_ON(TSO(ebbhr) + sizeof(unsigned long) != TSO(bescr)); 1784 1785 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 1786 return -ENODEV; 1787 1788 if (!target->thread.used_ebb) 1789 return -ENODATA; 1790 1791 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, 1792 &target->thread.ebbrr, 0, 3 * sizeof(unsigned long)); 1793} 1794 1795static int ebb_set(struct task_struct *target, 1796 const struct user_regset *regset, 1797 unsigned int pos, unsigned int count, 1798 const void *kbuf, const void __user *ubuf) 1799{ 1800 int ret = 0; 1801 1802 /* Build tests */ 1803 BUILD_BUG_ON(TSO(ebbrr) + sizeof(unsigned long) != TSO(ebbhr)); 1804 BUILD_BUG_ON(TSO(ebbhr) + sizeof(unsigned long) != TSO(bescr)); 1805 1806 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 1807 return -ENODEV; 1808 1809 if (target->thread.used_ebb) 1810 return -ENODATA; 1811 1812 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 1813 &target->thread.ebbrr, 0, sizeof(unsigned long)); 1814 1815 if (!ret) 1816 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 1817 &target->thread.ebbhr, sizeof(unsigned long), 1818 2 * sizeof(unsigned long)); 1819 1820 if (!ret) 1821 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 1822 &target->thread.bescr, 1823 2 * sizeof(unsigned long), 3 * sizeof(unsigned long)); 1824 1825 return ret; 1826} 1827static int pmu_active(struct task_struct *target, 1828 const struct user_regset *regset) 1829{ 1830 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 1831 return -ENODEV; 1832 1833 return regset->n; 1834} 1835 1836static int pmu_get(struct task_struct *target, 1837 const struct user_regset *regset, 1838 unsigned int pos, unsigned int count, 1839 void *kbuf, void __user *ubuf) 1840{ 1841 /* Build tests */ 1842 BUILD_BUG_ON(TSO(siar) + sizeof(unsigned long) != TSO(sdar)); 1843 BUILD_BUG_ON(TSO(sdar) + sizeof(unsigned long) != TSO(sier)); 1844 BUILD_BUG_ON(TSO(sier) + sizeof(unsigned long) != TSO(mmcr2)); 1845 BUILD_BUG_ON(TSO(mmcr2) + sizeof(unsigned long) != TSO(mmcr0)); 1846 1847 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 1848 return -ENODEV; 1849 1850 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, 1851 &target->thread.siar, 0, 1852 5 * sizeof(unsigned long)); 1853} 1854 1855static int pmu_set(struct task_struct *target, 1856 const struct user_regset *regset, 1857 unsigned int pos, unsigned int count, 1858 const void *kbuf, const void __user *ubuf) 1859{ 1860 int ret = 0; 1861 1862 /* Build tests */ 1863 BUILD_BUG_ON(TSO(siar) + sizeof(unsigned long) != TSO(sdar)); 1864 BUILD_BUG_ON(TSO(sdar) + sizeof(unsigned long) != TSO(sier)); 1865 BUILD_BUG_ON(TSO(sier) + sizeof(unsigned long) != TSO(mmcr2)); 1866 BUILD_BUG_ON(TSO(mmcr2) + sizeof(unsigned long) != TSO(mmcr0)); 1867 1868 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 1869 return -ENODEV; 1870 1871 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 1872 &target->thread.siar, 0, 1873 sizeof(unsigned long)); 1874 1875 if (!ret…
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