/arch/powerpc/include/asm/exception-64s.h

http://github.com/mirrors/linux · C Header · 128 lines · 67 code · 18 blank · 43 comment · 0 complexity · b092269c53440c59eed9054db6d5ade1 MD5 · raw file

  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. #ifndef _ASM_POWERPC_EXCEPTION_H
  3. #define _ASM_POWERPC_EXCEPTION_H
  4. /*
  5. * Extracted from head_64.S
  6. *
  7. * PowerPC version
  8. * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  9. *
  10. * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
  11. * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
  12. * Adapted for Power Macintosh by Paul Mackerras.
  13. * Low-level exception handlers and MMU support
  14. * rewritten by Paul Mackerras.
  15. * Copyright (C) 1996 Paul Mackerras.
  16. *
  17. * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
  18. * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
  19. *
  20. * This file contains the low-level support and setup for the
  21. * PowerPC-64 platform, including trap and interrupt dispatch.
  22. */
  23. /*
  24. * The following macros define the code that appears as
  25. * the prologue to each of the exception handlers. They
  26. * are split into two parts to allow a single kernel binary
  27. * to be used for pSeries and iSeries.
  28. *
  29. * We make as much of the exception code common between native
  30. * exception handlers (including pSeries LPAR) and iSeries LPAR
  31. * implementations as possible.
  32. */
  33. #include <asm/feature-fixups.h>
  34. /* PACA save area size in u64 units (exgen, exmc, etc) */
  35. #define EX_SIZE 10
  36. /*
  37. * maximum recursive depth of MCE exceptions
  38. */
  39. #define MAX_MCE_DEPTH 4
  40. #ifdef __ASSEMBLY__
  41. #define STF_ENTRY_BARRIER_SLOT \
  42. STF_ENTRY_BARRIER_FIXUP_SECTION; \
  43. nop; \
  44. nop; \
  45. nop
  46. #define STF_EXIT_BARRIER_SLOT \
  47. STF_EXIT_BARRIER_FIXUP_SECTION; \
  48. nop; \
  49. nop; \
  50. nop; \
  51. nop; \
  52. nop; \
  53. nop
  54. /*
  55. * r10 must be free to use, r13 must be paca
  56. */
  57. #define INTERRUPT_TO_KERNEL \
  58. STF_ENTRY_BARRIER_SLOT
  59. /*
  60. * Macros for annotating the expected destination of (h)rfid
  61. *
  62. * The nop instructions allow us to insert one or more instructions to flush the
  63. * L1-D cache when returning to userspace or a guest.
  64. */
  65. #define RFI_FLUSH_SLOT \
  66. RFI_FLUSH_FIXUP_SECTION; \
  67. nop; \
  68. nop; \
  69. nop
  70. #define RFI_TO_KERNEL \
  71. rfid
  72. #define RFI_TO_USER \
  73. STF_EXIT_BARRIER_SLOT; \
  74. RFI_FLUSH_SLOT; \
  75. rfid; \
  76. b rfi_flush_fallback
  77. #define RFI_TO_USER_OR_KERNEL \
  78. STF_EXIT_BARRIER_SLOT; \
  79. RFI_FLUSH_SLOT; \
  80. rfid; \
  81. b rfi_flush_fallback
  82. #define RFI_TO_GUEST \
  83. STF_EXIT_BARRIER_SLOT; \
  84. RFI_FLUSH_SLOT; \
  85. rfid; \
  86. b rfi_flush_fallback
  87. #define HRFI_TO_KERNEL \
  88. hrfid
  89. #define HRFI_TO_USER \
  90. STF_EXIT_BARRIER_SLOT; \
  91. RFI_FLUSH_SLOT; \
  92. hrfid; \
  93. b hrfi_flush_fallback
  94. #define HRFI_TO_USER_OR_KERNEL \
  95. STF_EXIT_BARRIER_SLOT; \
  96. RFI_FLUSH_SLOT; \
  97. hrfid; \
  98. b hrfi_flush_fallback
  99. #define HRFI_TO_GUEST \
  100. STF_EXIT_BARRIER_SLOT; \
  101. RFI_FLUSH_SLOT; \
  102. hrfid; \
  103. b hrfi_flush_fallback
  104. #define HRFI_TO_UNKNOWN \
  105. STF_EXIT_BARRIER_SLOT; \
  106. RFI_FLUSH_SLOT; \
  107. hrfid; \
  108. b hrfi_flush_fallback
  109. #endif /* __ASSEMBLY__ */
  110. #endif /* _ASM_POWERPC_EXCEPTION_H */