/arch/powerpc/include/asm/pgtable-ppc64.h

http://github.com/mirrors/linux · C Header · 560 lines · 374 code · 91 blank · 95 comment · 25 complexity · 7adad5a8bd05a5fffee48bfeb7c3e41b MD5 · raw file

  1. #ifndef _ASM_POWERPC_PGTABLE_PPC64_H_
  2. #define _ASM_POWERPC_PGTABLE_PPC64_H_
  3. /*
  4. * This file contains the functions and defines necessary to modify and use
  5. * the ppc64 hashed page table.
  6. */
  7. #ifdef CONFIG_PPC_64K_PAGES
  8. #include <asm/pgtable-ppc64-64k.h>
  9. #else
  10. #include <asm/pgtable-ppc64-4k.h>
  11. #endif
  12. #include <asm/barrier.h>
  13. #define FIRST_USER_ADDRESS 0
  14. /*
  15. * Size of EA range mapped by our pagetables.
  16. */
  17. #define PGTABLE_EADDR_SIZE (PTE_INDEX_SIZE + PMD_INDEX_SIZE + \
  18. PUD_INDEX_SIZE + PGD_INDEX_SIZE + PAGE_SHIFT)
  19. #define PGTABLE_RANGE (ASM_CONST(1) << PGTABLE_EADDR_SIZE)
  20. #ifdef CONFIG_TRANSPARENT_HUGEPAGE
  21. #define PMD_CACHE_INDEX (PMD_INDEX_SIZE + 1)
  22. #else
  23. #define PMD_CACHE_INDEX PMD_INDEX_SIZE
  24. #endif
  25. /*
  26. * Define the address range of the kernel non-linear virtual area
  27. */
  28. #ifdef CONFIG_PPC_BOOK3E
  29. #define KERN_VIRT_START ASM_CONST(0x8000000000000000)
  30. #else
  31. #define KERN_VIRT_START ASM_CONST(0xD000000000000000)
  32. #endif
  33. #define KERN_VIRT_SIZE ASM_CONST(0x0000100000000000)
  34. /*
  35. * The vmalloc space starts at the beginning of that region, and
  36. * occupies half of it on hash CPUs and a quarter of it on Book3E
  37. * (we keep a quarter for the virtual memmap)
  38. */
  39. #define VMALLOC_START KERN_VIRT_START
  40. #ifdef CONFIG_PPC_BOOK3E
  41. #define VMALLOC_SIZE (KERN_VIRT_SIZE >> 2)
  42. #else
  43. #define VMALLOC_SIZE (KERN_VIRT_SIZE >> 1)
  44. #endif
  45. #define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE)
  46. /*
  47. * The second half of the kernel virtual space is used for IO mappings,
  48. * it's itself carved into the PIO region (ISA and PHB IO space) and
  49. * the ioremap space
  50. *
  51. * ISA_IO_BASE = KERN_IO_START, 64K reserved area
  52. * PHB_IO_BASE = ISA_IO_BASE + 64K to ISA_IO_BASE + 2G, PHB IO spaces
  53. * IOREMAP_BASE = ISA_IO_BASE + 2G to VMALLOC_START + PGTABLE_RANGE
  54. */
  55. #define KERN_IO_START (KERN_VIRT_START + (KERN_VIRT_SIZE >> 1))
  56. #define FULL_IO_SIZE 0x80000000ul
  57. #define ISA_IO_BASE (KERN_IO_START)
  58. #define ISA_IO_END (KERN_IO_START + 0x10000ul)
  59. #define PHB_IO_BASE (ISA_IO_END)
  60. #define PHB_IO_END (KERN_IO_START + FULL_IO_SIZE)
  61. #define IOREMAP_BASE (PHB_IO_END)
  62. #define IOREMAP_END (KERN_VIRT_START + KERN_VIRT_SIZE)
  63. /*
  64. * Region IDs
  65. */
  66. #define REGION_SHIFT 60UL
  67. #define REGION_MASK (0xfUL << REGION_SHIFT)
  68. #define REGION_ID(ea) (((unsigned long)(ea)) >> REGION_SHIFT)
  69. #define VMALLOC_REGION_ID (REGION_ID(VMALLOC_START))
  70. #define KERNEL_REGION_ID (REGION_ID(PAGE_OFFSET))
  71. #define VMEMMAP_REGION_ID (0xfUL) /* Server only */
  72. #define USER_REGION_ID (0UL)
  73. /*
  74. * Defines the address of the vmemap area, in its own region on
  75. * hash table CPUs and after the vmalloc space on Book3E
  76. */
  77. #ifdef CONFIG_PPC_BOOK3E
  78. #define VMEMMAP_BASE VMALLOC_END
  79. #define VMEMMAP_END KERN_IO_START
  80. #else
  81. #define VMEMMAP_BASE (VMEMMAP_REGION_ID << REGION_SHIFT)
  82. #endif
  83. #define vmemmap ((struct page *)VMEMMAP_BASE)
  84. /*
  85. * Include the PTE bits definitions
  86. */
  87. #ifdef CONFIG_PPC_BOOK3S
  88. #include <asm/pte-hash64.h>
  89. #else
  90. #include <asm/pte-book3e.h>
  91. #endif
  92. #include <asm/pte-common.h>
  93. #ifdef CONFIG_PPC_MM_SLICES
  94. #define HAVE_ARCH_UNMAPPED_AREA
  95. #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
  96. #endif /* CONFIG_PPC_MM_SLICES */
  97. #ifndef __ASSEMBLY__
  98. /*
  99. * This is the default implementation of various PTE accessors, it's
  100. * used in all cases except Book3S with 64K pages where we have a
  101. * concept of sub-pages
  102. */
  103. #ifndef __real_pte
  104. #ifdef STRICT_MM_TYPECHECKS
  105. #define __real_pte(e,p) ((real_pte_t){(e)})
  106. #define __rpte_to_pte(r) ((r).pte)
  107. #else
  108. #define __real_pte(e,p) (e)
  109. #define __rpte_to_pte(r) (__pte(r))
  110. #endif
  111. #define __rpte_to_hidx(r,index) (pte_val(__rpte_to_pte(r)) >> 12)
  112. #define pte_iterate_hashed_subpages(rpte, psize, va, index, shift) \
  113. do { \
  114. index = 0; \
  115. shift = mmu_psize_defs[psize].shift; \
  116. #define pte_iterate_hashed_end() } while(0)
  117. #ifdef CONFIG_PPC_HAS_HASH_64K
  118. #define pte_pagesize_index(mm, addr, pte) get_slice_psize(mm, addr)
  119. #else
  120. #define pte_pagesize_index(mm, addr, pte) MMU_PAGE_4K
  121. #endif
  122. #endif /* __real_pte */
  123. /* pte_clear moved to later in this file */
  124. #define PMD_BAD_BITS (PTE_TABLE_SIZE-1)
  125. #define PUD_BAD_BITS (PMD_TABLE_SIZE-1)
  126. #define pmd_set(pmdp, pmdval) (pmd_val(*(pmdp)) = (pmdval))
  127. #define pmd_none(pmd) (!pmd_val(pmd))
  128. #define pmd_bad(pmd) (!is_kernel_addr(pmd_val(pmd)) \
  129. || (pmd_val(pmd) & PMD_BAD_BITS))
  130. #define pmd_present(pmd) (pmd_val(pmd) != 0)
  131. #define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0)
  132. #define pmd_page_vaddr(pmd) (pmd_val(pmd) & ~PMD_MASKED_BITS)
  133. extern struct page *pmd_page(pmd_t pmd);
  134. #define pud_set(pudp, pudval) (pud_val(*(pudp)) = (pudval))
  135. #define pud_none(pud) (!pud_val(pud))
  136. #define pud_bad(pud) (!is_kernel_addr(pud_val(pud)) \
  137. || (pud_val(pud) & PUD_BAD_BITS))
  138. #define pud_present(pud) (pud_val(pud) != 0)
  139. #define pud_clear(pudp) (pud_val(*(pudp)) = 0)
  140. #define pud_page_vaddr(pud) (pud_val(pud) & ~PUD_MASKED_BITS)
  141. #define pud_page(pud) virt_to_page(pud_page_vaddr(pud))
  142. #define pgd_set(pgdp, pudp) ({pgd_val(*(pgdp)) = (unsigned long)(pudp);})
  143. /*
  144. * Find an entry in a page-table-directory. We combine the address region
  145. * (the high order N bits) and the pgd portion of the address.
  146. */
  147. #define pgd_index(address) (((address) >> (PGDIR_SHIFT)) & (PTRS_PER_PGD - 1))
  148. #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
  149. #define pmd_offset(pudp,addr) \
  150. (((pmd_t *) pud_page_vaddr(*(pudp))) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)))
  151. #define pte_offset_kernel(dir,addr) \
  152. (((pte_t *) pmd_page_vaddr(*(dir))) + (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
  153. #define pte_offset_map(dir,addr) pte_offset_kernel((dir), (addr))
  154. #define pte_unmap(pte) do { } while(0)
  155. /* to find an entry in a kernel page-table-directory */
  156. /* This now only contains the vmalloc pages */
  157. #define pgd_offset_k(address) pgd_offset(&init_mm, address)
  158. extern void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
  159. pte_t *ptep, unsigned long pte, int huge);
  160. /* Atomic PTE updates */
  161. static inline unsigned long pte_update(struct mm_struct *mm,
  162. unsigned long addr,
  163. pte_t *ptep, unsigned long clr,
  164. int huge)
  165. {
  166. #ifdef PTE_ATOMIC_UPDATES
  167. unsigned long old, tmp;
  168. __asm__ __volatile__(
  169. "1: ldarx %0,0,%3 # pte_update\n\
  170. andi. %1,%0,%6\n\
  171. bne- 1b \n\
  172. andc %1,%0,%4 \n\
  173. stdcx. %1,0,%3 \n\
  174. bne- 1b"
  175. : "=&r" (old), "=&r" (tmp), "=m" (*ptep)
  176. : "r" (ptep), "r" (clr), "m" (*ptep), "i" (_PAGE_BUSY)
  177. : "cc" );
  178. #else
  179. unsigned long old = pte_val(*ptep);
  180. *ptep = __pte(old & ~clr);
  181. #endif
  182. /* huge pages use the old page table lock */
  183. if (!huge)
  184. assert_pte_locked(mm, addr);
  185. #ifdef CONFIG_PPC_STD_MMU_64
  186. if (old & _PAGE_HASHPTE)
  187. hpte_need_flush(mm, addr, ptep, old, huge);
  188. #endif
  189. return old;
  190. }
  191. static inline int __ptep_test_and_clear_young(struct mm_struct *mm,
  192. unsigned long addr, pte_t *ptep)
  193. {
  194. unsigned long old;
  195. if ((pte_val(*ptep) & (_PAGE_ACCESSED | _PAGE_HASHPTE)) == 0)
  196. return 0;
  197. old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0);
  198. return (old & _PAGE_ACCESSED) != 0;
  199. }
  200. #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
  201. #define ptep_test_and_clear_young(__vma, __addr, __ptep) \
  202. ({ \
  203. int __r; \
  204. __r = __ptep_test_and_clear_young((__vma)->vm_mm, __addr, __ptep); \
  205. __r; \
  206. })
  207. #define __HAVE_ARCH_PTEP_SET_WRPROTECT
  208. static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
  209. pte_t *ptep)
  210. {
  211. if ((pte_val(*ptep) & _PAGE_RW) == 0)
  212. return;
  213. pte_update(mm, addr, ptep, _PAGE_RW, 0);
  214. }
  215. static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
  216. unsigned long addr, pte_t *ptep)
  217. {
  218. if ((pte_val(*ptep) & _PAGE_RW) == 0)
  219. return;
  220. pte_update(mm, addr, ptep, _PAGE_RW, 1);
  221. }
  222. /*
  223. * We currently remove entries from the hashtable regardless of whether
  224. * the entry was young or dirty. The generic routines only flush if the
  225. * entry was young or dirty which is not good enough.
  226. *
  227. * We should be more intelligent about this but for the moment we override
  228. * these functions and force a tlb flush unconditionally
  229. */
  230. #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
  231. #define ptep_clear_flush_young(__vma, __address, __ptep) \
  232. ({ \
  233. int __young = __ptep_test_and_clear_young((__vma)->vm_mm, __address, \
  234. __ptep); \
  235. __young; \
  236. })
  237. #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
  238. static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
  239. unsigned long addr, pte_t *ptep)
  240. {
  241. unsigned long old = pte_update(mm, addr, ptep, ~0UL, 0);
  242. return __pte(old);
  243. }
  244. static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
  245. pte_t * ptep)
  246. {
  247. pte_update(mm, addr, ptep, ~0UL, 0);
  248. }
  249. /* Set the dirty and/or accessed bits atomically in a linux PTE, this
  250. * function doesn't need to flush the hash entry
  251. */
  252. static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry)
  253. {
  254. unsigned long bits = pte_val(entry) &
  255. (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC);
  256. #ifdef PTE_ATOMIC_UPDATES
  257. unsigned long old, tmp;
  258. __asm__ __volatile__(
  259. "1: ldarx %0,0,%4\n\
  260. andi. %1,%0,%6\n\
  261. bne- 1b \n\
  262. or %0,%3,%0\n\
  263. stdcx. %0,0,%4\n\
  264. bne- 1b"
  265. :"=&r" (old), "=&r" (tmp), "=m" (*ptep)
  266. :"r" (bits), "r" (ptep), "m" (*ptep), "i" (_PAGE_BUSY)
  267. :"cc");
  268. #else
  269. unsigned long old = pte_val(*ptep);
  270. *ptep = __pte(old | bits);
  271. #endif
  272. }
  273. #define __HAVE_ARCH_PTE_SAME
  274. #define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0)
  275. #define pte_ERROR(e) \
  276. printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
  277. #define pmd_ERROR(e) \
  278. printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
  279. #define pgd_ERROR(e) \
  280. printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
  281. /* Encode and de-code a swap entry */
  282. #define __swp_type(entry) (((entry).val >> 1) & 0x3f)
  283. #define __swp_offset(entry) ((entry).val >> 8)
  284. #define __swp_entry(type, offset) ((swp_entry_t){((type)<< 1)|((offset)<<8)})
  285. #define __pte_to_swp_entry(pte) ((swp_entry_t){pte_val(pte) >> PTE_RPN_SHIFT})
  286. #define __swp_entry_to_pte(x) ((pte_t) { (x).val << PTE_RPN_SHIFT })
  287. #define pte_to_pgoff(pte) (pte_val(pte) >> PTE_RPN_SHIFT)
  288. #define pgoff_to_pte(off) ((pte_t) {((off) << PTE_RPN_SHIFT)|_PAGE_FILE})
  289. #define PTE_FILE_MAX_BITS (BITS_PER_LONG - PTE_RPN_SHIFT)
  290. void pgtable_cache_add(unsigned shift, void (*ctor)(void *));
  291. void pgtable_cache_init(void);
  292. #endif /* __ASSEMBLY__ */
  293. /*
  294. * THP pages can't be special. So use the _PAGE_SPECIAL
  295. */
  296. #define _PAGE_SPLITTING _PAGE_SPECIAL
  297. /*
  298. * We need to differentiate between explicit huge page and THP huge
  299. * page, since THP huge page also need to track real subpage details
  300. */
  301. #define _PAGE_THP_HUGE _PAGE_4K_PFN
  302. /*
  303. * set of bits not changed in pmd_modify.
  304. */
  305. #define _HPAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | \
  306. _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_SPLITTING | \
  307. _PAGE_THP_HUGE)
  308. #ifndef __ASSEMBLY__
  309. /*
  310. * The linux hugepage PMD now include the pmd entries followed by the address
  311. * to the stashed pgtable_t. The stashed pgtable_t contains the hpte bits.
  312. * [ 1 bit secondary | 3 bit hidx | 1 bit valid | 000]. We use one byte per
  313. * each HPTE entry. With 16MB hugepage and 64K HPTE we need 256 entries and
  314. * with 4K HPTE we need 4096 entries. Both will fit in a 4K pgtable_t.
  315. *
  316. * The last three bits are intentionally left to zero. This memory location
  317. * are also used as normal page PTE pointers. So if we have any pointers
  318. * left around while we collapse a hugepage, we need to make sure
  319. * _PAGE_PRESENT and _PAGE_FILE bits of that are zero when we look at them
  320. */
  321. static inline unsigned int hpte_valid(unsigned char *hpte_slot_array, int index)
  322. {
  323. return (hpte_slot_array[index] >> 3) & 0x1;
  324. }
  325. static inline unsigned int hpte_hash_index(unsigned char *hpte_slot_array,
  326. int index)
  327. {
  328. return hpte_slot_array[index] >> 4;
  329. }
  330. static inline void mark_hpte_slot_valid(unsigned char *hpte_slot_array,
  331. unsigned int index, unsigned int hidx)
  332. {
  333. hpte_slot_array[index] = hidx << 4 | 0x1 << 3;
  334. }
  335. static inline char *get_hpte_slot_array(pmd_t *pmdp)
  336. {
  337. /*
  338. * The hpte hindex is stored in the pgtable whose address is in the
  339. * second half of the PMD
  340. *
  341. * Order this load with the test for pmd_trans_huge in the caller
  342. */
  343. smp_rmb();
  344. return *(char **)(pmdp + PTRS_PER_PMD);
  345. }
  346. extern void hpte_do_hugepage_flush(struct mm_struct *mm, unsigned long addr,
  347. pmd_t *pmdp);
  348. #ifdef CONFIG_TRANSPARENT_HUGEPAGE
  349. extern pmd_t pfn_pmd(unsigned long pfn, pgprot_t pgprot);
  350. extern pmd_t mk_pmd(struct page *page, pgprot_t pgprot);
  351. extern pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot);
  352. extern void set_pmd_at(struct mm_struct *mm, unsigned long addr,
  353. pmd_t *pmdp, pmd_t pmd);
  354. extern void update_mmu_cache_pmd(struct vm_area_struct *vma, unsigned long addr,
  355. pmd_t *pmd);
  356. static inline int pmd_trans_huge(pmd_t pmd)
  357. {
  358. /*
  359. * leaf pte for huge page, bottom two bits != 00
  360. */
  361. return (pmd_val(pmd) & 0x3) && (pmd_val(pmd) & _PAGE_THP_HUGE);
  362. }
  363. static inline int pmd_large(pmd_t pmd)
  364. {
  365. /*
  366. * leaf pte for huge page, bottom two bits != 00
  367. */
  368. if (pmd_trans_huge(pmd))
  369. return pmd_val(pmd) & _PAGE_PRESENT;
  370. return 0;
  371. }
  372. static inline int pmd_trans_splitting(pmd_t pmd)
  373. {
  374. if (pmd_trans_huge(pmd))
  375. return pmd_val(pmd) & _PAGE_SPLITTING;
  376. return 0;
  377. }
  378. extern int has_transparent_hugepage(void);
  379. #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
  380. static inline pte_t pmd_pte(pmd_t pmd)
  381. {
  382. return __pte(pmd_val(pmd));
  383. }
  384. static inline pmd_t pte_pmd(pte_t pte)
  385. {
  386. return __pmd(pte_val(pte));
  387. }
  388. static inline pte_t *pmdp_ptep(pmd_t *pmd)
  389. {
  390. return (pte_t *)pmd;
  391. }
  392. #define pmd_pfn(pmd) pte_pfn(pmd_pte(pmd))
  393. #define pmd_young(pmd) pte_young(pmd_pte(pmd))
  394. #define pmd_mkold(pmd) pte_pmd(pte_mkold(pmd_pte(pmd)))
  395. #define pmd_wrprotect(pmd) pte_pmd(pte_wrprotect(pmd_pte(pmd)))
  396. #define pmd_mkdirty(pmd) pte_pmd(pte_mkdirty(pmd_pte(pmd)))
  397. #define pmd_mkyoung(pmd) pte_pmd(pte_mkyoung(pmd_pte(pmd)))
  398. #define pmd_mkwrite(pmd) pte_pmd(pte_mkwrite(pmd_pte(pmd)))
  399. #define __HAVE_ARCH_PMD_WRITE
  400. #define pmd_write(pmd) pte_write(pmd_pte(pmd))
  401. static inline pmd_t pmd_mkhuge(pmd_t pmd)
  402. {
  403. /* Do nothing, mk_pmd() does this part. */
  404. return pmd;
  405. }
  406. static inline pmd_t pmd_mknotpresent(pmd_t pmd)
  407. {
  408. pmd_val(pmd) &= ~_PAGE_PRESENT;
  409. return pmd;
  410. }
  411. static inline pmd_t pmd_mksplitting(pmd_t pmd)
  412. {
  413. pmd_val(pmd) |= _PAGE_SPLITTING;
  414. return pmd;
  415. }
  416. #define __HAVE_ARCH_PMD_SAME
  417. static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
  418. {
  419. return (((pmd_val(pmd_a) ^ pmd_val(pmd_b)) & ~_PAGE_HPTEFLAGS) == 0);
  420. }
  421. #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
  422. extern int pmdp_set_access_flags(struct vm_area_struct *vma,
  423. unsigned long address, pmd_t *pmdp,
  424. pmd_t entry, int dirty);
  425. extern unsigned long pmd_hugepage_update(struct mm_struct *mm,
  426. unsigned long addr,
  427. pmd_t *pmdp, unsigned long clr);
  428. static inline int __pmdp_test_and_clear_young(struct mm_struct *mm,
  429. unsigned long addr, pmd_t *pmdp)
  430. {
  431. unsigned long old;
  432. if ((pmd_val(*pmdp) & (_PAGE_ACCESSED | _PAGE_HASHPTE)) == 0)
  433. return 0;
  434. old = pmd_hugepage_update(mm, addr, pmdp, _PAGE_ACCESSED);
  435. return ((old & _PAGE_ACCESSED) != 0);
  436. }
  437. #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
  438. extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,
  439. unsigned long address, pmd_t *pmdp);
  440. #define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
  441. extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
  442. unsigned long address, pmd_t *pmdp);
  443. #define __HAVE_ARCH_PMDP_GET_AND_CLEAR
  444. extern pmd_t pmdp_get_and_clear(struct mm_struct *mm,
  445. unsigned long addr, pmd_t *pmdp);
  446. #define __HAVE_ARCH_PMDP_CLEAR_FLUSH
  447. extern pmd_t pmdp_clear_flush(struct vm_area_struct *vma, unsigned long address,
  448. pmd_t *pmdp);
  449. #define __HAVE_ARCH_PMDP_SET_WRPROTECT
  450. static inline void pmdp_set_wrprotect(struct mm_struct *mm, unsigned long addr,
  451. pmd_t *pmdp)
  452. {
  453. if ((pmd_val(*pmdp) & _PAGE_RW) == 0)
  454. return;
  455. pmd_hugepage_update(mm, addr, pmdp, _PAGE_RW);
  456. }
  457. #define __HAVE_ARCH_PMDP_SPLITTING_FLUSH
  458. extern void pmdp_splitting_flush(struct vm_area_struct *vma,
  459. unsigned long address, pmd_t *pmdp);
  460. #define __HAVE_ARCH_PGTABLE_DEPOSIT
  461. extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
  462. pgtable_t pgtable);
  463. #define __HAVE_ARCH_PGTABLE_WITHDRAW
  464. extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
  465. #define __HAVE_ARCH_PMDP_INVALIDATE
  466. extern void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
  467. pmd_t *pmdp);
  468. #endif /* __ASSEMBLY__ */
  469. #endif /* _ASM_POWERPC_PGTABLE_PPC64_H_ */