/arch/powerpc/platforms/embedded6xx/holly.c

http://github.com/mirrors/linux · C · 269 lines · 180 code · 44 blank · 45 comment · 19 complexity · 762f16bfc0e3061a916a2e5442bb321b MD5 · raw file

  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Board setup routines for the IBM 750GX/CL platform w/ TSI10x bridge
  4. *
  5. * Copyright 2007 IBM Corporation
  6. *
  7. * Stephen Winiecki <stevewin@us.ibm.com>
  8. * Josh Boyer <jwboyer@linux.vnet.ibm.com>
  9. *
  10. * Based on code from mpc7448_hpc2.c
  11. */
  12. #include <linux/stddef.h>
  13. #include <linux/kernel.h>
  14. #include <linux/pci.h>
  15. #include <linux/kdev_t.h>
  16. #include <linux/console.h>
  17. #include <linux/delay.h>
  18. #include <linux/irq.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/root_dev.h>
  21. #include <linux/serial.h>
  22. #include <linux/tty.h>
  23. #include <linux/serial_core.h>
  24. #include <linux/of_platform.h>
  25. #include <linux/extable.h>
  26. #include <asm/time.h>
  27. #include <asm/machdep.h>
  28. #include <asm/prom.h>
  29. #include <asm/udbg.h>
  30. #include <asm/tsi108.h>
  31. #include <asm/pci-bridge.h>
  32. #include <asm/reg.h>
  33. #include <mm/mmu_decl.h>
  34. #include <asm/tsi108_irq.h>
  35. #include <asm/tsi108_pci.h>
  36. #include <asm/mpic.h>
  37. #undef DEBUG
  38. #define HOLLY_PCI_CFG_PHYS 0x7c000000
  39. static int holly_exclude_device(struct pci_controller *hose, u_char bus,
  40. u_char devfn)
  41. {
  42. if (bus == 0 && PCI_SLOT(devfn) == 0)
  43. return PCIBIOS_DEVICE_NOT_FOUND;
  44. else
  45. return PCIBIOS_SUCCESSFUL;
  46. }
  47. static void holly_remap_bridge(void)
  48. {
  49. u32 lut_val, lut_addr;
  50. int i;
  51. printk(KERN_INFO "Remapping PCI bridge\n");
  52. /* Re-init the PCI bridge and LUT registers to have mappings that don't
  53. * rely on PIBS
  54. */
  55. lut_addr = 0x900;
  56. for (i = 0; i < 31; i++) {
  57. tsi108_write_reg(TSI108_PB_OFFSET + lut_addr, 0x00000201);
  58. lut_addr += 4;
  59. tsi108_write_reg(TSI108_PB_OFFSET + lut_addr, 0x0);
  60. lut_addr += 4;
  61. }
  62. /* Reserve the last LUT entry for PCI I/O space */
  63. tsi108_write_reg(TSI108_PB_OFFSET + lut_addr, 0x00000241);
  64. lut_addr += 4;
  65. tsi108_write_reg(TSI108_PB_OFFSET + lut_addr, 0x0);
  66. /* Map PCI I/O space */
  67. tsi108_write_reg(TSI108_PCI_PFAB_IO_UPPER, 0x0);
  68. tsi108_write_reg(TSI108_PCI_PFAB_IO, 0x1);
  69. /* Map PCI CFG space */
  70. tsi108_write_reg(TSI108_PCI_PFAB_BAR0_UPPER, 0x0);
  71. tsi108_write_reg(TSI108_PCI_PFAB_BAR0, 0x7c000000 | 0x01);
  72. /* We don't need MEM32 and PRM remapping so disable them */
  73. tsi108_write_reg(TSI108_PCI_PFAB_MEM32, 0x0);
  74. tsi108_write_reg(TSI108_PCI_PFAB_PFM3, 0x0);
  75. tsi108_write_reg(TSI108_PCI_PFAB_PFM4, 0x0);
  76. /* Set P2O_BAR0 */
  77. tsi108_write_reg(TSI108_PCI_P2O_BAR0_UPPER, 0x0);
  78. tsi108_write_reg(TSI108_PCI_P2O_BAR0, 0xc0000000);
  79. /* Init the PCI LUTs to do no remapping */
  80. lut_addr = 0x500;
  81. lut_val = 0x00000002;
  82. for (i = 0; i < 32; i++) {
  83. tsi108_write_reg(TSI108_PCI_OFFSET + lut_addr, lut_val);
  84. lut_addr += 4;
  85. tsi108_write_reg(TSI108_PCI_OFFSET + lut_addr, 0x40000000);
  86. lut_addr += 4;
  87. lut_val += 0x02000000;
  88. }
  89. tsi108_write_reg(TSI108_PCI_P2O_PAGE_SIZES, 0x00007900);
  90. /* Set 64-bit PCI bus address for system memory */
  91. tsi108_write_reg(TSI108_PCI_P2O_BAR2_UPPER, 0x0);
  92. tsi108_write_reg(TSI108_PCI_P2O_BAR2, 0x0);
  93. }
  94. static void __init holly_setup_arch(void)
  95. {
  96. struct device_node *np;
  97. if (ppc_md.progress)
  98. ppc_md.progress("holly_setup_arch():set_bridge", 0);
  99. tsi108_csr_vir_base = get_vir_csrbase();
  100. /* setup PCI host bridge */
  101. holly_remap_bridge();
  102. np = of_find_node_by_type(NULL, "pci");
  103. if (np)
  104. tsi108_setup_pci(np, HOLLY_PCI_CFG_PHYS, 1);
  105. ppc_md.pci_exclude_device = holly_exclude_device;
  106. if (ppc_md.progress)
  107. ppc_md.progress("tsi108: resources set", 0x100);
  108. printk(KERN_INFO "PPC750GX/CL Platform\n");
  109. }
  110. /*
  111. * Interrupt setup and service. Interrupts on the holly come
  112. * from the four external INT pins, PCI interrupts are routed via
  113. * PCI interrupt control registers, it generates internal IRQ23
  114. *
  115. * Interrupt routing on the Holly Board:
  116. * TSI108:PB_INT[0] -> CPU0:INT#
  117. * TSI108:PB_INT[1] -> CPU0:MCP#
  118. * TSI108:PB_INT[2] -> N/C
  119. * TSI108:PB_INT[3] -> N/C
  120. */
  121. static void __init holly_init_IRQ(void)
  122. {
  123. struct mpic *mpic;
  124. #ifdef CONFIG_PCI
  125. unsigned int cascade_pci_irq;
  126. struct device_node *tsi_pci;
  127. struct device_node *cascade_node = NULL;
  128. #endif
  129. mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
  130. MPIC_SPV_EOI | MPIC_NO_PTHROU_DIS | MPIC_REGSET_TSI108,
  131. 24, 0,
  132. "Tsi108_PIC");
  133. BUG_ON(mpic == NULL);
  134. mpic_assign_isu(mpic, 0, mpic->paddr + 0x100);
  135. mpic_init(mpic);
  136. #ifdef CONFIG_PCI
  137. tsi_pci = of_find_node_by_type(NULL, "pci");
  138. if (tsi_pci == NULL) {
  139. printk(KERN_ERR "%s: No tsi108 pci node found !\n", __func__);
  140. return;
  141. }
  142. cascade_node = of_find_node_by_type(NULL, "pic-router");
  143. if (cascade_node == NULL) {
  144. printk(KERN_ERR "%s: No tsi108 pci cascade node found !\n", __func__);
  145. return;
  146. }
  147. cascade_pci_irq = irq_of_parse_and_map(tsi_pci, 0);
  148. pr_debug("%s: tsi108 cascade_pci_irq = 0x%x\n", __func__, (u32) cascade_pci_irq);
  149. tsi108_pci_int_init(cascade_node);
  150. irq_set_handler_data(cascade_pci_irq, mpic);
  151. irq_set_chained_handler(cascade_pci_irq, tsi108_irq_cascade);
  152. #endif
  153. /* Configure MPIC outputs to CPU0 */
  154. tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0);
  155. }
  156. static void holly_show_cpuinfo(struct seq_file *m)
  157. {
  158. seq_printf(m, "vendor\t\t: IBM\n");
  159. seq_printf(m, "machine\t\t: PPC750 GX/CL\n");
  160. }
  161. static void __noreturn holly_restart(char *cmd)
  162. {
  163. __be32 __iomem *ocn_bar1 = NULL;
  164. unsigned long bar;
  165. struct device_node *bridge = NULL;
  166. const void *prop;
  167. int size;
  168. phys_addr_t addr = 0xc0000000;
  169. local_irq_disable();
  170. bridge = of_find_node_by_type(NULL, "tsi-bridge");
  171. if (bridge) {
  172. prop = of_get_property(bridge, "reg", &size);
  173. addr = of_translate_address(bridge, prop);
  174. }
  175. addr += (TSI108_PB_OFFSET + 0x414);
  176. ocn_bar1 = ioremap(addr, 0x4);
  177. /* Turn on the BOOT bit so the addresses are correctly
  178. * routed to the HLP interface */
  179. bar = ioread32be(ocn_bar1);
  180. bar |= 2;
  181. iowrite32be(bar, ocn_bar1);
  182. iosync();
  183. /* Set SRR0 to the reset vector and turn on MSR_IP */
  184. mtspr(SPRN_SRR0, 0xfff00100);
  185. mtspr(SPRN_SRR1, MSR_IP);
  186. /* Do an rfi to jump back to firmware. Somewhat evil,
  187. * but it works
  188. */
  189. __asm__ __volatile__("rfi" : : : "memory");
  190. /* Spin until reset happens. Shouldn't really get here */
  191. for (;;) ;
  192. }
  193. /*
  194. * Called very early, device-tree isn't unflattened
  195. */
  196. static int __init holly_probe(void)
  197. {
  198. if (!of_machine_is_compatible("ibm,holly"))
  199. return 0;
  200. return 1;
  201. }
  202. static int ppc750_machine_check_exception(struct pt_regs *regs)
  203. {
  204. const struct exception_table_entry *entry;
  205. /* Are we prepared to handle this fault */
  206. if ((entry = search_exception_tables(regs->nip)) != NULL) {
  207. tsi108_clear_pci_cfg_error();
  208. regs->msr |= MSR_RI;
  209. regs->nip = extable_fixup(entry);
  210. return 1;
  211. }
  212. return 0;
  213. }
  214. define_machine(holly){
  215. .name = "PPC750 GX/CL TSI",
  216. .probe = holly_probe,
  217. .setup_arch = holly_setup_arch,
  218. .init_IRQ = holly_init_IRQ,
  219. .show_cpuinfo = holly_show_cpuinfo,
  220. .get_irq = mpic_get_irq,
  221. .restart = holly_restart,
  222. .calibrate_decr = generic_calibrate_decr,
  223. .machine_check_exception = ppc750_machine_check_exception,
  224. .progress = udbg_progress,
  225. };