/arch/powerpc/platforms/83xx/mpc832x_rdb.c

http://github.com/mirrors/linux · C · 228 lines · 166 code · 38 blank · 24 comment · 22 complexity · 134ad5a8f3b063dc23e6f1b4d35ea7ad MD5 · raw file

  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * arch/powerpc/platforms/83xx/mpc832x_rdb.c
  4. *
  5. * Copyright (C) Freescale Semiconductor, Inc. 2007. All rights reserved.
  6. *
  7. * Description:
  8. * MPC832x RDB board specific routines.
  9. * This file is based on mpc832x_mds.c and mpc8313_rdb.c
  10. * Author: Michael Barkowski <michael.barkowski@freescale.com>
  11. */
  12. #include <linux/pci.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/spi/mmc_spi.h>
  16. #include <linux/mmc/host.h>
  17. #include <linux/of_platform.h>
  18. #include <linux/fsl_devices.h>
  19. #include <asm/time.h>
  20. #include <asm/ipic.h>
  21. #include <asm/udbg.h>
  22. #include <soc/fsl/qe/qe.h>
  23. #include <sysdev/fsl_soc.h>
  24. #include <sysdev/fsl_pci.h>
  25. #include "mpc83xx.h"
  26. #undef DEBUG
  27. #ifdef DEBUG
  28. #define DBG(fmt...) udbg_printf(fmt)
  29. #else
  30. #define DBG(fmt...)
  31. #endif
  32. #ifdef CONFIG_QUICC_ENGINE
  33. static int __init of_fsl_spi_probe(char *type, char *compatible, u32 sysclk,
  34. struct spi_board_info *board_infos,
  35. unsigned int num_board_infos,
  36. void (*cs_control)(struct spi_device *dev,
  37. bool on))
  38. {
  39. struct device_node *np;
  40. unsigned int i = 0;
  41. for_each_compatible_node(np, type, compatible) {
  42. int ret;
  43. unsigned int j;
  44. const void *prop;
  45. struct resource res[2];
  46. struct platform_device *pdev;
  47. struct fsl_spi_platform_data pdata = {
  48. .cs_control = cs_control,
  49. };
  50. memset(res, 0, sizeof(res));
  51. pdata.sysclk = sysclk;
  52. prop = of_get_property(np, "reg", NULL);
  53. if (!prop)
  54. goto err;
  55. pdata.bus_num = *(u32 *)prop;
  56. prop = of_get_property(np, "cell-index", NULL);
  57. if (prop)
  58. i = *(u32 *)prop;
  59. prop = of_get_property(np, "mode", NULL);
  60. if (prop && !strcmp(prop, "cpu-qe"))
  61. pdata.flags = SPI_QE_CPU_MODE;
  62. for (j = 0; j < num_board_infos; j++) {
  63. if (board_infos[j].bus_num == pdata.bus_num)
  64. pdata.max_chipselect++;
  65. }
  66. if (!pdata.max_chipselect)
  67. continue;
  68. ret = of_address_to_resource(np, 0, &res[0]);
  69. if (ret)
  70. goto err;
  71. ret = of_irq_to_resource(np, 0, &res[1]);
  72. if (ret <= 0)
  73. goto err;
  74. pdev = platform_device_alloc("mpc83xx_spi", i);
  75. if (!pdev)
  76. goto err;
  77. ret = platform_device_add_data(pdev, &pdata, sizeof(pdata));
  78. if (ret)
  79. goto unreg;
  80. ret = platform_device_add_resources(pdev, res,
  81. ARRAY_SIZE(res));
  82. if (ret)
  83. goto unreg;
  84. ret = platform_device_add(pdev);
  85. if (ret)
  86. goto unreg;
  87. goto next;
  88. unreg:
  89. platform_device_del(pdev);
  90. err:
  91. pr_err("%pOF: registration failed\n", np);
  92. next:
  93. i++;
  94. }
  95. return i;
  96. }
  97. static int __init fsl_spi_init(struct spi_board_info *board_infos,
  98. unsigned int num_board_infos,
  99. void (*cs_control)(struct spi_device *spi,
  100. bool on))
  101. {
  102. u32 sysclk = -1;
  103. int ret;
  104. /* SPI controller is either clocked from QE or SoC clock */
  105. sysclk = get_brgfreq();
  106. if (sysclk == -1) {
  107. sysclk = fsl_get_sys_freq();
  108. if (sysclk == -1)
  109. return -ENODEV;
  110. }
  111. ret = of_fsl_spi_probe(NULL, "fsl,spi", sysclk, board_infos,
  112. num_board_infos, cs_control);
  113. if (!ret)
  114. of_fsl_spi_probe("spi", "fsl_spi", sysclk, board_infos,
  115. num_board_infos, cs_control);
  116. return spi_register_board_info(board_infos, num_board_infos);
  117. }
  118. static void mpc83xx_spi_cs_control(struct spi_device *spi, bool on)
  119. {
  120. pr_debug("%s %d %d\n", __func__, spi->chip_select, on);
  121. par_io_data_set(3, 13, on);
  122. }
  123. static struct mmc_spi_platform_data mpc832x_mmc_pdata = {
  124. .ocr_mask = MMC_VDD_33_34,
  125. };
  126. static struct spi_board_info mpc832x_spi_boardinfo = {
  127. .bus_num = 0x4c0,
  128. .chip_select = 0,
  129. .max_speed_hz = 50000000,
  130. .modalias = "mmc_spi",
  131. .platform_data = &mpc832x_mmc_pdata,
  132. };
  133. static int __init mpc832x_spi_init(void)
  134. {
  135. par_io_config_pin(3, 0, 3, 0, 1, 0); /* SPI1 MOSI, I/O */
  136. par_io_config_pin(3, 1, 3, 0, 1, 0); /* SPI1 MISO, I/O */
  137. par_io_config_pin(3, 2, 3, 0, 1, 0); /* SPI1 CLK, I/O */
  138. par_io_config_pin(3, 3, 2, 0, 1, 0); /* SPI1 SEL, I */
  139. par_io_config_pin(3, 13, 1, 0, 0, 0); /* !SD_CS, O */
  140. par_io_config_pin(3, 14, 2, 0, 0, 0); /* SD_INSERT, I */
  141. par_io_config_pin(3, 15, 2, 0, 0, 0); /* SD_PROTECT,I */
  142. /*
  143. * Don't bother with legacy stuff when device tree contains
  144. * mmc-spi-slot node.
  145. */
  146. if (of_find_compatible_node(NULL, NULL, "mmc-spi-slot"))
  147. return 0;
  148. return fsl_spi_init(&mpc832x_spi_boardinfo, 1, mpc83xx_spi_cs_control);
  149. }
  150. machine_device_initcall(mpc832x_rdb, mpc832x_spi_init);
  151. #endif /* CONFIG_QUICC_ENGINE */
  152. /* ************************************************************************
  153. *
  154. * Setup the architecture
  155. *
  156. */
  157. static void __init mpc832x_rdb_setup_arch(void)
  158. {
  159. #if defined(CONFIG_QUICC_ENGINE)
  160. struct device_node *np;
  161. #endif
  162. mpc83xx_setup_arch();
  163. #ifdef CONFIG_QUICC_ENGINE
  164. if ((np = of_find_node_by_name(NULL, "par_io")) != NULL) {
  165. par_io_init(np);
  166. of_node_put(np);
  167. for_each_node_by_name(np, "ucc")
  168. par_io_of_config(np);
  169. }
  170. #endif /* CONFIG_QUICC_ENGINE */
  171. }
  172. machine_device_initcall(mpc832x_rdb, mpc83xx_declare_of_platform_devices);
  173. /*
  174. * Called very early, MMU is off, device-tree isn't unflattened
  175. */
  176. static int __init mpc832x_rdb_probe(void)
  177. {
  178. return of_machine_is_compatible("MPC832xRDB");
  179. }
  180. define_machine(mpc832x_rdb) {
  181. .name = "MPC832x RDB",
  182. .probe = mpc832x_rdb_probe,
  183. .setup_arch = mpc832x_rdb_setup_arch,
  184. .init_IRQ = mpc83xx_ipic_init_IRQ,
  185. .get_irq = ipic_get_irq,
  186. .restart = mpc83xx_restart,
  187. .time_init = mpc83xx_time_init,
  188. .calibrate_decr = generic_calibrate_decr,
  189. .progress = udbg_progress,
  190. };