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/arch/powerpc/platforms/cell/beat_interrupt.c

http://github.com/mirrors/linux
C | 253 lines | 165 code | 36 blank | 52 comment | 21 complexity | 980e16ad8ec51c246e7a06ca8e0a12e4 MD5 | raw file
  1/*
  2 * Celleb/Beat Interrupt controller
  3 *
  4 * (C) Copyright 2006-2007 TOSHIBA CORPORATION
  5 *
  6 * This program is free software; you can redistribute it and/or modify
  7 * it under the terms of the GNU General Public License as published by
  8 * the Free Software Foundation; either version 2 of the License, or
  9 * (at your option) any later version.
 10 *
 11 * This program is distributed in the hope that it will be useful,
 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 14 * GNU General Public License for more details.
 15 *
 16 * You should have received a copy of the GNU General Public License along
 17 * with this program; if not, write to the Free Software Foundation, Inc.,
 18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
 19 */
 20
 21#include <linux/init.h>
 22#include <linux/interrupt.h>
 23#include <linux/irq.h>
 24#include <linux/percpu.h>
 25#include <linux/types.h>
 26
 27#include <asm/machdep.h>
 28
 29#include "beat_interrupt.h"
 30#include "beat_wrapper.h"
 31
 32#define	MAX_IRQS	NR_IRQS
 33static DEFINE_RAW_SPINLOCK(beatic_irq_mask_lock);
 34static uint64_t	beatic_irq_mask_enable[(MAX_IRQS+255)/64];
 35static uint64_t	beatic_irq_mask_ack[(MAX_IRQS+255)/64];
 36
 37static struct irq_domain *beatic_host;
 38
 39/*
 40 * In this implementation, "virq" == "IRQ plug number",
 41 * "(irq_hw_number_t)hwirq" == "IRQ outlet number".
 42 */
 43
 44/* assumption: locked */
 45static inline void beatic_update_irq_mask(unsigned int irq_plug)
 46{
 47	int off;
 48	unsigned long masks[4];
 49
 50	off = (irq_plug / 256) * 4;
 51	masks[0] = beatic_irq_mask_enable[off + 0]
 52		& beatic_irq_mask_ack[off + 0];
 53	masks[1] = beatic_irq_mask_enable[off + 1]
 54		& beatic_irq_mask_ack[off + 1];
 55	masks[2] = beatic_irq_mask_enable[off + 2]
 56		& beatic_irq_mask_ack[off + 2];
 57	masks[3] = beatic_irq_mask_enable[off + 3]
 58		& beatic_irq_mask_ack[off + 3];
 59	if (beat_set_interrupt_mask(irq_plug&~255UL,
 60		masks[0], masks[1], masks[2], masks[3]) != 0)
 61		panic("Failed to set mask IRQ!");
 62}
 63
 64static void beatic_mask_irq(struct irq_data *d)
 65{
 66	unsigned long flags;
 67
 68	raw_spin_lock_irqsave(&beatic_irq_mask_lock, flags);
 69	beatic_irq_mask_enable[d->irq/64] &= ~(1UL << (63 - (d->irq%64)));
 70	beatic_update_irq_mask(d->irq);
 71	raw_spin_unlock_irqrestore(&beatic_irq_mask_lock, flags);
 72}
 73
 74static void beatic_unmask_irq(struct irq_data *d)
 75{
 76	unsigned long flags;
 77
 78	raw_spin_lock_irqsave(&beatic_irq_mask_lock, flags);
 79	beatic_irq_mask_enable[d->irq/64] |= 1UL << (63 - (d->irq%64));
 80	beatic_update_irq_mask(d->irq);
 81	raw_spin_unlock_irqrestore(&beatic_irq_mask_lock, flags);
 82}
 83
 84static void beatic_ack_irq(struct irq_data *d)
 85{
 86	unsigned long flags;
 87
 88	raw_spin_lock_irqsave(&beatic_irq_mask_lock, flags);
 89	beatic_irq_mask_ack[d->irq/64] &= ~(1UL << (63 - (d->irq%64)));
 90	beatic_update_irq_mask(d->irq);
 91	raw_spin_unlock_irqrestore(&beatic_irq_mask_lock, flags);
 92}
 93
 94static void beatic_end_irq(struct irq_data *d)
 95{
 96	s64 err;
 97	unsigned long flags;
 98
 99	err = beat_downcount_of_interrupt(d->irq);
100	if (err != 0) {
101		if ((err & 0xFFFFFFFF) != 0xFFFFFFF5) /* -11: wrong state */
102			panic("Failed to downcount IRQ! Error = %16llx", err);
103
104		printk(KERN_ERR "IRQ over-downcounted, plug %d\n", d->irq);
105	}
106	raw_spin_lock_irqsave(&beatic_irq_mask_lock, flags);
107	beatic_irq_mask_ack[d->irq/64] |= 1UL << (63 - (d->irq%64));
108	beatic_update_irq_mask(d->irq);
109	raw_spin_unlock_irqrestore(&beatic_irq_mask_lock, flags);
110}
111
112static struct irq_chip beatic_pic = {
113	.name = "CELL-BEAT",
114	.irq_unmask = beatic_unmask_irq,
115	.irq_mask = beatic_mask_irq,
116	.irq_eoi = beatic_end_irq,
117};
118
119/*
120 * Dispose binding hardware IRQ number (hw) and Virtuql IRQ number (virq),
121 * update flags.
122 *
123 * Note that the number (virq) is already assigned at upper layer.
124 */
125static void beatic_pic_host_unmap(struct irq_domain *h, unsigned int virq)
126{
127	beat_destruct_irq_plug(virq);
128}
129
130/*
131 * Create or update binding hardware IRQ number (hw) and Virtuql
132 * IRQ number (virq). This is called only once for a given mapping.
133 *
134 * Note that the number (virq) is already assigned at upper layer.
135 */
136static int beatic_pic_host_map(struct irq_domain *h, unsigned int virq,
137			       irq_hw_number_t hw)
138{
139	int64_t	err;
140
141	err = beat_construct_and_connect_irq_plug(virq, hw);
142	if (err < 0)
143		return -EIO;
144
145	irq_set_status_flags(virq, IRQ_LEVEL);
146	irq_set_chip_and_handler(virq, &beatic_pic, handle_fasteoi_irq);
147	return 0;
148}
149
150/*
151 * Translate device-tree interrupt spec to irq_hw_number_t style (ulong),
152 * to pass away to irq_create_mapping().
153 *
154 * Called from irq_create_of_mapping() only.
155 * Note: We have only 1 entry to translate.
156 */
157static int beatic_pic_host_xlate(struct irq_domain *h, struct device_node *ct,
158				 const u32 *intspec, unsigned int intsize,
159				 irq_hw_number_t *out_hwirq,
160				 unsigned int *out_flags)
161{
162	const u64 *intspec2 = (const u64 *)intspec;
163
164	*out_hwirq = *intspec2;
165	*out_flags |= IRQ_TYPE_LEVEL_LOW;
166	return 0;
167}
168
169static int beatic_pic_host_match(struct irq_domain *h, struct device_node *np)
170{
171	/* Match all */
172	return 1;
173}
174
175static const struct irq_domain_ops beatic_pic_host_ops = {
176	.map = beatic_pic_host_map,
177	.unmap = beatic_pic_host_unmap,
178	.xlate = beatic_pic_host_xlate,
179	.match = beatic_pic_host_match,
180};
181
182/*
183 * Get an IRQ number
184 * Note: returns VIRQ
185 */
186static inline unsigned int beatic_get_irq_plug(void)
187{
188	int i;
189	uint64_t	pending[4], ub;
190
191	for (i = 0; i < MAX_IRQS; i += 256) {
192		beat_detect_pending_interrupts(i, pending);
193		__asm__ ("cntlzd %0,%1":"=r"(ub):
194			"r"(pending[0] & beatic_irq_mask_enable[i/64+0]
195				       & beatic_irq_mask_ack[i/64+0]));
196		if (ub != 64)
197			return i + ub + 0;
198		__asm__ ("cntlzd %0,%1":"=r"(ub):
199			"r"(pending[1] & beatic_irq_mask_enable[i/64+1]
200				       & beatic_irq_mask_ack[i/64+1]));
201		if (ub != 64)
202			return i + ub + 64;
203		__asm__ ("cntlzd %0,%1":"=r"(ub):
204			"r"(pending[2] & beatic_irq_mask_enable[i/64+2]
205				       & beatic_irq_mask_ack[i/64+2]));
206		if (ub != 64)
207			return i + ub + 128;
208		__asm__ ("cntlzd %0,%1":"=r"(ub):
209			"r"(pending[3] & beatic_irq_mask_enable[i/64+3]
210				       & beatic_irq_mask_ack[i/64+3]));
211		if (ub != 64)
212			return i + ub + 192;
213	}
214
215	return NO_IRQ;
216}
217unsigned int beatic_get_irq(void)
218{
219	unsigned int ret;
220
221	ret = beatic_get_irq_plug();
222	if (ret != NO_IRQ)
223		beatic_ack_irq(irq_get_irq_data(ret));
224	return ret;
225}
226
227/*
228 */
229void __init beatic_init_IRQ(void)
230{
231	int	i;
232
233	memset(beatic_irq_mask_enable, 0, sizeof(beatic_irq_mask_enable));
234	memset(beatic_irq_mask_ack, 255, sizeof(beatic_irq_mask_ack));
235	for (i = 0; i < MAX_IRQS; i += 256)
236		beat_set_interrupt_mask(i, 0L, 0L, 0L, 0L);
237
238	/* Set out get_irq function */
239	ppc_md.get_irq = beatic_get_irq;
240
241	/* Allocate an irq host */
242	beatic_host = irq_domain_add_nomap(NULL, ~0, &beatic_pic_host_ops, NULL);
243	BUG_ON(beatic_host == NULL);
244	irq_set_default_host(beatic_host);
245}
246
247void beatic_deinit_IRQ(void)
248{
249	int	i;
250
251	for (i = 1; i < nr_irqs; i++)
252		beat_destruct_irq_plug(i);
253}