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/arch/mn10300/kernel/smp-low.S

http://github.com/mirrors/linux
Assembly | 97 lines | 88 code | 9 blank | 0 comment | 0 complexity | ac24562f4e7284ffdb1d20a8c9184a94 MD5 | raw file
 1/* SMP IPI low-level handler
 2 *
 3 * Copyright (C) 2006-2007 Matsushita Electric Industrial Co., Ltd.
 4 * All Rights Reserved.
 5 *
 6 * This program is free software; you can redistribute it and/or
 7 * modify it under the terms of the GNU General Public License
 8 * as published by the Free Software Foundation; either version
 9 * 2 of the License, or (at your option) any later version.
10 *
11 */
12
13#include <linux/sys.h>
14#include <linux/linkage.h>
15#include <asm/smp.h>
16#include <asm/thread_info.h>
17#include <asm/cpu-regs.h>
18#include <asm/intctl-regs.h>
19#include <proc/smp-regs.h>
20#include <asm/asm-offsets.h>
21#include <asm/frame.inc>
22
23	.am33_2
24
25###############################################################################
26#
27# IPI interrupt handler
28#
29###############################################################################
30	.globl mn10300_low_ipi_handler
31mn10300_low_ipi_handler:
32	add	-4,sp
33	mov	d0,(sp)
34	movhu	(IAGR),d0
35	and	IAGR_GN,d0
36	lsr	0x2,d0
37#ifdef CONFIG_MN10300_CACHE_ENABLED
38	cmp	FLUSH_CACHE_IPI,d0
39	beq	mn10300_flush_cache_ipi
40#endif
41	cmp	SMP_BOOT_IRQ,d0
42	beq	mn10300_smp_boot_ipi
43	/* OTHERS */
44	mov	(sp),d0
45	add	4,sp
46#ifdef CONFIG_GDBSTUB
47	jmp	gdbstub_io_rx_handler
48#else
49	jmp	end
50#endif
51
52###############################################################################
53#
54# Cache flush IPI interrupt handler
55#
56###############################################################################
57#ifdef CONFIG_MN10300_CACHE_ENABLED
58mn10300_flush_cache_ipi:
59	mov	(sp),d0
60	add	4,sp
61
62	/* FLUSH_CACHE_IPI */
63	add	-4,sp
64	SAVE_ALL
65	mov	GxICR_DETECT,d2
66	movbu	d2,(GxICR(FLUSH_CACHE_IPI))	# ACK the interrupt
67	movhu	(GxICR(FLUSH_CACHE_IPI)),d2
68	call	smp_cache_interrupt[],0
69	RESTORE_ALL
70	jmp	end
71#endif
72
73###############################################################################
74#
75# SMP boot CPU IPI interrupt handler
76#
77###############################################################################
78mn10300_smp_boot_ipi:
79	/* clear interrupt */
80	movhu	(GxICR(SMP_BOOT_IRQ)),d0
81	and	~GxICR_REQUEST,d0
82	movhu	d0,(GxICR(SMP_BOOT_IRQ))
83	mov	(sp),d0
84	add	4,sp
85
86	# get stack
87	mov	(CPUID),a0
88	add	-1,a0
89	add	a0,a0
90	add	a0,a0
91	mov	(start_stack,a0),a0
92	mov	a0,sp
93	jmp	initialize_secondary
94
95
96# Jump here after RTI to suppress the icache lookahead
97end: