/drivers/platform/x86/intel_mid_powerbtn.c

http://github.com/mirrors/linux · C · 226 lines · 159 code · 41 blank · 26 comment · 12 complexity · 106b12af60c9d6a266bb4f5021fec5fa MD5 · raw file

  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Power button driver for Intel MID platforms.
  4. *
  5. * Copyright (C) 2010,2017 Intel Corp
  6. *
  7. * Author: Hong Liu <hong.liu@intel.com>
  8. * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
  9. */
  10. #include <linux/input.h>
  11. #include <linux/interrupt.h>
  12. #include <linux/mfd/intel_msic.h>
  13. #include <linux/module.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/pm_wakeirq.h>
  16. #include <linux/slab.h>
  17. #include <asm/cpu_device_id.h>
  18. #include <asm/intel-family.h>
  19. #include <asm/intel_scu_ipc.h>
  20. #define DRIVER_NAME "msic_power_btn"
  21. #define MSIC_PB_LEVEL (1 << 3) /* 1 - release, 0 - press */
  22. /*
  23. * MSIC document ti_datasheet defines the 1st bit reg 0x21 is used to mask
  24. * power button interrupt
  25. */
  26. #define MSIC_PWRBTNM (1 << 0)
  27. /* Intel Tangier */
  28. #define BCOVE_PB_LEVEL (1 << 4) /* 1 - release, 0 - press */
  29. /* Basin Cove PMIC */
  30. #define BCOVE_PBIRQ 0x02
  31. #define BCOVE_IRQLVL1MSK 0x0c
  32. #define BCOVE_PBIRQMASK 0x0d
  33. #define BCOVE_PBSTATUS 0x27
  34. struct mid_pb_ddata {
  35. struct device *dev;
  36. int irq;
  37. struct input_dev *input;
  38. unsigned short mirqlvl1_addr;
  39. unsigned short pbstat_addr;
  40. u8 pbstat_mask;
  41. int (*setup)(struct mid_pb_ddata *ddata);
  42. };
  43. static int mid_pbstat(struct mid_pb_ddata *ddata, int *value)
  44. {
  45. struct input_dev *input = ddata->input;
  46. int ret;
  47. u8 pbstat;
  48. ret = intel_scu_ipc_ioread8(ddata->pbstat_addr, &pbstat);
  49. if (ret)
  50. return ret;
  51. dev_dbg(input->dev.parent, "PB_INT status= %d\n", pbstat);
  52. *value = !(pbstat & ddata->pbstat_mask);
  53. return 0;
  54. }
  55. static int mid_irq_ack(struct mid_pb_ddata *ddata)
  56. {
  57. return intel_scu_ipc_update_register(ddata->mirqlvl1_addr, 0, MSIC_PWRBTNM);
  58. }
  59. static int mrfld_setup(struct mid_pb_ddata *ddata)
  60. {
  61. /* Unmask the PBIRQ and MPBIRQ on Tangier */
  62. intel_scu_ipc_update_register(BCOVE_PBIRQ, 0, MSIC_PWRBTNM);
  63. intel_scu_ipc_update_register(BCOVE_PBIRQMASK, 0, MSIC_PWRBTNM);
  64. return 0;
  65. }
  66. static irqreturn_t mid_pb_isr(int irq, void *dev_id)
  67. {
  68. struct mid_pb_ddata *ddata = dev_id;
  69. struct input_dev *input = ddata->input;
  70. int value = 0;
  71. int ret;
  72. ret = mid_pbstat(ddata, &value);
  73. if (ret < 0) {
  74. dev_err(input->dev.parent,
  75. "Read error %d while reading MSIC_PB_STATUS\n", ret);
  76. } else {
  77. input_event(input, EV_KEY, KEY_POWER, value);
  78. input_sync(input);
  79. }
  80. mid_irq_ack(ddata);
  81. return IRQ_HANDLED;
  82. }
  83. static const struct mid_pb_ddata mfld_ddata = {
  84. .mirqlvl1_addr = INTEL_MSIC_IRQLVL1MSK,
  85. .pbstat_addr = INTEL_MSIC_PBSTATUS,
  86. .pbstat_mask = MSIC_PB_LEVEL,
  87. };
  88. static const struct mid_pb_ddata mrfld_ddata = {
  89. .mirqlvl1_addr = BCOVE_IRQLVL1MSK,
  90. .pbstat_addr = BCOVE_PBSTATUS,
  91. .pbstat_mask = BCOVE_PB_LEVEL,
  92. .setup = mrfld_setup,
  93. };
  94. static const struct x86_cpu_id mid_pb_cpu_ids[] = {
  95. X86_MATCH_INTEL_FAM6_MODEL(ATOM_SALTWELL_MID, &mfld_ddata),
  96. X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, &mrfld_ddata),
  97. {}
  98. };
  99. static int mid_pb_probe(struct platform_device *pdev)
  100. {
  101. const struct x86_cpu_id *id;
  102. struct mid_pb_ddata *ddata;
  103. struct input_dev *input;
  104. int irq = platform_get_irq(pdev, 0);
  105. int error;
  106. id = x86_match_cpu(mid_pb_cpu_ids);
  107. if (!id)
  108. return -ENODEV;
  109. if (irq < 0) {
  110. dev_err(&pdev->dev, "Failed to get IRQ: %d\n", irq);
  111. return irq;
  112. }
  113. input = devm_input_allocate_device(&pdev->dev);
  114. if (!input)
  115. return -ENOMEM;
  116. input->name = pdev->name;
  117. input->phys = "power-button/input0";
  118. input->id.bustype = BUS_HOST;
  119. input->dev.parent = &pdev->dev;
  120. input_set_capability(input, EV_KEY, KEY_POWER);
  121. ddata = devm_kmemdup(&pdev->dev, (void *)id->driver_data,
  122. sizeof(*ddata), GFP_KERNEL);
  123. if (!ddata)
  124. return -ENOMEM;
  125. ddata->dev = &pdev->dev;
  126. ddata->irq = irq;
  127. ddata->input = input;
  128. if (ddata->setup) {
  129. error = ddata->setup(ddata);
  130. if (error)
  131. return error;
  132. }
  133. error = devm_request_threaded_irq(&pdev->dev, irq, NULL, mid_pb_isr,
  134. IRQF_ONESHOT, DRIVER_NAME, ddata);
  135. if (error) {
  136. dev_err(&pdev->dev,
  137. "Unable to request irq %d for MID power button\n", irq);
  138. return error;
  139. }
  140. error = input_register_device(input);
  141. if (error) {
  142. dev_err(&pdev->dev,
  143. "Unable to register input dev, error %d\n", error);
  144. return error;
  145. }
  146. platform_set_drvdata(pdev, ddata);
  147. /*
  148. * SCU firmware might send power button interrupts to IA core before
  149. * kernel boots and doesn't get EOI from IA core. The first bit of
  150. * MSIC reg 0x21 is kept masked, and SCU firmware doesn't send new
  151. * power interrupt to Android kernel. Unmask the bit when probing
  152. * power button in kernel.
  153. * There is a very narrow race between irq handler and power button
  154. * initialization. The race happens rarely. So we needn't worry
  155. * about it.
  156. */
  157. error = mid_irq_ack(ddata);
  158. if (error) {
  159. dev_err(&pdev->dev,
  160. "Unable to clear power button interrupt, error: %d\n",
  161. error);
  162. return error;
  163. }
  164. device_init_wakeup(&pdev->dev, true);
  165. dev_pm_set_wake_irq(&pdev->dev, irq);
  166. return 0;
  167. }
  168. static int mid_pb_remove(struct platform_device *pdev)
  169. {
  170. dev_pm_clear_wake_irq(&pdev->dev);
  171. device_init_wakeup(&pdev->dev, false);
  172. return 0;
  173. }
  174. static struct platform_driver mid_pb_driver = {
  175. .driver = {
  176. .name = DRIVER_NAME,
  177. },
  178. .probe = mid_pb_probe,
  179. .remove = mid_pb_remove,
  180. };
  181. module_platform_driver(mid_pb_driver);
  182. MODULE_AUTHOR("Hong Liu <hong.liu@intel.com>");
  183. MODULE_DESCRIPTION("Intel MID Power Button Driver");
  184. MODULE_LICENSE("GPL v2");
  185. MODULE_ALIAS("platform:" DRIVER_NAME);