/drivers/scsi/aic7xxx_old.c

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  1. /*+M*************************************************************************
    2. 

  2.  * Adaptec AIC7xxx device driver for Linux.
    3. 

  3.  *
    4. 

  4.  * Copyright (c) 1994 John Aycock
    5. 

  5.  *   The University of Calgary Department of Computer Science.
    6. 

  6.  *
    7. 

  7.  * This program is free software; you can redistribute it and/or modify
    8. 

  8.  * it under the terms of the GNU General Public License as published by
    9. 

  9.  * the Free Software Foundation; either version 2, or (at your option)
    10. 

  10.  * any later version.
    11. 

  11.  *
    12. 

  12.  * This program is distributed in the hope that it will be useful,
    13. 

  13.  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    14. 

  14.  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    15. 

  15.  * GNU General Public License for more details.
    16. 

  16.  *
    17. 

  17.  * You should have received a copy of the GNU General Public License
    18. 

  18.  * along with this program; see the file COPYING.  If not, write to
    19. 

  19.  * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
    20. 

  20.  *
    21. 

  21.  * Sources include the Adaptec 1740 driver (aha1740.c), the Ultrastor 24F
    22. 

  22.  * driver (ultrastor.c), various Linux kernel source, the Adaptec EISA
    23. 

  23.  * config file (!adp7771.cfg), the Adaptec AHA-2740A Series User's Guide,
    24. 

  24.  * the Linux Kernel Hacker's Guide, Writing a SCSI Device Driver for Linux,
    25. 

  25.  * the Adaptec 1542 driver (aha1542.c), the Adaptec EISA overlay file
    26. 

  26.  * (adp7770.ovl), the Adaptec AHA-2740 Series Technical Reference Manual,
    27. 

  27.  * the Adaptec AIC-7770 Data Book, the ANSI SCSI specification, the
    28. 

  28.  * ANSI SCSI-2 specification (draft 10c), ...
    29. 

  29.  *
    30. 

  30.  * --------------------------------------------------------------------------
    31. 

  31.  *
    32. 

  32.  *  Modifications by Daniel M. Eischen (deischen@iworks.InterWorks.org):
    33. 

  33.  *
    34. 

  34.  *  Substantially modified to include support for wide and twin bus
    35. 

  35.  *  adapters, DMAing of SCBs, tagged queueing, IRQ sharing, bug fixes,
    36. 

  36.  *  SCB paging, and other rework of the code.
    37. 

  37.  *
    38. 

  38.  *  Parts of this driver were also based on the FreeBSD driver by
    39. 

  39.  *  Justin T. Gibbs.  His copyright follows:
    40. 

  40.  *
    41. 

  41.  * --------------------------------------------------------------------------  
    42. 

  42.  * Copyright (c) 1994-1997 Justin Gibbs.
    43. 

  43.  * All rights reserved.
    44. 

  44.  *
    45. 

  45.  * Redistribution and use in source and binary forms, with or without
    46. 

  46.  * modification, are permitted provided that the following conditions
    47. 

  47.  * are met:
    48. 

  48.  * 1. Redistributions of source code must retain the above copyright
    49. 

  49.  *    notice, this list of conditions, and the following disclaimer,
    50. 

  50.  *    without modification, immediately at the beginning of the file.
    51. 

  51.  * 2. Redistributions in binary form must reproduce the above copyright
    52. 

  52.  *    notice, this list of conditions and the following disclaimer in the
    53. 

  53.  *    documentation and/or other materials provided with the distribution.
    54. 

  54.  * 3. The name of the author may not be used to endorse or promote products
    55. 

  55.  *    derived from this software without specific prior written permission.
    56. 

  56.  *
    57. 

  57.  * Where this Software is combined with software released under the terms of 
    58. 

  58.  * the GNU General Public License ("GPL") and the terms of the GPL would require the 
    59. 

  59.  * combined work to also be released under the terms of the GPL, the terms
    60. 

  60.  * and conditions of this License will apply in addition to those of the
    61. 

  61.  * GPL with the exception of any terms or conditions of this License that
    62. 

  62.  * conflict with, or are expressly prohibited by, the GPL.
    63. 

  63.  *
    64. 

  64.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
    65. 

  65.  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
    66. 

  66.  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
    67. 

  67.  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
    68. 

  68.  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
    69. 

  69.  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
    70. 

  70.  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
    71. 

  71.  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
    72. 

  72.  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
    73. 

  73.  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
    74. 

  74.  * SUCH DAMAGE.
    75. 

  75.  *
    76. 

  76.  *      $Id: aic7xxx.c,v 1.119 1997/06/27 19:39:18 gibbs Exp $
    77. 

  77.  *---------------------------------------------------------------------------
    78. 

  78.  *
    79. 

  79.  *  Thanks also go to (in alphabetical order) the following:
    80. 

  80.  *
    81. 

  81.  *    Rory Bolt     - Sequencer bug fixes
    82. 

  82.  *    Jay Estabrook - Initial DEC Alpha support
    83. 

  83.  *    Doug Ledford  - Much needed abort/reset bug fixes
    84. 

  84.  *    Kai Makisara  - DMAing of SCBs
    85. 

  85.  *
    86. 

  86.  *  A Boot time option was also added for not resetting the scsi bus.
    87. 

  87.  *
    88. 

  88.  *    Form:  aic7xxx=extended
    89. 

  89.  *           aic7xxx=no_reset
    90. 

  90.  *           aic7xxx=ultra
    91. 

  91.  *           aic7xxx=irq_trigger:[0,1]  # 0 edge, 1 level
    92. 

  92.  *           aic7xxx=verbose
    93. 

  93.  *
    94. 

  94.  *  Daniel M. Eischen, deischen@iworks.InterWorks.org, 1/23/97
    95. 

  95.  *
    96. 

  96.  *  $Id: aic7xxx.c,v 4.1 1997/06/12 08:23:42 deang Exp $
    97. 

  97.  *-M*************************************************************************/
    98. 

  98. 

  99. /*+M**************************************************************************
    100. 

  100.  *
    101. 

  101.  * Further driver modifications made by Doug Ledford <dledford@redhat.com>
    102. 

  102.  *
    103. 

  103.  * Copyright (c) 1997-1999 Doug Ledford
    104. 

  104.  *
    105. 

  105.  * These changes are released under the same licensing terms as the FreeBSD
    106. 

  106.  * driver written by Justin Gibbs.  Please see his Copyright notice above
    107. 

  107.  * for the exact terms and conditions covering my changes as well as the
    108. 

  108.  * warranty statement.
    109. 

  109.  *
    110. 

  110.  * Modifications made to the aic7xxx.c,v 4.1 driver from Dan Eischen include
    111. 

  111.  * but are not limited to:
    112. 

  112.  *
    113. 

  113.  *  1: Import of the latest FreeBSD sequencer code for this driver
    114. 

  114.  *  2: Modification of kernel code to accommodate different sequencer semantics
    115. 

  115.  *  3: Extensive changes throughout kernel portion of driver to improve
    116. 

  116.  *     abort/reset processing and error hanndling
    117. 

  117.  *  4: Other work contributed by various people on the Internet
    118. 

  118.  *  5: Changes to printk information and verbosity selection code
    119. 

  119.  *  6: General reliability related changes, especially in IRQ management
    120. 

  120.  *  7: Modifications to the default probe/attach order for supported cards
    121. 

  121.  *  8: SMP friendliness has been improved
    122. 

  122.  *
    123. 

  123.  * Overall, this driver represents a significant departure from the official
    124. 

  124.  * aic7xxx driver released by Dan Eischen in two ways.  First, in the code
    125. 

  125.  * itself.  A diff between the two version of the driver is now a several
    126. 

  126.  * thousand line diff.  Second, in approach to solving the same problem.  The
    127. 

  127.  * problem is importing the FreeBSD aic7xxx driver code to linux can be a
    128. 

  128.  * difficult and time consuming process, that also can be error prone.  Dan
    129. 

  129.  * Eischen's official driver uses the approach that the linux and FreeBSD
    130. 

  130.  * drivers should be as identical as possible.  To that end, his next version
    131. 

  131.  * of this driver will be using a mid-layer code library that he is developing
    132. 

  132.  * to moderate communications between the linux mid-level SCSI code and the
    133. 

  133.  * low level FreeBSD driver.  He intends to be able to essentially drop the
    134. 

  134.  * FreeBSD driver into the linux kernel with only a few minor tweaks to some
    135. 

  135.  * include files and the like and get things working, making for fast easy
    136. 

  136.  * imports of the FreeBSD code into linux.
    137. 

  137.  *
    138. 

  138.  * I disagree with Dan's approach.  Not that I don't think his way of doing
    139. 

  139.  * things would be nice, easy to maintain, and create a more uniform driver
    140. 

  140.  * between FreeBSD and Linux.  I have no objection to those issues.  My
    141. 

  141.  * disagreement is on the needed functionality.  There simply are certain
    142. 

  142.  * things that are done differently in FreeBSD than linux that will cause
    143. 

  143.  * problems for this driver regardless of any middle ware Dan implements.
    144. 

  144.  * The biggest example of this at the moment is interrupt semantics.  Linux
    145. 

  145.  * doesn't provide the same protection techniques as FreeBSD does, nor can
    146. 

  146.  * they be easily implemented in any middle ware code since they would truly
    147. 

  147.  * belong in the kernel proper and would effect all drivers.  For the time
    148. 

  148.  * being, I see issues such as these as major stumbling blocks to the 
    149. 

  149.  * reliability of code based upon such middle ware.  Therefore, I choose to
    150. 

  150.  * use a different approach to importing the FreeBSD code that doesn't
    151. 

  151.  * involve any middle ware type code.  My approach is to import the sequencer
    152. 

  152.  * code from FreeBSD wholesale.  Then, to only make changes in the kernel
    153. 

  153.  * portion of the driver as they are needed for the new sequencer semantics.
    154. 

  154.  * In this way, the portion of the driver that speaks to the rest of the
    155. 

  155.  * linux kernel is fairly static and can be changed/modified to solve
    156. 

  156.  * any problems one might encounter without concern for the FreeBSD driver.
    157. 

  157.  *
    158. 

  158.  * Note: If time and experience should prove me wrong that the middle ware
    159. 

  159.  * code Dan writes is reliable in its operation, then I'll retract my above
    160. 

  160.  * statements.  But, for those that don't know, I'm from Missouri (in the US)
    161. 

  161.  * and our state motto is "The Show-Me State".  Well, before I will put
    162. 

  162.  * faith into it, you'll have to show me that it works :)
    163. 

  163.  *
    164. 

  164.  *_M*************************************************************************/
    165. 

  165. 

  166. /*
    167. 

  167.  * The next three defines are user configurable.  These should be the only
    168. 

  168.  * defines a user might need to get in here and change.  There are other
    169. 

  169.  * defines buried deeper in the code, but those really shouldn't need touched
    170. 

  170.  * under normal conditions.
    171. 

  171.  */
    172. 

  172. 

  173. /*
    174. 

  174.  * AIC7XXX_STRICT_PCI_SETUP
    175. 

  175.  *   Should we assume the PCI config options on our controllers are set with
    176. 

  176.  *   sane and proper values, or should we be anal about our PCI config
    177. 

  177.  *   registers and force them to what we want?  The main advantage to
    178. 

  178.  *   defining this option is on non-Intel hardware where the BIOS may not
    179. 

  179.  *   have been run to set things up, or if you have one of the BIOSless
    180. 

  180.  *   Adaptec controllers, such as a 2910, that don't get set up by the
    181. 

  181.  *   BIOS.  However, keep in mind that we really do set the most important
    182. 

  182.  *   items in the driver regardless of this setting, this only controls some
    183. 

  183.  *   of the more esoteric PCI options on these cards.  In that sense, I
    184. 

  184.  *   would default to leaving this off.  However, if people wish to try
    185. 

  185.  *   things both ways, that would also help me to know if there are some
    186. 

  186.  *   machines where it works one way but not another.
    187. 

  187.  *
    188. 

  188.  *   -- July 7, 17:09
    189. 

  189.  *     OK...I need this on my machine for testing, so the default is to
    190. 

  190.  *     leave it defined.
    191. 

  191.  *
    192. 

  192.  *   -- July 7, 18:49
    193. 

  193.  *     I needed it for testing, but it didn't make any difference, so back
    194. 

  194.  *     off she goes.
    195. 

  195.  *
    196. 

  196.  *   -- July 16, 23:04
    197. 

  197.  *     I turned it back on to try and compensate for the 2.1.x PCI code
    198. 

  198.  *     which no longer relies solely on the BIOS and now tries to set
    199. 

  199.  *     things itself.
    200. 

  200.  */
    201. 

  201. 

  202. #define AIC7XXX_STRICT_PCI_SETUP
    203. 

  203. 

  204. /*
    205. 

  205.  * AIC7XXX_VERBOSE_DEBUGGING
    206. 

  206.  *   This option enables a lot of extra printk();s in the code, surrounded
    207. 

  207.  *   by if (aic7xxx_verbose ...) statements.  Executing all of those if
    208. 

  208.  *   statements and the extra checks can get to where it actually does have
    209. 

  209.  *   an impact on CPU usage and such, as well as code size.  Disabling this
    210. 

  210.  *   define will keep some of those from becoming part of the code.
    211. 

  211.  *
    212. 

  212.  *   NOTE:  Currently, this option has no real effect, I will be adding the
    213. 

  213.  *   various #ifdef's in the code later when I've decided a section is
    214. 

  214.  *   complete and no longer needs debugging.  OK...a lot of things are now
    215. 

  215.  *   surrounded by this define, so turning this off does have an impact.
    216. 

  216.  */
    217. 

  217.  
    218. 

  218. /*
    219. 

  219.  * #define AIC7XXX_VERBOSE_DEBUGGING
    220. 

  220.  */
    221. 

  221.  
    222. 

  222. #include <linux/module.h>
    223. 

  223. #include <stdarg.h>
    224. 

  224. #include <asm/io.h>
    225. 

  225. #include <asm/irq.h>
    226. 

  226. #include <asm/byteorder.h>
    227. 

  227. #include <linux/string.h>
    228. 

  228. #include <linux/errno.h>
    229. 

  229. #include <linux/kernel.h>
    230. 

  230. #include <linux/ioport.h>
    231. 

  231. #include <linux/delay.h>
    232. 

  232. #include <linux/pci.h>
    233. 

  233. #include <linux/proc_fs.h>
    234. 

  234. #include <linux/blkdev.h>
    235. 

  235. #include <linux/init.h>
    236. 

  236. #include <linux/spinlock.h>
    237. 

  237. #include <linux/smp.h>
    238. 

  238. #include <linux/interrupt.h>
    239. 

  239. #include "scsi.h"
    240. 

  240. #include <scsi/scsi_host.h>
    241. 

  241. #include "aic7xxx_old/aic7xxx.h"
    242. 

  242. 

  243. #include "aic7xxx_old/sequencer.h"
    244. 

  244. #include "aic7xxx_old/scsi_message.h"
    245. 

  245. #include "aic7xxx_old/aic7xxx_reg.h"
    246. 

  246. #include <scsi/scsicam.h>
    247. 

  247. 

  248. #include <linux/stat.h>
    249. 

  249. #include <linux/slab.h>        /* for kmalloc() */
    250. 

  250. 

  251. #define AIC7XXX_C_VERSION  "5.2.6"
    252. 

  252. 

  253. #define ALL_TARGETS -1
    254. 

  254. #define ALL_CHANNELS -1
    255. 

  255. #define ALL_LUNS -1
    256. 

  256. #define MAX_TARGETS  16
    257. 

  257. #define MAX_LUNS     8
    258. 

  258. #ifndef TRUE
    259. 

  259. #  define TRUE 1
    260. 

  260. #endif
    261. 

  261. #ifndef FALSE
    262. 

  262. #  define FALSE 0
    263. 

  263. #endif
    264. 

  264. 

  265. #if defined(__powerpc__) || defined(__i386__) || defined(__x86_64__)
    266. 

  266. #  define MMAPIO
    267. 

  267. #endif
    268. 

  268. 

  269. /*
    270. 

  270.  * You can try raising me for better performance or lowering me if you have
    271. 

  271.  * flaky devices that go off the scsi bus when hit with too many tagged
    272. 

  272.  * commands (like some IBM SCSI-3 LVD drives).
    273. 

  273.  */
    274. 

  274. #define AIC7XXX_CMDS_PER_DEVICE 32
    275. 

  275. 

  276. typedef struct
    277. 

  277. {
    278. 

  278.   unsigned char tag_commands[16];   /* Allow for wide/twin adapters. */
    279. 

  279. } adapter_tag_info_t;
    280. 

  280. 

  281. /*
    282. 

  282.  * Make a define that will tell the driver not to the default tag depth
    283. 

  283.  * everywhere.
    284. 

  284.  */
    285. 

  285. #define DEFAULT_TAG_COMMANDS {0, 0, 0, 0, 0, 0, 0, 0,\
    286. 

  286.                               0, 0, 0, 0, 0, 0, 0, 0}
    287. 

  287. 

  288. /*
    289. 

  289.  * Modify this as you see fit for your system.  By setting tag_commands
    290. 

  290.  * to 0, the driver will use it's own algorithm for determining the
    291. 

  291.  * number of commands to use (see above).  When 255, the driver will
    292. 

  292.  * not enable tagged queueing for that particular device.  When positive
    293. 

  293.  * (> 0) and (< 255) the values in the array are used for the queue_depth.
    294. 

  294.  * Note that the maximum value for an entry is 254, but you're insane if
    295. 

  295.  * you try to use that many commands on one device.
    296. 

  296.  *
    297. 

  297.  * In this example, the first line will disable tagged queueing for all
    298. 

  298.  * the devices on the first probed aic7xxx adapter.
    299. 

  299.  *
    300. 

  300.  * The second line enables tagged queueing with 4 commands/LUN for IDs
    301. 

  301.  * (1, 2-11, 13-15), disables tagged queueing for ID 12, and tells the
    302. 

  302.  * driver to use its own algorithm for ID 1.
    303. 

  303.  *
    304. 

  304.  * The third line is the same as the first line.
    305. 

  305.  *
    306. 

  306.  * The fourth line disables tagged queueing for devices 0 and 3.  It
    307. 

  307.  * enables tagged queueing for the other IDs, with 16 commands/LUN
    308. 

  308.  * for IDs 1 and 4, 127 commands/LUN for ID 8, and 4 commands/LUN for
    309. 

  309.  * IDs 2, 5-7, and 9-15.
    310. 

  310.  */
    311. 

  311. 

  312. /*
    313. 

  313.  * NOTE: The below structure is for reference only, the actual structure
    314. 

  314.  *       to modify in order to change things is found after this fake one.
    315. 

  315.  *
    316. 

  316. adapter_tag_info_t aic7xxx_tag_info[] =
    317. 

  317. {
    318. 

  318.   {DEFAULT_TAG_COMMANDS},
    319. 

  319.   {{4, 0, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 255, 4, 4, 4}},
    320. 

  320.   {DEFAULT_TAG_COMMANDS},
    321. 

  321.   {{255, 16, 4, 255, 16, 4, 4, 4, 127, 4, 4, 4, 4, 4, 4, 4}}
    322. 

  322. };
    323. 

  323. */
    324. 

  324. 

  325. static adapter_tag_info_t aic7xxx_tag_info[] =
    326. 

  326. {
    327. 

  327.   {DEFAULT_TAG_COMMANDS},
    328. 

  328.   {DEFAULT_TAG_COMMANDS},
    329. 

  329.   {DEFAULT_TAG_COMMANDS},
    330. 

  330.   {DEFAULT_TAG_COMMANDS},
    331. 

  331.   {DEFAULT_TAG_COMMANDS},
    332. 

  332.   {DEFAULT_TAG_COMMANDS},
    333. 

  333.   {DEFAULT_TAG_COMMANDS},
    334. 

  334.   {DEFAULT_TAG_COMMANDS},
    335. 

  335.   {DEFAULT_TAG_COMMANDS},
    336. 

  336.   {DEFAULT_TAG_COMMANDS},
    337. 

  337.   {DEFAULT_TAG_COMMANDS},
    338. 

  338.   {DEFAULT_TAG_COMMANDS},
    339. 

  339.   {DEFAULT_TAG_COMMANDS},
    340. 

  340.   {DEFAULT_TAG_COMMANDS},
    341. 

  341.   {DEFAULT_TAG_COMMANDS},
    342. 

  342.   {DEFAULT_TAG_COMMANDS}
    343. 

  343. };
    344. 

  344. 

  345. 

  346. /*
    347. 

  347.  * Define an array of board names that can be indexed by aha_type.
    348. 

  348.  * Don't forget to change this when changing the types!
    349. 

  349.  */
    350. 

  350. static const char *board_names[] = {
    351. 

  351.   "AIC-7xxx Unknown",                                   /* AIC_NONE */
    352. 

  352.   "Adaptec AIC-7810 Hardware RAID Controller",          /* AIC_7810 */
    353. 

  353.   "Adaptec AIC-7770 SCSI host adapter",                 /* AIC_7770 */
    354. 

  354.   "Adaptec AHA-274X SCSI host adapter",                 /* AIC_7771 */
    355. 

  355.   "Adaptec AHA-284X SCSI host adapter",                 /* AIC_284x */
    356. 

  356.   "Adaptec AIC-7850 SCSI host adapter",                 /* AIC_7850 */
    357. 

  357.   "Adaptec AIC-7855 SCSI host adapter",                 /* AIC_7855 */
    358. 

  358.   "Adaptec AIC-7860 Ultra SCSI host adapter",           /* AIC_7860 */
    359. 

  359.   "Adaptec AHA-2940A Ultra SCSI host adapter",          /* AIC_7861 */
    360. 

  360.   "Adaptec AIC-7870 SCSI host adapter",                 /* AIC_7870 */
    361. 

  361.   "Adaptec AHA-294X SCSI host adapter",                 /* AIC_7871 */
    362. 

  362.   "Adaptec AHA-394X SCSI host adapter",                 /* AIC_7872 */
    363. 

  363.   "Adaptec AHA-398X SCSI host adapter",                 /* AIC_7873 */
    364. 

  364.   "Adaptec AHA-2944 SCSI host adapter",                 /* AIC_7874 */
    365. 

  365.   "Adaptec AIC-7880 Ultra SCSI host adapter",           /* AIC_7880 */
    366. 

  366.   "Adaptec AHA-294X Ultra SCSI host adapter",           /* AIC_7881 */
    367. 

  367.   "Adaptec AHA-394X Ultra SCSI host adapter",           /* AIC_7882 */
    368. 

  368.   "Adaptec AHA-398X Ultra SCSI host adapter",           /* AIC_7883 */
    369. 

  369.   "Adaptec AHA-2944 Ultra SCSI host adapter",           /* AIC_7884 */
    370. 

  370.   "Adaptec AHA-2940UW Pro Ultra SCSI host adapter",     /* AIC_7887 */
    371. 

  371.   "Adaptec AIC-7895 Ultra SCSI host adapter",           /* AIC_7895 */
    372. 

  372.   "Adaptec AIC-7890/1 Ultra2 SCSI host adapter",        /* AIC_7890 */
    373. 

  373.   "Adaptec AHA-293X Ultra2 SCSI host adapter",          /* AIC_7890 */
    374. 

  374.   "Adaptec AHA-294X Ultra2 SCSI host adapter",          /* AIC_7890 */
    375. 

  375.   "Adaptec AIC-7896/7 Ultra2 SCSI host adapter",        /* AIC_7896 */
    376. 

  376.   "Adaptec AHA-394X Ultra2 SCSI host adapter",          /* AIC_7897 */
    377. 

  377.   "Adaptec AHA-395X Ultra2 SCSI host adapter",          /* AIC_7897 */
    378. 

  378.   "Adaptec PCMCIA SCSI controller",                     /* card bus stuff */
    379. 

  379.   "Adaptec AIC-7892 Ultra 160/m SCSI host adapter",     /* AIC_7892 */
    380. 

  380.   "Adaptec AIC-7899 Ultra 160/m SCSI host adapter",     /* AIC_7899 */
    381. 

  381. };
    382. 

  382. 

  383. /*
    384. 

  384.  * There should be a specific return value for this in scsi.h, but
    385. 

  385.  * it seems that most drivers ignore it.
    386. 

  386.  */
    387. 

  387. #define DID_UNDERFLOW   DID_ERROR
    388. 

  388. 

  389. /*
    390. 

  390.  *  What we want to do is have the higher level scsi driver requeue
    391. 

  391.  *  the command to us. There is no specific driver status for this
    392. 

  392.  *  condition, but the higher level scsi driver will requeue the
    393. 

  393.  *  command on a DID_BUS_BUSY error.
    394. 

  394.  *
    395. 

  395.  *  Upon further inspection and testing, it seems that DID_BUS_BUSY
    396. 

  396.  *  will *always* retry the command.  We can get into an infinite loop
    397. 

  397.  *  if this happens when we really want some sort of counter that
    398. 

  398.  *  will automatically abort/reset the command after so many retries.
    399. 

  399.  *  Using DID_ERROR will do just that.  (Made by a suggestion by
    400. 

  400.  *  Doug Ledford 8/1/96)
    401. 

  401.  */
    402. 

  402. #define DID_RETRY_COMMAND DID_ERROR
    403. 

  403. 

  404. #define HSCSIID        0x07
    405. 

  405. #define SCSI_RESET     0x040
    406. 

  406. 

  407. /*
    408. 

  408.  * EISA/VL-bus stuff
    409. 

  409.  */
    410. 

  410. #define MINSLOT                1
    411. 

  411. #define MAXSLOT                15
    412. 

  412. #define SLOTBASE(x)        ((x) << 12)
    413. 

  413. #define BASE_TO_SLOT(x) ((x) >> 12)
    414. 

  414. 

  415. /*
    416. 

  416.  * Standard EISA Host ID regs  (Offset from slot base)
    417. 

  417.  */
    418. 

  418. #define AHC_HID0              0x80   /* 0,1: msb of ID2, 2-7: ID1      */
    419. 

  419. #define AHC_HID1              0x81   /* 0-4: ID3, 5-7: LSB ID2         */
    420. 

  420. #define AHC_HID2              0x82   /* product                        */
    421. 

  421. #define AHC_HID3              0x83   /* firmware revision              */
    422. 

  422. 

  423. /*
    424. 

  424.  * AIC-7770 I/O range to reserve for a card
    425. 

  425.  */
    426. 

  426. #define MINREG                0xC00
    427. 

  427. #define MAXREG                0xCFF
    428. 

  428. 

  429. #define INTDEF                0x5C      /* Interrupt Definition Register */
    430. 

  430. 

  431. /*
    432. 

  432.  * AIC-78X0 PCI registers
    433. 

  433.  */
    434. 

  434. #define        CLASS_PROGIF_REVID        0x08
    435. 

  435. #define                DEVREVID        0x000000FFul
    436. 

  436. #define                PROGINFC        0x0000FF00ul
    437. 

  437. #define                SUBCLASS        0x00FF0000ul
    438. 

  438. #define                BASECLASS        0xFF000000ul
    439. 

  439. 

  440. #define        CSIZE_LATTIME                0x0C
    441. 

  441. #define                CACHESIZE        0x0000003Ful        /* only 5 bits */
    442. 

  442. #define                LATTIME                0x0000FF00ul
    443. 

  443. 

  444. #define        DEVCONFIG                0x40
    445. 

  445. #define                SCBSIZE32        0x00010000ul        /* aic789X only */
    446. 

  446. #define                MPORTMODE        0x00000400ul        /* aic7870 only */
    447. 

  447. #define                RAMPSM           0x00000200ul        /* aic7870 only */
    448. 

  448. #define                RAMPSM_ULTRA2    0x00000004
    449. 

  449. #define                VOLSENSE         0x00000100ul
    450. 

  450. #define                SCBRAMSEL        0x00000080ul
    451. 

  451. #define                SCBRAMSEL_ULTRA2 0x00000008
    452. 

  452. #define                MRDCEN           0x00000040ul
    453. 

  453. #define                EXTSCBTIME       0x00000020ul        /* aic7870 only */
    454. 

  454. #define                EXTSCBPEN        0x00000010ul        /* aic7870 only */
    455. 

  455. #define                BERREN           0x00000008ul
    456. 

  456. #define                DACEN            0x00000004ul
    457. 

  457. #define                STPWLEVEL        0x00000002ul
    458. 

  458. #define                DIFACTNEGEN      0x00000001ul        /* aic7870 only */
    459. 

  459. 

  460. #define        SCAMCTL                  0x1a                /* Ultra2 only  */
    461. 

  461. #define        CCSCBBADDR               0xf0                /* aic7895/6/7  */
    462. 

  462. 

  463. /*
    464. 

  464.  * Define the different types of SEEPROMs on aic7xxx adapters
    465. 

  465.  * and make it also represent the address size used in accessing
    466. 

  466.  * its registers.  The 93C46 chips have 1024 bits organized into
    467. 

  467.  * 64 16-bit words, while the 93C56 chips have 2048 bits organized
    468. 

  468.  * into 128 16-bit words.  The C46 chips use 6 bits to address
    469. 

  469.  * each word, while the C56 and C66 (4096 bits) use 8 bits to
    470. 

  470.  * address each word.
    471. 

  471.  */
    472. 

  472. typedef enum {C46 = 6, C56_66 = 8} seeprom_chip_type;
    473. 

  473. 

  474. /*
    475. 

  475.  *
    476. 

  476.  * Define the format of the SEEPROM registers (16 bits).
    477. 

  477.  *
    478. 

  478.  */
    479. 

  479. struct seeprom_config {
    480. 

  480. 

  481. /*
    482. 

  482.  * SCSI ID Configuration Flags
    483. 

  483.  */
    484. 

  484. #define CFXFER                0x0007      /* synchronous transfer rate */
    485. 

  485. #define CFSYNCH               0x0008      /* enable synchronous transfer */
    486. 

  486. #define CFDISC                0x0010      /* enable disconnection */
    487. 

  487. #define CFWIDEB               0x0020      /* wide bus device (wide card) */
    488. 

  488. #define CFSYNCHISULTRA        0x0040      /* CFSYNC is an ultra offset */
    489. 

  489. #define CFNEWULTRAFORMAT      0x0080      /* Use the Ultra2 SEEPROM format */
    490. 

  490. #define CFSTART               0x0100      /* send start unit SCSI command */
    491. 

  491. #define CFINCBIOS             0x0200      /* include in BIOS scan */
    492. 

  492. #define CFRNFOUND             0x0400      /* report even if not found */
    493. 

  493. #define CFMULTILUN            0x0800      /* probe mult luns in BIOS scan */
    494. 

  494. #define CFWBCACHEYES          0x4000      /* Enable W-Behind Cache on drive */
    495. 

  495. #define CFWBCACHENC           0xc000      /* Don't change W-Behind Cache */
    496. 

  496. /* UNUSED                0x3000 */
    497. 

  497.   unsigned short device_flags[16];        /* words 0-15 */
    498. 

  498. 

  499. /*
    500. 

  500.  * BIOS Control Bits
    501. 

  501.  */
    502. 

  502. #define CFSUPREM        0x0001  /* support all removable drives */
    503. 

  503. #define CFSUPREMB       0x0002  /* support removable drives for boot only */
    504. 

  504. #define CFBIOSEN        0x0004  /* BIOS enabled */
    505. 

  505. /* UNUSED                0x0008 */
    506. 

  506. #define CFSM2DRV        0x0010  /* support more than two drives */
    507. 

  507. #define CF284XEXTEND    0x0020  /* extended translation (284x cards) */
    508. 

  508. /* UNUSED                0x0040 */
    509. 

  509. #define CFEXTEND        0x0080  /* extended translation enabled */
    510. 

  510. /* UNUSED                0xFF00 */
    511. 

  511.   unsigned short bios_control;  /* word 16 */
    512. 

  512. 

  513. /*
    514. 

  514.  * Host Adapter Control Bits
    515. 

  515.  */
    516. 

  516. #define CFAUTOTERM      0x0001  /* Perform Auto termination */
    517. 

  517. #define CFULTRAEN       0x0002  /* Ultra SCSI speed enable (Ultra cards) */
    518. 

  518. #define CF284XSELTO     0x0003  /* Selection timeout (284x cards) */
    519. 

  519. #define CF284XFIFO      0x000C  /* FIFO Threshold (284x cards) */
    520. 

  520. #define CFSTERM         0x0004  /* SCSI low byte termination */
    521. 

  521. #define CFWSTERM        0x0008  /* SCSI high byte termination (wide card) */
    522. 

  522. #define CFSPARITY       0x0010  /* SCSI parity */
    523. 

  523. #define CF284XSTERM     0x0020  /* SCSI low byte termination (284x cards) */
    524. 

  524. #define CFRESETB        0x0040  /* reset SCSI bus at boot */
    525. 

  525. #define CFBPRIMARY      0x0100  /* Channel B primary on 7895 chipsets */
    526. 

  526. #define CFSEAUTOTERM    0x0400  /* aic7890 Perform SE Auto Term */
    527. 

  527. #define CFLVDSTERM      0x0800  /* aic7890 LVD Termination */
    528. 

  528. /* UNUSED                0xF280 */
    529. 

  529.   unsigned short adapter_control;        /* word 17 */
    530. 

  530. 

  531. /*
    532. 

  532.  * Bus Release, Host Adapter ID
    533. 

  533.  */
    534. 

  534. #define CFSCSIID        0x000F                /* host adapter SCSI ID */
    535. 

  535. /* UNUSED                0x00F0 */
    536. 

  536. #define CFBRTIME        0xFF00                /* bus release time */
    537. 

  537.   unsigned short brtime_id;                /* word 18 */
    538. 

  538. 

  539. /*
    540. 

  540.  * Maximum targets
    541. 

  541.  */
    542. 

  542. #define CFMAXTARG        0x00FF        /* maximum targets */
    543. 

  543. /* UNUSED                0xFF00 */
    544. 

  544.   unsigned short max_targets;                /* word 19 */
    545. 

  545. 

  546.   unsigned short res_1[11];                /* words 20-30 */
    547. 

  547.   unsigned short checksum;                /* word 31 */
    548. 

  548. };
    549. 

  549. 

  550. #define SELBUS_MASK                0x0a
    551. 

  551. #define         SELNARROW        0x00
    552. 

  552. #define         SELBUSB                0x08
    553. 

  553. #define SINGLE_BUS                0x00
    554. 

  554. 

  555. #define SCB_TARGET(scb)         \
    556. 

  556.        (((scb)->hscb->target_channel_lun & TID) >> 4)
    557. 

  557. #define SCB_LUN(scb)            \
    558. 

  558.        ((scb)->hscb->target_channel_lun & LID)
    559. 

  559. #define SCB_IS_SCSIBUS_B(scb)   \
    560. 

  560.        (((scb)->hscb->target_channel_lun & SELBUSB) != 0)
    561. 

  561. 

  562. /*
    563. 

  563.  * If an error occurs during a data transfer phase, run the command
    564. 

  564.  * to completion - it's easier that way - making a note of the error
    565. 

  565.  * condition in this location. This then will modify a DID_OK status
    566. 

  566.  * into an appropriate error for the higher-level SCSI code.
    567. 

  567.  */
    568. 

  568. #define aic7xxx_error(cmd)        ((cmd)->SCp.Status)
    569. 

  569. 

  570. /*
    571. 

  571.  * Keep track of the targets returned status.
    572. 

  572.  */
    573. 

  573. #define aic7xxx_status(cmd)        ((cmd)->SCp.sent_command)
    574. 

  574. 

  575. /*
    576. 

  576.  * The position of the SCSI commands scb within the scb array.
    577. 

  577.  */
    578. 

  578. #define aic7xxx_position(cmd)        ((cmd)->SCp.have_data_in)
    579. 

  579. 

  580. /*
    581. 

  581.  * The stored DMA mapping for single-buffer data transfers.
    582. 

  582.  */
    583. 

  583. #define aic7xxx_mapping(cmd)	     ((cmd)->SCp.phase)
    584. 

  584. 

  585. /*
    586. 

  586.  * Get out private data area from a scsi cmd pointer
    587. 

  587.  */
    588. 

  588. #define AIC_DEV(cmd)	((struct aic_dev_data *)(cmd)->device->hostdata)
    589. 

  589. 

  590. /*
    591. 

  591.  * So we can keep track of our host structs
    592. 

  592.  */
    593. 

  593. static struct aic7xxx_host *first_aic7xxx = NULL;
    594. 

  594. 

  595. /*
    596. 

  596.  * As of Linux 2.1, the mid-level SCSI code uses virtual addresses
    597. 

  597.  * in the scatter-gather lists.  We need to convert the virtual
    598. 

  598.  * addresses to physical addresses.
    599. 

  599.  */
    600. 

  600. struct hw_scatterlist {
    601. 

  601.   unsigned int address;
    602. 

  602.   unsigned int length;
    603. 

  603. };
    604. 

  604. 

  605. /*
    606. 

  606.  * Maximum number of SG segments these cards can support.
    607. 

  607.  */
    608. 

  608. #define        AIC7XXX_MAX_SG 128
    609. 

  609. 

  610. /*
    611. 

  611.  * The maximum number of SCBs we could have for ANY type
    612. 

  612.  * of card. DON'T FORGET TO CHANGE THE SCB MASK IN THE
    613. 

  613.  * SEQUENCER CODE IF THIS IS MODIFIED!
    614. 

  614.  */
    615. 

  615. #define AIC7XXX_MAXSCB        255
    616. 

  616. 

  617. 

  618. struct aic7xxx_hwscb {
    619. 

  619. /* ------------    Begin hardware supported fields    ---------------- */
    620. 

  620. /* 0*/  unsigned char control;
    621. 

  621. /* 1*/  unsigned char target_channel_lun;       /* 4/1/3 bits */
    622. 

  622. /* 2*/  unsigned char target_status;
    623. 

  623. /* 3*/  unsigned char SG_segment_count;
    624. 

  624. /* 4*/  unsigned int  SG_list_pointer;
    625. 

  625. /* 8*/  unsigned char residual_SG_segment_count;
    626. 

  626. /* 9*/  unsigned char residual_data_count[3];
    627. 

  627. /*12*/  unsigned int  data_pointer;
    628. 

  628. /*16*/  unsigned int  data_count;
    629. 

  629. /*20*/  unsigned int  SCSI_cmd_pointer;
    630. 

  630. /*24*/  unsigned char SCSI_cmd_length;
    631. 

  631. /*25*/  unsigned char tag;          /* Index into our kernel SCB array.
    632. 

  632.                                      * Also used as the tag for tagged I/O
    633. 

  633.                                      */
    634. 

  634. #define SCB_PIO_TRANSFER_SIZE  26   /* amount we need to upload/download
    635. 

  635.                                      * via PIO to initialize a transaction.
    636. 

  636.                                      */
    637. 

  637. /*26*/  unsigned char next;         /* Used to thread SCBs awaiting selection
    638. 

  638.                                      * or disconnected down in the sequencer.
    639. 

  639.                                      */
    640. 

  640. /*27*/  unsigned char prev;
    641. 

  641. /*28*/  unsigned int pad;           /*
    642. 

  642.                                      * Unused by the kernel, but we require
    643. 

  643.                                      * the padding so that the array of
    644. 

  644.                                      * hardware SCBs is aligned on 32 byte
    645. 

  645.                                      * boundaries so the sequencer can index
    646. 

  646.                                      */
    647. 

  647. };
    648. 

  648. 

  649. typedef enum {
    650. 

  650.         SCB_FREE                = 0x0000,
    651. 

  651.         SCB_DTR_SCB             = 0x0001,
    652. 

  652.         SCB_WAITINGQ            = 0x0002,
    653. 

  653.         SCB_ACTIVE              = 0x0004,
    654. 

  654.         SCB_SENSE               = 0x0008,
    655. 

  655.         SCB_ABORT               = 0x0010,
    656. 

  656.         SCB_DEVICE_RESET        = 0x0020,
    657. 

  657.         SCB_RESET               = 0x0040,
    658. 

  658.         SCB_RECOVERY_SCB        = 0x0080,
    659. 

  659.         SCB_MSGOUT_PPR          = 0x0100,
    660. 

  660.         SCB_MSGOUT_SENT         = 0x0200,
    661. 

  661.         SCB_MSGOUT_SDTR         = 0x0400,
    662. 

  662.         SCB_MSGOUT_WDTR         = 0x0800,
    663. 

  663.         SCB_MSGOUT_BITS         = SCB_MSGOUT_PPR |
    664. 

  664.                                   SCB_MSGOUT_SENT | 
    665. 

  665.                                   SCB_MSGOUT_SDTR |
    666. 

  666.                                   SCB_MSGOUT_WDTR,
    667. 

  667.         SCB_QUEUED_ABORT        = 0x1000,
    668. 

  668.         SCB_QUEUED_FOR_DONE     = 0x2000,
    669. 

  669.         SCB_WAS_BUSY            = 0x4000,
    670. 

  670. 	SCB_QUEUE_FULL		= 0x8000
    671. 

  671. } scb_flag_type;
    672. 

  672. 

  673. typedef enum {
    674. 

  674.         AHC_FNONE                 = 0x00000000,
    675. 

  675.         AHC_PAGESCBS              = 0x00000001,
    676. 

  676.         AHC_CHANNEL_B_PRIMARY     = 0x00000002,
    677. 

  677.         AHC_USEDEFAULTS           = 0x00000004,
    678. 

  678.         AHC_INDIRECT_PAGING       = 0x00000008,
    679. 

  679.         AHC_CHNLB                 = 0x00000020,
    680. 

  680.         AHC_CHNLC                 = 0x00000040,
    681. 

  681.         AHC_EXTEND_TRANS_A        = 0x00000100,
    682. 

  682.         AHC_EXTEND_TRANS_B        = 0x00000200,
    683. 

  683.         AHC_TERM_ENB_A            = 0x00000400,
    684. 

  684.         AHC_TERM_ENB_SE_LOW       = 0x00000400,
    685. 

  685.         AHC_TERM_ENB_B            = 0x00000800,
    686. 

  686.         AHC_TERM_ENB_SE_HIGH      = 0x00000800,
    687. 

  687.         AHC_HANDLING_REQINITS     = 0x00001000,
    688. 

  688.         AHC_TARGETMODE            = 0x00002000,
    689. 

  689.         AHC_NEWEEPROM_FMT         = 0x00004000,
    690. 

  690.  /*
    691. 

  691.   *  Here ends the FreeBSD defined flags and here begins the linux defined
    692. 

  692.   *  flags.  NOTE: I did not preserve the old flag name during this change
    693. 

  693.   *  specifically to force me to evaluate what flags were being used properly
    694. 

  694.   *  and what flags weren't.  This way, I could clean up the flag usage on
    695. 

  695.   *  a use by use basis.  Doug Ledford
    696. 

  696.   */
    697. 

  697.         AHC_MOTHERBOARD           = 0x00020000,
    698. 

  698.         AHC_NO_STPWEN             = 0x00040000,
    699. 

  699.         AHC_RESET_DELAY           = 0x00080000,
    700. 

  700.         AHC_A_SCANNED             = 0x00100000,
    701. 

  701.         AHC_B_SCANNED             = 0x00200000,
    702. 

  702.         AHC_MULTI_CHANNEL         = 0x00400000,
    703. 

  703.         AHC_BIOS_ENABLED          = 0x00800000,
    704. 

  704.         AHC_SEEPROM_FOUND         = 0x01000000,
    705. 

  705.         AHC_TERM_ENB_LVD          = 0x02000000,
    706. 

  706.         AHC_ABORT_PENDING         = 0x04000000,
    707. 

  707.         AHC_RESET_PENDING         = 0x08000000,
    708. 

  708. #define AHC_IN_ISR_BIT              28
    709. 

  709.         AHC_IN_ISR                = 0x10000000,
    710. 

  710.         AHC_IN_ABORT              = 0x20000000,
    711. 

  711.         AHC_IN_RESET              = 0x40000000,
    712. 

  712.         AHC_EXTERNAL_SRAM         = 0x80000000
    713. 

  713. } ahc_flag_type;
    714. 

  714. 

  715. typedef enum {
    716. 

  716.   AHC_NONE             = 0x0000,
    717. 

  717.   AHC_CHIPID_MASK      = 0x00ff,
    718. 

  718.   AHC_AIC7770          = 0x0001,
    719. 

  719.   AHC_AIC7850          = 0x0002,
    720. 

  720.   AHC_AIC7860          = 0x0003,
    721. 

  721.   AHC_AIC7870          = 0x0004,
    722. 

  722.   AHC_AIC7880          = 0x0005,
    723. 

  723.   AHC_AIC7890          = 0x0006,
    724. 

  724.   AHC_AIC7895          = 0x0007,
    725. 

  725.   AHC_AIC7896          = 0x0008,
    726. 

  726.   AHC_AIC7892          = 0x0009,
    727. 

  727.   AHC_AIC7899          = 0x000a,
    728. 

  728.   AHC_VL               = 0x0100,
    729. 

  729.   AHC_EISA             = 0x0200,
    730. 

  730.   AHC_PCI              = 0x0400,
    731. 

  731. } ahc_chip;
    732. 

  732. 

  733. typedef enum {
    734. 

  734.   AHC_FENONE           = 0x0000,
    735. 

  735.   AHC_ULTRA            = 0x0001,
    736. 

  736.   AHC_ULTRA2           = 0x0002,
    737. 

  737.   AHC_WIDE             = 0x0004,
    738. 

  738.   AHC_TWIN             = 0x0008,
    739. 

  739.   AHC_MORE_SRAM        = 0x0010,
    740. 

  740.   AHC_CMD_CHAN         = 0x0020,
    741. 

  741.   AHC_QUEUE_REGS       = 0x0040,
    742. 

  742.   AHC_SG_PRELOAD       = 0x0080,
    743. 

  743.   AHC_SPIOCAP          = 0x0100,
    744. 

  744.   AHC_ULTRA3           = 0x0200,
    745. 

  745.   AHC_NEW_AUTOTERM     = 0x0400,
    746. 

  746.   AHC_AIC7770_FE       = AHC_FENONE,
    747. 

  747.   AHC_AIC7850_FE       = AHC_SPIOCAP,
    748. 

  748.   AHC_AIC7860_FE       = AHC_ULTRA|AHC_SPIOCAP,
    749. 

  749.   AHC_AIC7870_FE       = AHC_FENONE,
    750. 

  750.   AHC_AIC7880_FE       = AHC_ULTRA,
    751. 

  751.   AHC_AIC7890_FE       = AHC_MORE_SRAM|AHC_CMD_CHAN|AHC_ULTRA2|
    752. 

  752.                          AHC_QUEUE_REGS|AHC_SG_PRELOAD|AHC_NEW_AUTOTERM,
    753. 

  753.   AHC_AIC7895_FE       = AHC_MORE_SRAM|AHC_CMD_CHAN|AHC_ULTRA,
    754. 

  754.   AHC_AIC7896_FE       = AHC_AIC7890_FE,
    755. 

  755.   AHC_AIC7892_FE       = AHC_AIC7890_FE|AHC_ULTRA3,
    756. 

  756.   AHC_AIC7899_FE       = AHC_AIC7890_FE|AHC_ULTRA3,
    757. 

  757. } ahc_feature;
    758. 

  758. 

  759. #define SCB_DMA_ADDR(scb, addr) ((unsigned long)(addr) + (scb)->scb_dma->dma_offset)
    760. 

  760. 

  761. struct aic7xxx_scb_dma {
    762. 

  762. 	unsigned long	       dma_offset;    /* Correction you have to add
    763. 

  763. 					       * to virtual address to get
    764. 

  764. 					       * dma handle in this region */
    765. 

  765. 	dma_addr_t	       dma_address;   /* DMA handle of the start,
    766. 

  766. 					       * for unmap */
    767. 

  767. 	unsigned int	       dma_len;	      /* DMA length */
    768. 

  768. };
    769. 

  769. 

  770. typedef enum {
    771. 

  771.   AHC_BUG_NONE            = 0x0000,
    772. 

  772.   AHC_BUG_TMODE_WIDEODD   = 0x0001,
    773. 

  773.   AHC_BUG_AUTOFLUSH       = 0x0002,
    774. 

  774.   AHC_BUG_CACHETHEN       = 0x0004,
    775. 

  775.   AHC_BUG_CACHETHEN_DIS   = 0x0008,
    776. 

  776.   AHC_BUG_PCI_2_1_RETRY   = 0x0010,
    777. 

  777.   AHC_BUG_PCI_MWI         = 0x0020,
    778. 

  778.   AHC_BUG_SCBCHAN_UPLOAD  = 0x0040,
    779. 

  779. } ahc_bugs;
    780. 

  780. 

  781. struct aic7xxx_scb {
    782. 

  782. 	struct aic7xxx_hwscb	*hscb;		/* corresponding hardware scb */
    783. 

  783. 	struct scsi_cmnd	*cmd;		/* scsi_cmnd for this scb */
    784. 

  784. 	struct aic7xxx_scb	*q_next;        /* next scb in queue */
    785. 

  785. 	volatile scb_flag_type	flags;		/* current state of scb */
    786. 

  786. 	struct hw_scatterlist	*sg_list;	/* SG list in adapter format */
    787. 

  787. 	unsigned char		tag_action;
    788. 

  788. 	unsigned char		sg_count;
    789. 

  789. 	unsigned char		*sense_cmd;	/*
    790. 

  790. 						 * Allocate 6 characters for
    791. 

  791. 						 * sense command.
    792. 

  792. 						 */
    793. 

  793. 	unsigned char		*cmnd;
    794. 

  794. 	unsigned int		sg_length;	/*
    795. 

  795. 						 * We init this during
    796. 

  796. 						 * buildscb so we don't have
    797. 

  797. 						 * to calculate anything during
    798. 

  798. 						 * underflow/overflow/stat code
    799. 

  799. 						 */
    800. 

  800. 	void			*kmalloc_ptr;
    801. 

  801. 	struct aic7xxx_scb_dma	*scb_dma;
    802. 

  802. };
    803. 

  803. 

  804. /*
    805. 

  805.  * Define a linked list of SCBs.
    806. 

  806.  */
    807. 

  807. typedef struct {
    808. 

  808.   struct aic7xxx_scb *head;
    809. 

  809.   struct aic7xxx_scb *tail;
    810. 

  810. } scb_queue_type;
    811. 

  811. 

  812. static struct {
    813. 

  813.   unsigned char errno;
    814. 

  814.   const char *errmesg;
    815. 

  815. } hard_error[] = {
    816. 

  816.   { ILLHADDR,  "Illegal Host Access" },
    817. 

  817.   { ILLSADDR,  "Illegal Sequencer Address referenced" },
    818. 

  818.   { ILLOPCODE, "Illegal Opcode in sequencer program" },
    819. 

  819.   { SQPARERR,  "Sequencer Ram Parity Error" },
    820. 

  820.   { DPARERR,   "Data-Path Ram Parity Error" },
    821. 

  821.   { MPARERR,   "Scratch Ram/SCB Array Ram Parity Error" },
    822. 

  822.   { PCIERRSTAT,"PCI Error detected" },
    823. 

  823.   { CIOPARERR, "CIOBUS Parity Error" }
    824. 

  824. };
    825. 

  825. 

  826. static unsigned char
    827. 

  827. generic_sense[] = { REQUEST_SENSE, 0, 0, 0, 255, 0 };
    828. 

  828. 

  829. typedef struct {
    830. 

  830.   scb_queue_type free_scbs;        /*
    831. 

  831.                                     * SCBs assigned to free slot on
    832. 

  832.                                     * card (no paging required)
    833. 

  833.                                     */
    834. 

  834.   struct aic7xxx_scb   *scb_array[AIC7XXX_MAXSCB];
    835. 

  835.   struct aic7xxx_hwscb *hscbs;
    836. 

  836.   unsigned char  numscbs;          /* current number of scbs */
    837. 

  837.   unsigned char  maxhscbs;         /* hardware scbs */
    838. 

  838.   unsigned char  maxscbs;          /* max scbs including pageable scbs */
    839. 

  839.   dma_addr_t	 hscbs_dma;	   /* DMA handle to hscbs */
    840. 

  840.   unsigned int   hscbs_dma_len;    /* length of the above DMA area */
    841. 

  841.   void          *hscb_kmalloc_ptr;
    842. 

  842. } scb_data_type;
    843. 

  843. 

  844. struct target_cmd {
    845. 

  845.   unsigned char mesg_bytes[4];
    846. 

  846.   unsigned char command[28];
    847. 

  847. };
    848. 

  848. 

  849. #define AHC_TRANS_CUR    0x0001
    850. 

  850. #define AHC_TRANS_ACTIVE 0x0002
    851. 

  851. #define AHC_TRANS_GOAL   0x0004
    852. 

  852. #define AHC_TRANS_USER   0x0008
    853. 

  853. #define AHC_TRANS_QUITE  0x0010
    854. 

  854. typedef struct {
    855. 

  855.   unsigned char width;
    856. 

  856.   unsigned char period;
    857. 

  857.   unsigned char offset;
    858. 

  858.   unsigned char options;
    859. 

  859. } transinfo_type;
    860. 

  860. 

  861. struct aic_dev_data {
    862. 

  862.   volatile scb_queue_type  delayed_scbs;
    863. 

  863.   volatile unsigned short  temp_q_depth;
    864. 

  864.   unsigned short           max_q_depth;
    865. 

  865.   volatile unsigned char   active_cmds;
    866. 

  866.   /*
    867. 

  867.    * Statistics Kept:
    868. 

  868.    *
    869. 

  869.    * Total Xfers (count for each command that has a data xfer),
    870. 

  870.    * broken down by reads && writes.
    871. 

  871.    *
    872. 

  872.    * Further sorted into a few bins for keeping tabs on how many commands
    873. 

  873.    * we get of various sizes.
    874. 

  874.    *
    875. 

  875.    */
    876. 

  876.   long w_total;                          /* total writes */
    877. 

  877.   long r_total;                          /* total reads */
    878. 

  878.   long barrier_total;			 /* total num of REQ_BARRIER commands */
    879. 

  879.   long ordered_total;			 /* How many REQ_BARRIER commands we
    880. 

  880. 					    used ordered tags to satisfy */
    881. 

  881.   long w_bins[6];                       /* binned write */
    882. 

  882.   long r_bins[6];                       /* binned reads */
    883. 

  883.   transinfo_type	cur;
    884. 

  884.   transinfo_type	goal;
    885. 

  885. #define  BUS_DEVICE_RESET_PENDING       0x01
    886. 

  886. #define  DEVICE_RESET_DELAY             0x02
    887. 

  887. #define  DEVICE_PRINT_DTR               0x04
    888. 

  888. #define  DEVICE_WAS_BUSY                0x08
    889. 

  889. #define  DEVICE_DTR_SCANNED		0x10
    890. 

  890. #define  DEVICE_SCSI_3			0x20
    891. 

  891.   volatile unsigned char   flags;
    892. 

  892.   unsigned needppr:1;
    893. 

  893.   unsigned needppr_copy:1;
    894. 

  894.   unsigned needsdtr:1;
    895. 

  895.   unsigned needsdtr_copy:1;
    896. 

  896.   unsigned needwdtr:1;
    897. 

  897.   unsigned needwdtr_copy:1;
    898. 

  898.   unsigned dtr_pending:1;
    899. 

  899.   struct scsi_device *SDptr;
    900. 

  900.   struct list_head list;
    901. 

  901. };
    902. 

  902. 

  903. /*
    904. 

  904.  * Define a structure used for each host adapter.  Note, in order to avoid
    905. 

  905.  * problems with architectures I can't test on (because I don't have one,
    906. 

  906.  * such as the Alpha based systems) which happen to give faults for
    907. 

  907.  * non-aligned memory accesses, care was taken to align this structure
    908. 

  908.  * in a way that guaranteed all accesses larger than 8 bits were aligned
    909. 

  909.  * on the appropriate boundary.  It's also organized to try and be more
    910. 

  910.  * cache line efficient.  Be careful when changing this lest you might hurt
    911. 

  911.  * overall performance and bring down the wrath of the masses.
    912. 

  912.  */
    913. 

  913. struct aic7xxx_host {
    914. 

  914.   /*
    915. 

  915.    *  This is the first 64 bytes in the host struct
    916. 

  916.    */
    917. 

  917. 

  918.   /*
    919. 

  919.    * We are grouping things here....first, items that get either read or
    920. 

  920.    * written with nearly every interrupt
    921. 

  921.    */
    922. 

  922. 	volatile long	flags;
    923. 

  923. 	ahc_feature	features;	/* chip features */
    924. 

  924. 	unsigned long	base;		/* card base address */
    925. 

  925. 	volatile unsigned char  __iomem *maddr;	/* memory mapped address */
    926. 

  926. 	unsigned long	isr_count;	/* Interrupt count */
    927. 

  927. 	unsigned long	spurious_int;
    928. 

  928. 	scb_data_type	*scb_data;
    929. 

  929. 	struct aic7xxx_cmd_queue {
    930. 

  930. 		struct scsi_cmnd *head;
    931. 

  931. 		struct scsi_cmnd *tail;
    932. 

  932. 	} completeq;
    933. 

  933. 

  934. 	/*
    935. 

  935. 	* Things read/written on nearly every entry into aic7xxx_queue()
    936. 

  936. 	*/
    937. 

  937. 	volatile scb_queue_type	waiting_scbs;
    938. 

  938. 	unsigned char	unpause;	/* unpause value for HCNTRL */
    939. 

  939. 	unsigned char	pause;		/* pause value for HCNTRL */
    940. 

  940. 	volatile unsigned char	qoutfifonext;
    941. 

  941. 	volatile unsigned char	activescbs;	/* active scbs */
    942. 

  942. 	volatile unsigned char	max_activescbs;
    943. 

  943. 	volatile unsigned char	qinfifonext;
    944. 

  944. 	volatile unsigned char	*untagged_scbs;
    945. 

  945. 	volatile unsigned char	*qoutfifo;
    946. 

  946. 	volatile unsigned char	*qinfifo;
    947. 

  947. 

  948. 	unsigned char	dev_last_queue_full[MAX_TARGETS];
    949. 

  949. 	unsigned char	dev_last_queue_full_count[MAX_TARGETS];
    950. 

  950. 	unsigned short	ultraenb; /* Gets downloaded to card as a bitmap */
    951. 

  951. 	unsigned short	discenable; /* Gets downloaded to card as a bitmap */
    952. 

  952. 	transinfo_type	user[MAX_TARGETS];
    953. 

  953. 

  954. 	unsigned char	msg_buf[13];	/* The message for the target */
    955. 

  955. 	unsigned char	msg_type;
    956. 

  956. #define MSG_TYPE_NONE              0x00
    957. 

  957. #define MSG_TYPE_INITIATOR_MSGOUT  0x01
    958. 

  958. #define MSG_TYPE_INITIATOR_MSGIN   0x02
    959. 

  959. 	unsigned char	msg_len;	/* Length of message */
    960. 

  960. 	unsigned char	msg_index;	/* Index into msg_buf array */
    961. 

  961. 

  962. 

  963. 	/*
    964. 

  964. 	 * We put the less frequently used host structure items
    965. 

  965. 	 * after the more frequently used items to try and ease
    966. 

  966. 	 * the burden on the cache subsystem.
    967. 

  967. 	 * These entries are not *commonly* accessed, whereas
    968. 

  968. 	 * the preceding entries are accessed very often.
    969. 

  969. 	 */
    970. 

  970. 

  971. 	unsigned int	irq;		/* IRQ for this adapter */
    972. 

  972. 	int		instance;	/* aic7xxx instance number */
    973. 

  973. 	int		scsi_id;	/* host adapter SCSI ID */
    974. 

  974. 	int		scsi_id_b;	/* channel B for twin adapters */
    975. 

  975. 	unsigned int	bios_address;
    976. 

  976. 	int		board_name_index;
    977. 

  977. 	unsigned short	bios_control;		/* bios control - SEEPROM */
    978. 

  978. 	unsigned short	adapter_control;	/* adapter control - SEEPROM */
    979. 

  979. 	struct pci_dev	*pdev;
    980. 

  980. 	unsigned char	pci_bus;
    981. 

  981. 	unsigned char	pci_device_fn;
    982. 

  982. 	struct seeprom_config	sc;
    983. 

  983. 	unsigned short	sc_type;
    984. 

  984. 	unsigned short	sc_size;
    985. 

  985. 	struct aic7xxx_host	*next;	/* allow for multiple IRQs */
    986. 

  986. 	struct Scsi_Host	*host;	/* pointer to scsi host */
    987. 

  987. 	struct list_head	 aic_devs; /* all aic_dev structs on host */
    988. 

  988. 	int		host_no;	/* SCSI host number */
    989. 

  989. 	unsigned long	mbase;		/* I/O memory address */
    990. 

  990. 	ahc_chip	chip;		/* chip type */
    991. 

  991. 	ahc_bugs	bugs;
    992. 

  992. 	dma_addr_t	fifo_dma;	/* DMA handle for fifo arrays */
    993. 

  993. };
    994. 

  994. 

  995. /*
    996. 

  996.  * Valid SCSIRATE values. (p. 3-17)
    997. 

  997.  * Provides a mapping of transfer periods in ns/4 to the proper value to
    998. 

  998.  * stick in the SCSIRATE reg to use that transfer rate.
    999. 

  999.  */
    1000. 

  1000. #define AHC_SYNCRATE_ULTRA3 0
    1001. 

  1001. #define AHC_SYNCRATE_ULTRA2 1
    1002. 

  1002. #define AHC_SYNCRATE_ULTRA  3
    1003. 

  1003. #define AHC_SYNCRATE_FAST   6
    1004. 

  1004. #define AHC_SYNCRATE_CRC 0x40
    1005. 

  1005. #define AHC_SYNCRATE_SE  0x10
    1006. 

  1006. static struct aic7xxx_syncrate {
    1007. 

  1007.   /* Rates in Ultra mode have bit 8 of sxfr set */
    1008. 

  1008. #define                ULTRA_SXFR 0x100
    1009. 

  1009.   int sxfr_ultra2;
    1010. 

  1010.   int sxfr;
    1011. 

  1011.   unsigned char period;
    1012. 

  1012.   const char *rate[2];
    1013. 

  1013. } aic7xxx_syncrates[] = {
    1014. 

  1014.   { 0x42,  0x000,   9,  {"80.0", "160.0"} },
    1015. 

  1015.   { 0x13,  0x000,  10,  {"40.0", "80.0"} },
    1016. 

  1016.   { 0x14,  0x000,  11,  {"33.0", "66.6"} },
    1017. 

  1017.   { 0x15,  0x100,  12,  {"20.0", "40.0"} },
    1018. 

  1018.   { 0x16,  0x110,  15,  {"16.0", "32.0"} },
    1019. 

  1019.   { 0x17,  0x120,  18,  {"13.4", "26.8"} },
    1020. 

  1020.   { 0x18,  0x000,  25,  {"10.0", "20.0"} },
    1021. 

  1021.   { 0x19,  0x010,  31,  {"8.0",  "16.0"} },
    1022. 

  1022.   { 0x1a,  0x020,  37,  {"6.67", "13.3"} },
    1023. 

  1023.   { 0x1b,  0x030,  43,  {"5.7",  "11.4"} },
    1024. 

  1024.   { 0x10,  0x040,  50,  {"5.0",  "10.0"} },
    1025. 

  1025.   { 0x00,  0x050,  56,  {"4.4",  "8.8" } },
    1026. 

  1026.   { 0x00,  0x060,  62,  {"4.0",  "8.0" } },
    1027. 

  1027.   { 0x00,  0x070,  68,  {"3.6",  "7.2" } },
    1028. 

  1028.   { 0x00,  0x000,  0,   {NULL, NULL}   },
    1029. 

  1029. };
    1030. 

  1030. 

  1031. #define CTL_OF_SCB(scb) (((scb->hscb)->target_channel_lun >> 3) & 0x1),  \
    1032. 

  1032.                         (((scb->hscb)->target_channel_lun >> 4) & 0xf), \
    1033. 

  1033.                         ((scb->hscb)->target_channel_lun & 0x07)
    1034. 

  1034. 

  1035. #define CTL_OF_CMD(cmd) ((cmd->device->channel) & 0x01),  \
    1036. 

  1036.                         ((cmd->device->id) & 0x0f), \
    1037. 

  1037.                         ((cmd->device->lun) & 0x07)
    1038. 

  1038. 

  1039. #define TARGET_INDEX(cmd)  ((cmd)->device->id | ((cmd)->device->channel << 3))
    1040. 

  1040. 

  1041. /*
    1042. 

  1042.  * A nice little define to make doing our printks a little easier
    1043. 

  1043.  */
    1044. 

  1044. 

  1045. #define WARN_LEAD KERN_WARNING "(scsi%d:%d:%d:%d) "
    1046. 

  1046. #define INFO_LEAD KERN_INFO "(scsi%d:%d:%d:%d) "
    1047. 

  1047. 

  1048. /*
    1049. 

  1049.  * XXX - these options apply unilaterally to _all_ 274x/284x/294x
    1050. 

  1050.  *       cards in the system.  This should be fixed.  Exceptions to this
    1051. 

  1051.  *       rule are noted in the comments.
    1052. 

  1052.  */
    1053. 

  1053. 

  1054. /*
    1055. 

  1055.  * Use this as the default queue depth when setting tagged queueing on.
    1056. 

  1056.  */
    1057. 

  1057. static unsigned int aic7xxx_default_queue_depth = AIC7XXX_CMDS_PER_DEVICE;
    1058. 

  1058. 

  1059. /*
    1060. 

  1060.  * Skip the scsi bus reset.  Non 0 make us skip the reset at startup.  This
    1061. 

  1061.  * has no effect on any later resets that might occur due to things like
    1062. 

  1062.  * SCSI bus timeouts.
    1063. 

  1063.  */
    1064. 

  1064. static unsigned int aic7xxx_no_reset = 0;
    1065. 

  1065. /*
    1066. 

  1066.  * Certain PCI motherboards will scan PCI devices from highest to lowest,
    1067. 

  1067.  * others scan from lowest to highest, and they tend to do all kinds of
    1068. 

  1068.  * strange things when they come into contact with PCI bridge chips.  The
    1069. 

  1069.  * net result of all this is that the PCI card that is actually used to boot
    1070. 

  1070.  * the machine is very hard to detect.  Most motherboards go from lowest
    1071. 

  1071.  * PCI slot number to highest, and the first SCSI controller found is the
    1072. 

  1072.  * one you boot from.  The only exceptions to this are when a controller
    1073. 

  1073.  * has its BIOS disabled.  So, we by default sort all of our SCSI controllers
    1074. 

  1074.  * from lowest PCI slot number to highest PCI slot number.  We also force
    1075. 

  1075.  * all controllers with their BIOS disabled to the end of the list.  This
    1076. 

  1076.  * works on *almost* all computers.  Where it doesn't work, we have this
    1077. 

  1077.  * option.  Setting this option to non-0 will reverse the order of the sort
    1078. 

  1078.  * to highest first, then lowest, but will still leave cards with their BIOS
    1079. 

  1079.  * disabled at the very end.  That should fix everyone up unless there are
    1080. 

  1080.  * really strange cirumstances.
    1081. 

  1081.  */
    1082. 

  1082. static int aic7xxx_reverse_scan = 0;
    1083. 

  1083. /*
    1084. 

  1084.  * Should we force EXTENDED translation on a controller.
    1085. 

  1085.  *     0 == Use whatever is in the SEEPROM or default to off
    1086. 

  1086.  *     1 == Use whatever is in the SEEPROM or default to on
    1087. 

  1087.  */
    1088. 

  1088. static unsigned int aic7xxx_extended = 0;
    1089. 

  1089. /*
    1090. 

  1090.  * The IRQ trigger method used on EISA controllers. Does not effect PCI cards.
    1091. 

  1091.  *   -1 = Use detected settings.
    1092. 

  1092.  *    0 = Force Edge triggered mode.
    1093. 

  1093.  *    1 = Force Level triggered mode.
    1094. 

  1094.  */
    1095. 

  1095. static int aic7xxx_irq_trigger = -1;
    1096. 

  1096. /*
    1097. 

  1097.  * This variable is used to override the termination settings on a controller.
    1098. 

  1098.  * This should not be used under normal conditions.  However, in the case
    1099. 

  1099.  * that a controller does not have a readable SEEPROM (so that we can't
    1100. 

  1100.  * read the SEEPROM settings directly) and that a controller has a buggered
    1101. 

  1101.  * version of the cable detection logic, this can be used to force the 
    1102. 

  1102.  * correct termination.  It is preferable to use the manual termination
    1103. 

  1103.  * settings in the BIOS if possible, but some motherboard controllers store
    1104. 

  1104.  * those settings in a format we can't read.  In other cases, auto term
    1105. 

  1105.  * should also work, but the chipset was put together with no auto term
    1106. 

  1106.  * logic (common on motherboard controllers).  In those cases, we have
    1107. 

  1107.  * 32 bits here to work with.  That's good for 8 controllers/channels.  The
    1108. 

  1108.  * bits are organized as 4 bits per channel, with scsi0 getting the lowest
    1109. 

  1109.  * 4 bits in the int.  A 1 in a bit position indicates the termination setting
    1110. 

  1110.  * that corresponds to that bit should be enabled, a 0 is disabled.
    1111. 

  1111.  * It looks something like this:
    1112. 

  1112.  *
    1113. 

  1113.  *    0x0f =  1111-Single Ended Low Byte Termination on/off
    1114. 

  1114.  *            ||\-Single Ended High Byte Termination on/off
    1115. 

  1115.  *            |\-LVD Low Byte Termination on/off
    1116. 

  1116.  *            \-LVD High Byte Termination on/off
    1117. 

  1117.  *
    1118. 

  1118.  * For non-Ultra2 controllers, the upper 2 bits are not important.  So, to
    1119. 

  1119.  * enable both high byte and low byte termination on scsi0, I would need to
    1120. 

  1120.  * make sure that the override_term variable was set to 0x03 (bits 0011).
    1121. 

  1121.  * To make sure that all termination is enabled on an Ultra2 controller at
    1122. 

  1122.  * scsi2 and only high byte termination on scsi1 and high and low byte
    1123. 

  1123.  * termination on scsi0, I would set override_term=0xf23 (bits 1111 0010 0011)
    1124. 

  1124.  *
    1125. 

  1125.  * For the most part, users should never have to use this, that's why I
    1126. 

  1126.  * left it fairly cryptic instead of easy to understand.  If you need it,
    1127. 

  1127.  * most likely someone will be telling you what your's needs to be set to.
    1128. 

  1128.  */
    1129. 

  1129. static int aic7xxx_override_term = -1;
    1130. 

  1130. /*
    1131. 

  1131.  * Certain motherboard chipset controllers tend to screw
    1132. 

  1132.  * up the polarity of the term enable output pin.  Use this variable
    1133. 

  1133.  * to force the correct polarity for your system.  This is a bitfield variable
    1134. 

  1134.  * similar to the previous one, but this one has one bit per channel instead
    1135. 

  1135.  * of four.
    1136. 

  1136.  *    0 = Force the setting to active low.
    1137. 

  1137.  *    1 = Force setting to active high.
    1138. 

  1138.  * Most Adaptec cards are active high, several motherboards are active low.
    1139. 

  1139.  * To force a 2940 card at SCSI 0 to active high and a motherboard 7895
    1140. 

  1140.  * controller at scsi1 and scsi2 to active low, and a 2910 card at scsi3
    1141. 

  1141.  * to active high, you would need to set stpwlev=0x9 (bits 1001).
    1142. 

  1142.  *
    1143. 

  1143.  * People shouldn't need to use this, but if you are experiencing lots of
    1144. 

  1144.  * SCSI timeout problems, this may help.  There is one sure way to test what
    1145. 

  1145.  * this option needs to be.  Using a boot floppy to boot the system, configure
    1146. 

  1146.  * your system to enable all SCSI termination (in the Adaptec SCSI BIOS) and
    1147. 

  1147.  * if needed then also pass a value to override_term to make sure that the
    1148. 

  1148.  * driver is enabling SCSI termination, then set this variable to either 0
    1149. 

  1149.  * or 1.  When the driver boots, make sure there are *NO* SCSI cables
    1150. 

  1150.  * connected to your controller.  If it finds and inits the controller
    1151. 

  1151.  * without problem, then the setting you passed to stpwlev was correct.  If
    1152. 

  1152.  * the driver goes into a reset loop and hangs the system, then you need the
    1153. 

  1153.  * other setting for this variable.  If neither setting lets the machine
    1154. 

  1154.  * boot then you have definite termination problems that may not be fixable.
    1155. 

  1155.  */
    1156. 

  1156. static int aic7xxx_stpwlev = -1;
    1157. 

  1157. /*
    1158. 

  1158.  * Set this to non-0 in order to force the driver to panic the kernel
    1159. 

  1159.  * and print out debugging info on a SCSI abort or reset cycle.
    1160. 

  1160.  */
    1161. 

  1161. static int aic7xxx_panic_on_abort = 0;
    1162. 

  1162. /*
    1163. 

  1163.  * PCI bus parity checking of the Adaptec controllers.  This is somewhat
    1164. 

  1164.  * dubious at best.  To my knowledge, this option has never actually
    1165. 

  1165.  * solved a PCI parity problem, but on certain machines with broken PCI
    1166. 

  1166.  * chipset configurations, it can generate tons of false error messages.
    1167. 

  1167.  * It's included in the driver for completeness.
    1168. 

  1168.  *   0 = Shut off PCI parity check
    1169. 

  1169.  *  -1 = Normal polarity pci parity checking
    1170. 

  1170.  *   1 = reverse polarity pci parity checking
    1171. 

  1171.  *
    1172. 

  1172.  * NOTE: you can't actually pass -1 on the lilo prompt.  So, to set this
    1173. 

  1173.  * variable to -1 you would actually want to simply pass the variable
    1174. 

  1174.  * name without a number.  That will invert the 0 which will result in
    1175. 

  1175.  * -1.
    1176. 

  1176.  */
    1177. 

  1177. static int aic7xxx_pci_parity = 0;
    1178. 

  1178. /*
    1179. 

  1179.  * Set this to any non-0 value to cause us to dump the contents of all
    1180. 

  1180.  * the card's registers in a hex dump format tailored to each model of
    1181. 

  1181.  * controller.
    1182. 

  1182.  * 
    1183. 

  1183.  * NOTE: THE CONTROLLER IS LEFT IN AN UNUSABLE STATE BY THIS OPTION.
    1184. 

  1184.  *       YOU CANNOT BOOT UP WITH THIS OPTION, IT IS FOR DEBUGGING PURPOSES
    1185. 

  1185.  *       ONLY
    1186. 

  1186.  */
    1187. 

  1187. static int aic7xxx_dump_card = 0;
    1188. 

  1188. /*
    1189. 

  1189.  * Set this to a non-0 value to make us dump out the 32 bit instruction
    1190. 

  1190.  * registers on the card after completing the sequencer download.  This
    1191. 

  1191.  * allows the actual sequencer download to be verified.  It is possible
    1192. 

  1192.  * to use this option and still boot up and run your system.  This is
    1193. 

  1193.  * only intended for debugging purposes.
    1194. 

  1194.  */
    1195. 

  1195. static int aic7xxx_dump_sequencer = 0;
    1196. 

  1196. /*
    1197. 

  1197.  * Certain newer motherboards have put new PCI based devices into the
    1198. 

  1198.  * IO spaces that used to typically be occupied by VLB or EISA cards.
    1199. 

  1199.  * This overlap can cause these newer motherboards to lock up when scanned
    1200. 

  1200.  * for older EISA and VLB devices.  Setting this option to non-0 will
    1201. 

  1201.  * cause the driver to skip scanning for any VLB or EISA controllers and
    1202. 

  1202.  * only support the PCI controllers.  NOTE: this means that if the kernel
    1203. 

  1203.  * os compiled with PCI support disabled, then setting this to non-0
    1204. 

  1204.  * would result in never finding any devices :)
    1205. 

  1205.  */
    1206. 

  1206. static int aic7xxx_no_probe = 0;
    1207. 

  1207. /*
    1208. 

  1208.  * On some machines, enabling the external SCB RAM isn't reliable yet.  I
    1209. 

  1209.  * haven't had time to make test patches for things like changing the
    1210. 

  1210.  * timing mode on that external RAM either.  Some of those changes may
    1211. 

  1211.  * fix the problem.  Until then though, we default to external SCB RAM
    1212. 

  1212.  * off and give a command line option to enable it.
    1213. 

  1213.  */
    1214. 

  1214. static int aic7xxx…
    1215.