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/drivers/scsi/dc395x.h

http://github.com/mirrors/linux
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  1/* SPDX-License-Identifier: GPL-2.0 */
  2/************************************************************************/
  3/*									*/
  4/*	dc395x.h							*/
  5/*									*/
  6/*	Device Driver for Tekram DC395(U/UW/F), DC315(U)		*/
  7/*	PCI SCSI Bus Master Host Adapter				*/
  8/*	(SCSI chip set used Tekram ASIC TRM-S1040)			*/
  9/*									*/
 10/************************************************************************/
 11#ifndef DC395x_H
 12#define DC395x_H
 13
 14/************************************************************************/
 15/*									*/
 16/*	Initial values							*/
 17/*									*/
 18/************************************************************************/
 19#define DC395x_MAX_CMD_QUEUE		32
 20/* #define DC395x_MAX_QTAGS		32 */
 21#define DC395x_MAX_QTAGS		16
 22#define DC395x_MAX_SCSI_ID		16
 23#define DC395x_MAX_CMD_PER_LUN		DC395x_MAX_QTAGS
 24#define DC395x_MAX_SG_TABLESIZE		64	/* HW limitation			*/
 25#define DC395x_MAX_SG_LISTENTRY		64	/* Must be equal or lower to previous	*/
 26						/* item					*/
 27#define DC395x_MAX_SRB_CNT		63
 28/* #define DC395x_MAX_CAN_QUEUE		7 * DC395x_MAX_QTAGS */
 29#define DC395x_MAX_CAN_QUEUE		DC395x_MAX_SRB_CNT
 30#define DC395x_END_SCAN			2
 31#define DC395x_SEL_TIMEOUT		153	/* 250 ms selection timeout (@ 40 MHz)	*/
 32#define DC395x_MAX_RETRIES		3
 33
 34#if 0
 35#define SYNC_FIRST
 36#endif
 37
 38#define NORM_REC_LVL			0
 39
 40/************************************************************************/
 41/*									*/
 42/*	Various definitions						*/
 43/*									*/
 44/************************************************************************/
 45#define BIT31				0x80000000
 46#define BIT30				0x40000000
 47#define BIT29				0x20000000
 48#define BIT28				0x10000000
 49#define BIT27				0x08000000
 50#define BIT26				0x04000000
 51#define BIT25				0x02000000
 52#define BIT24				0x01000000
 53#define BIT23				0x00800000
 54#define BIT22				0x00400000
 55#define BIT21				0x00200000
 56#define BIT20				0x00100000
 57#define BIT19				0x00080000
 58#define BIT18				0x00040000
 59#define BIT17				0x00020000
 60#define BIT16				0x00010000
 61#define BIT15				0x00008000
 62#define BIT14				0x00004000
 63#define BIT13				0x00002000
 64#define BIT12				0x00001000
 65#define BIT11				0x00000800
 66#define BIT10				0x00000400
 67#define BIT9				0x00000200
 68#define BIT8				0x00000100
 69#define BIT7				0x00000080
 70#define BIT6				0x00000040
 71#define BIT5				0x00000020
 72#define BIT4				0x00000010
 73#define BIT3				0x00000008
 74#define BIT2				0x00000004
 75#define BIT1				0x00000002
 76#define BIT0				0x00000001
 77
 78/* UnitCtrlFlag */
 79#define UNIT_ALLOCATED			BIT0
 80#define UNIT_INFO_CHANGED		BIT1
 81#define FORMATING_MEDIA			BIT2
 82#define UNIT_RETRY			BIT3
 83
 84/* UnitFlags */
 85#define DASD_SUPPORT			BIT0
 86#define SCSI_SUPPORT			BIT1
 87#define ASPI_SUPPORT			BIT2
 88
 89/* SRBState machine definition */
 90#define SRB_FREE			0x0000
 91#define SRB_WAIT			0x0001
 92#define SRB_READY			0x0002
 93#define SRB_MSGOUT			0x0004	/* arbitration+msg_out 1st byte		*/
 94#define SRB_MSGIN			0x0008
 95#define SRB_EXTEND_MSGIN		0x0010
 96#define SRB_COMMAND			0x0020
 97#define SRB_START_			0x0040	/* arbitration+msg_out+command_out	*/
 98#define SRB_DISCONNECT			0x0080
 99#define SRB_DATA_XFER			0x0100
100#define SRB_XFERPAD			0x0200
101#define SRB_STATUS			0x0400
102#define SRB_COMPLETED			0x0800
103#define SRB_ABORT_SENT			0x1000
104#define SRB_DO_SYNC_NEGO		0x2000
105#define SRB_DO_WIDE_NEGO		0x4000
106#define SRB_UNEXPECT_RESEL		0x8000
107
108/************************************************************************/
109/*									*/
110/*	ACB Config							*/
111/*									*/
112/************************************************************************/
113#define HCC_WIDE_CARD			0x20
114#define HCC_SCSI_RESET			0x10
115#define HCC_PARITY			0x08
116#define HCC_AUTOTERM			0x04
117#define HCC_LOW8TERM			0x02
118#define HCC_UP8TERM			0x01
119
120/* ACBFlag */
121#define RESET_DEV			BIT0
122#define RESET_DETECT			BIT1
123#define RESET_DONE			BIT2
124
125/* DCBFlag */
126#define ABORT_DEV_			BIT0
127
128/* SRBstatus */
129#define SRB_OK				BIT0
130#define ABORTION			BIT1
131#define OVER_RUN			BIT2
132#define UNDER_RUN			BIT3
133#define PARITY_ERROR			BIT4
134#define SRB_ERROR			BIT5
135
136/* SRBFlag */
137#define DATAOUT				BIT7
138#define DATAIN				BIT6
139#define RESIDUAL_VALID			BIT5
140#define ENABLE_TIMER			BIT4
141#define RESET_DEV0			BIT2
142#define ABORT_DEV			BIT1
143#define AUTO_REQSENSE			BIT0
144
145/* Adapter status */
146#define H_STATUS_GOOD			0
147#define H_SEL_TIMEOUT			0x11
148#define H_OVER_UNDER_RUN		0x12
149#define H_UNEXP_BUS_FREE		0x13
150#define H_TARGET_PHASE_F		0x14
151#define H_INVALID_CCB_OP		0x16
152#define H_LINK_CCB_BAD			0x17
153#define H_BAD_TARGET_DIR		0x18
154#define H_DUPLICATE_CCB			0x19
155#define H_BAD_CCB_OR_SG			0x1A
156#define H_ABORT				0x0FF
157
158/* SCSI BUS Status byte codes */
159#define SCSI_STAT_GOOD			0x0	/* Good status				*/
160#define SCSI_STAT_CHECKCOND		0x02	/* SCSI Check Condition			*/
161#define SCSI_STAT_CONDMET		0x04	/* Condition Met			*/
162#define SCSI_STAT_BUSY			0x08	/* Target busy status			*/
163#define SCSI_STAT_INTER			0x10	/* Intermediate status			*/
164#define SCSI_STAT_INTERCONDMET		0x14	/* Intermediate condition met		*/
165#define SCSI_STAT_RESCONFLICT		0x18	/* Reservation conflict			*/
166#define SCSI_STAT_CMDTERM		0x22	/* Command Terminated			*/
167#define SCSI_STAT_QUEUEFULL		0x28	/* Queue Full				*/
168#define SCSI_STAT_UNEXP_BUS_F		0xFD	/* Unexpect Bus Free			*/
169#define SCSI_STAT_BUS_RST_DETECT	0xFE	/* Scsi Bus Reset detected		*/
170#define SCSI_STAT_SEL_TIMEOUT		0xFF	/* Selection Time out			*/
171
172/* Sync_Mode */
173#define SYNC_WIDE_TAG_ATNT_DISABLE	0
174#define SYNC_NEGO_ENABLE		BIT0
175#define SYNC_NEGO_DONE			BIT1
176#define WIDE_NEGO_ENABLE		BIT2
177#define WIDE_NEGO_DONE			BIT3
178#define WIDE_NEGO_STATE			BIT4
179#define EN_TAG_QUEUEING			BIT5
180#define EN_ATN_STOP			BIT6
181
182#define SYNC_NEGO_OFFSET		15
183
184/* SCSI MSG BYTE */
185#define MSG_COMPLETE			0x00
186#define MSG_EXTENDED			0x01
187#define MSG_SAVE_PTR			0x02
188#define MSG_RESTORE_PTR			0x03
189#define MSG_DISCONNECT			0x04
190#define MSG_INITIATOR_ERROR		0x05
191#define MSG_ABORT			0x06
192#define MSG_REJECT_			0x07
193#define MSG_NOP				0x08
194#define MSG_PARITY_ERROR		0x09
195#define MSG_LINK_CMD_COMPL		0x0A
196#define MSG_LINK_CMD_COMPL_FLG		0x0B
197#define MSG_BUS_RESET			0x0C
198#define MSG_ABORT_TAG			0x0D
199#define MSG_SIMPLE_QTAG			0x20
200#define MSG_HEAD_QTAG			0x21
201#define MSG_ORDER_QTAG			0x22
202#define MSG_IGNOREWIDE			0x23
203#define MSG_IDENTIFY			0x80
204#define MSG_HOST_ID			0xC0
205
206/* SCSI STATUS BYTE */
207#define STATUS_GOOD			0x00
208#define CHECK_CONDITION_		0x02
209#define STATUS_BUSY			0x08
210#define STATUS_INTERMEDIATE		0x10
211#define RESERVE_CONFLICT		0x18
212
213/* cmd->result */
214#define STATUS_MASK_			0xFF
215#define MSG_MASK			0xFF00
216#define RETURN_MASK			0xFF0000
217
218/************************************************************************/
219/*									*/
220/*	Inquiry Data format						*/
221/*									*/
222/************************************************************************/
223struct ScsiInqData
224{						/* INQ					*/
225	u8 DevType;				/* Periph Qualifier & Periph Dev Type	*/
226	u8 RMB_TypeMod;				/* rem media bit & Dev Type Modifier	*/
227	u8 Vers;				/* ISO, ECMA, & ANSI versions		*/
228	u8 RDF;					/* AEN, TRMIOP, & response data format	*/
229	u8 AddLen;				/* length of additional data		*/
230	u8 Res1;				/* reserved				*/
231	u8 Res2;				/* reserved				*/
232	u8 Flags;				/* RelADr, Wbus32, Wbus16, Sync, etc.	*/
233	u8 VendorID[8];				/* Vendor Identification		*/
234	u8 ProductID[16];			/* Product Identification		*/
235	u8 ProductRev[4];			/* Product Revision			*/
236};
237
238						/* Inquiry byte 0 masks			*/
239#define SCSI_DEVTYPE			0x1F	/* Peripheral Device Type		*/
240#define SCSI_PERIPHQUAL			0xE0	/* Peripheral Qualifier			*/
241						/* Inquiry byte 1 mask			*/
242#define SCSI_REMOVABLE_MEDIA		0x80	/* Removable Media bit (1=removable)	*/
243						/* Peripheral Device Type definitions	*/
244						/* See include/scsi/scsi.h		*/
245#define TYPE_NODEV		SCSI_DEVTYPE	/* Unknown or no device type		*/
246#ifndef TYPE_PRINTER				/*					*/
247# define TYPE_PRINTER			0x02	/* Printer device			*/
248#endif						/*					*/
249#ifndef TYPE_COMM				/*					*/
250# define TYPE_COMM			0x09	/* Communications device		*/
251#endif
252
253/************************************************************************/
254/*									*/
255/*	Inquiry flag definitions (Inq data byte 7)			*/
256/*									*/
257/************************************************************************/
258#define SCSI_INQ_RELADR			0x80	/* device supports relative addressing	*/
259#define SCSI_INQ_WBUS32			0x40	/* device supports 32 bit data xfers	*/
260#define SCSI_INQ_WBUS16			0x20	/* device supports 16 bit data xfers	*/
261#define SCSI_INQ_SYNC			0x10	/* device supports synchronous xfer	*/
262#define SCSI_INQ_LINKED			0x08	/* device supports linked commands	*/
263#define SCSI_INQ_CMDQUEUE		0x02	/* device supports command queueing	*/
264#define SCSI_INQ_SFTRE			0x01	/* device supports soft resets		*/
265
266#define ENABLE_CE			1
267#define DISABLE_CE			0
268#define EEPROM_READ			0x80
269
270/************************************************************************/
271/*									*/
272/*	The PCI configuration register offset for TRM_S1040		*/
273/*									*/
274/************************************************************************/
275#define TRM_S1040_ID			0x00	/* Vendor and Device ID			*/
276#define TRM_S1040_COMMAND		0x04	/* PCI command register			*/
277#define TRM_S1040_IOBASE		0x10	/* I/O Space base address		*/
278#define TRM_S1040_ROMBASE		0x30	/* Expansion ROM Base Address		*/
279#define TRM_S1040_INTLINE		0x3C	/* Interrupt line			*/
280
281/************************************************************************/
282/*									*/
283/*	The SCSI register offset for TRM_S1040				*/
284/*									*/
285/************************************************************************/
286#define TRM_S1040_SCSI_STATUS		0x80	/* SCSI Status (R)			*/
287#define COMMANDPHASEDONE		0x2000	/* SCSI command phase done		*/
288#define SCSIXFERDONE			0x0800	/* SCSI SCSI transfer done		*/
289#define SCSIXFERCNT_2_ZERO		0x0100	/* SCSI SCSI transfer count to zero	*/
290#define SCSIINTERRUPT			0x0080	/* SCSI interrupt pending		*/
291#define COMMANDABORT			0x0040	/* SCSI command abort			*/
292#define SEQUENCERACTIVE			0x0020	/* SCSI sequencer active		*/
293#define PHASEMISMATCH			0x0010	/* SCSI phase mismatch			*/
294#define PARITYERROR			0x0008	/* SCSI parity error			*/
295
296#define PHASEMASK			0x0007	/* Phase MSG/CD/IO			*/
297#define PH_DATA_OUT			0x00	/* Data out phase			*/
298#define PH_DATA_IN			0x01	/* Data in phase			*/
299#define PH_COMMAND			0x02	/* Command phase			*/
300#define PH_STATUS			0x03	/* Status phase				*/
301#define PH_BUS_FREE			0x05	/* Invalid phase used as bus free	*/
302#define PH_MSG_OUT			0x06	/* Message out phase			*/
303#define PH_MSG_IN			0x07	/* Message in phase			*/
304
305#define TRM_S1040_SCSI_CONTROL		0x80	/* SCSI Control (W)			*/
306#define DO_CLRATN			0x0400	/* Clear ATN				*/
307#define DO_SETATN			0x0200	/* Set ATN				*/
308#define DO_CMDABORT			0x0100	/* Abort SCSI command			*/
309#define DO_RSTMODULE			0x0010	/* Reset SCSI chip			*/
310#define DO_RSTSCSI			0x0008	/* Reset SCSI bus			*/
311#define DO_CLRFIFO			0x0004	/* Clear SCSI transfer FIFO		*/
312#define DO_DATALATCH			0x0002	/* Enable SCSI bus data input (latched)	*/
313/* #define DO_DATALATCH			0x0000 */	/* KG: DISable SCSI bus data latch	*/
314#define DO_HWRESELECT			0x0001	/* Enable hardware reselection		*/
315
316#define TRM_S1040_SCSI_FIFOCNT		0x82	/* SCSI FIFO Counter 5bits(R)		*/
317#define TRM_S1040_SCSI_SIGNAL		0x83	/* SCSI low level signal (R/W)		*/
318
319#define TRM_S1040_SCSI_INTSTATUS	0x84	/* SCSI Interrupt Status (R)		*/
320#define INT_SCAM			0x80	/* SCAM selection interrupt		*/
321#define INT_SELECT			0x40	/* Selection interrupt			*/
322#define INT_SELTIMEOUT			0x20	/* Selection timeout interrupt		*/
323#define INT_DISCONNECT			0x10	/* Bus disconnected interrupt		*/
324#define INT_RESELECTED			0x08	/* Reselected interrupt			*/
325#define INT_SCSIRESET			0x04	/* SCSI reset detected interrupt	*/
326#define INT_BUSSERVICE			0x02	/* Bus service interrupt		*/
327#define INT_CMDDONE			0x01	/* SCSI command done interrupt		*/
328
329#define TRM_S1040_SCSI_OFFSET		0x84	/* SCSI Offset Count (W)		*/
330
331/************************************************************************/
332/*									*/
333/*	Bit		Name		Definition			*/
334/*	---------	-------------	----------------------------	*/
335/*	07-05	0	RSVD		Reversed. Always 0.		*/
336/*	04	0	OFFSET4		Reversed for LVDS. Always 0.	*/
337/*	03-00	0	OFFSET[03:00]	Offset number from 0 to 15	*/
338/*									*/
339/************************************************************************/
340
341#define TRM_S1040_SCSI_SYNC		0x85	/* SCSI Synchronous Control (R/W)	*/
342#define LVDS_SYNC			0x20	/* Enable LVDS synchronous		*/
343#define WIDE_SYNC			0x10	/* Enable WIDE synchronous		*/
344#define ALT_SYNC			0x08	/* Enable Fast-20 alternate synchronous	*/
345
346/************************************************************************/
347/*									*/
348/*	SYNCM	7    6    5    4    3       2       1       0		*/
349/*	Name	RSVD RSVD LVDS WIDE ALTPERD PERIOD2 PERIOD1 PERIOD0	*/
350/*	Default	0    0    0    0    0       0       0       0		*/
351/*									*/
352/*	Bit		Name		Definition			*/
353/*	---------	-------------	---------------------------	*/
354/*	07-06	0	RSVD		Reversed. Always read 0		*/
355/*	05	0	LVDS		Reversed. Always read 0		*/
356/*	04	0	WIDE/WSCSI	Enable wide (16-bits) SCSI	*/
357/*					transfer.			*/
358/*	03	0	ALTPERD/ALTPD	Alternate (Sync./Period) mode.	*/
359/*									*/
360/*			@@ When this bit is set,			*/
361/*			   the synchronous period bits 2:0		*/
362/*			   in the Synchronous Mode register		*/
363/*			   are used to transfer data			*/
364/*			   at the Fast-20 rate.				*/
365/*			@@ When this bit is unset,			*/
366/*			   the synchronous period bits 2:0		*/
367/*			   in the Synchronous Mode Register		*/
368/*			   are used to transfer data			*/
369/*			   at the Fast-10 rate (or Fast-40 w/ LVDS).	*/
370/*									*/
371/*	02-00	0	PERIOD[2:0]/	Synchronous SCSI Transfer Rate.	*/
372/*			SXPD[02:00]	These 3 bits specify		*/
373/*					the Synchronous SCSI Transfer	*/
374/*					Rate for Fast-20 and Fast-10.	*/
375/*					These bits are also reset	*/
376/*					by a SCSI Bus reset.		*/
377/*									*/
378/*	For Fast-10 bit ALTPD = 0 and LVDS = 0				*/
379/*	and bit2,bit1,bit0 is defined as follows :			*/
380/*									*/
381/*	000	100ns, 10.0 MHz						*/
382/*	001	150ns,  6.6 MHz						*/
383/*	010	200ns,  5.0 MHz						*/
384/*	011	250ns,  4.0 MHz						*/
385/*	100	300ns,  3.3 MHz						*/
386/*	101	350ns,  2.8 MHz						*/
387/*	110	400ns,  2.5 MHz						*/
388/*	111	450ns,  2.2 MHz						*/
389/*									*/
390/*	For Fast-20 bit ALTPD = 1 and LVDS = 0				*/
391/*	and bit2,bit1,bit0 is defined as follows :			*/
392/*									*/
393/*	000	 50ns, 20.0 MHz						*/
394/*	001	 75ns, 13.3 MHz						*/
395/*	010	100ns, 10.0 MHz						*/
396/*	011	125ns,  8.0 MHz						*/
397/*	100	150ns,  6.6 MHz						*/
398/*	101	175ns,  5.7 MHz						*/
399/*	110	200ns,  5.0 MHz						*/
400/*	111	250ns,  4.0 MHz   KG: Maybe 225ns, 4.4 MHz		*/
401/*									*/
402/*	For Fast-40 bit ALTPD = 0 and LVDS = 1				*/
403/*	and bit2,bit1,bit0 is defined as follows :			*/
404/*									*/
405/*	000	 25ns, 40.0 MHz						*/
406/*	001	 50ns, 20.0 MHz						*/
407/*	010	 75ns, 13.3 MHz						*/
408/*	011	100ns, 10.0 MHz						*/
409/*	100	125ns,  8.0 MHz						*/
410/*	101	150ns,  6.6 MHz						*/
411/*	110	175ns,  5.7 MHz						*/
412/*	111	200ns,  5.0 MHz						*/
413/*									*/
414/************************************************************************/
415
416#define TRM_S1040_SCSI_TARGETID		0x86	/* SCSI Target ID (R/W)			*/
417#define TRM_S1040_SCSI_IDMSG		0x87	/* SCSI Identify Message (R)		*/
418#define TRM_S1040_SCSI_HOSTID		0x87	/* SCSI Host ID (W)			*/
419#define TRM_S1040_SCSI_COUNTER		0x88	/* SCSI Transfer Counter 24bits(R/W)	*/
420
421#define TRM_S1040_SCSI_INTEN		0x8C	/* SCSI Interrupt Enable (R/W)		*/
422#define EN_SCAM				0x80	/* Enable SCAM selection interrupt	*/
423#define EN_SELECT			0x40	/* Enable selection interrupt		*/
424#define EN_SELTIMEOUT			0x20	/* Enable selection timeout interrupt	*/
425#define EN_DISCONNECT			0x10	/* Enable bus disconnected interrupt	*/
426#define EN_RESELECTED			0x08	/* Enable reselected interrupt		*/
427#define EN_SCSIRESET			0x04	/* Enable SCSI reset detected interrupt	*/
428#define EN_BUSSERVICE			0x02	/* Enable bus service interrupt		*/
429#define EN_CMDDONE			0x01	/* Enable SCSI command done interrupt	*/
430
431#define TRM_S1040_SCSI_CONFIG0		0x8D	/* SCSI Configuration 0 (R/W)		*/
432#define PHASELATCH			0x40	/* Enable phase latch			*/
433#define INITIATOR			0x20	/* Enable initiator mode		*/
434#define PARITYCHECK			0x10	/* Enable parity check			*/
435#define BLOCKRST			0x01	/* Disable SCSI reset1			*/
436
437#define TRM_S1040_SCSI_CONFIG1		0x8E	/* SCSI Configuration 1 (R/W)		*/
438#define ACTIVE_NEGPLUS			0x10	/* Enhance active negation		*/
439#define FILTER_DISABLE			0x08	/* Disable SCSI data filter		*/
440#define FAST_FILTER			0x04	/* ?					*/
441#define ACTIVE_NEG			0x02	/* Enable active negation		*/
442
443#define TRM_S1040_SCSI_CONFIG2		0x8F	/* SCSI Configuration 2 (R/W)		*/
444#define CFG2_WIDEFIFO			0x02	/*					*/
445
446#define TRM_S1040_SCSI_COMMAND		0x90	/* SCSI Command (R/W)			*/
447#define SCMD_COMP			0x12	/* Command complete			*/
448#define SCMD_SEL_ATN			0x60	/* Selection with ATN			*/
449#define SCMD_SEL_ATN3			0x64	/* Selection with ATN3			*/
450#define SCMD_SEL_ATNSTOP		0xB8	/* Selection with ATN and Stop		*/
451#define SCMD_FIFO_OUT			0xC0	/* SCSI FIFO transfer out		*/
452#define SCMD_DMA_OUT			0xC1	/* SCSI DMA transfer out		*/
453#define SCMD_FIFO_IN			0xC2	/* SCSI FIFO transfer in		*/
454#define SCMD_DMA_IN			0xC3	/* SCSI DMA transfer in			*/
455#define SCMD_MSGACCEPT			0xD8	/* Message accept			*/
456
457/************************************************************************/
458/*									*/
459/*	Code	Command Description					*/
460/*	----	----------------------------------------		*/
461/*	02	Enable reselection with FIFO				*/
462/*	40	Select without ATN with FIFO				*/
463/*	60	Select with ATN with FIFO				*/
464/*	64	Select with ATN3 with FIFO				*/
465/*	A0	Select with ATN and stop with FIFO			*/
466/*	C0	Transfer information out with FIFO			*/
467/*	C1	Transfer information out with DMA			*/
468/*	C2	Transfer information in with FIFO			*/
469/*	C3	Transfer information in with DMA			*/
470/*	12	Initiator command complete with FIFO			*/
471/*	50	Initiator transfer information out sequence without ATN	*/
472/*		with FIFO						*/
473/*	70	Initiator transfer information out sequence with ATN	*/
474/*		with FIFO						*/
475/*	74	Initiator transfer information out sequence with ATN3	*/
476/*		with FIFO						*/
477/*	52	Initiator transfer information in sequence without ATN	*/
478/*		with FIFO						*/
479/*	72	Initiator transfer information in sequence with ATN	*/
480/*		with FIFO						*/
481/*	76	Initiator transfer information in sequence with ATN3	*/
482/*		with FIFO						*/
483/*	90	Initiator transfer information out command complete	*/
484/*		with FIFO						*/
485/*	92	Initiator transfer information in command complete	*/
486/*		with FIFO						*/
487/*	D2	Enable selection					*/
488/*	08	Reselection						*/
489/*	48	Disconnect command with FIFO				*/
490/*	88	Terminate command with FIFO				*/
491/*	C8	Target command complete with FIFO			*/
492/*	18	SCAM Arbitration/ Selection				*/
493/*	5A	Enable reselection					*/
494/*	98	Select without ATN with FIFO				*/
495/*	B8	Select with ATN with FIFO				*/
496/*	D8	Message Accepted					*/
497/*	58	NOP							*/
498/*									*/
499/************************************************************************/
500
501#define TRM_S1040_SCSI_TIMEOUT		0x91	/* SCSI Time Out Value (R/W)		*/
502#define TRM_S1040_SCSI_FIFO		0x98	/* SCSI FIFO (R/W)			*/
503
504#define TRM_S1040_SCSI_TCR0		0x9C	/* SCSI Target Control 0 (R/W)		*/
505#define TCR0_WIDE_NEGO_DONE		0x8000	/* Wide nego done			*/
506#define TCR0_SYNC_NEGO_DONE		0x4000	/* Synchronous nego done		*/
507#define TCR0_ENABLE_LVDS		0x2000	/* Enable LVDS synchronous		*/
508#define TCR0_ENABLE_WIDE		0x1000	/* Enable WIDE synchronous		*/
509#define TCR0_ENABLE_ALT			0x0800	/* Enable alternate synchronous		*/
510#define TCR0_PERIOD_MASK		0x0700	/* Transfer rate			*/
511
512#define TCR0_DO_WIDE_NEGO		0x0080	/* Do wide NEGO				*/
513#define TCR0_DO_SYNC_NEGO		0x0040	/* Do sync NEGO				*/
514#define TCR0_DISCONNECT_EN		0x0020	/* Disconnection enable			*/
515#define TCR0_OFFSET_MASK		0x001F	/* Offset number			*/
516
517#define TRM_S1040_SCSI_TCR1		0x9E	/* SCSI Target Control 1 (R/W)		*/
518#define MAXTAG_MASK			0x7F00	/* Maximum tags (127)			*/
519#define NON_TAG_BUSY			0x0080	/* Non tag command active		*/
520#define ACTTAG_MASK			0x007F	/* Active tags				*/
521
522/************************************************************************/
523/*									*/
524/*	The DMA register offset for TRM_S1040				*/
525/*									*/
526/************************************************************************/
527#define TRM_S1040_DMA_COMMAND		0xA0	/* DMA Command (R/W)			*/
528#define DMACMD_SG			0x02	/* Enable HW S/G support		*/
529#define DMACMD_DIR			0x01	/* 1 = read from SCSI write to Host	*/
530#define XFERDATAIN_SG			0x0103	/* Transfer data in  w/  SG		*/
531#define XFERDATAOUT_SG			0x0102	/* Transfer data out w/  SG		*/
532#define XFERDATAIN			0x0101	/* Transfer data in  w/o SG		*/
533#define XFERDATAOUT			0x0100	/* Transfer data out w/o SG		*/
534
535#define TRM_S1040_DMA_FIFOCNT		0xA1	/* DMA FIFO Counter (R)			*/
536
537#define TRM_S1040_DMA_CONTROL		0xA1	/* DMA Control (W)			*/
538#define DMARESETMODULE			0x10	/* Reset PCI/DMA module			*/
539#define STOPDMAXFER			0x08	/* Stop  DMA transfer			*/
540#define ABORTXFER			0x04	/* Abort DMA transfer			*/
541#define CLRXFIFO			0x02	/* Clear DMA transfer FIFO		*/
542#define STARTDMAXFER			0x01	/* Start DMA transfer			*/
543
544#define TRM_S1040_DMA_FIFOSTAT		0xA2	/* DMA FIFO Status (R)			*/
545
546#define TRM_S1040_DMA_STATUS		0xA3	/* DMA Interrupt Status (R/W)		*/
547#define XFERPENDING			0x80	/* Transfer pending			*/
548#define SCSIBUSY			0x40	/* SCSI busy				*/
549#define GLOBALINT			0x20	/* DMA_INTEN bit 0-4 set		*/
550#define FORCEDMACOMP			0x10	/* Force DMA transfer complete		*/
551#define DMAXFERERROR			0x08	/* DMA transfer error			*/
552#define DMAXFERABORT			0x04	/* DMA transfer abort			*/
553#define DMAXFERCOMP			0x02	/* Bus Master XFER Complete status	*/
554#define SCSICOMP			0x01	/* SCSI complete interrupt		*/
555
556#define TRM_S1040_DMA_INTEN		0xA4	/* DMA Interrupt Enable (R/W)		*/
557#define EN_FORCEDMACOMP			0x10	/* Force DMA transfer complete		*/
558#define EN_DMAXFERERROR			0x08	/* DMA transfer error			*/
559#define EN_DMAXFERABORT			0x04	/* DMA transfer abort			*/
560#define EN_DMAXFERCOMP			0x02	/* Bus Master XFER Complete status	*/
561#define EN_SCSIINTR			0x01	/* Enable SCSI complete interrupt	*/
562
563#define TRM_S1040_DMA_CONFIG		0xA6	/* DMA Configuration (R/W)		*/
564#define DMA_ENHANCE			0x8000	/* Enable DMA enhance feature (SG?)	*/
565#define DMA_PCI_DUAL_ADDR		0x4000	/*					*/
566#define DMA_CFG_RES			0x2000	/* Always 1				*/
567#define DMA_AUTO_CLR_FIFO		0x1000	/* DISable DMA auto clear FIFO		*/
568#define DMA_MEM_MULTI_READ		0x0800	/*					*/
569#define DMA_MEM_WRITE_INVAL		0x0400	/* Memory write and invalidate		*/
570#define DMA_FIFO_CTRL			0x0300	/* Control FIFO operation with DMA	*/
571#define DMA_FIFO_HALF_HALF		0x0200	/* Keep half filled on both read/write	*/
572
573#define TRM_S1040_DMA_XCNT		0xA8	/* DMA Transfer Counter (R/W), 24bits	*/
574#define TRM_S1040_DMA_CXCNT		0xAC	/* DMA Current Transfer Counter (R)	*/
575#define TRM_S1040_DMA_XLOWADDR		0xB0	/* DMA Transfer Physical Low Address	*/
576#define TRM_S1040_DMA_XHIGHADDR		0xB4	/* DMA Transfer Physical High Address	*/
577
578/************************************************************************/
579/*									*/
580/*	The general register offset for TRM_S1040			*/
581/*									*/
582/************************************************************************/
583#define TRM_S1040_GEN_CONTROL		0xD4	/* Global Control			*/
584#define CTRL_LED			0x80	/* Control onboard LED			*/
585#define EN_EEPROM			0x10	/* Enable EEPROM programming		*/
586#define DIS_TERM			0x08	/* Disable onboard termination		*/
587#define AUTOTERM			0x04	/* Enable Auto SCSI terminator		*/
588#define LOW8TERM			0x02	/* Enable Lower 8 bit SCSI terminator	*/
589#define UP8TERM				0x01	/* Enable Upper 8 bit SCSI terminator	*/
590
591#define TRM_S1040_GEN_STATUS		0xD5	/* Global Status			*/
592#define GTIMEOUT			0x80	/* Global timer reach 0			*/
593#define EXT68HIGH			0x40	/* Higher 8 bit connected externally	*/
594#define INT68HIGH			0x20	/* Higher 8 bit connected internally	*/
595#define CON5068				0x10	/* External 50/68 pin connected (low)	*/
596#define CON68				0x08	/* Internal 68 pin connected (low)	*/
597#define CON50				0x04	/* Internal 50 pin connected (low!)	*/
598#define WIDESCSI			0x02	/* Wide SCSI card			*/
599#define STATUS_LOAD_DEFAULT		0x01	/*					*/
600
601#define TRM_S1040_GEN_NVRAM		0xD6	/* Serial NON-VOLATILE RAM port		*/
602#define NVR_BITOUT			0x08	/* Serial data out			*/
603#define NVR_BITIN			0x04	/* Serial data in			*/
604#define NVR_CLOCK			0x02	/* Serial clock				*/
605#define NVR_SELECT			0x01	/* Serial select			*/
606
607#define TRM_S1040_GEN_EDATA		0xD7	/* Parallel EEPROM data port		*/
608#define TRM_S1040_GEN_EADDRESS		0xD8	/* Parallel EEPROM address		*/
609#define TRM_S1040_GEN_TIMER		0xDB	/* Global timer				*/
610
611/************************************************************************/
612/*									*/
613/*	NvmTarCfg0: Target configuration byte 0 :..pDCB->DevMode	*/
614/*									*/
615/************************************************************************/
616#define NTC_DO_WIDE_NEGO		0x20	/* Wide negotiate			*/
617#define NTC_DO_TAG_QUEUEING		0x10	/* Enable SCSI tag queuing		*/
618#define NTC_DO_SEND_START		0x08	/* Send start command SPINUP		*/
619#define NTC_DO_DISCONNECT		0x04	/* Enable SCSI disconnect		*/
620#define NTC_DO_SYNC_NEGO		0x02	/* Sync negotiation			*/
621#define NTC_DO_PARITY_CHK		0x01	/* (it should define at NAC)		*/
622						/* Parity check enable			*/
623
624/************************************************************************/
625/*									*/
626/*	Nvram Initiater bits definition					*/
627/*									*/
628/************************************************************************/
629#if 0
630#define MORE2_DRV			BIT0
631#define GREATER_1G			BIT1
632#define RST_SCSI_BUS			BIT2
633#define ACTIVE_NEGATION			BIT3
634#define NO_SEEK				BIT4
635#define LUN_CHECK			BIT5
636#endif
637
638/************************************************************************/
639/*									*/
640/*	Nvram Adapter Cfg bits definition				*/
641/*									*/
642/************************************************************************/
643#define NAC_SCANLUN			0x20	/* Include LUN as BIOS device		*/
644#define NAC_POWERON_SCSI_RESET		0x04	/* Power on reset enable		*/
645#define NAC_GREATER_1G			0x02	/* > 1G support enable			*/
646#define NAC_GT2DRIVES			0x01	/* Support more than 2 drives		*/
647/* #define NAC_DO_PARITY_CHK		0x08 */	/* Parity check enable			*/
648
649#endif