/drivers/scsi/ipr.c

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * ipr.c -- driver for IBM Power Linux RAID adapters
  4. *
  5. * Written By: Brian King <brking@us.ibm.com>, IBM Corporation
  6. *
  7. * Copyright (C) 2003, 2004 IBM Corporation
  8. */
  9. /*
  10. * Notes:
  11. *
  12. * This driver is used to control the following SCSI adapters:
  13. *
  14. * IBM iSeries: 5702, 5703, 2780, 5709, 570A, 570B
  15. *
  16. * IBM pSeries: PCI-X Dual Channel Ultra 320 SCSI RAID Adapter
  17. * PCI-X Dual Channel Ultra 320 SCSI Adapter
  18. * PCI-X Dual Channel Ultra 320 SCSI RAID Enablement Card
  19. * Embedded SCSI adapter on p615 and p655 systems
  20. *
  21. * Supported Hardware Features:
  22. * - Ultra 320 SCSI controller
  23. * - PCI-X host interface
  24. * - Embedded PowerPC RISC Processor and Hardware XOR DMA Engine
  25. * - Non-Volatile Write Cache
  26. * - Supports attachment of non-RAID disks, tape, and optical devices
  27. * - RAID Levels 0, 5, 10
  28. * - Hot spare
  29. * - Background Parity Checking
  30. * - Background Data Scrubbing
  31. * - Ability to increase the capacity of an existing RAID 5 disk array
  32. * by adding disks
  33. *
  34. * Driver Features:
  35. * - Tagged command queuing
  36. * - Adapter microcode download
  37. * - PCI hot plug
  38. * - SCSI device hot plug
  39. *
  40. */
  41. #include <linux/fs.h>
  42. #include <linux/init.h>
  43. #include <linux/types.h>
  44. #include <linux/errno.h>
  45. #include <linux/kernel.h>
  46. #include <linux/slab.h>
  47. #include <linux/vmalloc.h>
  48. #include <linux/ioport.h>
  49. #include <linux/delay.h>
  50. #include <linux/pci.h>
  51. #include <linux/wait.h>
  52. #include <linux/spinlock.h>
  53. #include <linux/sched.h>
  54. #include <linux/interrupt.h>
  55. #include <linux/blkdev.h>
  56. #include <linux/firmware.h>
  57. #include <linux/module.h>
  58. #include <linux/moduleparam.h>
  59. #include <linux/libata.h>
  60. #include <linux/hdreg.h>
  61. #include <linux/reboot.h>
  62. #include <linux/stringify.h>
  63. #include <asm/io.h>
  64. #include <asm/irq.h>
  65. #include <asm/processor.h>
  66. #include <scsi/scsi.h>
  67. #include <scsi/scsi_host.h>
  68. #include <scsi/scsi_tcq.h>
  69. #include <scsi/scsi_eh.h>
  70. #include <scsi/scsi_cmnd.h>
  71. #include "ipr.h"
  72. /*
  73. * Global Data
  74. */
  75. static LIST_HEAD(ipr_ioa_head);
  76. static unsigned int ipr_log_level = IPR_DEFAULT_LOG_LEVEL;
  77. static unsigned int ipr_max_speed = 1;
  78. static int ipr_testmode = 0;
  79. static unsigned int ipr_fastfail = 0;
  80. static unsigned int ipr_transop_timeout = 0;
  81. static unsigned int ipr_debug = 0;
  82. static unsigned int ipr_max_devs = IPR_DEFAULT_SIS64_DEVS;
  83. static unsigned int ipr_dual_ioa_raid = 1;
  84. static unsigned int ipr_number_of_msix = 16;
  85. static unsigned int ipr_fast_reboot;
  86. static DEFINE_SPINLOCK(ipr_driver_lock);
  87. /* This table describes the differences between DMA controller chips */
  88. static const struct ipr_chip_cfg_t ipr_chip_cfg[] = {
  89. { /* Gemstone, Citrine, Obsidian, and Obsidian-E */
  90. .mailbox = 0x0042C,
  91. .max_cmds = 100,
  92. .cache_line_size = 0x20,
  93. .clear_isr = 1,
  94. .iopoll_weight = 0,
  95. {
  96. .set_interrupt_mask_reg = 0x0022C,
  97. .clr_interrupt_mask_reg = 0x00230,
  98. .clr_interrupt_mask_reg32 = 0x00230,
  99. .sense_interrupt_mask_reg = 0x0022C,
  100. .sense_interrupt_mask_reg32 = 0x0022C,
  101. .clr_interrupt_reg = 0x00228,
  102. .clr_interrupt_reg32 = 0x00228,
  103. .sense_interrupt_reg = 0x00224,
  104. .sense_interrupt_reg32 = 0x00224,
  105. .ioarrin_reg = 0x00404,
  106. .sense_uproc_interrupt_reg = 0x00214,
  107. .sense_uproc_interrupt_reg32 = 0x00214,
  108. .set_uproc_interrupt_reg = 0x00214,
  109. .set_uproc_interrupt_reg32 = 0x00214,
  110. .clr_uproc_interrupt_reg = 0x00218,
  111. .clr_uproc_interrupt_reg32 = 0x00218
  112. }
  113. },
  114. { /* Snipe and Scamp */
  115. .mailbox = 0x0052C,
  116. .max_cmds = 100,
  117. .cache_line_size = 0x20,
  118. .clear_isr = 1,
  119. .iopoll_weight = 0,
  120. {
  121. .set_interrupt_mask_reg = 0x00288,
  122. .clr_interrupt_mask_reg = 0x0028C,
  123. .clr_interrupt_mask_reg32 = 0x0028C,
  124. .sense_interrupt_mask_reg = 0x00288,
  125. .sense_interrupt_mask_reg32 = 0x00288,
  126. .clr_interrupt_reg = 0x00284,
  127. .clr_interrupt_reg32 = 0x00284,
  128. .sense_interrupt_reg = 0x00280,
  129. .sense_interrupt_reg32 = 0x00280,
  130. .ioarrin_reg = 0x00504,
  131. .sense_uproc_interrupt_reg = 0x00290,
  132. .sense_uproc_interrupt_reg32 = 0x00290,
  133. .set_uproc_interrupt_reg = 0x00290,
  134. .set_uproc_interrupt_reg32 = 0x00290,
  135. .clr_uproc_interrupt_reg = 0x00294,
  136. .clr_uproc_interrupt_reg32 = 0x00294
  137. }
  138. },
  139. { /* CRoC */
  140. .mailbox = 0x00044,
  141. .max_cmds = 1000,
  142. .cache_line_size = 0x20,
  143. .clear_isr = 0,
  144. .iopoll_weight = 64,
  145. {
  146. .set_interrupt_mask_reg = 0x00010,
  147. .clr_interrupt_mask_reg = 0x00018,
  148. .clr_interrupt_mask_reg32 = 0x0001C,
  149. .sense_interrupt_mask_reg = 0x00010,
  150. .sense_interrupt_mask_reg32 = 0x00014,
  151. .clr_interrupt_reg = 0x00008,
  152. .clr_interrupt_reg32 = 0x0000C,
  153. .sense_interrupt_reg = 0x00000,
  154. .sense_interrupt_reg32 = 0x00004,
  155. .ioarrin_reg = 0x00070,
  156. .sense_uproc_interrupt_reg = 0x00020,
  157. .sense_uproc_interrupt_reg32 = 0x00024,
  158. .set_uproc_interrupt_reg = 0x00020,
  159. .set_uproc_interrupt_reg32 = 0x00024,
  160. .clr_uproc_interrupt_reg = 0x00028,
  161. .clr_uproc_interrupt_reg32 = 0x0002C,
  162. .init_feedback_reg = 0x0005C,
  163. .dump_addr_reg = 0x00064,
  164. .dump_data_reg = 0x00068,
  165. .endian_swap_reg = 0x00084
  166. }
  167. },
  168. };
  169. static const struct ipr_chip_t ipr_chip[] = {
  170. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE, false, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  171. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE, false, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  172. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN, false, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  173. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN, false, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  174. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E, true, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  175. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_SNIPE, false, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[1] },
  176. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP, false, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[1] },
  177. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2, true, IPR_SIS64, IPR_MMIO, &ipr_chip_cfg[2] },
  178. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE, true, IPR_SIS64, IPR_MMIO, &ipr_chip_cfg[2] },
  179. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_RATTLESNAKE, true, IPR_SIS64, IPR_MMIO, &ipr_chip_cfg[2] }
  180. };
  181. static int ipr_max_bus_speeds[] = {
  182. IPR_80MBs_SCSI_RATE, IPR_U160_SCSI_RATE, IPR_U320_SCSI_RATE
  183. };
  184. MODULE_AUTHOR("Brian King <brking@us.ibm.com>");
  185. MODULE_DESCRIPTION("IBM Power RAID SCSI Adapter Driver");
  186. module_param_named(max_speed, ipr_max_speed, uint, 0);
  187. MODULE_PARM_DESC(max_speed, "Maximum bus speed (0-2). Default: 1=U160. Speeds: 0=80 MB/s, 1=U160, 2=U320");
  188. module_param_named(log_level, ipr_log_level, uint, 0);
  189. MODULE_PARM_DESC(log_level, "Set to 0 - 4 for increasing verbosity of device driver");
  190. module_param_named(testmode, ipr_testmode, int, 0);
  191. MODULE_PARM_DESC(testmode, "DANGEROUS!!! Allows unsupported configurations");
  192. module_param_named(fastfail, ipr_fastfail, int, S_IRUGO | S_IWUSR);
  193. MODULE_PARM_DESC(fastfail, "Reduce timeouts and retries");
  194. module_param_named(transop_timeout, ipr_transop_timeout, int, 0);
  195. MODULE_PARM_DESC(transop_timeout, "Time in seconds to wait for adapter to come operational (default: 300)");
  196. module_param_named(debug, ipr_debug, int, S_IRUGO | S_IWUSR);
  197. MODULE_PARM_DESC(debug, "Enable device driver debugging logging. Set to 1 to enable. (default: 0)");
  198. module_param_named(dual_ioa_raid, ipr_dual_ioa_raid, int, 0);
  199. MODULE_PARM_DESC(dual_ioa_raid, "Enable dual adapter RAID support. Set to 1 to enable. (default: 1)");
  200. module_param_named(max_devs, ipr_max_devs, int, 0);
  201. MODULE_PARM_DESC(max_devs, "Specify the maximum number of physical devices. "
  202. "[Default=" __stringify(IPR_DEFAULT_SIS64_DEVS) "]");
  203. module_param_named(number_of_msix, ipr_number_of_msix, int, 0);
  204. MODULE_PARM_DESC(number_of_msix, "Specify the number of MSIX interrupts to use on capable adapters (1 - 16). (default:16)");
  205. module_param_named(fast_reboot, ipr_fast_reboot, int, S_IRUGO | S_IWUSR);
  206. MODULE_PARM_DESC(fast_reboot, "Skip adapter shutdown during reboot. Set to 1 to enable. (default: 0)");
  207. MODULE_LICENSE("GPL");
  208. MODULE_VERSION(IPR_DRIVER_VERSION);
  209. /* A constant array of IOASCs/URCs/Error Messages */
  210. static const
  211. struct ipr_error_table_t ipr_error_table[] = {
  212. {0x00000000, 1, IPR_DEFAULT_LOG_LEVEL,
  213. "8155: An unknown error was received"},
  214. {0x00330000, 0, 0,
  215. "Soft underlength error"},
  216. {0x005A0000, 0, 0,
  217. "Command to be cancelled not found"},
  218. {0x00808000, 0, 0,
  219. "Qualified success"},
  220. {0x01080000, 1, IPR_DEFAULT_LOG_LEVEL,
  221. "FFFE: Soft device bus error recovered by the IOA"},
  222. {0x01088100, 0, IPR_DEFAULT_LOG_LEVEL,
  223. "4101: Soft device bus fabric error"},
  224. {0x01100100, 0, IPR_DEFAULT_LOG_LEVEL,
  225. "FFFC: Logical block guard error recovered by the device"},
  226. {0x01100300, 0, IPR_DEFAULT_LOG_LEVEL,
  227. "FFFC: Logical block reference tag error recovered by the device"},
  228. {0x01108300, 0, IPR_DEFAULT_LOG_LEVEL,
  229. "4171: Recovered scatter list tag / sequence number error"},
  230. {0x01109000, 0, IPR_DEFAULT_LOG_LEVEL,
  231. "FF3D: Recovered logical block CRC error on IOA to Host transfer"},
  232. {0x01109200, 0, IPR_DEFAULT_LOG_LEVEL,
  233. "4171: Recovered logical block sequence number error on IOA to Host transfer"},
  234. {0x0110A000, 0, IPR_DEFAULT_LOG_LEVEL,
  235. "FFFD: Recovered logical block reference tag error detected by the IOA"},
  236. {0x0110A100, 0, IPR_DEFAULT_LOG_LEVEL,
  237. "FFFD: Logical block guard error recovered by the IOA"},
  238. {0x01170600, 0, IPR_DEFAULT_LOG_LEVEL,
  239. "FFF9: Device sector reassign successful"},
  240. {0x01170900, 0, IPR_DEFAULT_LOG_LEVEL,
  241. "FFF7: Media error recovered by device rewrite procedures"},
  242. {0x01180200, 0, IPR_DEFAULT_LOG_LEVEL,
  243. "7001: IOA sector reassignment successful"},
  244. {0x01180500, 0, IPR_DEFAULT_LOG_LEVEL,
  245. "FFF9: Soft media error. Sector reassignment recommended"},
  246. {0x01180600, 0, IPR_DEFAULT_LOG_LEVEL,
  247. "FFF7: Media error recovered by IOA rewrite procedures"},
  248. {0x01418000, 0, IPR_DEFAULT_LOG_LEVEL,
  249. "FF3D: Soft PCI bus error recovered by the IOA"},
  250. {0x01440000, 1, IPR_DEFAULT_LOG_LEVEL,
  251. "FFF6: Device hardware error recovered by the IOA"},
  252. {0x01448100, 0, IPR_DEFAULT_LOG_LEVEL,
  253. "FFF6: Device hardware error recovered by the device"},
  254. {0x01448200, 1, IPR_DEFAULT_LOG_LEVEL,
  255. "FF3D: Soft IOA error recovered by the IOA"},
  256. {0x01448300, 0, IPR_DEFAULT_LOG_LEVEL,
  257. "FFFA: Undefined device response recovered by the IOA"},
  258. {0x014A0000, 1, IPR_DEFAULT_LOG_LEVEL,
  259. "FFF6: Device bus error, message or command phase"},
  260. {0x014A8000, 0, IPR_DEFAULT_LOG_LEVEL,
  261. "FFFE: Task Management Function failed"},
  262. {0x015D0000, 0, IPR_DEFAULT_LOG_LEVEL,
  263. "FFF6: Failure prediction threshold exceeded"},
  264. {0x015D9200, 0, IPR_DEFAULT_LOG_LEVEL,
  265. "8009: Impending cache battery pack failure"},
  266. {0x02040100, 0, 0,
  267. "Logical Unit in process of becoming ready"},
  268. {0x02040200, 0, 0,
  269. "Initializing command required"},
  270. {0x02040400, 0, 0,
  271. "34FF: Disk device format in progress"},
  272. {0x02040C00, 0, 0,
  273. "Logical unit not accessible, target port in unavailable state"},
  274. {0x02048000, 0, IPR_DEFAULT_LOG_LEVEL,
  275. "9070: IOA requested reset"},
  276. {0x023F0000, 0, 0,
  277. "Synchronization required"},
  278. {0x02408500, 0, 0,
  279. "IOA microcode download required"},
  280. {0x02408600, 0, 0,
  281. "Device bus connection is prohibited by host"},
  282. {0x024E0000, 0, 0,
  283. "No ready, IOA shutdown"},
  284. {0x025A0000, 0, 0,
  285. "Not ready, IOA has been shutdown"},
  286. {0x02670100, 0, IPR_DEFAULT_LOG_LEVEL,
  287. "3020: Storage subsystem configuration error"},
  288. {0x03110B00, 0, 0,
  289. "FFF5: Medium error, data unreadable, recommend reassign"},
  290. {0x03110C00, 0, 0,
  291. "7000: Medium error, data unreadable, do not reassign"},
  292. {0x03310000, 0, IPR_DEFAULT_LOG_LEVEL,
  293. "FFF3: Disk media format bad"},
  294. {0x04050000, 0, IPR_DEFAULT_LOG_LEVEL,
  295. "3002: Addressed device failed to respond to selection"},
  296. {0x04080000, 1, IPR_DEFAULT_LOG_LEVEL,
  297. "3100: Device bus error"},
  298. {0x04080100, 0, IPR_DEFAULT_LOG_LEVEL,
  299. "3109: IOA timed out a device command"},
  300. {0x04088000, 0, 0,
  301. "3120: SCSI bus is not operational"},
  302. {0x04088100, 0, IPR_DEFAULT_LOG_LEVEL,
  303. "4100: Hard device bus fabric error"},
  304. {0x04100100, 0, IPR_DEFAULT_LOG_LEVEL,
  305. "310C: Logical block guard error detected by the device"},
  306. {0x04100300, 0, IPR_DEFAULT_LOG_LEVEL,
  307. "310C: Logical block reference tag error detected by the device"},
  308. {0x04108300, 1, IPR_DEFAULT_LOG_LEVEL,
  309. "4170: Scatter list tag / sequence number error"},
  310. {0x04109000, 1, IPR_DEFAULT_LOG_LEVEL,
  311. "8150: Logical block CRC error on IOA to Host transfer"},
  312. {0x04109200, 1, IPR_DEFAULT_LOG_LEVEL,
  313. "4170: Logical block sequence number error on IOA to Host transfer"},
  314. {0x0410A000, 0, IPR_DEFAULT_LOG_LEVEL,
  315. "310D: Logical block reference tag error detected by the IOA"},
  316. {0x0410A100, 0, IPR_DEFAULT_LOG_LEVEL,
  317. "310D: Logical block guard error detected by the IOA"},
  318. {0x04118000, 0, IPR_DEFAULT_LOG_LEVEL,
  319. "9000: IOA reserved area data check"},
  320. {0x04118100, 0, IPR_DEFAULT_LOG_LEVEL,
  321. "9001: IOA reserved area invalid data pattern"},
  322. {0x04118200, 0, IPR_DEFAULT_LOG_LEVEL,
  323. "9002: IOA reserved area LRC error"},
  324. {0x04118300, 1, IPR_DEFAULT_LOG_LEVEL,
  325. "Hardware Error, IOA metadata access error"},
  326. {0x04320000, 0, IPR_DEFAULT_LOG_LEVEL,
  327. "102E: Out of alternate sectors for disk storage"},
  328. {0x04330000, 1, IPR_DEFAULT_LOG_LEVEL,
  329. "FFF4: Data transfer underlength error"},
  330. {0x04338000, 1, IPR_DEFAULT_LOG_LEVEL,
  331. "FFF4: Data transfer overlength error"},
  332. {0x043E0100, 0, IPR_DEFAULT_LOG_LEVEL,
  333. "3400: Logical unit failure"},
  334. {0x04408500, 0, IPR_DEFAULT_LOG_LEVEL,
  335. "FFF4: Device microcode is corrupt"},
  336. {0x04418000, 1, IPR_DEFAULT_LOG_LEVEL,
  337. "8150: PCI bus error"},
  338. {0x04430000, 1, 0,
  339. "Unsupported device bus message received"},
  340. {0x04440000, 1, IPR_DEFAULT_LOG_LEVEL,
  341. "FFF4: Disk device problem"},
  342. {0x04448200, 1, IPR_DEFAULT_LOG_LEVEL,
  343. "8150: Permanent IOA failure"},
  344. {0x04448300, 0, IPR_DEFAULT_LOG_LEVEL,
  345. "3010: Disk device returned wrong response to IOA"},
  346. {0x04448400, 0, IPR_DEFAULT_LOG_LEVEL,
  347. "8151: IOA microcode error"},
  348. {0x04448500, 0, 0,
  349. "Device bus status error"},
  350. {0x04448600, 0, IPR_DEFAULT_LOG_LEVEL,
  351. "8157: IOA error requiring IOA reset to recover"},
  352. {0x04448700, 0, 0,
  353. "ATA device status error"},
  354. {0x04490000, 0, 0,
  355. "Message reject received from the device"},
  356. {0x04449200, 0, IPR_DEFAULT_LOG_LEVEL,
  357. "8008: A permanent cache battery pack failure occurred"},
  358. {0x0444A000, 0, IPR_DEFAULT_LOG_LEVEL,
  359. "9090: Disk unit has been modified after the last known status"},
  360. {0x0444A200, 0, IPR_DEFAULT_LOG_LEVEL,
  361. "9081: IOA detected device error"},
  362. {0x0444A300, 0, IPR_DEFAULT_LOG_LEVEL,
  363. "9082: IOA detected device error"},
  364. {0x044A0000, 1, IPR_DEFAULT_LOG_LEVEL,
  365. "3110: Device bus error, message or command phase"},
  366. {0x044A8000, 1, IPR_DEFAULT_LOG_LEVEL,
  367. "3110: SAS Command / Task Management Function failed"},
  368. {0x04670400, 0, IPR_DEFAULT_LOG_LEVEL,
  369. "9091: Incorrect hardware configuration change has been detected"},
  370. {0x04678000, 0, IPR_DEFAULT_LOG_LEVEL,
  371. "9073: Invalid multi-adapter configuration"},
  372. {0x04678100, 0, IPR_DEFAULT_LOG_LEVEL,
  373. "4010: Incorrect connection between cascaded expanders"},
  374. {0x04678200, 0, IPR_DEFAULT_LOG_LEVEL,
  375. "4020: Connections exceed IOA design limits"},
  376. {0x04678300, 0, IPR_DEFAULT_LOG_LEVEL,
  377. "4030: Incorrect multipath connection"},
  378. {0x04679000, 0, IPR_DEFAULT_LOG_LEVEL,
  379. "4110: Unsupported enclosure function"},
  380. {0x04679800, 0, IPR_DEFAULT_LOG_LEVEL,
  381. "4120: SAS cable VPD cannot be read"},
  382. {0x046E0000, 0, IPR_DEFAULT_LOG_LEVEL,
  383. "FFF4: Command to logical unit failed"},
  384. {0x05240000, 1, 0,
  385. "Illegal request, invalid request type or request packet"},
  386. {0x05250000, 0, 0,
  387. "Illegal request, invalid resource handle"},
  388. {0x05258000, 0, 0,
  389. "Illegal request, commands not allowed to this device"},
  390. {0x05258100, 0, 0,
  391. "Illegal request, command not allowed to a secondary adapter"},
  392. {0x05258200, 0, 0,
  393. "Illegal request, command not allowed to a non-optimized resource"},
  394. {0x05260000, 0, 0,
  395. "Illegal request, invalid field in parameter list"},
  396. {0x05260100, 0, 0,
  397. "Illegal request, parameter not supported"},
  398. {0x05260200, 0, 0,
  399. "Illegal request, parameter value invalid"},
  400. {0x052C0000, 0, 0,
  401. "Illegal request, command sequence error"},
  402. {0x052C8000, 1, 0,
  403. "Illegal request, dual adapter support not enabled"},
  404. {0x052C8100, 1, 0,
  405. "Illegal request, another cable connector was physically disabled"},
  406. {0x054E8000, 1, 0,
  407. "Illegal request, inconsistent group id/group count"},
  408. {0x06040500, 0, IPR_DEFAULT_LOG_LEVEL,
  409. "9031: Array protection temporarily suspended, protection resuming"},
  410. {0x06040600, 0, IPR_DEFAULT_LOG_LEVEL,
  411. "9040: Array protection temporarily suspended, protection resuming"},
  412. {0x060B0100, 0, IPR_DEFAULT_LOG_LEVEL,
  413. "4080: IOA exceeded maximum operating temperature"},
  414. {0x060B8000, 0, IPR_DEFAULT_LOG_LEVEL,
  415. "4085: Service required"},
  416. {0x060B8100, 0, IPR_DEFAULT_LOG_LEVEL,
  417. "4086: SAS Adapter Hardware Configuration Error"},
  418. {0x06288000, 0, IPR_DEFAULT_LOG_LEVEL,
  419. "3140: Device bus not ready to ready transition"},
  420. {0x06290000, 0, IPR_DEFAULT_LOG_LEVEL,
  421. "FFFB: SCSI bus was reset"},
  422. {0x06290500, 0, 0,
  423. "FFFE: SCSI bus transition to single ended"},
  424. {0x06290600, 0, 0,
  425. "FFFE: SCSI bus transition to LVD"},
  426. {0x06298000, 0, IPR_DEFAULT_LOG_LEVEL,
  427. "FFFB: SCSI bus was reset by another initiator"},
  428. {0x063F0300, 0, IPR_DEFAULT_LOG_LEVEL,
  429. "3029: A device replacement has occurred"},
  430. {0x063F8300, 0, IPR_DEFAULT_LOG_LEVEL,
  431. "4102: Device bus fabric performance degradation"},
  432. {0x064C8000, 0, IPR_DEFAULT_LOG_LEVEL,
  433. "9051: IOA cache data exists for a missing or failed device"},
  434. {0x064C8100, 0, IPR_DEFAULT_LOG_LEVEL,
  435. "9055: Auxiliary cache IOA contains cache data needed by the primary IOA"},
  436. {0x06670100, 0, IPR_DEFAULT_LOG_LEVEL,
  437. "9025: Disk unit is not supported at its physical location"},
  438. {0x06670600, 0, IPR_DEFAULT_LOG_LEVEL,
  439. "3020: IOA detected a SCSI bus configuration error"},
  440. {0x06678000, 0, IPR_DEFAULT_LOG_LEVEL,
  441. "3150: SCSI bus configuration error"},
  442. {0x06678100, 0, IPR_DEFAULT_LOG_LEVEL,
  443. "9074: Asymmetric advanced function disk configuration"},
  444. {0x06678300, 0, IPR_DEFAULT_LOG_LEVEL,
  445. "4040: Incomplete multipath connection between IOA and enclosure"},
  446. {0x06678400, 0, IPR_DEFAULT_LOG_LEVEL,
  447. "4041: Incomplete multipath connection between enclosure and device"},
  448. {0x06678500, 0, IPR_DEFAULT_LOG_LEVEL,
  449. "9075: Incomplete multipath connection between IOA and remote IOA"},
  450. {0x06678600, 0, IPR_DEFAULT_LOG_LEVEL,
  451. "9076: Configuration error, missing remote IOA"},
  452. {0x06679100, 0, IPR_DEFAULT_LOG_LEVEL,
  453. "4050: Enclosure does not support a required multipath function"},
  454. {0x06679800, 0, IPR_DEFAULT_LOG_LEVEL,
  455. "4121: Configuration error, required cable is missing"},
  456. {0x06679900, 0, IPR_DEFAULT_LOG_LEVEL,
  457. "4122: Cable is not plugged into the correct location on remote IOA"},
  458. {0x06679A00, 0, IPR_DEFAULT_LOG_LEVEL,
  459. "4123: Configuration error, invalid cable vital product data"},
  460. {0x06679B00, 0, IPR_DEFAULT_LOG_LEVEL,
  461. "4124: Configuration error, both cable ends are plugged into the same IOA"},
  462. {0x06690000, 0, IPR_DEFAULT_LOG_LEVEL,
  463. "4070: Logically bad block written on device"},
  464. {0x06690200, 0, IPR_DEFAULT_LOG_LEVEL,
  465. "9041: Array protection temporarily suspended"},
  466. {0x06698200, 0, IPR_DEFAULT_LOG_LEVEL,
  467. "9042: Corrupt array parity detected on specified device"},
  468. {0x066B0200, 0, IPR_DEFAULT_LOG_LEVEL,
  469. "9030: Array no longer protected due to missing or failed disk unit"},
  470. {0x066B8000, 0, IPR_DEFAULT_LOG_LEVEL,
  471. "9071: Link operational transition"},
  472. {0x066B8100, 0, IPR_DEFAULT_LOG_LEVEL,
  473. "9072: Link not operational transition"},
  474. {0x066B8200, 0, IPR_DEFAULT_LOG_LEVEL,
  475. "9032: Array exposed but still protected"},
  476. {0x066B8300, 0, IPR_DEBUG_LOG_LEVEL,
  477. "70DD: Device forced failed by disrupt device command"},
  478. {0x066B9100, 0, IPR_DEFAULT_LOG_LEVEL,
  479. "4061: Multipath redundancy level got better"},
  480. {0x066B9200, 0, IPR_DEFAULT_LOG_LEVEL,
  481. "4060: Multipath redundancy level got worse"},
  482. {0x06808100, 0, IPR_DEBUG_LOG_LEVEL,
  483. "9083: Device raw mode enabled"},
  484. {0x06808200, 0, IPR_DEBUG_LOG_LEVEL,
  485. "9084: Device raw mode disabled"},
  486. {0x07270000, 0, 0,
  487. "Failure due to other device"},
  488. {0x07278000, 0, IPR_DEFAULT_LOG_LEVEL,
  489. "9008: IOA does not support functions expected by devices"},
  490. {0x07278100, 0, IPR_DEFAULT_LOG_LEVEL,
  491. "9010: Cache data associated with attached devices cannot be found"},
  492. {0x07278200, 0, IPR_DEFAULT_LOG_LEVEL,
  493. "9011: Cache data belongs to devices other than those attached"},
  494. {0x07278400, 0, IPR_DEFAULT_LOG_LEVEL,
  495. "9020: Array missing 2 or more devices with only 1 device present"},
  496. {0x07278500, 0, IPR_DEFAULT_LOG_LEVEL,
  497. "9021: Array missing 2 or more devices with 2 or more devices present"},
  498. {0x07278600, 0, IPR_DEFAULT_LOG_LEVEL,
  499. "9022: Exposed array is missing a required device"},
  500. {0x07278700, 0, IPR_DEFAULT_LOG_LEVEL,
  501. "9023: Array member(s) not at required physical locations"},
  502. {0x07278800, 0, IPR_DEFAULT_LOG_LEVEL,
  503. "9024: Array not functional due to present hardware configuration"},
  504. {0x07278900, 0, IPR_DEFAULT_LOG_LEVEL,
  505. "9026: Array not functional due to present hardware configuration"},
  506. {0x07278A00, 0, IPR_DEFAULT_LOG_LEVEL,
  507. "9027: Array is missing a device and parity is out of sync"},
  508. {0x07278B00, 0, IPR_DEFAULT_LOG_LEVEL,
  509. "9028: Maximum number of arrays already exist"},
  510. {0x07278C00, 0, IPR_DEFAULT_LOG_LEVEL,
  511. "9050: Required cache data cannot be located for a disk unit"},
  512. {0x07278D00, 0, IPR_DEFAULT_LOG_LEVEL,
  513. "9052: Cache data exists for a device that has been modified"},
  514. {0x07278F00, 0, IPR_DEFAULT_LOG_LEVEL,
  515. "9054: IOA resources not available due to previous problems"},
  516. {0x07279100, 0, IPR_DEFAULT_LOG_LEVEL,
  517. "9092: Disk unit requires initialization before use"},
  518. {0x07279200, 0, IPR_DEFAULT_LOG_LEVEL,
  519. "9029: Incorrect hardware configuration change has been detected"},
  520. {0x07279600, 0, IPR_DEFAULT_LOG_LEVEL,
  521. "9060: One or more disk pairs are missing from an array"},
  522. {0x07279700, 0, IPR_DEFAULT_LOG_LEVEL,
  523. "9061: One or more disks are missing from an array"},
  524. {0x07279800, 0, IPR_DEFAULT_LOG_LEVEL,
  525. "9062: One or more disks are missing from an array"},
  526. {0x07279900, 0, IPR_DEFAULT_LOG_LEVEL,
  527. "9063: Maximum number of functional arrays has been exceeded"},
  528. {0x07279A00, 0, 0,
  529. "Data protect, other volume set problem"},
  530. {0x0B260000, 0, 0,
  531. "Aborted command, invalid descriptor"},
  532. {0x0B3F9000, 0, 0,
  533. "Target operating conditions have changed, dual adapter takeover"},
  534. {0x0B530200, 0, 0,
  535. "Aborted command, medium removal prevented"},
  536. {0x0B5A0000, 0, 0,
  537. "Command terminated by host"},
  538. {0x0B5B8000, 0, 0,
  539. "Aborted command, command terminated by host"}
  540. };
  541. static const struct ipr_ses_table_entry ipr_ses_table[] = {
  542. { "2104-DL1 ", "XXXXXXXXXXXXXXXX", 80 },
  543. { "2104-TL1 ", "XXXXXXXXXXXXXXXX", 80 },
  544. { "HSBP07M P U2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* Hidive 7 slot */
  545. { "HSBP05M P U2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* Hidive 5 slot */
  546. { "HSBP05M S U2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* Bowtie */
  547. { "HSBP06E ASU2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* MartinFenning */
  548. { "2104-DU3 ", "XXXXXXXXXXXXXXXX", 160 },
  549. { "2104-TU3 ", "XXXXXXXXXXXXXXXX", 160 },
  550. { "HSBP04C RSU2SCSI", "XXXXXXX*XXXXXXXX", 160 },
  551. { "HSBP06E RSU2SCSI", "XXXXXXX*XXXXXXXX", 160 },
  552. { "St V1S2 ", "XXXXXXXXXXXXXXXX", 160 },
  553. { "HSBPD4M PU3SCSI", "XXXXXXX*XXXXXXXX", 160 },
  554. { "VSBPD1H U3SCSI", "XXXXXXX*XXXXXXXX", 160 }
  555. };
  556. /*
  557. * Function Prototypes
  558. */
  559. static int ipr_reset_alert(struct ipr_cmnd *);
  560. static void ipr_process_ccn(struct ipr_cmnd *);
  561. static void ipr_process_error(struct ipr_cmnd *);
  562. static void ipr_reset_ioa_job(struct ipr_cmnd *);
  563. static void ipr_initiate_ioa_reset(struct ipr_ioa_cfg *,
  564. enum ipr_shutdown_type);
  565. #ifdef CONFIG_SCSI_IPR_TRACE
  566. /**
  567. * ipr_trc_hook - Add a trace entry to the driver trace
  568. * @ipr_cmd: ipr command struct
  569. * @type: trace type
  570. * @add_data: additional data
  571. *
  572. * Return value:
  573. * none
  574. **/
  575. static void ipr_trc_hook(struct ipr_cmnd *ipr_cmd,
  576. u8 type, u32 add_data)
  577. {
  578. struct ipr_trace_entry *trace_entry;
  579. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  580. unsigned int trace_index;
  581. trace_index = atomic_add_return(1, &ioa_cfg->trace_index) & IPR_TRACE_INDEX_MASK;
  582. trace_entry = &ioa_cfg->trace[trace_index];
  583. trace_entry->time = jiffies;
  584. trace_entry->op_code = ipr_cmd->ioarcb.cmd_pkt.cdb[0];
  585. trace_entry->type = type;
  586. if (ipr_cmd->ioa_cfg->sis64)
  587. trace_entry->ata_op_code = ipr_cmd->i.ata_ioadl.regs.command;
  588. else
  589. trace_entry->ata_op_code = ipr_cmd->ioarcb.u.add_data.u.regs.command;
  590. trace_entry->cmd_index = ipr_cmd->cmd_index & 0xff;
  591. trace_entry->res_handle = ipr_cmd->ioarcb.res_handle;
  592. trace_entry->u.add_data = add_data;
  593. wmb();
  594. }
  595. #else
  596. #define ipr_trc_hook(ipr_cmd, type, add_data) do { } while (0)
  597. #endif
  598. /**
  599. * ipr_lock_and_done - Acquire lock and complete command
  600. * @ipr_cmd: ipr command struct
  601. *
  602. * Return value:
  603. * none
  604. **/
  605. static void ipr_lock_and_done(struct ipr_cmnd *ipr_cmd)
  606. {
  607. unsigned long lock_flags;
  608. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  609. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  610. ipr_cmd->done(ipr_cmd);
  611. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  612. }
  613. /**
  614. * ipr_reinit_ipr_cmnd - Re-initialize an IPR Cmnd block for reuse
  615. * @ipr_cmd: ipr command struct
  616. *
  617. * Return value:
  618. * none
  619. **/
  620. static void ipr_reinit_ipr_cmnd(struct ipr_cmnd *ipr_cmd)
  621. {
  622. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  623. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  624. struct ipr_ioasa64 *ioasa64 = &ipr_cmd->s.ioasa64;
  625. dma_addr_t dma_addr = ipr_cmd->dma_addr;
  626. int hrrq_id;
  627. hrrq_id = ioarcb->cmd_pkt.hrrq_id;
  628. memset(&ioarcb->cmd_pkt, 0, sizeof(struct ipr_cmd_pkt));
  629. ioarcb->cmd_pkt.hrrq_id = hrrq_id;
  630. ioarcb->data_transfer_length = 0;
  631. ioarcb->read_data_transfer_length = 0;
  632. ioarcb->ioadl_len = 0;
  633. ioarcb->read_ioadl_len = 0;
  634. if (ipr_cmd->ioa_cfg->sis64) {
  635. ioarcb->u.sis64_addr_data.data_ioadl_addr =
  636. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, i.ioadl64));
  637. ioasa64->u.gata.status = 0;
  638. } else {
  639. ioarcb->write_ioadl_addr =
  640. cpu_to_be32(dma_addr + offsetof(struct ipr_cmnd, i.ioadl));
  641. ioarcb->read_ioadl_addr = ioarcb->write_ioadl_addr;
  642. ioasa->u.gata.status = 0;
  643. }
  644. ioasa->hdr.ioasc = 0;
  645. ioasa->hdr.residual_data_len = 0;
  646. ipr_cmd->scsi_cmd = NULL;
  647. ipr_cmd->qc = NULL;
  648. ipr_cmd->sense_buffer[0] = 0;
  649. ipr_cmd->dma_use_sg = 0;
  650. }
  651. /**
  652. * ipr_init_ipr_cmnd - Initialize an IPR Cmnd block
  653. * @ipr_cmd: ipr command struct
  654. *
  655. * Return value:
  656. * none
  657. **/
  658. static void ipr_init_ipr_cmnd(struct ipr_cmnd *ipr_cmd,
  659. void (*fast_done) (struct ipr_cmnd *))
  660. {
  661. ipr_reinit_ipr_cmnd(ipr_cmd);
  662. ipr_cmd->u.scratch = 0;
  663. ipr_cmd->sibling = NULL;
  664. ipr_cmd->eh_comp = NULL;
  665. ipr_cmd->fast_done = fast_done;
  666. timer_setup(&ipr_cmd->timer, NULL, 0);
  667. }
  668. /**
  669. * __ipr_get_free_ipr_cmnd - Get a free IPR Cmnd block
  670. * @ioa_cfg: ioa config struct
  671. *
  672. * Return value:
  673. * pointer to ipr command struct
  674. **/
  675. static
  676. struct ipr_cmnd *__ipr_get_free_ipr_cmnd(struct ipr_hrr_queue *hrrq)
  677. {
  678. struct ipr_cmnd *ipr_cmd = NULL;
  679. if (likely(!list_empty(&hrrq->hrrq_free_q))) {
  680. ipr_cmd = list_entry(hrrq->hrrq_free_q.next,
  681. struct ipr_cmnd, queue);
  682. list_del(&ipr_cmd->queue);
  683. }
  684. return ipr_cmd;
  685. }
  686. /**
  687. * ipr_get_free_ipr_cmnd - Get a free IPR Cmnd block and initialize it
  688. * @ioa_cfg: ioa config struct
  689. *
  690. * Return value:
  691. * pointer to ipr command struct
  692. **/
  693. static
  694. struct ipr_cmnd *ipr_get_free_ipr_cmnd(struct ipr_ioa_cfg *ioa_cfg)
  695. {
  696. struct ipr_cmnd *ipr_cmd =
  697. __ipr_get_free_ipr_cmnd(&ioa_cfg->hrrq[IPR_INIT_HRRQ]);
  698. ipr_init_ipr_cmnd(ipr_cmd, ipr_lock_and_done);
  699. return ipr_cmd;
  700. }
  701. /**
  702. * ipr_mask_and_clear_interrupts - Mask all and clear specified interrupts
  703. * @ioa_cfg: ioa config struct
  704. * @clr_ints: interrupts to clear
  705. *
  706. * This function masks all interrupts on the adapter, then clears the
  707. * interrupts specified in the mask
  708. *
  709. * Return value:
  710. * none
  711. **/
  712. static void ipr_mask_and_clear_interrupts(struct ipr_ioa_cfg *ioa_cfg,
  713. u32 clr_ints)
  714. {
  715. volatile u32 int_reg;
  716. int i;
  717. /* Stop new interrupts */
  718. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  719. spin_lock(&ioa_cfg->hrrq[i]._lock);
  720. ioa_cfg->hrrq[i].allow_interrupts = 0;
  721. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  722. }
  723. /* Set interrupt mask to stop all new interrupts */
  724. if (ioa_cfg->sis64)
  725. writeq(~0, ioa_cfg->regs.set_interrupt_mask_reg);
  726. else
  727. writel(~0, ioa_cfg->regs.set_interrupt_mask_reg);
  728. /* Clear any pending interrupts */
  729. if (ioa_cfg->sis64)
  730. writel(~0, ioa_cfg->regs.clr_interrupt_reg);
  731. writel(clr_ints, ioa_cfg->regs.clr_interrupt_reg32);
  732. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  733. }
  734. /**
  735. * ipr_save_pcix_cmd_reg - Save PCI-X command register
  736. * @ioa_cfg: ioa config struct
  737. *
  738. * Return value:
  739. * 0 on success / -EIO on failure
  740. **/
  741. static int ipr_save_pcix_cmd_reg(struct ipr_ioa_cfg *ioa_cfg)
  742. {
  743. int pcix_cmd_reg = pci_find_capability(ioa_cfg->pdev, PCI_CAP_ID_PCIX);
  744. if (pcix_cmd_reg == 0)
  745. return 0;
  746. if (pci_read_config_word(ioa_cfg->pdev, pcix_cmd_reg + PCI_X_CMD,
  747. &ioa_cfg->saved_pcix_cmd_reg) != PCIBIOS_SUCCESSFUL) {
  748. dev_err(&ioa_cfg->pdev->dev, "Failed to save PCI-X command register\n");
  749. return -EIO;
  750. }
  751. ioa_cfg->saved_pcix_cmd_reg |= PCI_X_CMD_DPERR_E | PCI_X_CMD_ERO;
  752. return 0;
  753. }
  754. /**
  755. * ipr_set_pcix_cmd_reg - Setup PCI-X command register
  756. * @ioa_cfg: ioa config struct
  757. *
  758. * Return value:
  759. * 0 on success / -EIO on failure
  760. **/
  761. static int ipr_set_pcix_cmd_reg(struct ipr_ioa_cfg *ioa_cfg)
  762. {
  763. int pcix_cmd_reg = pci_find_capability(ioa_cfg->pdev, PCI_CAP_ID_PCIX);
  764. if (pcix_cmd_reg) {
  765. if (pci_write_config_word(ioa_cfg->pdev, pcix_cmd_reg + PCI_X_CMD,
  766. ioa_cfg->saved_pcix_cmd_reg) != PCIBIOS_SUCCESSFUL) {
  767. dev_err(&ioa_cfg->pdev->dev, "Failed to setup PCI-X command register\n");
  768. return -EIO;
  769. }
  770. }
  771. return 0;
  772. }
  773. /**
  774. * __ipr_sata_eh_done - done function for aborted SATA commands
  775. * @ipr_cmd: ipr command struct
  776. *
  777. * This function is invoked for ops generated to SATA
  778. * devices which are being aborted.
  779. *
  780. * Return value:
  781. * none
  782. **/
  783. static void __ipr_sata_eh_done(struct ipr_cmnd *ipr_cmd)
  784. {
  785. struct ata_queued_cmd *qc = ipr_cmd->qc;
  786. struct ipr_sata_port *sata_port = qc->ap->private_data;
  787. qc->err_mask |= AC_ERR_OTHER;
  788. sata_port->ioasa.status |= ATA_BUSY;
  789. ata_qc_complete(qc);
  790. if (ipr_cmd->eh_comp)
  791. complete(ipr_cmd->eh_comp);
  792. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  793. }
  794. /**
  795. * ipr_sata_eh_done - done function for aborted SATA commands
  796. * @ipr_cmd: ipr command struct
  797. *
  798. * This function is invoked for ops generated to SATA
  799. * devices which are being aborted.
  800. *
  801. * Return value:
  802. * none
  803. **/
  804. static void ipr_sata_eh_done(struct ipr_cmnd *ipr_cmd)
  805. {
  806. struct ipr_hrr_queue *hrrq = ipr_cmd->hrrq;
  807. unsigned long hrrq_flags;
  808. spin_lock_irqsave(&hrrq->_lock, hrrq_flags);
  809. __ipr_sata_eh_done(ipr_cmd);
  810. spin_unlock_irqrestore(&hrrq->_lock, hrrq_flags);
  811. }
  812. /**
  813. * __ipr_scsi_eh_done - mid-layer done function for aborted ops
  814. * @ipr_cmd: ipr command struct
  815. *
  816. * This function is invoked by the interrupt handler for
  817. * ops generated by the SCSI mid-layer which are being aborted.
  818. *
  819. * Return value:
  820. * none
  821. **/
  822. static void __ipr_scsi_eh_done(struct ipr_cmnd *ipr_cmd)
  823. {
  824. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  825. scsi_cmd->result |= (DID_ERROR << 16);
  826. scsi_dma_unmap(ipr_cmd->scsi_cmd);
  827. scsi_cmd->scsi_done(scsi_cmd);
  828. if (ipr_cmd->eh_comp)
  829. complete(ipr_cmd->eh_comp);
  830. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  831. }
  832. /**
  833. * ipr_scsi_eh_done - mid-layer done function for aborted ops
  834. * @ipr_cmd: ipr command struct
  835. *
  836. * This function is invoked by the interrupt handler for
  837. * ops generated by the SCSI mid-layer which are being aborted.
  838. *
  839. * Return value:
  840. * none
  841. **/
  842. static void ipr_scsi_eh_done(struct ipr_cmnd *ipr_cmd)
  843. {
  844. unsigned long hrrq_flags;
  845. struct ipr_hrr_queue *hrrq = ipr_cmd->hrrq;
  846. spin_lock_irqsave(&hrrq->_lock, hrrq_flags);
  847. __ipr_scsi_eh_done(ipr_cmd);
  848. spin_unlock_irqrestore(&hrrq->_lock, hrrq_flags);
  849. }
  850. /**
  851. * ipr_fail_all_ops - Fails all outstanding ops.
  852. * @ioa_cfg: ioa config struct
  853. *
  854. * This function fails all outstanding ops.
  855. *
  856. * Return value:
  857. * none
  858. **/
  859. static void ipr_fail_all_ops(struct ipr_ioa_cfg *ioa_cfg)
  860. {
  861. struct ipr_cmnd *ipr_cmd, *temp;
  862. struct ipr_hrr_queue *hrrq;
  863. ENTER;
  864. for_each_hrrq(hrrq, ioa_cfg) {
  865. spin_lock(&hrrq->_lock);
  866. list_for_each_entry_safe(ipr_cmd,
  867. temp, &hrrq->hrrq_pending_q, queue) {
  868. list_del(&ipr_cmd->queue);
  869. ipr_cmd->s.ioasa.hdr.ioasc =
  870. cpu_to_be32(IPR_IOASC_IOA_WAS_RESET);
  871. ipr_cmd->s.ioasa.hdr.ilid =
  872. cpu_to_be32(IPR_DRIVER_ILID);
  873. if (ipr_cmd->scsi_cmd)
  874. ipr_cmd->done = __ipr_scsi_eh_done;
  875. else if (ipr_cmd->qc)
  876. ipr_cmd->done = __ipr_sata_eh_done;
  877. ipr_trc_hook(ipr_cmd, IPR_TRACE_FINISH,
  878. IPR_IOASC_IOA_WAS_RESET);
  879. del_timer(&ipr_cmd->timer);
  880. ipr_cmd->done(ipr_cmd);
  881. }
  882. spin_unlock(&hrrq->_lock);
  883. }
  884. LEAVE;
  885. }
  886. /**
  887. * ipr_send_command - Send driver initiated requests.
  888. * @ipr_cmd: ipr command struct
  889. *
  890. * This function sends a command to the adapter using the correct write call.
  891. * In the case of sis64, calculate the ioarcb size required. Then or in the
  892. * appropriate bits.
  893. *
  894. * Return value:
  895. * none
  896. **/
  897. static void ipr_send_command(struct ipr_cmnd *ipr_cmd)
  898. {
  899. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  900. dma_addr_t send_dma_addr = ipr_cmd->dma_addr;
  901. if (ioa_cfg->sis64) {
  902. /* The default size is 256 bytes */
  903. send_dma_addr |= 0x1;
  904. /* If the number of ioadls * size of ioadl > 128 bytes,
  905. then use a 512 byte ioarcb */
  906. if (ipr_cmd->dma_use_sg * sizeof(struct ipr_ioadl64_desc) > 128 )
  907. send_dma_addr |= 0x4;
  908. writeq(send_dma_addr, ioa_cfg->regs.ioarrin_reg);
  909. } else
  910. writel(send_dma_addr, ioa_cfg->regs.ioarrin_reg);
  911. }
  912. /**
  913. * ipr_do_req - Send driver initiated requests.
  914. * @ipr_cmd: ipr command struct
  915. * @done: done function
  916. * @timeout_func: timeout function
  917. * @timeout: timeout value
  918. *
  919. * This function sends the specified command to the adapter with the
  920. * timeout given. The done function is invoked on command completion.
  921. *
  922. * Return value:
  923. * none
  924. **/
  925. static void ipr_do_req(struct ipr_cmnd *ipr_cmd,
  926. void (*done) (struct ipr_cmnd *),
  927. void (*timeout_func) (struct timer_list *), u32 timeout)
  928. {
  929. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  930. ipr_cmd->done = done;
  931. ipr_cmd->timer.expires = jiffies + timeout;
  932. ipr_cmd->timer.function = timeout_func;
  933. add_timer(&ipr_cmd->timer);
  934. ipr_trc_hook(ipr_cmd, IPR_TRACE_START, 0);
  935. ipr_send_command(ipr_cmd);
  936. }
  937. /**
  938. * ipr_internal_cmd_done - Op done function for an internally generated op.
  939. * @ipr_cmd: ipr command struct
  940. *
  941. * This function is the op done function for an internally generated,
  942. * blocking op. It simply wakes the sleeping thread.
  943. *
  944. * Return value:
  945. * none
  946. **/
  947. static void ipr_internal_cmd_done(struct ipr_cmnd *ipr_cmd)
  948. {
  949. if (ipr_cmd->sibling)
  950. ipr_cmd->sibling = NULL;
  951. else
  952. complete(&ipr_cmd->completion);
  953. }
  954. /**
  955. * ipr_init_ioadl - initialize the ioadl for the correct SIS type
  956. * @ipr_cmd: ipr command struct
  957. * @dma_addr: dma address
  958. * @len: transfer length
  959. * @flags: ioadl flag value
  960. *
  961. * This function initializes an ioadl in the case where there is only a single
  962. * descriptor.
  963. *
  964. * Return value:
  965. * nothing
  966. **/
  967. static void ipr_init_ioadl(struct ipr_cmnd *ipr_cmd, dma_addr_t dma_addr,
  968. u32 len, int flags)
  969. {
  970. struct ipr_ioadl_desc *ioadl = ipr_cmd->i.ioadl;
  971. struct ipr_ioadl64_desc *ioadl64 = ipr_cmd->i.ioadl64;
  972. ipr_cmd->dma_use_sg = 1;
  973. if (ipr_cmd->ioa_cfg->sis64) {
  974. ioadl64->flags = cpu_to_be32(flags);
  975. ioadl64->data_len = cpu_to_be32(len);
  976. ioadl64->address = cpu_to_be64(dma_addr);
  977. ipr_cmd->ioarcb.ioadl_len =
  978. cpu_to_be32(sizeof(struct ipr_ioadl64_desc));
  979. ipr_cmd->ioarcb.data_transfer_length = cpu_to_be32(len);
  980. } else {
  981. ioadl->flags_and_data_len = cpu_to_be32(flags | len);
  982. ioadl->address = cpu_to_be32(dma_addr);
  983. if (flags == IPR_IOADL_FLAGS_READ_LAST) {
  984. ipr_cmd->ioarcb.read_ioadl_len =
  985. cpu_to_be32(sizeof(struct ipr_ioadl_desc));
  986. ipr_cmd->ioarcb.read_data_transfer_length = cpu_to_be32(len);
  987. } else {
  988. ipr_cmd->ioarcb.ioadl_len =
  989. cpu_to_be32(sizeof(struct ipr_ioadl_desc));
  990. ipr_cmd->ioarcb.data_transfer_length = cpu_to_be32(len);
  991. }
  992. }
  993. }
  994. /**
  995. * ipr_send_blocking_cmd - Send command and sleep on its completion.
  996. * @ipr_cmd: ipr command struct
  997. * @timeout_func: function to invoke if command times out
  998. * @timeout: timeout
  999. *
  1000. * Return value:
  1001. * none
  1002. **/
  1003. static void ipr_send_blocking_cmd(struct ipr_cmnd *ipr_cmd,
  1004. void (*timeout_func) (struct timer_list *),
  1005. u32 timeout)
  1006. {
  1007. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  1008. init_completion(&ipr_cmd->completion);
  1009. ipr_do_req(ipr_cmd, ipr_internal_cmd_done, timeout_func, timeout);
  1010. spin_unlock_irq(ioa_cfg->host->host_lock);
  1011. wait_for_completion(&ipr_cmd->completion);
  1012. spin_lock_irq(ioa_cfg->host->host_lock);
  1013. }
  1014. static int ipr_get_hrrq_index(struct ipr_ioa_cfg *ioa_cfg)
  1015. {
  1016. unsigned int hrrq;
  1017. if (ioa_cfg->hrrq_num == 1)
  1018. hrrq = 0;
  1019. else {
  1020. hrrq = atomic_add_return(1, &ioa_cfg->hrrq_index);
  1021. hrrq = (hrrq % (ioa_cfg->hrrq_num - 1)) + 1;
  1022. }
  1023. return hrrq;
  1024. }
  1025. /**
  1026. * ipr_send_hcam - Send an HCAM to the adapter.
  1027. * @ioa_cfg: ioa config struct
  1028. * @type: HCAM type
  1029. * @hostrcb: hostrcb struct
  1030. *
  1031. * This function will send a Host Controlled Async command to the adapter.
  1032. * If HCAMs are currently not allowed to be issued to the adapter, it will
  1033. * place the hostrcb on the free queue.
  1034. *
  1035. * Return value:
  1036. * none
  1037. **/
  1038. static void ipr_send_hcam(struct ipr_ioa_cfg *ioa_cfg, u8 type,
  1039. struct ipr_hostrcb *hostrcb)
  1040. {
  1041. struct ipr_cmnd *ipr_cmd;
  1042. struct ipr_ioarcb *ioarcb;
  1043. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds) {
  1044. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  1045. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  1046. list_add_tail(&hostrcb->queue, &ioa_cfg->hostrcb_pending_q);
  1047. ipr_cmd->u.hostrcb = hostrcb;
  1048. ioarcb = &ipr_cmd->ioarcb;
  1049. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  1050. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_HCAM;
  1051. ioarcb->cmd_pkt.cdb[0] = IPR_HOST_CONTROLLED_ASYNC;
  1052. ioarcb->cmd_pkt.cdb[1] = type;
  1053. ioarcb->cmd_pkt.cdb[7] = (sizeof(hostrcb->hcam) >> 8) & 0xff;
  1054. ioarcb->cmd_pkt.cdb[8] = sizeof(hostrcb->hcam) & 0xff;
  1055. ipr_init_ioadl(ipr_cmd, hostrcb->hostrcb_dma,
  1056. sizeof(hostrcb->hcam), IPR_IOADL_FLAGS_READ_LAST);
  1057. if (type == IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE)
  1058. ipr_cmd->done = ipr_process_ccn;
  1059. else
  1060. ipr_cmd->done = ipr_process_error;
  1061. ipr_trc_hook(ipr_cmd, IPR_TRACE_START, IPR_IOA_RES_ADDR);
  1062. ipr_send_command(ipr_cmd);
  1063. } else {
  1064. list_add_tail(&hostrcb->queue, &ioa_cfg->hostrcb_free_q);
  1065. }
  1066. }
  1067. /**
  1068. * ipr_update_ata_class - Update the ata class in the resource entry
  1069. * @res: resource entry struct
  1070. * @proto: cfgte device bus protocol value
  1071. *
  1072. * Return value:
  1073. * none
  1074. **/
  1075. static void ipr_update_ata_class(struct ipr_resource_entry *res, unsigned int proto)
  1076. {
  1077. switch (proto) {
  1078. case IPR_PROTO_SATA:
  1079. case IPR_PROTO_SAS_STP:
  1080. res->ata_class = ATA_DEV_ATA;
  1081. break;
  1082. case IPR_PROTO_SATA_ATAPI:
  1083. case IPR_PROTO_SAS_STP_ATAPI:
  1084. res->ata_class = ATA_DEV_ATAPI;
  1085. break;
  1086. default:
  1087. res->ata_class = ATA_DEV_UNKNOWN;
  1088. break;
  1089. };
  1090. }
  1091. /**
  1092. * ipr_init_res_entry - Initialize a resource entry struct.
  1093. * @res: resource entry struct
  1094. * @cfgtew: config table entry wrapper struct
  1095. *
  1096. * Return value:
  1097. * none
  1098. **/
  1099. static void ipr_init_res_entry(struct ipr_resource_entry *res,
  1100. struct ipr_config_table_entry_wrapper *cfgtew)
  1101. {
  1102. int found = 0;
  1103. unsigned int proto;
  1104. struct ipr_ioa_cfg *ioa_cfg = res->ioa_cfg;
  1105. struct ipr_resource_entry *gscsi_res = NULL;
  1106. res->needs_sync_complete = 0;
  1107. res->in_erp = 0;
  1108. res->add_to_ml = 0;
  1109. res->del_from_ml = 0;
  1110. res->resetting_device = 0;
  1111. res->reset_occurred = 0;
  1112. res->sdev = NULL;
  1113. res->sata_port = NULL;
  1114. if (ioa_cfg->sis64) {
  1115. proto = cfgtew->u.cfgte64->proto;
  1116. res->flags = be16_to_cpu(cfgtew->u.cfgte64->flags);
  1117. res->res_flags = be16_to_cpu(cfgtew->u.cfgte64->res_flags);
  1118. res->qmodel = IPR_QUEUEING_MODEL64(res);
  1119. res->type = cfgtew->u.cfgte64->res_type;
  1120. memcpy(res->res_path, &cfgtew->u.cfgte64->res_path,
  1121. sizeof(res->res_path));
  1122. res->bus = 0;
  1123. memcpy(&res->dev_lun.scsi_lun, &cfgtew->u.cfgte64->lun,
  1124. sizeof(res->dev_lun.scsi_lun));
  1125. res->lun = scsilun_to_int(&res->dev_lun);
  1126. if (res->type == IPR_RES_TYPE_GENERIC_SCSI) {
  1127. list_for_each_entry(gscsi_res, &ioa_cfg->used_res_q, queue) {
  1128. if (gscsi_res->dev_id == cfgtew->u.cfgte64->dev_id) {
  1129. found = 1;
  1130. res->target = gscsi_res->target;
  1131. break;
  1132. }
  1133. }
  1134. if (!found) {
  1135. res->target = find_first_zero_bit(ioa_cfg->target_ids,
  1136. ioa_cfg->max_devs_supported);
  1137. set_bit(res->target, ioa_cfg->target_ids);
  1138. }
  1139. } else if (res->type == IPR_RES_TYPE_IOAFP) {
  1140. res->bus = IPR_IOAFP_VIRTUAL_BUS;
  1141. res->target = 0;
  1142. } else if (res->type == IPR_RES_TYPE_ARRAY) {
  1143. res->bus = IPR_ARRAY_VIRTUAL_BUS;
  1144. res->target = find_first_zero_bit(ioa_cfg->array_ids,
  1145. ioa_cfg->max_devs_supported);
  1146. set_bit(res->target, ioa_cfg->array_ids);
  1147. } else if (res->type == IPR_RES_TYPE_VOLUME_SET) {
  1148. res->bus = IPR_VSET_VIRTUAL_BUS;
  1149. res->target = find_first_zero_bit(ioa_cfg->vset_ids,
  1150. ioa_cfg->max_devs_supported);
  1151. set_bit(res->target, ioa_cfg->vset_ids);
  1152. } else {
  1153. res->target = find_first_zero_bit(ioa_cfg->target_ids,
  1154. ioa_cfg->max_devs_supported);
  1155. set_bit(res->target, ioa_cfg->target_ids);
  1156. }
  1157. } else {
  1158. proto = cfgtew->u.cfgte->proto;
  1159. res->qmodel = IPR_QUEUEING_MODEL(res);
  1160. res->flags = cfgtew->u.cfgte->flags;
  1161. if (res->flags & IPR_IS_IOA_RESOURCE)
  1162. res->type = IPR_RES_TYPE_IOAFP;
  1163. else
  1164. res->type = cfgtew->u.cfgte->rsvd_subtype & 0x0f;
  1165. res->bus = cfgtew->u.cfgte->res_addr.bus;
  1166. res->target = cfgtew->u.cfgte->res_addr.target;
  1167. res->lun = cfgtew->u.cfgte->res_addr.lun;
  1168. res->lun_wwn = get_unaligned_be64(cfgtew->u.cfgte->lun_wwn);
  1169. }
  1170. ipr_update_ata_class(res, proto);
  1171. }
  1172. /**
  1173. * ipr_is_same_device - Determine if two devices are the same.
  1174. * @res: resource entry struct
  1175. * @cfgtew: config table entry wrapper struct
  1176. *
  1177. * Return value:
  1178. * 1 if the devices are the same / 0 otherwise
  1179. **/
  1180. static int ipr_is_same_device(struct ipr_resource_entry *res,
  1181. struct ipr_config_table_entry_wrapper *cfgtew)
  1182. {
  1183. if (res->ioa_cfg->sis64) {
  1184. if (!memcmp(&res->dev_id, &cfgtew->u.cfgte64->dev_id,
  1185. sizeof(cfgtew->u.cfgte64->dev_id)) &&
  1186. !memcmp(&res->dev_lun.scsi_lun, &cfgtew->u.cfgte64->lun,
  1187. sizeof(cfgtew->u.cfgte64->lun))) {
  1188. return 1;
  1189. }
  1190. } else {
  1191. if (res->bus == cfgtew->u.cfgte->res_addr.bus &&
  1192. res->target == cfgtew->u.cfgte->res_addr.target &&
  1193. res->lun == cfgtew->u.cfgte->res_addr.lun)
  1194. return 1;
  1195. }
  1196. return 0;
  1197. }
  1198. /**
  1199. * __ipr_format_res_path - Format the resource path for printing.
  1200. * @res_path: resource path
  1201. * @buf: buffer
  1202. * @len: length of buffer provided
  1203. *
  1204. * Return value:
  1205. * pointer to buffer
  1206. **/
  1207. static char *__ipr_format_res_path(u8 *res_path, char *buffer, int len)
  1208. {
  1209. int i;
  1210. char *p = buffer;
  1211. *p = '\0';
  1212. p += scnprintf(p, buffer + len - p, "%02X", res_path[0]);
  1213. for (i = 1; res_path[i] != 0xff && ((i * 3) < len); i++)
  1214. p += scnprintf(p, buffer + len - p, "-%02X", res_path[i]);
  1215. return buffer;
  1216. }
  1217. /**
  1218. * ipr_format_res_path - Format the resource path for printing.
  1219. * @ioa_cfg: ioa config struct
  1220. * @res_path: resource path
  1221. * @buf: buffer
  1222. * @len: length of buffer provided
  1223. *
  1224. * Return value:
  1225. * pointer to buffer
  1226. **/
  1227. static char *ipr_format_res_path(struct ipr_ioa_cfg *ioa_cfg,
  1228. u8 *res_path, char *buffer, int len)
  1229. {
  1230. char *p = buffer;
  1231. *p = '\0';
  1232. p += scnprintf(p, buffer + len - p, "%d/", ioa_cfg->host->host_no);
  1233. __ipr_format_res_path(res_path, p, len - (buffer - p));
  1234. return buffer;
  1235. }
  1236. /**
  1237. * ipr_update_res_entry - Update the resource entry.
  1238. * @res: resource entry struct
  1239. * @cfgtew: config table entry wrapper struct
  1240. *
  1241. * Return value:
  1242. * none
  1243. **/
  1244. static void ipr_update_res_entry(struct ipr_resource_entry *res,
  1245. struct ipr_config_table_entry_wrapper *cfgtew)
  1246. {
  1247. char buffer[IPR_MAX_RES_PATH_LENGTH];
  1248. unsigned int proto;
  1249. int new_path = 0;
  1250. if (res->ioa_cfg->sis64) {
  1251. res->flags = be16_to_cpu(cfgtew->u.cfgte64->flags);
  1252. res->res_flags = be16_to_cpu(cfgtew->u.cfgte64->res_flags);
  1253. res->type = cfgtew->u.cfgte64->res_type;
  1254. memcpy(&res->std_inq_data, &cfgtew->u.cfgte64->std_inq_data,
  1255. sizeof(struct ipr_std_inq_data));
  1256. res->qmodel = IPR_QUEUEING_MODEL64(res);
  1257. proto = cfgtew->u.cfgte64->proto;
  1258. res->res_handle = cfgtew->u.cfgte64->res_handle;
  1259. res->dev_id = cfgtew->u.cfgte64->dev_id;
  1260. memcpy(&res->dev_lun.scsi_lun, &cfgtew->u.cfgte64->lun,
  1261. sizeof(res->dev_lun.scsi_lun));
  1262. if (memcmp(res->res_path, &cfgtew->u.cfgte64->res_path,
  1263. sizeof(res->res_path))) {
  1264. memcpy(res->res_path, &cfgtew->u.cfgte64->res_path,
  1265. sizeof(res->res_path));
  1266. new_path = 1;
  1267. }
  1268. if (res->sdev && new_path)
  1269. sdev_printk(KERN_INFO, res->sdev, "Resource path: %s\n",
  1270. ipr_format_res_path(res->ioa_cfg,
  1271. res->res_path, buffer, sizeof(buffer)));
  1272. } else {
  1273. res->flags = cfgtew->u.cfgte->flags;
  1274. if (res->flags & IPR_IS_IOA_RESOURCE)
  1275. res->type = IPR_RES_TYPE_IOAFP;
  1276. else
  1277. res->type = cfgtew->u.cfgte->rsvd_subtype & 0x0f;
  1278. memcpy(&res->std_inq_data, &cfgtew->u.cfgte->std_inq_data,
  1279. sizeof(struct ipr_std_inq_data));
  1280. res->qmodel = IPR_QUEUEING_MODEL(res);
  1281. proto = cfgtew->u.cfgte->proto;
  1282. res->res_handle = cfgtew->u.cfgte->res_handle;
  1283. }
  1284. ipr_update_ata_class(res, proto);
  1285. }
  1286. /**
  1287. * ipr_clear_res_target - Clear the bit in the bit map representing the target
  1288. * for the resource.
  1289. * @res: resource entry struct
  1290. * @cfgtew: config table entry wrapper struct
  1291. *
  1292. * Return value:
  1293. * none
  1294. **/
  1295. static void ipr_clear_res_target(struct ipr_resource_entry *res)
  1296. {
  1297. struct ipr_resource_entry *gscsi_res = NULL;
  1298. struct ipr_ioa_cfg *ioa_cfg = res->ioa_cfg;
  1299. if (!ioa_cfg->sis64)
  1300. return;
  1301. if (res->bus == IPR_ARRAY_VIRTUAL_BUS)
  1302. clear_bit(res->target, ioa_cfg->array_ids);
  1303. else if (res->bus == IPR_VSET_VIRTUAL_BUS)
  1304. clear_bit(res->target, ioa_cfg->vset_ids);
  1305. else if (res->bus == 0 && res->type == IPR_RES_TYPE_GENERIC_SCSI) {
  1306. list_for_each_entry(gscsi_res, &ioa_cfg->used_res_q, queue)
  1307. if (gscsi_res->dev_id == res->dev_id && gscsi_res != res)
  1308. return;
  1309. clear_bit(res->target, ioa_cfg->target_ids);
  1310. } else if (res->bus == 0)
  1311. clear_bit(res->target, ioa_cfg->target_ids);
  1312. }
  1313. /**
  1314. * ipr_handle_config_change - Handle a config change from the adapter
  1315. * @ioa_cfg: ioa config struct
  1316. * @hostrcb: hostrcb
  1317. *
  1318. * Return value:
  1319. * none
  1320. **/
  1321. static void ipr_handle_config_change(struct ipr_ioa_cfg *ioa_cfg,
  1322. struct ipr_hostrcb *hostrcb)
  1323. {
  1324. struct ipr_resource_entry *res = NULL;
  1325. struct ipr_config_table_entry_wrapper cfgtew;
  1326. __be32 cc_res_handle;
  1327. u32 is_ndn = 1;
  1328. if (ioa_cfg->sis64) {
  1329. cfgtew.u.cfgte64 = &hostrcb->hcam.u.ccn.u.cfgte64;
  1330. cc_res_handle = cfgtew.u.cfgte64->res_handle;
  1331. } else {
  1332. cfgtew.u.cfgte = &hostrcb->hcam.u.ccn.u.cfgte;
  1333. cc_res_handle = cfgtew.u.cfgte->res_handle;
  1334. }
  1335. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  1336. if (res->res_handle == cc_res_handle) {
  1337. is_ndn = 0;
  1338. break;
  1339. }
  1340. }
  1341. if (is_ndn) {
  1342. if (list_empty(&ioa_cfg->free_res_q)) {
  1343. ipr_send_hcam(ioa_cfg,
  1344. IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE,
  1345. hostrcb);
  1346. return;
  1347. }
  1348. res = list_entry(ioa_cfg->free_res_q.next,
  1349. struct ipr_resource_entry, queue);
  1350. list_del(&res->queue);
  1351. ipr_init_res_entry(res, &cfgtew);
  1352. list_add_tail(&res->queue, &ioa_cfg->used_res_q);
  1353. }
  1354. ipr_update_res_entry(res, &cfgtew);
  1355. if (hostrcb->hcam.notify_type == IPR_HOST_RCB_NOTIF_TYPE_REM_ENTRY) {
  1356. if (res->sdev) {
  1357. res->del_from_ml = 1;
  1358. res->res_handle = IPR_INVALID_RES_HANDLE;
  1359. schedule_work(&ioa_cfg->work_q);
  1360. } else {
  1361. ipr_clear_res_target(res);
  1362. list_move_tail(&res->queue, &ioa_cfg->free_res_q);
  1363. }
  1364. } else if (!res->sdev || res->del_from_ml) {
  1365. res->add_to_ml = 1;
  1366. schedule_work(&ioa_cfg->work_q);
  1367. }
  1368. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE, hostrcb);
  1369. }
  1370. /**
  1371. * ipr_process_ccn - Op done function for a CCN.
  1372. * @ipr_cmd: ipr command struct
  1373. *
  1374. * This function is the op done function for a configuration
  1375. * change notification host controlled async from the adapter.
  1376. *
  1377. * Return value:
  1378. * none
  1379. **/
  1380. static void ipr_process_ccn(struct ipr_cmnd *ipr_cmd)
  1381. {
  1382. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  1383. struct ipr_hostrcb *hostrcb = ipr_cmd->u.hostrcb;
  1384. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  1385. list_del_init(&hostrcb->queue);
  1386. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  1387. if (ioasc) {
  1388. if (ioasc != IPR_IOASC_IOA_WAS_RESET &&
  1389. ioasc != IPR_IOASC_ABORTED_CMD_TERM_BY_HOST)
  1390. dev_err(&ioa_cfg->pdev->dev,
  1391. "Host RCB failed with IOASC: 0x%08X\n", ioasc);
  1392. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE, hostrcb);
  1393. } else {
  1394. ipr_handle_config_change(ioa_cfg, hostrcb);
  1395. }
  1396. }
  1397. /**
  1398. * strip_and_pad_whitespace - Strip and pad trailing whitespace.
  1399. * @i: index into buffer
  1400. * @buf: string to modify
  1401. *
  1402. * This function will strip all trailing whitespace, pad the end
  1403. * of the string with a single space, and NULL terminate the string.
  1404. *
  1405. * Return value:
  1406. * new length of string
  1407. **/
  1408. static int strip_and_pad_whitespace(int i, char *buf)
  1409. {
  1410. while (i && buf[i] == ' ')
  1411. i--;
  1412. buf[i+1] = ' ';
  1413. buf[i+2] = '\0';
  1414. return i + 2;
  1415. }
  1416. /**
  1417. * ipr_log_vpd_compact - Log the passed extended VPD compactly.
  1418. * @prefix: string to print at start of printk
  1419. * @hostrcb: hostrcb pointer
  1420. * @vpd: vendor/product id/sn struct
  1421. *
  1422. * Return value:
  1423. * none
  1424. **/
  1425. static void ipr_log_vpd_compact(char *prefix, struct ipr_hostrcb *hostrcb,
  1426. struct ipr_vpd *vpd)
  1427. {
  1428. char buffer[IPR_VENDOR_ID_LEN + IPR_PROD_ID_LEN + IPR_SERIAL_NUM_LEN + 3];
  1429. int i = 0;
  1430. memcpy(buffer, vpd->vpids.vendor_id, IPR_VENDOR_ID_LEN);
  1431. i = strip_and_pad_whitespace(IPR_VENDOR_ID_LEN - 1, buffer);
  1432. memcpy(&buffer[i], vpd->vpids.product_id, IPR_PROD_ID_LEN);
  1433. i = strip_and_pad_whitespace(i + IPR_PROD_ID_LEN - 1, buffer);
  1434. memcpy(&buffer[i], vpd->sn, IPR_SERIAL_NUM_LEN);
  1435. buffer[IPR_SERIAL_NUM_LEN + i] = '\0';
  1436. ipr_hcam_err(hostrcb, "%s VPID/SN: %s\n",