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/drivers/scsi/aic7xxx/aic79xx_reg_print.c_shipped

http://github.com/mirrors/linux
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  1/*
  2 * DO NOT EDIT - This file is automatically generated
  3 *		 from the following source files:
  4 *
  5 * $Id: //depot/aic7xxx/aic7xxx/aic79xx.seq#120 $
  6 * $Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#77 $
  7 */
  8
  9#include "aic79xx_osm.h"
 10
 11static const ahd_reg_parse_entry_t INTSTAT_parse_table[] = {
 12	{ "SPLTINT",		0x01, 0x01 },
 13	{ "CMDCMPLT",		0x02, 0x02 },
 14	{ "SEQINT",		0x04, 0x04 },
 15	{ "SCSIINT",		0x08, 0x08 },
 16	{ "PCIINT",		0x10, 0x10 },
 17	{ "SWTMINT",		0x20, 0x20 },
 18	{ "BRKADRINT",		0x40, 0x40 },
 19	{ "HWERRINT",		0x80, 0x80 },
 20	{ "INT_PEND",		0xff, 0xff }
 21};
 22
 23int
 24ahd_intstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
 25{
 26	return (ahd_print_register(INTSTAT_parse_table, 9, "INTSTAT",
 27	    0x01, regvalue, cur_col, wrap));
 28}
 29
 30static const ahd_reg_parse_entry_t HS_MAILBOX_parse_table[] = {
 31	{ "ENINT_COALESCE",	0x40, 0x40 },
 32	{ "HOST_TQINPOS",	0x80, 0x80 }
 33};
 34
 35int
 36ahd_hs_mailbox_print(u_int regvalue, u_int *cur_col, u_int wrap)
 37{
 38	return (ahd_print_register(HS_MAILBOX_parse_table, 2, "HS_MAILBOX",
 39	    0x0b, regvalue, cur_col, wrap));
 40}
 41
 42static const ahd_reg_parse_entry_t SEQINTSTAT_parse_table[] = {
 43	{ "SEQ_SPLTINT",	0x01, 0x01 },
 44	{ "SEQ_PCIINT",		0x02, 0x02 },
 45	{ "SEQ_SCSIINT",	0x04, 0x04 },
 46	{ "SEQ_SEQINT",		0x08, 0x08 },
 47	{ "SEQ_SWTMRTO",	0x10, 0x10 }
 48};
 49
 50int
 51ahd_seqintstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
 52{
 53	return (ahd_print_register(SEQINTSTAT_parse_table, 5, "SEQINTSTAT",
 54	    0x0c, regvalue, cur_col, wrap));
 55}
 56
 57static const ahd_reg_parse_entry_t INTCTL_parse_table[] = {
 58	{ "SPLTINTEN",		0x01, 0x01 },
 59	{ "SEQINTEN",		0x02, 0x02 },
 60	{ "SCSIINTEN",		0x04, 0x04 },
 61	{ "PCIINTEN",		0x08, 0x08 },
 62	{ "AUTOCLRCMDINT",	0x10, 0x10 },
 63	{ "SWTIMER_START",	0x20, 0x20 },
 64	{ "SWTMINTEN",		0x40, 0x40 },
 65	{ "SWTMINTMASK",	0x80, 0x80 }
 66};
 67
 68int
 69ahd_intctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
 70{
 71	return (ahd_print_register(INTCTL_parse_table, 8, "INTCTL",
 72	    0x18, regvalue, cur_col, wrap));
 73}
 74
 75static const ahd_reg_parse_entry_t DFCNTRL_parse_table[] = {
 76	{ "DIRECTIONEN",	0x01, 0x01 },
 77	{ "FIFOFLUSH",		0x02, 0x02 },
 78	{ "FIFOFLUSHACK",	0x02, 0x02 },
 79	{ "DIRECTION",		0x04, 0x04 },
 80	{ "DIRECTIONACK",	0x04, 0x04 },
 81	{ "HDMAEN",		0x08, 0x08 },
 82	{ "HDMAENACK",		0x08, 0x08 },
 83	{ "SCSIEN",		0x20, 0x20 },
 84	{ "SCSIENACK",		0x20, 0x20 },
 85	{ "SCSIENWRDIS",	0x40, 0x40 },
 86	{ "PRELOADEN",		0x80, 0x80 }
 87};
 88
 89int
 90ahd_dfcntrl_print(u_int regvalue, u_int *cur_col, u_int wrap)
 91{
 92	return (ahd_print_register(DFCNTRL_parse_table, 11, "DFCNTRL",
 93	    0x19, regvalue, cur_col, wrap));
 94}
 95
 96static const ahd_reg_parse_entry_t DFSTATUS_parse_table[] = {
 97	{ "FIFOEMP",		0x01, 0x01 },
 98	{ "FIFOFULL",		0x02, 0x02 },
 99	{ "DFTHRESH",		0x04, 0x04 },
100	{ "HDONE",		0x08, 0x08 },
101	{ "MREQPEND",		0x10, 0x10 },
102	{ "PKT_PRELOAD_AVAIL",	0x40, 0x40 },
103	{ "PRELOAD_AVAIL",	0x80, 0x80 }
104};
105
106int
107ahd_dfstatus_print(u_int regvalue, u_int *cur_col, u_int wrap)
108{
109	return (ahd_print_register(DFSTATUS_parse_table, 7, "DFSTATUS",
110	    0x1a, regvalue, cur_col, wrap));
111}
112
113static const ahd_reg_parse_entry_t SG_CACHE_SHADOW_parse_table[] = {
114	{ "LAST_SEG_DONE",	0x01, 0x01 },
115	{ "LAST_SEG",		0x02, 0x02 },
116	{ "ODD_SEG",		0x04, 0x04 },
117	{ "SG_ADDR_MASK",	0xf8, 0xf8 }
118};
119
120int
121ahd_sg_cache_shadow_print(u_int regvalue, u_int *cur_col, u_int wrap)
122{
123	return (ahd_print_register(SG_CACHE_SHADOW_parse_table, 4, "SG_CACHE_SHADOW",
124	    0x1b, regvalue, cur_col, wrap));
125}
126
127static const ahd_reg_parse_entry_t SCSISEQ0_parse_table[] = {
128	{ "SCSIRSTO",		0x01, 0x01 },
129	{ "FORCEBUSFREE",	0x10, 0x10 },
130	{ "ENARBO",		0x20, 0x20 },
131	{ "ENSELO",		0x40, 0x40 },
132	{ "TEMODEO",		0x80, 0x80 }
133};
134
135int
136ahd_scsiseq0_print(u_int regvalue, u_int *cur_col, u_int wrap)
137{
138	return (ahd_print_register(SCSISEQ0_parse_table, 5, "SCSISEQ0",
139	    0x3a, regvalue, cur_col, wrap));
140}
141
142static const ahd_reg_parse_entry_t SCSISEQ1_parse_table[] = {
143	{ "ALTSTIM",		0x01, 0x01 },
144	{ "ENAUTOATNP",		0x02, 0x02 },
145	{ "MANUALP",		0x0c, 0x0c },
146	{ "ENRSELI",		0x10, 0x10 },
147	{ "ENSELI",		0x20, 0x20 },
148	{ "MANUALCTL",		0x40, 0x40 }
149};
150
151int
152ahd_scsiseq1_print(u_int regvalue, u_int *cur_col, u_int wrap)
153{
154	return (ahd_print_register(SCSISEQ1_parse_table, 6, "SCSISEQ1",
155	    0x3b, regvalue, cur_col, wrap));
156}
157
158static const ahd_reg_parse_entry_t DFFSTAT_parse_table[] = {
159	{ "CURRFIFO_0",		0x00, 0x03 },
160	{ "CURRFIFO_1",		0x01, 0x03 },
161	{ "CURRFIFO_NONE",	0x03, 0x03 },
162	{ "FIFO0FREE",		0x10, 0x10 },
163	{ "FIFO1FREE",		0x20, 0x20 },
164	{ "CURRFIFO",		0x03, 0x03 }
165};
166
167int
168ahd_dffstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
169{
170	return (ahd_print_register(DFFSTAT_parse_table, 6, "DFFSTAT",
171	    0x3f, regvalue, cur_col, wrap));
172}
173
174static const ahd_reg_parse_entry_t SCSISIGI_parse_table[] = {
175	{ "P_DATAOUT",		0x00, 0xe0 },
176	{ "P_DATAOUT_DT",	0x20, 0xe0 },
177	{ "P_DATAIN",		0x40, 0xe0 },
178	{ "P_DATAIN_DT",	0x60, 0xe0 },
179	{ "P_COMMAND",		0x80, 0xe0 },
180	{ "P_MESGOUT",		0xa0, 0xe0 },
181	{ "P_STATUS",		0xc0, 0xe0 },
182	{ "P_MESGIN",		0xe0, 0xe0 },
183	{ "ACKI",		0x01, 0x01 },
184	{ "REQI",		0x02, 0x02 },
185	{ "BSYI",		0x04, 0x04 },
186	{ "SELI",		0x08, 0x08 },
187	{ "ATNI",		0x10, 0x10 },
188	{ "MSGI",		0x20, 0x20 },
189	{ "IOI",		0x40, 0x40 },
190	{ "CDI",		0x80, 0x80 },
191	{ "PHASE_MASK",		0xe0, 0xe0 }
192};
193
194int
195ahd_scsisigi_print(u_int regvalue, u_int *cur_col, u_int wrap)
196{
197	return (ahd_print_register(SCSISIGI_parse_table, 17, "SCSISIGI",
198	    0x41, regvalue, cur_col, wrap));
199}
200
201static const ahd_reg_parse_entry_t SCSIPHASE_parse_table[] = {
202	{ "DATA_OUT_PHASE",	0x01, 0x03 },
203	{ "DATA_IN_PHASE",	0x02, 0x03 },
204	{ "DATA_PHASE_MASK",	0x03, 0x03 },
205	{ "MSG_OUT_PHASE",	0x04, 0x04 },
206	{ "MSG_IN_PHASE",	0x08, 0x08 },
207	{ "COMMAND_PHASE",	0x10, 0x10 },
208	{ "STATUS_PHASE",	0x20, 0x20 }
209};
210
211int
212ahd_scsiphase_print(u_int regvalue, u_int *cur_col, u_int wrap)
213{
214	return (ahd_print_register(SCSIPHASE_parse_table, 7, "SCSIPHASE",
215	    0x42, regvalue, cur_col, wrap));
216}
217
218int
219ahd_scsibus_print(u_int regvalue, u_int *cur_col, u_int wrap)
220{
221	return (ahd_print_register(NULL, 0, "SCSIBUS",
222	    0x46, regvalue, cur_col, wrap));
223}
224
225static const ahd_reg_parse_entry_t SELID_parse_table[] = {
226	{ "ONEBIT",		0x08, 0x08 },
227	{ "SELID_MASK",		0xf0, 0xf0 }
228};
229
230int
231ahd_selid_print(u_int regvalue, u_int *cur_col, u_int wrap)
232{
233	return (ahd_print_register(SELID_parse_table, 2, "SELID",
234	    0x49, regvalue, cur_col, wrap));
235}
236
237static const ahd_reg_parse_entry_t SSTAT0_parse_table[] = {
238	{ "ARBDO",		0x01, 0x01 },
239	{ "SPIORDY",		0x02, 0x02 },
240	{ "OVERRUN",		0x04, 0x04 },
241	{ "IOERR",		0x08, 0x08 },
242	{ "SELINGO",		0x10, 0x10 },
243	{ "SELDI",		0x20, 0x20 },
244	{ "SELDO",		0x40, 0x40 },
245	{ "TARGET",		0x80, 0x80 }
246};
247
248int
249ahd_sstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
250{
251	return (ahd_print_register(SSTAT0_parse_table, 8, "SSTAT0",
252	    0x4b, regvalue, cur_col, wrap));
253}
254
255static const ahd_reg_parse_entry_t SIMODE0_parse_table[] = {
256	{ "ENARBDO",		0x01, 0x01 },
257	{ "ENSPIORDY",		0x02, 0x02 },
258	{ "ENOVERRUN",		0x04, 0x04 },
259	{ "ENIOERR",		0x08, 0x08 },
260	{ "ENSELINGO",		0x10, 0x10 },
261	{ "ENSELDI",		0x20, 0x20 },
262	{ "ENSELDO",		0x40, 0x40 }
263};
264
265int
266ahd_simode0_print(u_int regvalue, u_int *cur_col, u_int wrap)
267{
268	return (ahd_print_register(SIMODE0_parse_table, 7, "SIMODE0",
269	    0x4b, regvalue, cur_col, wrap));
270}
271
272static const ahd_reg_parse_entry_t SSTAT1_parse_table[] = {
273	{ "REQINIT",		0x01, 0x01 },
274	{ "STRB2FAST",		0x02, 0x02 },
275	{ "SCSIPERR",		0x04, 0x04 },
276	{ "BUSFREE",		0x08, 0x08 },
277	{ "PHASEMIS",		0x10, 0x10 },
278	{ "SCSIRSTI",		0x20, 0x20 },
279	{ "ATNTARG",		0x40, 0x40 },
280	{ "SELTO",		0x80, 0x80 }
281};
282
283int
284ahd_sstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
285{
286	return (ahd_print_register(SSTAT1_parse_table, 8, "SSTAT1",
287	    0x4c, regvalue, cur_col, wrap));
288}
289
290static const ahd_reg_parse_entry_t SSTAT2_parse_table[] = {
291	{ "BUSFREE_LQO",	0x40, 0xc0 },
292	{ "BUSFREE_DFF0",	0x80, 0xc0 },
293	{ "BUSFREE_DFF1",	0xc0, 0xc0 },
294	{ "DMADONE",		0x01, 0x01 },
295	{ "SDONE",		0x02, 0x02 },
296	{ "WIDE_RES",		0x04, 0x04 },
297	{ "BSYX",		0x08, 0x08 },
298	{ "EXP_ACTIVE",		0x10, 0x10 },
299	{ "NONPACKREQ",		0x20, 0x20 },
300	{ "BUSFREETIME",	0xc0, 0xc0 }
301};
302
303int
304ahd_sstat2_print(u_int regvalue, u_int *cur_col, u_int wrap)
305{
306	return (ahd_print_register(SSTAT2_parse_table, 10, "SSTAT2",
307	    0x4d, regvalue, cur_col, wrap));
308}
309
310static const ahd_reg_parse_entry_t PERRDIAG_parse_table[] = {
311	{ "DTERR",		0x01, 0x01 },
312	{ "DGFORMERR",		0x02, 0x02 },
313	{ "CRCERR",		0x04, 0x04 },
314	{ "AIPERR",		0x08, 0x08 },
315	{ "PARITYERR",		0x10, 0x10 },
316	{ "PREVPHASE",		0x20, 0x20 },
317	{ "HIPERR",		0x40, 0x40 },
318	{ "HIZERO",		0x80, 0x80 }
319};
320
321int
322ahd_perrdiag_print(u_int regvalue, u_int *cur_col, u_int wrap)
323{
324	return (ahd_print_register(PERRDIAG_parse_table, 8, "PERRDIAG",
325	    0x4e, regvalue, cur_col, wrap));
326}
327
328int
329ahd_soffcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
330{
331	return (ahd_print_register(NULL, 0, "SOFFCNT",
332	    0x4f, regvalue, cur_col, wrap));
333}
334
335static const ahd_reg_parse_entry_t LQISTAT0_parse_table[] = {
336	{ "LQIATNCMD",		0x01, 0x01 },
337	{ "LQIATNLQ",		0x02, 0x02 },
338	{ "LQIBADLQT",		0x04, 0x04 },
339	{ "LQICRCT2",		0x08, 0x08 },
340	{ "LQICRCT1",		0x10, 0x10 },
341	{ "LQIATNQAS",		0x20, 0x20 }
342};
343
344int
345ahd_lqistat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
346{
347	return (ahd_print_register(LQISTAT0_parse_table, 6, "LQISTAT0",
348	    0x50, regvalue, cur_col, wrap));
349}
350
351static const ahd_reg_parse_entry_t LQISTAT1_parse_table[] = {
352	{ "LQIOVERI_NLQ",	0x01, 0x01 },
353	{ "LQIOVERI_LQ",	0x02, 0x02 },
354	{ "LQIBADLQI",		0x04, 0x04 },
355	{ "LQICRCI_NLQ",	0x08, 0x08 },
356	{ "LQICRCI_LQ",		0x10, 0x10 },
357	{ "LQIABORT",		0x20, 0x20 },
358	{ "LQIPHASE_NLQ",	0x40, 0x40 },
359	{ "LQIPHASE_LQ",	0x80, 0x80 }
360};
361
362int
363ahd_lqistat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
364{
365	return (ahd_print_register(LQISTAT1_parse_table, 8, "LQISTAT1",
366	    0x51, regvalue, cur_col, wrap));
367}
368
369static const ahd_reg_parse_entry_t LQISTAT2_parse_table[] = {
370	{ "LQIGSAVAIL",		0x01, 0x01 },
371	{ "LQISTOPCMD",		0x02, 0x02 },
372	{ "LQISTOPLQ",		0x04, 0x04 },
373	{ "LQISTOPPKT",		0x08, 0x08 },
374	{ "LQIWAITFIFO",	0x10, 0x10 },
375	{ "LQIWORKONLQ",	0x20, 0x20 },
376	{ "LQIPHASE_OUTPKT",	0x40, 0x40 },
377	{ "PACKETIZED",		0x80, 0x80 }
378};
379
380int
381ahd_lqistat2_print(u_int regvalue, u_int *cur_col, u_int wrap)
382{
383	return (ahd_print_register(LQISTAT2_parse_table, 8, "LQISTAT2",
384	    0x52, regvalue, cur_col, wrap));
385}
386
387static const ahd_reg_parse_entry_t SSTAT3_parse_table[] = {
388	{ "OSRAMPERR",		0x01, 0x01 },
389	{ "NTRAMPERR",		0x02, 0x02 }
390};
391
392int
393ahd_sstat3_print(u_int regvalue, u_int *cur_col, u_int wrap)
394{
395	return (ahd_print_register(SSTAT3_parse_table, 2, "SSTAT3",
396	    0x53, regvalue, cur_col, wrap));
397}
398
399static const ahd_reg_parse_entry_t LQOSTAT0_parse_table[] = {
400	{ "LQOTCRC",		0x01, 0x01 },
401	{ "LQOATNPKT",		0x02, 0x02 },
402	{ "LQOATNLQ",		0x04, 0x04 },
403	{ "LQOSTOPT2",		0x08, 0x08 },
404	{ "LQOTARGSCBPERR",	0x10, 0x10 }
405};
406
407int
408ahd_lqostat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
409{
410	return (ahd_print_register(LQOSTAT0_parse_table, 5, "LQOSTAT0",
411	    0x54, regvalue, cur_col, wrap));
412}
413
414static const ahd_reg_parse_entry_t LQOSTAT1_parse_table[] = {
415	{ "LQOPHACHGINPKT",	0x01, 0x01 },
416	{ "LQOBUSFREE",		0x02, 0x02 },
417	{ "LQOBADQAS",		0x04, 0x04 },
418	{ "LQOSTOPI2",		0x08, 0x08 },
419	{ "LQOINITSCBPERR",	0x10, 0x10 }
420};
421
422int
423ahd_lqostat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
424{
425	return (ahd_print_register(LQOSTAT1_parse_table, 5, "LQOSTAT1",
426	    0x55, regvalue, cur_col, wrap));
427}
428
429static const ahd_reg_parse_entry_t LQOSTAT2_parse_table[] = {
430	{ "LQOSTOP0",		0x01, 0x01 },
431	{ "LQOPHACHGOUTPKT",	0x02, 0x02 },
432	{ "LQOWAITFIFO",	0x10, 0x10 },
433	{ "LQOPKT",		0xe0, 0xe0 }
434};
435
436int
437ahd_lqostat2_print(u_int regvalue, u_int *cur_col, u_int wrap)
438{
439	return (ahd_print_register(LQOSTAT2_parse_table, 4, "LQOSTAT2",
440	    0x56, regvalue, cur_col, wrap));
441}
442
443static const ahd_reg_parse_entry_t SIMODE1_parse_table[] = {
444	{ "ENREQINIT",		0x01, 0x01 },
445	{ "ENSTRB2FAST",	0x02, 0x02 },
446	{ "ENSCSIPERR",		0x04, 0x04 },
447	{ "ENBUSFREE",		0x08, 0x08 },
448	{ "ENPHASEMIS",		0x10, 0x10 },
449	{ "ENSCSIRST",		0x20, 0x20 },
450	{ "ENATNTARG",		0x40, 0x40 },
451	{ "ENSELTIMO",		0x80, 0x80 }
452};
453
454int
455ahd_simode1_print(u_int regvalue, u_int *cur_col, u_int wrap)
456{
457	return (ahd_print_register(SIMODE1_parse_table, 8, "SIMODE1",
458	    0x57, regvalue, cur_col, wrap));
459}
460
461static const ahd_reg_parse_entry_t DFFSXFRCTL_parse_table[] = {
462	{ "RSTCHN",		0x01, 0x01 },
463	{ "CLRCHN",		0x02, 0x02 },
464	{ "CLRSHCNT",		0x04, 0x04 },
465	{ "DFFBITBUCKET",	0x08, 0x08 }
466};
467
468int
469ahd_dffsxfrctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
470{
471	return (ahd_print_register(DFFSXFRCTL_parse_table, 4, "DFFSXFRCTL",
472	    0x5a, regvalue, cur_col, wrap));
473}
474
475static const ahd_reg_parse_entry_t SEQINTSRC_parse_table[] = {
476	{ "CFG4TCMD",		0x01, 0x01 },
477	{ "CFG4ICMD",		0x02, 0x02 },
478	{ "CFG4TSTAT",		0x04, 0x04 },
479	{ "CFG4ISTAT",		0x08, 0x08 },
480	{ "CFG4DATA",		0x10, 0x10 },
481	{ "SAVEPTRS",		0x20, 0x20 },
482	{ "CTXTDONE",		0x40, 0x40 }
483};
484
485int
486ahd_seqintsrc_print(u_int regvalue, u_int *cur_col, u_int wrap)
487{
488	return (ahd_print_register(SEQINTSRC_parse_table, 7, "SEQINTSRC",
489	    0x5b, regvalue, cur_col, wrap));
490}
491
492static const ahd_reg_parse_entry_t SEQIMODE_parse_table[] = {
493	{ "ENCFG4TCMD",		0x01, 0x01 },
494	{ "ENCFG4ICMD",		0x02, 0x02 },
495	{ "ENCFG4TSTAT",	0x04, 0x04 },
496	{ "ENCFG4ISTAT",	0x08, 0x08 },
497	{ "ENCFG4DATA",		0x10, 0x10 },
498	{ "ENSAVEPTRS",		0x20, 0x20 },
499	{ "ENCTXTDONE",		0x40, 0x40 }
500};
501
502int
503ahd_seqimode_print(u_int regvalue, u_int *cur_col, u_int wrap)
504{
505	return (ahd_print_register(SEQIMODE_parse_table, 7, "SEQIMODE",
506	    0x5c, regvalue, cur_col, wrap));
507}
508
509static const ahd_reg_parse_entry_t MDFFSTAT_parse_table[] = {
510	{ "FIFOFREE",		0x01, 0x01 },
511	{ "DATAINFIFO",		0x02, 0x02 },
512	{ "DLZERO",		0x04, 0x04 },
513	{ "SHVALID",		0x08, 0x08 },
514	{ "LASTSDONE",		0x10, 0x10 },
515	{ "SHCNTMINUS1",	0x20, 0x20 },
516	{ "SHCNTNEGATIVE",	0x40, 0x40 }
517};
518
519int
520ahd_mdffstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
521{
522	return (ahd_print_register(MDFFSTAT_parse_table, 7, "MDFFSTAT",
523	    0x5d, regvalue, cur_col, wrap));
524}
525
526int
527ahd_seloid_print(u_int regvalue, u_int *cur_col, u_int wrap)
528{
529	return (ahd_print_register(NULL, 0, "SELOID",
530	    0x6b, regvalue, cur_col, wrap));
531}
532
533static const ahd_reg_parse_entry_t SG_STATE_parse_table[] = {
534	{ "SEGS_AVAIL",		0x01, 0x01 },
535	{ "LOADING_NEEDED",	0x02, 0x02 },
536	{ "FETCH_INPROG",	0x04, 0x04 }
537};
538
539int
540ahd_sg_state_print(u_int regvalue, u_int *cur_col, u_int wrap)
541{
542	return (ahd_print_register(SG_STATE_parse_table, 3, "SG_STATE",
543	    0xa6, regvalue, cur_col, wrap));
544}
545
546static const ahd_reg_parse_entry_t CCSCBCTL_parse_table[] = {
547	{ "CCSCBRESET",		0x01, 0x01 },
548	{ "CCSCBDIR",		0x04, 0x04 },
549	{ "CCSCBEN",		0x08, 0x08 },
550	{ "CCARREN",		0x10, 0x10 },
551	{ "ARRDONE",		0x40, 0x40 },
552	{ "CCSCBDONE",		0x80, 0x80 }
553};
554
555int
556ahd_ccscbctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
557{
558	return (ahd_print_register(CCSCBCTL_parse_table, 6, "CCSCBCTL",
559	    0xad, regvalue, cur_col, wrap));
560}
561
562static const ahd_reg_parse_entry_t CCSGCTL_parse_table[] = {
563	{ "CCSGRESET",		0x01, 0x01 },
564	{ "SG_FETCH_REQ",	0x02, 0x02 },
565	{ "CCSGENACK",		0x08, 0x08 },
566	{ "SG_CACHE_AVAIL",	0x10, 0x10 },
567	{ "CCSGDONE",		0x80, 0x80 },
568	{ "CCSGEN",		0x0c, 0x0c }
569};
570
571int
572ahd_ccsgctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
573{
574	return (ahd_print_register(CCSGCTL_parse_table, 6, "CCSGCTL",
575	    0xad, regvalue, cur_col, wrap));
576}
577
578static const ahd_reg_parse_entry_t SEQCTL0_parse_table[] = {
579	{ "LOADRAM",		0x01, 0x01 },
580	{ "SEQRESET",		0x02, 0x02 },
581	{ "STEP",		0x04, 0x04 },
582	{ "BRKADRINTEN",	0x08, 0x08 },
583	{ "FASTMODE",		0x10, 0x10 },
584	{ "FAILDIS",		0x20, 0x20 },
585	{ "PAUSEDIS",		0x40, 0x40 },
586	{ "PERRORDIS",		0x80, 0x80 }
587};
588
589int
590ahd_seqctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
591{
592	return (ahd_print_register(SEQCTL0_parse_table, 8, "SEQCTL0",
593	    0xd6, regvalue, cur_col, wrap));
594}
595
596static const ahd_reg_parse_entry_t SEQINTCTL_parse_table[] = {
597	{ "IRET",		0x01, 0x01 },
598	{ "INTMASK1",		0x02, 0x02 },
599	{ "INTMASK2",		0x04, 0x04 },
600	{ "SCS_SEQ_INT1M0",	0x08, 0x08 },
601	{ "SCS_SEQ_INT1M1",	0x10, 0x10 },
602	{ "INT1_CONTEXT",	0x20, 0x20 },
603	{ "INTVEC1DSL",		0x80, 0x80 }
604};
605
606int
607ahd_seqintctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
608{
609	return (ahd_print_register(SEQINTCTL_parse_table, 7, "SEQINTCTL",
610	    0xd9, regvalue, cur_col, wrap));
611}
612
613int
614ahd_sram_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
615{
616	return (ahd_print_register(NULL, 0, "SRAM_BASE",
617	    0x100, regvalue, cur_col, wrap));
618}
619
620int
621ahd_qfreeze_count_print(u_int regvalue, u_int *cur_col, u_int wrap)
622{
623	return (ahd_print_register(NULL, 0, "QFREEZE_COUNT",
624	    0x132, regvalue, cur_col, wrap));
625}
626
627int
628ahd_kernel_qfreeze_count_print(u_int regvalue, u_int *cur_col, u_int wrap)
629{
630	return (ahd_print_register(NULL, 0, "KERNEL_QFREEZE_COUNT",
631	    0x134, regvalue, cur_col, wrap));
632}
633
634int
635ahd_saved_mode_print(u_int regvalue, u_int *cur_col, u_int wrap)
636{
637	return (ahd_print_register(NULL, 0, "SAVED_MODE",
638	    0x136, regvalue, cur_col, wrap));
639}
640
641static const ahd_reg_parse_entry_t SEQ_FLAGS_parse_table[] = {
642	{ "NO_DISCONNECT",	0x01, 0x01 },
643	{ "SPHASE_PENDING",	0x02, 0x02 },
644	{ "DPHASE_PENDING",	0x04, 0x04 },
645	{ "CMDPHASE_PENDING",	0x08, 0x08 },
646	{ "TARG_CMD_PENDING",	0x10, 0x10 },
647	{ "DPHASE",		0x20, 0x20 },
648	{ "NO_CDB_SENT",	0x40, 0x40 },
649	{ "TARGET_CMD_IS_TAGGED",0x40, 0x40 },
650	{ "NOT_IDENTIFIED",	0x80, 0x80 }
651};
652
653int
654ahd_seq_flags_print(u_int regvalue, u_int *cur_col, u_int wrap)
655{
656	return (ahd_print_register(SEQ_FLAGS_parse_table, 9, "SEQ_FLAGS",
657	    0x139, regvalue, cur_col, wrap));
658}
659
660static const ahd_reg_parse_entry_t LASTPHASE_parse_table[] = {
661	{ "P_DATAOUT",		0x00, 0xe0 },
662	{ "P_DATAOUT_DT",	0x20, 0xe0 },
663	{ "P_DATAIN",		0x40, 0xe0 },
664	{ "P_DATAIN_DT",	0x60, 0xe0 },
665	{ "P_COMMAND",		0x80, 0xe0 },
666	{ "P_MESGOUT",		0xa0, 0xe0 },
667	{ "P_STATUS",		0xc0, 0xe0 },
668	{ "P_MESGIN",		0xe0, 0xe0 },
669	{ "P_BUSFREE",		0x01, 0x01 },
670	{ "MSGI",		0x20, 0x20 },
671	{ "IOI",		0x40, 0x40 },
672	{ "CDI",		0x80, 0x80 },
673	{ "PHASE_MASK",		0xe0, 0xe0 }
674};
675
676int
677ahd_lastphase_print(u_int regvalue, u_int *cur_col, u_int wrap)
678{
679	return (ahd_print_register(LASTPHASE_parse_table, 13, "LASTPHASE",
680	    0x13c, regvalue, cur_col, wrap));
681}
682
683static const ahd_reg_parse_entry_t SEQ_FLAGS2_parse_table[] = {
684	{ "PENDING_MK_MESSAGE",	0x01, 0x01 },
685	{ "TARGET_MSG_PENDING",	0x02, 0x02 },
686	{ "SELECTOUT_QFROZEN",	0x04, 0x04 }
687};
688
689int
690ahd_seq_flags2_print(u_int regvalue, u_int *cur_col, u_int wrap)
691{
692	return (ahd_print_register(SEQ_FLAGS2_parse_table, 3, "SEQ_FLAGS2",
693	    0x14d, regvalue, cur_col, wrap));
694}
695
696int
697ahd_mk_message_scb_print(u_int regvalue, u_int *cur_col, u_int wrap)
698{
699	return (ahd_print_register(NULL, 0, "MK_MESSAGE_SCB",
700	    0x160, regvalue, cur_col, wrap));
701}
702
703int
704ahd_mk_message_scsiid_print(u_int regvalue, u_int *cur_col, u_int wrap)
705{
706	return (ahd_print_register(NULL, 0, "MK_MESSAGE_SCSIID",
707	    0x162, regvalue, cur_col, wrap));
708}
709
710int
711ahd_scb_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
712{
713	return (ahd_print_register(NULL, 0, "SCB_BASE",
714	    0x180, regvalue, cur_col, wrap));
715}
716
717static const ahd_reg_parse_entry_t SCB_CONTROL_parse_table[] = {
718	{ "SCB_TAG_TYPE",	0x03, 0x03 },
719	{ "DISCONNECTED",	0x04, 0x04 },
720	{ "STATUS_RCVD",	0x08, 0x08 },
721	{ "MK_MESSAGE",		0x10, 0x10 },
722	{ "TAG_ENB",		0x20, 0x20 },
723	{ "DISCENB",		0x40, 0x40 },
724	{ "TARGET_SCB",		0x80, 0x80 }
725};
726
727int
728ahd_scb_control_print(u_int regvalue, u_int *cur_col, u_int wrap)
729{
730	return (ahd_print_register(SCB_CONTROL_parse_table, 7, "SCB_CONTROL",
731	    0x192, regvalue, cur_col, wrap));
732}
733
734static const ahd_reg_parse_entry_t SCB_SCSIID_parse_table[] = {
735	{ "OID",		0x0f, 0x0f },
736	{ "TID",		0xf0, 0xf0 }
737};
738
739int
740ahd_scb_scsiid_print(u_int regvalue, u_int *cur_col, u_int wrap)
741{
742	return (ahd_print_register(SCB_SCSIID_parse_table, 2, "SCB_SCSIID",
743	    0x193, regvalue, cur_col, wrap));
744}
745