/drivers/scsi/megaraid/megaraid_sas_fp.c

http://github.com/mirrors/linux · C · 1422 lines · 1025 code · 166 blank · 231 comment · 221 complexity · 1ccb2c5259a8e6efa1570bd50cafb13f MD5 · raw file

  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Linux MegaRAID driver for SAS based RAID controllers
  4. *
  5. * Copyright (c) 2009-2013 LSI Corporation
  6. * Copyright (c) 2013-2016 Avago Technologies
  7. * Copyright (c) 2016-2018 Broadcom Inc.
  8. *
  9. * FILE: megaraid_sas_fp.c
  10. *
  11. * Authors: Broadcom Inc.
  12. * Sumant Patro
  13. * Varad Talamacki
  14. * Manoj Jose
  15. * Kashyap Desai <kashyap.desai@broadcom.com>
  16. * Sumit Saxena <sumit.saxena@broadcom.com>
  17. *
  18. * Send feedback to: megaraidlinux.pdl@broadcom.com
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/types.h>
  22. #include <linux/pci.h>
  23. #include <linux/list.h>
  24. #include <linux/moduleparam.h>
  25. #include <linux/module.h>
  26. #include <linux/spinlock.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/delay.h>
  29. #include <linux/uio.h>
  30. #include <linux/uaccess.h>
  31. #include <linux/fs.h>
  32. #include <linux/compat.h>
  33. #include <linux/blkdev.h>
  34. #include <linux/poll.h>
  35. #include <linux/irq_poll.h>
  36. #include <scsi/scsi.h>
  37. #include <scsi/scsi_cmnd.h>
  38. #include <scsi/scsi_device.h>
  39. #include <scsi/scsi_host.h>
  40. #include "megaraid_sas_fusion.h"
  41. #include "megaraid_sas.h"
  42. #include <asm/div64.h>
  43. #define LB_PENDING_CMDS_DEFAULT 4
  44. static unsigned int lb_pending_cmds = LB_PENDING_CMDS_DEFAULT;
  45. module_param(lb_pending_cmds, int, 0444);
  46. MODULE_PARM_DESC(lb_pending_cmds, "Change raid-1 load balancing outstanding "
  47. "threshold. Valid Values are 1-128. Default: 4");
  48. #define ABS_DIFF(a, b) (((a) > (b)) ? ((a) - (b)) : ((b) - (a)))
  49. #define MR_LD_STATE_OPTIMAL 3
  50. #define SPAN_ROW_SIZE(map, ld, index_) (MR_LdSpanPtrGet(ld, index_, map)->spanRowSize)
  51. #define SPAN_ROW_DATA_SIZE(map_, ld, index_) (MR_LdSpanPtrGet(ld, index_, map)->spanRowDataSize)
  52. #define SPAN_INVALID 0xff
  53. /* Prototypes */
  54. static void mr_update_span_set(struct MR_DRV_RAID_MAP_ALL *map,
  55. PLD_SPAN_INFO ldSpanInfo);
  56. static u8 mr_spanset_get_phy_params(struct megasas_instance *instance, u32 ld,
  57. u64 stripRow, u16 stripRef, struct IO_REQUEST_INFO *io_info,
  58. struct RAID_CONTEXT *pRAID_Context, struct MR_DRV_RAID_MAP_ALL *map);
  59. static u64 get_row_from_strip(struct megasas_instance *instance, u32 ld,
  60. u64 strip, struct MR_DRV_RAID_MAP_ALL *map);
  61. u32 mega_mod64(u64 dividend, u32 divisor)
  62. {
  63. u64 d;
  64. u32 remainder;
  65. if (!divisor)
  66. printk(KERN_ERR "megasas : DIVISOR is zero, in div fn\n");
  67. d = dividend;
  68. remainder = do_div(d, divisor);
  69. return remainder;
  70. }
  71. /**
  72. * @param dividend : Dividend
  73. * @param divisor : Divisor
  74. *
  75. * @return quotient
  76. **/
  77. u64 mega_div64_32(uint64_t dividend, uint32_t divisor)
  78. {
  79. u32 remainder;
  80. u64 d;
  81. if (!divisor)
  82. printk(KERN_ERR "megasas : DIVISOR is zero in mod fn\n");
  83. d = dividend;
  84. remainder = do_div(d, divisor);
  85. return d;
  86. }
  87. struct MR_LD_RAID *MR_LdRaidGet(u32 ld, struct MR_DRV_RAID_MAP_ALL *map)
  88. {
  89. return &map->raidMap.ldSpanMap[ld].ldRaid;
  90. }
  91. static struct MR_SPAN_BLOCK_INFO *MR_LdSpanInfoGet(u32 ld,
  92. struct MR_DRV_RAID_MAP_ALL
  93. *map)
  94. {
  95. return &map->raidMap.ldSpanMap[ld].spanBlock[0];
  96. }
  97. static u8 MR_LdDataArmGet(u32 ld, u32 armIdx, struct MR_DRV_RAID_MAP_ALL *map)
  98. {
  99. return map->raidMap.ldSpanMap[ld].dataArmMap[armIdx];
  100. }
  101. u16 MR_ArPdGet(u32 ar, u32 arm, struct MR_DRV_RAID_MAP_ALL *map)
  102. {
  103. return le16_to_cpu(map->raidMap.arMapInfo[ar].pd[arm]);
  104. }
  105. u16 MR_LdSpanArrayGet(u32 ld, u32 span, struct MR_DRV_RAID_MAP_ALL *map)
  106. {
  107. return le16_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].span.arrayRef);
  108. }
  109. __le16 MR_PdDevHandleGet(u32 pd, struct MR_DRV_RAID_MAP_ALL *map)
  110. {
  111. return map->raidMap.devHndlInfo[pd].curDevHdl;
  112. }
  113. static u8 MR_PdInterfaceTypeGet(u32 pd, struct MR_DRV_RAID_MAP_ALL *map)
  114. {
  115. return map->raidMap.devHndlInfo[pd].interfaceType;
  116. }
  117. u16 MR_GetLDTgtId(u32 ld, struct MR_DRV_RAID_MAP_ALL *map)
  118. {
  119. return le16_to_cpu(map->raidMap.ldSpanMap[ld].ldRaid.targetId);
  120. }
  121. u16 MR_TargetIdToLdGet(u32 ldTgtId, struct MR_DRV_RAID_MAP_ALL *map)
  122. {
  123. return map->raidMap.ldTgtIdToLd[ldTgtId];
  124. }
  125. static struct MR_LD_SPAN *MR_LdSpanPtrGet(u32 ld, u32 span,
  126. struct MR_DRV_RAID_MAP_ALL *map)
  127. {
  128. return &map->raidMap.ldSpanMap[ld].spanBlock[span].span;
  129. }
  130. /*
  131. * This function will Populate Driver Map using firmware raid map
  132. */
  133. static int MR_PopulateDrvRaidMap(struct megasas_instance *instance, u64 map_id)
  134. {
  135. struct fusion_context *fusion = instance->ctrl_context;
  136. struct MR_FW_RAID_MAP_ALL *fw_map_old = NULL;
  137. struct MR_FW_RAID_MAP *pFwRaidMap = NULL;
  138. int i, j;
  139. u16 ld_count;
  140. struct MR_FW_RAID_MAP_DYNAMIC *fw_map_dyn;
  141. struct MR_FW_RAID_MAP_EXT *fw_map_ext;
  142. struct MR_RAID_MAP_DESC_TABLE *desc_table;
  143. struct MR_DRV_RAID_MAP_ALL *drv_map =
  144. fusion->ld_drv_map[(map_id & 1)];
  145. struct MR_DRV_RAID_MAP *pDrvRaidMap = &drv_map->raidMap;
  146. void *raid_map_data = NULL;
  147. memset(drv_map, 0, fusion->drv_map_sz);
  148. memset(pDrvRaidMap->ldTgtIdToLd,
  149. 0xff, (sizeof(u16) * MAX_LOGICAL_DRIVES_DYN));
  150. if (instance->max_raid_mapsize) {
  151. fw_map_dyn = fusion->ld_map[(map_id & 1)];
  152. desc_table =
  153. (struct MR_RAID_MAP_DESC_TABLE *)((void *)fw_map_dyn + le32_to_cpu(fw_map_dyn->desc_table_offset));
  154. if (desc_table != fw_map_dyn->raid_map_desc_table)
  155. dev_dbg(&instance->pdev->dev, "offsets of desc table are not matching desc %p original %p\n",
  156. desc_table, fw_map_dyn->raid_map_desc_table);
  157. ld_count = (u16)le16_to_cpu(fw_map_dyn->ld_count);
  158. pDrvRaidMap->ldCount = (__le16)cpu_to_le16(ld_count);
  159. pDrvRaidMap->fpPdIoTimeoutSec =
  160. fw_map_dyn->fp_pd_io_timeout_sec;
  161. pDrvRaidMap->totalSize =
  162. cpu_to_le32(sizeof(struct MR_DRV_RAID_MAP_ALL));
  163. /* point to actual data starting point*/
  164. raid_map_data = (void *)fw_map_dyn +
  165. le32_to_cpu(fw_map_dyn->desc_table_offset) +
  166. le32_to_cpu(fw_map_dyn->desc_table_size);
  167. for (i = 0; i < le32_to_cpu(fw_map_dyn->desc_table_num_elements); ++i) {
  168. switch (le32_to_cpu(desc_table->raid_map_desc_type)) {
  169. case RAID_MAP_DESC_TYPE_DEVHDL_INFO:
  170. fw_map_dyn->dev_hndl_info =
  171. (struct MR_DEV_HANDLE_INFO *)(raid_map_data + le32_to_cpu(desc_table->raid_map_desc_offset));
  172. memcpy(pDrvRaidMap->devHndlInfo,
  173. fw_map_dyn->dev_hndl_info,
  174. sizeof(struct MR_DEV_HANDLE_INFO) *
  175. le32_to_cpu(desc_table->raid_map_desc_elements));
  176. break;
  177. case RAID_MAP_DESC_TYPE_TGTID_INFO:
  178. fw_map_dyn->ld_tgt_id_to_ld =
  179. (u16 *)(raid_map_data +
  180. le32_to_cpu(desc_table->raid_map_desc_offset));
  181. for (j = 0; j < le32_to_cpu(desc_table->raid_map_desc_elements); j++) {
  182. pDrvRaidMap->ldTgtIdToLd[j] =
  183. le16_to_cpu(fw_map_dyn->ld_tgt_id_to_ld[j]);
  184. }
  185. break;
  186. case RAID_MAP_DESC_TYPE_ARRAY_INFO:
  187. fw_map_dyn->ar_map_info =
  188. (struct MR_ARRAY_INFO *)
  189. (raid_map_data + le32_to_cpu(desc_table->raid_map_desc_offset));
  190. memcpy(pDrvRaidMap->arMapInfo,
  191. fw_map_dyn->ar_map_info,
  192. sizeof(struct MR_ARRAY_INFO) *
  193. le32_to_cpu(desc_table->raid_map_desc_elements));
  194. break;
  195. case RAID_MAP_DESC_TYPE_SPAN_INFO:
  196. fw_map_dyn->ld_span_map =
  197. (struct MR_LD_SPAN_MAP *)
  198. (raid_map_data +
  199. le32_to_cpu(desc_table->raid_map_desc_offset));
  200. memcpy(pDrvRaidMap->ldSpanMap,
  201. fw_map_dyn->ld_span_map,
  202. sizeof(struct MR_LD_SPAN_MAP) *
  203. le32_to_cpu(desc_table->raid_map_desc_elements));
  204. break;
  205. default:
  206. dev_dbg(&instance->pdev->dev, "wrong number of desctableElements %d\n",
  207. fw_map_dyn->desc_table_num_elements);
  208. }
  209. ++desc_table;
  210. }
  211. } else if (instance->supportmax256vd) {
  212. fw_map_ext =
  213. (struct MR_FW_RAID_MAP_EXT *)fusion->ld_map[(map_id & 1)];
  214. ld_count = (u16)le16_to_cpu(fw_map_ext->ldCount);
  215. if (ld_count > MAX_LOGICAL_DRIVES_EXT) {
  216. dev_dbg(&instance->pdev->dev, "megaraid_sas: LD count exposed in RAID map in not valid\n");
  217. return 1;
  218. }
  219. pDrvRaidMap->ldCount = (__le16)cpu_to_le16(ld_count);
  220. pDrvRaidMap->fpPdIoTimeoutSec = fw_map_ext->fpPdIoTimeoutSec;
  221. for (i = 0; i < (MAX_LOGICAL_DRIVES_EXT); i++)
  222. pDrvRaidMap->ldTgtIdToLd[i] =
  223. (u16)fw_map_ext->ldTgtIdToLd[i];
  224. memcpy(pDrvRaidMap->ldSpanMap, fw_map_ext->ldSpanMap,
  225. sizeof(struct MR_LD_SPAN_MAP) * ld_count);
  226. memcpy(pDrvRaidMap->arMapInfo, fw_map_ext->arMapInfo,
  227. sizeof(struct MR_ARRAY_INFO) * MAX_API_ARRAYS_EXT);
  228. memcpy(pDrvRaidMap->devHndlInfo, fw_map_ext->devHndlInfo,
  229. sizeof(struct MR_DEV_HANDLE_INFO) *
  230. MAX_RAIDMAP_PHYSICAL_DEVICES);
  231. /* New Raid map will not set totalSize, so keep expected value
  232. * for legacy code in ValidateMapInfo
  233. */
  234. pDrvRaidMap->totalSize =
  235. cpu_to_le32(sizeof(struct MR_FW_RAID_MAP_EXT));
  236. } else {
  237. fw_map_old = (struct MR_FW_RAID_MAP_ALL *)
  238. fusion->ld_map[(map_id & 1)];
  239. pFwRaidMap = &fw_map_old->raidMap;
  240. ld_count = (u16)le32_to_cpu(pFwRaidMap->ldCount);
  241. if (ld_count > MAX_LOGICAL_DRIVES) {
  242. dev_dbg(&instance->pdev->dev,
  243. "LD count exposed in RAID map in not valid\n");
  244. return 1;
  245. }
  246. pDrvRaidMap->totalSize = pFwRaidMap->totalSize;
  247. pDrvRaidMap->ldCount = (__le16)cpu_to_le16(ld_count);
  248. pDrvRaidMap->fpPdIoTimeoutSec = pFwRaidMap->fpPdIoTimeoutSec;
  249. for (i = 0; i < MAX_RAIDMAP_LOGICAL_DRIVES + MAX_RAIDMAP_VIEWS; i++)
  250. pDrvRaidMap->ldTgtIdToLd[i] =
  251. (u8)pFwRaidMap->ldTgtIdToLd[i];
  252. for (i = 0; i < ld_count; i++) {
  253. pDrvRaidMap->ldSpanMap[i] = pFwRaidMap->ldSpanMap[i];
  254. }
  255. memcpy(pDrvRaidMap->arMapInfo, pFwRaidMap->arMapInfo,
  256. sizeof(struct MR_ARRAY_INFO) * MAX_RAIDMAP_ARRAYS);
  257. memcpy(pDrvRaidMap->devHndlInfo, pFwRaidMap->devHndlInfo,
  258. sizeof(struct MR_DEV_HANDLE_INFO) *
  259. MAX_RAIDMAP_PHYSICAL_DEVICES);
  260. }
  261. return 0;
  262. }
  263. /*
  264. * This function will validate Map info data provided by FW
  265. */
  266. u8 MR_ValidateMapInfo(struct megasas_instance *instance, u64 map_id)
  267. {
  268. struct fusion_context *fusion;
  269. struct MR_DRV_RAID_MAP_ALL *drv_map;
  270. struct MR_DRV_RAID_MAP *pDrvRaidMap;
  271. struct LD_LOAD_BALANCE_INFO *lbInfo;
  272. PLD_SPAN_INFO ldSpanInfo;
  273. struct MR_LD_RAID *raid;
  274. u16 num_lds, i;
  275. u16 ld;
  276. u32 expected_size;
  277. if (MR_PopulateDrvRaidMap(instance, map_id))
  278. return 0;
  279. fusion = instance->ctrl_context;
  280. drv_map = fusion->ld_drv_map[(map_id & 1)];
  281. pDrvRaidMap = &drv_map->raidMap;
  282. lbInfo = fusion->load_balance_info;
  283. ldSpanInfo = fusion->log_to_span;
  284. if (instance->max_raid_mapsize)
  285. expected_size = sizeof(struct MR_DRV_RAID_MAP_ALL);
  286. else if (instance->supportmax256vd)
  287. expected_size = sizeof(struct MR_FW_RAID_MAP_EXT);
  288. else
  289. expected_size =
  290. (sizeof(struct MR_FW_RAID_MAP) - sizeof(struct MR_LD_SPAN_MAP) +
  291. (sizeof(struct MR_LD_SPAN_MAP) * le16_to_cpu(pDrvRaidMap->ldCount)));
  292. if (le32_to_cpu(pDrvRaidMap->totalSize) != expected_size) {
  293. dev_dbg(&instance->pdev->dev, "megasas: map info structure size 0x%x",
  294. le32_to_cpu(pDrvRaidMap->totalSize));
  295. dev_dbg(&instance->pdev->dev, "is not matching expected size 0x%x\n",
  296. (unsigned int)expected_size);
  297. dev_err(&instance->pdev->dev, "megasas: span map %x, pDrvRaidMap->totalSize : %x\n",
  298. (unsigned int)sizeof(struct MR_LD_SPAN_MAP),
  299. le32_to_cpu(pDrvRaidMap->totalSize));
  300. return 0;
  301. }
  302. if (instance->UnevenSpanSupport)
  303. mr_update_span_set(drv_map, ldSpanInfo);
  304. if (lbInfo)
  305. mr_update_load_balance_params(drv_map, lbInfo);
  306. num_lds = le16_to_cpu(drv_map->raidMap.ldCount);
  307. /*Convert Raid capability values to CPU arch */
  308. for (i = 0; (num_lds > 0) && (i < MAX_LOGICAL_DRIVES_EXT); i++) {
  309. ld = MR_TargetIdToLdGet(i, drv_map);
  310. /* For non existing VDs, iterate to next VD*/
  311. if (ld >= (MAX_LOGICAL_DRIVES_EXT - 1))
  312. continue;
  313. raid = MR_LdRaidGet(ld, drv_map);
  314. le32_to_cpus((u32 *)&raid->capability);
  315. num_lds--;
  316. }
  317. return 1;
  318. }
  319. u32 MR_GetSpanBlock(u32 ld, u64 row, u64 *span_blk,
  320. struct MR_DRV_RAID_MAP_ALL *map)
  321. {
  322. struct MR_SPAN_BLOCK_INFO *pSpanBlock = MR_LdSpanInfoGet(ld, map);
  323. struct MR_QUAD_ELEMENT *quad;
  324. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  325. u32 span, j;
  326. for (span = 0; span < raid->spanDepth; span++, pSpanBlock++) {
  327. for (j = 0; j < le32_to_cpu(pSpanBlock->block_span_info.noElements); j++) {
  328. quad = &pSpanBlock->block_span_info.quad[j];
  329. if (le32_to_cpu(quad->diff) == 0)
  330. return SPAN_INVALID;
  331. if (le64_to_cpu(quad->logStart) <= row && row <=
  332. le64_to_cpu(quad->logEnd) && (mega_mod64(row - le64_to_cpu(quad->logStart),
  333. le32_to_cpu(quad->diff))) == 0) {
  334. if (span_blk != NULL) {
  335. u64 blk;
  336. blk = mega_div64_32((row-le64_to_cpu(quad->logStart)), le32_to_cpu(quad->diff));
  337. blk = (blk + le64_to_cpu(quad->offsetInSpan)) << raid->stripeShift;
  338. *span_blk = blk;
  339. }
  340. return span;
  341. }
  342. }
  343. }
  344. return SPAN_INVALID;
  345. }
  346. /*
  347. ******************************************************************************
  348. *
  349. * This routine calculates the Span block for given row using spanset.
  350. *
  351. * Inputs :
  352. * instance - HBA instance
  353. * ld - Logical drive number
  354. * row - Row number
  355. * map - LD map
  356. *
  357. * Outputs :
  358. *
  359. * span - Span number
  360. * block - Absolute Block number in the physical disk
  361. * div_error - Devide error code.
  362. */
  363. u32 mr_spanset_get_span_block(struct megasas_instance *instance,
  364. u32 ld, u64 row, u64 *span_blk, struct MR_DRV_RAID_MAP_ALL *map)
  365. {
  366. struct fusion_context *fusion = instance->ctrl_context;
  367. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  368. LD_SPAN_SET *span_set;
  369. struct MR_QUAD_ELEMENT *quad;
  370. u32 span, info;
  371. PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
  372. for (info = 0; info < MAX_QUAD_DEPTH; info++) {
  373. span_set = &(ldSpanInfo[ld].span_set[info]);
  374. if (span_set->span_row_data_width == 0)
  375. break;
  376. if (row > span_set->data_row_end)
  377. continue;
  378. for (span = 0; span < raid->spanDepth; span++)
  379. if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
  380. block_span_info.noElements) >= info+1) {
  381. quad = &map->raidMap.ldSpanMap[ld].
  382. spanBlock[span].
  383. block_span_info.quad[info];
  384. if (le32_to_cpu(quad->diff) == 0)
  385. return SPAN_INVALID;
  386. if (le64_to_cpu(quad->logStart) <= row &&
  387. row <= le64_to_cpu(quad->logEnd) &&
  388. (mega_mod64(row - le64_to_cpu(quad->logStart),
  389. le32_to_cpu(quad->diff))) == 0) {
  390. if (span_blk != NULL) {
  391. u64 blk;
  392. blk = mega_div64_32
  393. ((row - le64_to_cpu(quad->logStart)),
  394. le32_to_cpu(quad->diff));
  395. blk = (blk + le64_to_cpu(quad->offsetInSpan))
  396. << raid->stripeShift;
  397. *span_blk = blk;
  398. }
  399. return span;
  400. }
  401. }
  402. }
  403. return SPAN_INVALID;
  404. }
  405. /*
  406. ******************************************************************************
  407. *
  408. * This routine calculates the row for given strip using spanset.
  409. *
  410. * Inputs :
  411. * instance - HBA instance
  412. * ld - Logical drive number
  413. * Strip - Strip
  414. * map - LD map
  415. *
  416. * Outputs :
  417. *
  418. * row - row associated with strip
  419. */
  420. static u64 get_row_from_strip(struct megasas_instance *instance,
  421. u32 ld, u64 strip, struct MR_DRV_RAID_MAP_ALL *map)
  422. {
  423. struct fusion_context *fusion = instance->ctrl_context;
  424. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  425. LD_SPAN_SET *span_set;
  426. PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
  427. u32 info, strip_offset, span, span_offset;
  428. u64 span_set_Strip, span_set_Row, retval;
  429. for (info = 0; info < MAX_QUAD_DEPTH; info++) {
  430. span_set = &(ldSpanInfo[ld].span_set[info]);
  431. if (span_set->span_row_data_width == 0)
  432. break;
  433. if (strip > span_set->data_strip_end)
  434. continue;
  435. span_set_Strip = strip - span_set->data_strip_start;
  436. strip_offset = mega_mod64(span_set_Strip,
  437. span_set->span_row_data_width);
  438. span_set_Row = mega_div64_32(span_set_Strip,
  439. span_set->span_row_data_width) * span_set->diff;
  440. for (span = 0, span_offset = 0; span < raid->spanDepth; span++)
  441. if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
  442. block_span_info.noElements) >= info+1) {
  443. if (strip_offset >=
  444. span_set->strip_offset[span])
  445. span_offset++;
  446. else
  447. break;
  448. }
  449. retval = (span_set->data_row_start + span_set_Row +
  450. (span_offset - 1));
  451. return retval;
  452. }
  453. return -1LLU;
  454. }
  455. /*
  456. ******************************************************************************
  457. *
  458. * This routine calculates the Start Strip for given row using spanset.
  459. *
  460. * Inputs :
  461. * instance - HBA instance
  462. * ld - Logical drive number
  463. * row - Row number
  464. * map - LD map
  465. *
  466. * Outputs :
  467. *
  468. * Strip - Start strip associated with row
  469. */
  470. static u64 get_strip_from_row(struct megasas_instance *instance,
  471. u32 ld, u64 row, struct MR_DRV_RAID_MAP_ALL *map)
  472. {
  473. struct fusion_context *fusion = instance->ctrl_context;
  474. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  475. LD_SPAN_SET *span_set;
  476. struct MR_QUAD_ELEMENT *quad;
  477. PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
  478. u32 span, info;
  479. u64 strip;
  480. for (info = 0; info < MAX_QUAD_DEPTH; info++) {
  481. span_set = &(ldSpanInfo[ld].span_set[info]);
  482. if (span_set->span_row_data_width == 0)
  483. break;
  484. if (row > span_set->data_row_end)
  485. continue;
  486. for (span = 0; span < raid->spanDepth; span++)
  487. if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
  488. block_span_info.noElements) >= info+1) {
  489. quad = &map->raidMap.ldSpanMap[ld].
  490. spanBlock[span].block_span_info.quad[info];
  491. if (le64_to_cpu(quad->logStart) <= row &&
  492. row <= le64_to_cpu(quad->logEnd) &&
  493. mega_mod64((row - le64_to_cpu(quad->logStart)),
  494. le32_to_cpu(quad->diff)) == 0) {
  495. strip = mega_div64_32
  496. (((row - span_set->data_row_start)
  497. - le64_to_cpu(quad->logStart)),
  498. le32_to_cpu(quad->diff));
  499. strip *= span_set->span_row_data_width;
  500. strip += span_set->data_strip_start;
  501. strip += span_set->strip_offset[span];
  502. return strip;
  503. }
  504. }
  505. }
  506. dev_err(&instance->pdev->dev, "get_strip_from_row"
  507. "returns invalid strip for ld=%x, row=%lx\n",
  508. ld, (long unsigned int)row);
  509. return -1;
  510. }
  511. /*
  512. ******************************************************************************
  513. *
  514. * This routine calculates the Physical Arm for given strip using spanset.
  515. *
  516. * Inputs :
  517. * instance - HBA instance
  518. * ld - Logical drive number
  519. * strip - Strip
  520. * map - LD map
  521. *
  522. * Outputs :
  523. *
  524. * Phys Arm - Phys Arm associated with strip
  525. */
  526. static u32 get_arm_from_strip(struct megasas_instance *instance,
  527. u32 ld, u64 strip, struct MR_DRV_RAID_MAP_ALL *map)
  528. {
  529. struct fusion_context *fusion = instance->ctrl_context;
  530. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  531. LD_SPAN_SET *span_set;
  532. PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
  533. u32 info, strip_offset, span, span_offset, retval;
  534. for (info = 0 ; info < MAX_QUAD_DEPTH; info++) {
  535. span_set = &(ldSpanInfo[ld].span_set[info]);
  536. if (span_set->span_row_data_width == 0)
  537. break;
  538. if (strip > span_set->data_strip_end)
  539. continue;
  540. strip_offset = (uint)mega_mod64
  541. ((strip - span_set->data_strip_start),
  542. span_set->span_row_data_width);
  543. for (span = 0, span_offset = 0; span < raid->spanDepth; span++)
  544. if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
  545. block_span_info.noElements) >= info+1) {
  546. if (strip_offset >=
  547. span_set->strip_offset[span])
  548. span_offset =
  549. span_set->strip_offset[span];
  550. else
  551. break;
  552. }
  553. retval = (strip_offset - span_offset);
  554. return retval;
  555. }
  556. dev_err(&instance->pdev->dev, "get_arm_from_strip"
  557. "returns invalid arm for ld=%x strip=%lx\n",
  558. ld, (long unsigned int)strip);
  559. return -1;
  560. }
  561. /* This Function will return Phys arm */
  562. u8 get_arm(struct megasas_instance *instance, u32 ld, u8 span, u64 stripe,
  563. struct MR_DRV_RAID_MAP_ALL *map)
  564. {
  565. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  566. /* Need to check correct default value */
  567. u32 arm = 0;
  568. switch (raid->level) {
  569. case 0:
  570. case 5:
  571. case 6:
  572. arm = mega_mod64(stripe, SPAN_ROW_SIZE(map, ld, span));
  573. break;
  574. case 1:
  575. /* start with logical arm */
  576. arm = get_arm_from_strip(instance, ld, stripe, map);
  577. if (arm != -1U)
  578. arm *= 2;
  579. break;
  580. }
  581. return arm;
  582. }
  583. /*
  584. ******************************************************************************
  585. *
  586. * This routine calculates the arm, span and block for the specified stripe and
  587. * reference in stripe using spanset
  588. *
  589. * Inputs :
  590. *
  591. * ld - Logical drive number
  592. * stripRow - Stripe number
  593. * stripRef - Reference in stripe
  594. *
  595. * Outputs :
  596. *
  597. * span - Span number
  598. * block - Absolute Block number in the physical disk
  599. */
  600. static u8 mr_spanset_get_phy_params(struct megasas_instance *instance, u32 ld,
  601. u64 stripRow, u16 stripRef, struct IO_REQUEST_INFO *io_info,
  602. struct RAID_CONTEXT *pRAID_Context,
  603. struct MR_DRV_RAID_MAP_ALL *map)
  604. {
  605. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  606. u32 pd, arRef, r1_alt_pd;
  607. u8 physArm, span;
  608. u64 row;
  609. u8 retval = true;
  610. u64 *pdBlock = &io_info->pdBlock;
  611. __le16 *pDevHandle = &io_info->devHandle;
  612. u8 *pPdInterface = &io_info->pd_interface;
  613. u32 logArm, rowMod, armQ, arm;
  614. *pDevHandle = cpu_to_le16(MR_DEVHANDLE_INVALID);
  615. /*Get row and span from io_info for Uneven Span IO.*/
  616. row = io_info->start_row;
  617. span = io_info->start_span;
  618. if (raid->level == 6) {
  619. logArm = get_arm_from_strip(instance, ld, stripRow, map);
  620. if (logArm == -1U)
  621. return false;
  622. rowMod = mega_mod64(row, SPAN_ROW_SIZE(map, ld, span));
  623. armQ = SPAN_ROW_SIZE(map, ld, span) - 1 - rowMod;
  624. arm = armQ + 1 + logArm;
  625. if (arm >= SPAN_ROW_SIZE(map, ld, span))
  626. arm -= SPAN_ROW_SIZE(map, ld, span);
  627. physArm = (u8)arm;
  628. } else
  629. /* Calculate the arm */
  630. physArm = get_arm(instance, ld, span, stripRow, map);
  631. if (physArm == 0xFF)
  632. return false;
  633. arRef = MR_LdSpanArrayGet(ld, span, map);
  634. pd = MR_ArPdGet(arRef, physArm, map);
  635. if (pd != MR_PD_INVALID) {
  636. *pDevHandle = MR_PdDevHandleGet(pd, map);
  637. *pPdInterface = MR_PdInterfaceTypeGet(pd, map);
  638. /* get second pd also for raid 1/10 fast path writes*/
  639. if ((instance->adapter_type >= VENTURA_SERIES) &&
  640. (raid->level == 1) &&
  641. !io_info->isRead) {
  642. r1_alt_pd = MR_ArPdGet(arRef, physArm + 1, map);
  643. if (r1_alt_pd != MR_PD_INVALID)
  644. io_info->r1_alt_dev_handle =
  645. MR_PdDevHandleGet(r1_alt_pd, map);
  646. }
  647. } else {
  648. if ((raid->level >= 5) &&
  649. ((instance->adapter_type == THUNDERBOLT_SERIES) ||
  650. ((instance->adapter_type == INVADER_SERIES) &&
  651. (raid->regTypeReqOnRead != REGION_TYPE_UNUSED))))
  652. pRAID_Context->reg_lock_flags = REGION_TYPE_EXCLUSIVE;
  653. else if (raid->level == 1) {
  654. physArm = physArm + 1;
  655. pd = MR_ArPdGet(arRef, physArm, map);
  656. if (pd != MR_PD_INVALID) {
  657. *pDevHandle = MR_PdDevHandleGet(pd, map);
  658. *pPdInterface = MR_PdInterfaceTypeGet(pd, map);
  659. }
  660. }
  661. }
  662. *pdBlock += stripRef + le64_to_cpu(MR_LdSpanPtrGet(ld, span, map)->startBlk);
  663. if (instance->adapter_type >= VENTURA_SERIES) {
  664. ((struct RAID_CONTEXT_G35 *)pRAID_Context)->span_arm =
  665. (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
  666. io_info->span_arm =
  667. (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
  668. } else {
  669. pRAID_Context->span_arm =
  670. (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
  671. io_info->span_arm = pRAID_Context->span_arm;
  672. }
  673. io_info->pd_after_lb = pd;
  674. return retval;
  675. }
  676. /*
  677. ******************************************************************************
  678. *
  679. * This routine calculates the arm, span and block for the specified stripe and
  680. * reference in stripe.
  681. *
  682. * Inputs :
  683. *
  684. * ld - Logical drive number
  685. * stripRow - Stripe number
  686. * stripRef - Reference in stripe
  687. *
  688. * Outputs :
  689. *
  690. * span - Span number
  691. * block - Absolute Block number in the physical disk
  692. */
  693. u8 MR_GetPhyParams(struct megasas_instance *instance, u32 ld, u64 stripRow,
  694. u16 stripRef, struct IO_REQUEST_INFO *io_info,
  695. struct RAID_CONTEXT *pRAID_Context,
  696. struct MR_DRV_RAID_MAP_ALL *map)
  697. {
  698. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  699. u32 pd, arRef, r1_alt_pd;
  700. u8 physArm, span;
  701. u64 row;
  702. u8 retval = true;
  703. u64 *pdBlock = &io_info->pdBlock;
  704. __le16 *pDevHandle = &io_info->devHandle;
  705. u8 *pPdInterface = &io_info->pd_interface;
  706. *pDevHandle = cpu_to_le16(MR_DEVHANDLE_INVALID);
  707. row = mega_div64_32(stripRow, raid->rowDataSize);
  708. if (raid->level == 6) {
  709. /* logical arm within row */
  710. u32 logArm = mega_mod64(stripRow, raid->rowDataSize);
  711. u32 rowMod, armQ, arm;
  712. if (raid->rowSize == 0)
  713. return false;
  714. /* get logical row mod */
  715. rowMod = mega_mod64(row, raid->rowSize);
  716. armQ = raid->rowSize-1-rowMod; /* index of Q drive */
  717. arm = armQ+1+logArm; /* data always logically follows Q */
  718. if (arm >= raid->rowSize) /* handle wrap condition */
  719. arm -= raid->rowSize;
  720. physArm = (u8)arm;
  721. } else {
  722. if (raid->modFactor == 0)
  723. return false;
  724. physArm = MR_LdDataArmGet(ld, mega_mod64(stripRow,
  725. raid->modFactor),
  726. map);
  727. }
  728. if (raid->spanDepth == 1) {
  729. span = 0;
  730. *pdBlock = row << raid->stripeShift;
  731. } else {
  732. span = (u8)MR_GetSpanBlock(ld, row, pdBlock, map);
  733. if (span == SPAN_INVALID)
  734. return false;
  735. }
  736. /* Get the array on which this span is present */
  737. arRef = MR_LdSpanArrayGet(ld, span, map);
  738. pd = MR_ArPdGet(arRef, physArm, map); /* Get the pd */
  739. if (pd != MR_PD_INVALID) {
  740. /* Get dev handle from Pd. */
  741. *pDevHandle = MR_PdDevHandleGet(pd, map);
  742. *pPdInterface = MR_PdInterfaceTypeGet(pd, map);
  743. /* get second pd also for raid 1/10 fast path writes*/
  744. if ((instance->adapter_type >= VENTURA_SERIES) &&
  745. (raid->level == 1) &&
  746. !io_info->isRead) {
  747. r1_alt_pd = MR_ArPdGet(arRef, physArm + 1, map);
  748. if (r1_alt_pd != MR_PD_INVALID)
  749. io_info->r1_alt_dev_handle =
  750. MR_PdDevHandleGet(r1_alt_pd, map);
  751. }
  752. } else {
  753. if ((raid->level >= 5) &&
  754. ((instance->adapter_type == THUNDERBOLT_SERIES) ||
  755. ((instance->adapter_type == INVADER_SERIES) &&
  756. (raid->regTypeReqOnRead != REGION_TYPE_UNUSED))))
  757. pRAID_Context->reg_lock_flags = REGION_TYPE_EXCLUSIVE;
  758. else if (raid->level == 1) {
  759. /* Get alternate Pd. */
  760. physArm = physArm + 1;
  761. pd = MR_ArPdGet(arRef, physArm, map);
  762. if (pd != MR_PD_INVALID) {
  763. /* Get dev handle from Pd */
  764. *pDevHandle = MR_PdDevHandleGet(pd, map);
  765. *pPdInterface = MR_PdInterfaceTypeGet(pd, map);
  766. }
  767. }
  768. }
  769. *pdBlock += stripRef + le64_to_cpu(MR_LdSpanPtrGet(ld, span, map)->startBlk);
  770. if (instance->adapter_type >= VENTURA_SERIES) {
  771. ((struct RAID_CONTEXT_G35 *)pRAID_Context)->span_arm =
  772. (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
  773. io_info->span_arm =
  774. (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
  775. } else {
  776. pRAID_Context->span_arm =
  777. (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
  778. io_info->span_arm = pRAID_Context->span_arm;
  779. }
  780. io_info->pd_after_lb = pd;
  781. return retval;
  782. }
  783. /*
  784. * mr_get_phy_params_r56_rmw - Calculate parameters for R56 CTIO write operation
  785. * @instance: Adapter soft state
  786. * @ld: LD index
  787. * @stripNo: Strip Number
  788. * @io_info: IO info structure pointer
  789. * pRAID_Context: RAID context pointer
  790. * map: RAID map pointer
  791. *
  792. * This routine calculates the logical arm, data Arm, row number and parity arm
  793. * for R56 CTIO write operation.
  794. */
  795. static void mr_get_phy_params_r56_rmw(struct megasas_instance *instance,
  796. u32 ld, u64 stripNo,
  797. struct IO_REQUEST_INFO *io_info,
  798. struct RAID_CONTEXT_G35 *pRAID_Context,
  799. struct MR_DRV_RAID_MAP_ALL *map)
  800. {
  801. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  802. u8 span, dataArms, arms, dataArm, logArm;
  803. s8 rightmostParityArm, PParityArm;
  804. u64 rowNum;
  805. u64 *pdBlock = &io_info->pdBlock;
  806. dataArms = raid->rowDataSize;
  807. arms = raid->rowSize;
  808. rowNum = mega_div64_32(stripNo, dataArms);
  809. /* parity disk arm, first arm is 0 */
  810. rightmostParityArm = (arms - 1) - mega_mod64(rowNum, arms);
  811. /* logical arm within row */
  812. logArm = mega_mod64(stripNo, dataArms);
  813. /* physical arm for data */
  814. dataArm = mega_mod64((rightmostParityArm + 1 + logArm), arms);
  815. if (raid->spanDepth == 1) {
  816. span = 0;
  817. } else {
  818. span = (u8)MR_GetSpanBlock(ld, rowNum, pdBlock, map);
  819. if (span == SPAN_INVALID)
  820. return;
  821. }
  822. if (raid->level == 6) {
  823. /* P Parity arm, note this can go negative adjust if negative */
  824. PParityArm = (arms - 2) - mega_mod64(rowNum, arms);
  825. if (PParityArm < 0)
  826. PParityArm += arms;
  827. /* rightmostParityArm is P-Parity for RAID 5 and Q-Parity for RAID */
  828. pRAID_Context->flow_specific.r56_arm_map = rightmostParityArm;
  829. pRAID_Context->flow_specific.r56_arm_map |=
  830. (u16)(PParityArm << RAID_CTX_R56_P_ARM_SHIFT);
  831. } else {
  832. pRAID_Context->flow_specific.r56_arm_map |=
  833. (u16)(rightmostParityArm << RAID_CTX_R56_P_ARM_SHIFT);
  834. }
  835. pRAID_Context->reg_lock_row_lba = cpu_to_le64(rowNum);
  836. pRAID_Context->flow_specific.r56_arm_map |=
  837. (u16)(logArm << RAID_CTX_R56_LOG_ARM_SHIFT);
  838. cpu_to_le16s(&pRAID_Context->flow_specific.r56_arm_map);
  839. pRAID_Context->span_arm = (span << RAID_CTX_SPANARM_SPAN_SHIFT) | dataArm;
  840. pRAID_Context->raid_flags = (MR_RAID_FLAGS_IO_SUB_TYPE_R56_DIV_OFFLOAD <<
  841. MR_RAID_CTX_RAID_FLAGS_IO_SUB_TYPE_SHIFT);
  842. return;
  843. }
  844. /*
  845. ******************************************************************************
  846. *
  847. * MR_BuildRaidContext function
  848. *
  849. * This function will initiate command processing. The start/end row and strip
  850. * information is calculated then the lock is acquired.
  851. * This function will return 0 if region lock was acquired OR return num strips
  852. */
  853. u8
  854. MR_BuildRaidContext(struct megasas_instance *instance,
  855. struct IO_REQUEST_INFO *io_info,
  856. struct RAID_CONTEXT *pRAID_Context,
  857. struct MR_DRV_RAID_MAP_ALL *map, u8 **raidLUN)
  858. {
  859. struct fusion_context *fusion;
  860. struct MR_LD_RAID *raid;
  861. u32 stripSize, stripe_mask;
  862. u64 endLba, endStrip, endRow, start_row, start_strip;
  863. u64 regStart;
  864. u32 regSize;
  865. u8 num_strips, numRows;
  866. u16 ref_in_start_stripe, ref_in_end_stripe;
  867. u64 ldStartBlock;
  868. u32 numBlocks, ldTgtId;
  869. u8 isRead;
  870. u8 retval = 0;
  871. u8 startlba_span = SPAN_INVALID;
  872. u64 *pdBlock = &io_info->pdBlock;
  873. u16 ld;
  874. ldStartBlock = io_info->ldStartBlock;
  875. numBlocks = io_info->numBlocks;
  876. ldTgtId = io_info->ldTgtId;
  877. isRead = io_info->isRead;
  878. io_info->IoforUnevenSpan = 0;
  879. io_info->start_span = SPAN_INVALID;
  880. fusion = instance->ctrl_context;
  881. ld = MR_TargetIdToLdGet(ldTgtId, map);
  882. raid = MR_LdRaidGet(ld, map);
  883. /*check read ahead bit*/
  884. io_info->ra_capable = raid->capability.ra_capable;
  885. /*
  886. * if rowDataSize @RAID map and spanRowDataSize @SPAN INFO are zero
  887. * return FALSE
  888. */
  889. if (raid->rowDataSize == 0) {
  890. if (MR_LdSpanPtrGet(ld, 0, map)->spanRowDataSize == 0)
  891. return false;
  892. else if (instance->UnevenSpanSupport) {
  893. io_info->IoforUnevenSpan = 1;
  894. } else {
  895. dev_info(&instance->pdev->dev,
  896. "raid->rowDataSize is 0, but has SPAN[0]"
  897. "rowDataSize = 0x%0x,"
  898. "but there is _NO_ UnevenSpanSupport\n",
  899. MR_LdSpanPtrGet(ld, 0, map)->spanRowDataSize);
  900. return false;
  901. }
  902. }
  903. stripSize = 1 << raid->stripeShift;
  904. stripe_mask = stripSize-1;
  905. io_info->data_arms = raid->rowDataSize;
  906. /*
  907. * calculate starting row and stripe, and number of strips and rows
  908. */
  909. start_strip = ldStartBlock >> raid->stripeShift;
  910. ref_in_start_stripe = (u16)(ldStartBlock & stripe_mask);
  911. endLba = ldStartBlock + numBlocks - 1;
  912. ref_in_end_stripe = (u16)(endLba & stripe_mask);
  913. endStrip = endLba >> raid->stripeShift;
  914. num_strips = (u8)(endStrip - start_strip + 1); /* End strip */
  915. if (io_info->IoforUnevenSpan) {
  916. start_row = get_row_from_strip(instance, ld, start_strip, map);
  917. endRow = get_row_from_strip(instance, ld, endStrip, map);
  918. if (start_row == -1ULL || endRow == -1ULL) {
  919. dev_info(&instance->pdev->dev, "return from %s %d."
  920. "Send IO w/o region lock.\n",
  921. __func__, __LINE__);
  922. return false;
  923. }
  924. if (raid->spanDepth == 1) {
  925. startlba_span = 0;
  926. *pdBlock = start_row << raid->stripeShift;
  927. } else
  928. startlba_span = (u8)mr_spanset_get_span_block(instance,
  929. ld, start_row, pdBlock, map);
  930. if (startlba_span == SPAN_INVALID) {
  931. dev_info(&instance->pdev->dev, "return from %s %d"
  932. "for row 0x%llx,start strip %llx"
  933. "endSrip %llx\n", __func__, __LINE__,
  934. (unsigned long long)start_row,
  935. (unsigned long long)start_strip,
  936. (unsigned long long)endStrip);
  937. return false;
  938. }
  939. io_info->start_span = startlba_span;
  940. io_info->start_row = start_row;
  941. } else {
  942. start_row = mega_div64_32(start_strip, raid->rowDataSize);
  943. endRow = mega_div64_32(endStrip, raid->rowDataSize);
  944. }
  945. numRows = (u8)(endRow - start_row + 1);
  946. /*
  947. * calculate region info.
  948. */
  949. /* assume region is at the start of the first row */
  950. regStart = start_row << raid->stripeShift;
  951. /* assume this IO needs the full row - we'll adjust if not true */
  952. regSize = stripSize;
  953. io_info->do_fp_rlbypass = raid->capability.fpBypassRegionLock;
  954. /* Check if we can send this I/O via FastPath */
  955. if (raid->capability.fpCapable) {
  956. if (isRead)
  957. io_info->fpOkForIo = (raid->capability.fpReadCapable &&
  958. ((num_strips == 1) ||
  959. raid->capability.
  960. fpReadAcrossStripe));
  961. else
  962. io_info->fpOkForIo = (raid->capability.fpWriteCapable &&
  963. ((num_strips == 1) ||
  964. raid->capability.
  965. fpWriteAcrossStripe));
  966. } else
  967. io_info->fpOkForIo = false;
  968. if (numRows == 1) {
  969. /* single-strip IOs can always lock only the data needed */
  970. if (num_strips == 1) {
  971. regStart += ref_in_start_stripe;
  972. regSize = numBlocks;
  973. }
  974. /* multi-strip IOs always need to full stripe locked */
  975. } else if (io_info->IoforUnevenSpan == 0) {
  976. /*
  977. * For Even span region lock optimization.
  978. * If the start strip is the last in the start row
  979. */
  980. if (start_strip == (start_row + 1) * raid->rowDataSize - 1) {
  981. regStart += ref_in_start_stripe;
  982. /* initialize count to sectors from startref to end
  983. of strip */
  984. regSize = stripSize - ref_in_start_stripe;
  985. }
  986. /* add complete rows in the middle of the transfer */
  987. if (numRows > 2)
  988. regSize += (numRows-2) << raid->stripeShift;
  989. /* if IO ends within first strip of last row*/
  990. if (endStrip == endRow*raid->rowDataSize)
  991. regSize += ref_in_end_stripe+1;
  992. else
  993. regSize += stripSize;
  994. } else {
  995. /*
  996. * For Uneven span region lock optimization.
  997. * If the start strip is the last in the start row
  998. */
  999. if (start_strip == (get_strip_from_row(instance, ld, start_row, map) +
  1000. SPAN_ROW_DATA_SIZE(map, ld, startlba_span) - 1)) {
  1001. regStart += ref_in_start_stripe;
  1002. /* initialize count to sectors from
  1003. * startRef to end of strip
  1004. */
  1005. regSize = stripSize - ref_in_start_stripe;
  1006. }
  1007. /* Add complete rows in the middle of the transfer*/
  1008. if (numRows > 2)
  1009. /* Add complete rows in the middle of the transfer*/
  1010. regSize += (numRows-2) << raid->stripeShift;
  1011. /* if IO ends within first strip of last row */
  1012. if (endStrip == get_strip_from_row(instance, ld, endRow, map))
  1013. regSize += ref_in_end_stripe + 1;
  1014. else
  1015. regSize += stripSize;
  1016. }
  1017. pRAID_Context->timeout_value =
  1018. cpu_to_le16(raid->fpIoTimeoutForLd ?
  1019. raid->fpIoTimeoutForLd :
  1020. map->raidMap.fpPdIoTimeoutSec);
  1021. if (instance->adapter_type == INVADER_SERIES)
  1022. pRAID_Context->reg_lock_flags = (isRead) ?
  1023. raid->regTypeReqOnRead : raid->regTypeReqOnWrite;
  1024. else if (instance->adapter_type == THUNDERBOLT_SERIES)
  1025. pRAID_Context->reg_lock_flags = (isRead) ?
  1026. REGION_TYPE_SHARED_READ : raid->regTypeReqOnWrite;
  1027. pRAID_Context->virtual_disk_tgt_id = raid->targetId;
  1028. pRAID_Context->reg_lock_row_lba = cpu_to_le64(regStart);
  1029. pRAID_Context->reg_lock_length = cpu_to_le32(regSize);
  1030. pRAID_Context->config_seq_num = raid->seqNum;
  1031. /* save pointer to raid->LUN array */
  1032. *raidLUN = raid->LUN;
  1033. /* Aero R5/6 Division Offload for WRITE */
  1034. if (fusion->r56_div_offload && (raid->level >= 5) && !isRead) {
  1035. mr_get_phy_params_r56_rmw(instance, ld, start_strip, io_info,
  1036. (struct RAID_CONTEXT_G35 *)pRAID_Context,
  1037. map);
  1038. return true;
  1039. }
  1040. /*Get Phy Params only if FP capable, or else leave it to MR firmware
  1041. to do the calculation.*/
  1042. if (io_info->fpOkForIo) {
  1043. retval = io_info->IoforUnevenSpan ?
  1044. mr_spanset_get_phy_params(instance, ld,
  1045. start_strip, ref_in_start_stripe,
  1046. io_info, pRAID_Context, map) :
  1047. MR_GetPhyParams(instance, ld, start_strip,
  1048. ref_in_start_stripe, io_info,
  1049. pRAID_Context, map);
  1050. /* If IO on an invalid Pd, then FP is not possible.*/
  1051. if (io_info->devHandle == MR_DEVHANDLE_INVALID)
  1052. io_info->fpOkForIo = false;
  1053. return retval;
  1054. } else if (isRead) {
  1055. uint stripIdx;
  1056. for (stripIdx = 0; stripIdx < num_strips; stripIdx++) {
  1057. retval = io_info->IoforUnevenSpan ?
  1058. mr_spanset_get_phy_params(instance, ld,
  1059. start_strip + stripIdx,
  1060. ref_in_start_stripe, io_info,
  1061. pRAID_Context, map) :
  1062. MR_GetPhyParams(instance, ld,
  1063. start_strip + stripIdx, ref_in_start_stripe,
  1064. io_info, pRAID_Context, map);
  1065. if (!retval)
  1066. return true;
  1067. }
  1068. }
  1069. return true;
  1070. }
  1071. /*
  1072. ******************************************************************************
  1073. *
  1074. * This routine pepare spanset info from Valid Raid map and store it into
  1075. * local copy of ldSpanInfo per instance data structure.
  1076. *
  1077. * Inputs :
  1078. * map - LD map
  1079. * ldSpanInfo - ldSpanInfo per HBA instance
  1080. *
  1081. */
  1082. void mr_update_span_set(struct MR_DRV_RAID_MAP_ALL *map,
  1083. PLD_SPAN_INFO ldSpanInfo)
  1084. {
  1085. u8 span, count;
  1086. u32 element, span_row_width;
  1087. u64 span_row;
  1088. struct MR_LD_RAID *raid;
  1089. LD_SPAN_SET *span_set, *span_set_prev;
  1090. struct MR_QUAD_ELEMENT *quad;
  1091. int ldCount;
  1092. u16 ld;
  1093. for (ldCount = 0; ldCount < MAX_LOGICAL_DRIVES_EXT; ldCount++) {
  1094. ld = MR_TargetIdToLdGet(ldCount, map);
  1095. if (ld >= (MAX_LOGICAL_DRIVES_EXT - 1))
  1096. continue;
  1097. raid = MR_LdRaidGet(ld, map);
  1098. for (element = 0; element < MAX_QUAD_DEPTH; element++) {
  1099. for (span = 0; span < raid->spanDepth; span++) {
  1100. if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
  1101. block_span_info.noElements) <
  1102. element + 1)
  1103. continue;
  1104. span_set = &(ldSpanInfo[ld].span_set[element]);
  1105. quad = &map->raidMap.ldSpanMap[ld].
  1106. spanBlock[span].block_span_info.
  1107. quad[element];
  1108. span_set->diff = le32_to_cpu(quad->diff);
  1109. for (count = 0, span_row_width = 0;
  1110. count < raid->spanDepth; count++) {
  1111. if (le32_to_cpu(map->raidMap.ldSpanMap[ld].
  1112. spanBlock[count].
  1113. block_span_info.
  1114. noElements) >= element + 1) {
  1115. span_set->strip_offset[count] =
  1116. span_row_width;
  1117. span_row_width +=
  1118. MR_LdSpanPtrGet
  1119. (ld, count, map)->spanRowDataSize;
  1120. }
  1121. }
  1122. span_set->span_row_data_width = span_row_width;
  1123. span_row = mega_div64_32(((le64_to_cpu(quad->logEnd) -
  1124. le64_to_cpu(quad->logStart)) + le32_to_cpu(quad->diff)),
  1125. le32_to_cpu(quad->diff));
  1126. if (element == 0) {
  1127. span_set->log_start_lba = 0;
  1128. span_set->log_end_lba =
  1129. ((span_row << raid->stripeShift)
  1130. * span_row_width) - 1;
  1131. span_set->span_row_start = 0;
  1132. span_set->span_row_end = span_row - 1;
  1133. span_set->data_strip_start = 0;
  1134. span_set->data_strip_end =
  1135. (span_row * span_row_width) - 1;
  1136. span_set->data_row_start = 0;
  1137. span_set->data_row_end =
  1138. (span_row * le32_to_cpu(quad->diff)) - 1;
  1139. } else {
  1140. span_set_prev = &(ldSpanInfo[ld].
  1141. span_set[element - 1]);
  1142. span_set->log_start_lba =
  1143. span_set_prev->log_end_lba + 1;
  1144. span_set->log_end_lba =
  1145. span_set->log_start_lba +
  1146. ((span_row << raid->stripeShift)
  1147. * span_row_width) - 1;
  1148. span_set->span_row_start =
  1149. span_set_prev->span_row_end + 1;
  1150. span_set->span_row_end =
  1151. span_set->span_row_start + span_row - 1;
  1152. span_set->data_strip_start =
  1153. span_set_prev->data_strip_end + 1;
  1154. span_set->data_strip_end =
  1155. span_set->data_strip_start +
  1156. (span_row * span_row_width) - 1;
  1157. span_set->data_row_start =
  1158. span_set_prev->data_row_end + 1;
  1159. span_set->data_row_end =
  1160. span_set->data_row_start +
  1161. (span_row * le32_to_cpu(quad->diff)) - 1;
  1162. }
  1163. break;
  1164. }
  1165. if (span == raid->spanDepth)
  1166. break;
  1167. }
  1168. }
  1169. }
  1170. void mr_update_load_balance_params(struct MR_DRV_RAID_MAP_ALL *drv_map,
  1171. struct LD_LOAD_BALANCE_INFO *lbInfo)
  1172. {
  1173. int ldCount;
  1174. u16 ld;
  1175. struct MR_LD_RAID *raid;
  1176. if (lb_pending_cmds > 128 || lb_pending_cmds < 1)
  1177. lb_pending_cmds = LB_PENDING_CMDS_DEFAULT;
  1178. for (ldCount = 0; ldCount < MAX_LOGICAL_DRIVES_EXT; ldCount++) {
  1179. ld = MR_TargetIdToLdGet(ldCount, drv_map);
  1180. if (ld >= MAX_LOGICAL_DRIVES_EXT - 1) {
  1181. lbInfo[ldCount].loadBalanceFlag = 0;
  1182. continue;
  1183. }
  1184. raid = MR_LdRaidGet(ld, drv_map);
  1185. if ((raid->level != 1) ||
  1186. (raid->ldState != MR_LD_STATE_OPTIMAL)) {
  1187. lbInfo[ldCount].loadBalanceFlag = 0;
  1188. continue;
  1189. }
  1190. lbInfo[ldCount].loadBalanceFlag = 1;
  1191. }
  1192. }
  1193. u8 megasas_get_best_arm_pd(struct megasas_instance *instance,
  1194. struct LD_LOAD_BALANCE_INFO *lbInfo,
  1195. struct IO_REQUEST_INFO *io_info,
  1196. struct MR_DRV_RAID_MAP_ALL *drv_map)
  1197. {
  1198. struct MR_LD_RAID *raid;
  1199. u16 pd1_dev_handle;
  1200. u16 pend0, pend1, ld;
  1201. u64 diff0, diff1;
  1202. u8 bestArm, pd0, pd1, span, arm;
  1203. u32 arRef, span_row_size;
  1204. u64 block = io_info->ldStartBlock;
  1205. u32 count = io_info->numBlocks;
  1206. span = ((io_info->span_arm & RAID_CTX_SPANARM_SPAN_MASK)
  1207. >> RAID_CTX_SPANARM_SPAN_SHIFT);
  1208. arm = (io_info->span_arm & RAID_CTX_SPANARM_ARM_MASK);
  1209. ld = MR_TargetIdToLdGet(io_info->ldTgtId, drv_map);
  1210. raid = MR_LdRaidGet(ld, drv_map);
  1211. span_row_size = instance->UnevenSpanSupport ?
  1212. SPAN_ROW_SIZE(drv_map, ld, span) : raid->rowSize;
  1213. arRef = MR_LdSpanArrayGet(ld, span, drv_map);
  1214. pd0 = MR_ArPdGet(arRef, arm, drv_map);
  1215. pd1 = MR_ArPdGet(arRef, (arm + 1) >= span_row_size ?
  1216. (arm + 1 - span_row_size) : arm + 1, drv_map);
  1217. /* Get PD1 Dev Handle */
  1218. pd1_dev_handle = MR_PdDevHandleGet(pd1, drv_map);
  1219. if (pd1_dev_handle == MR_DEVHANDLE_INVALID) {
  1220. bestArm = arm;
  1221. } else {
  1222. /* get the pending cmds for the data and mirror arms */
  1223. pend0 = atomic_read(&lbInfo->scsi_pending_cmds[pd0]);
  1224. pend1 = atomic_read(&lbInfo->scsi_pending_cmds[pd1]);
  1225. /* Determine the disk whose head is nearer to the req. block */
  1226. diff0 = ABS_DIFF(block, lbInfo->last_accessed_block[pd0]);
  1227. diff1 = ABS_DIFF(block, lbInfo->last_accessed_block[pd1]);
  1228. bestArm = (diff0 <= diff1 ? arm : arm ^ 1);
  1229. /* Make balance count from 16 to 4 to
  1230. * keep driver in sync with Firmware
  1231. */
  1232. if ((bestArm == arm && pend0 > pend1 + lb_pending_cmds) ||
  1233. (bestArm != arm && pend1 > pend0 + lb_pending_cmds))
  1234. bestArm ^= 1;
  1235. /* Update the last accessed block on the correct pd */
  1236. io_info->span_arm =
  1237. (span << RAID_CTX_SPANARM_SPAN_SHIFT) | bestArm;
  1238. io_info->pd_after_lb = (bestArm == arm) ? pd0 : pd1;
  1239. }
  1240. lbInfo->last_accessed_block[io_info->pd_after_lb] = block + count - 1;
  1241. return io_info->pd_after_lb;
  1242. }
  1243. __le16 get_updated_dev_handle(struct megasas_instance *instance,
  1244. struct LD_LOAD_BALANCE_INFO *lbInfo,
  1245. struct IO_REQUEST_INFO *io_info,
  1246. struct MR_DRV_RAID_MAP_ALL *drv_map)
  1247. {
  1248. u8 arm_pd;
  1249. __le16 devHandle;
  1250. /* get best new arm (PD ID) */
  1251. arm_pd = megasas_get_best_arm_pd(instance, lbInfo, io_info, drv_map);
  1252. devHandle = MR_PdDevHandleGet(arm_pd, drv_map);
  1253. io_info->pd_interface = MR_PdInterfaceTypeGet(arm_pd, drv_map);
  1254. atomic_inc(&lbInfo->scsi_pending_cmds[arm_pd]);
  1255. return devHandle;
  1256. }