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/drivers/scsi/bfa/bfa.h

http://github.com/mirrors/linux
C Header | 440 lines | 339 code | 54 blank | 47 comment | 14 complexity | 2928103d2b4d8fadab577c03c2a6649d MD5 | raw file
  1/* SPDX-License-Identifier: GPL-2.0-only */
  2/*
  3 * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
  4 * Copyright (c) 2014- QLogic Corporation.
  5 * All rights reserved
  6 * www.qlogic.com
  7 *
  8 * Linux driver for QLogic BR-series Fibre Channel Host Bus Adapter.
  9 */
 10#ifndef __BFA_H__
 11#define __BFA_H__
 12
 13#include "bfad_drv.h"
 14#include "bfa_cs.h"
 15#include "bfa_plog.h"
 16#include "bfa_defs_svc.h"
 17#include "bfi.h"
 18#include "bfa_ioc.h"
 19
 20struct bfa_s;
 21
 22typedef void (*bfa_isr_func_t) (struct bfa_s *bfa, struct bfi_msg_s *m);
 23typedef void (*bfa_cb_cbfn_status_t) (void *cbarg, bfa_status_t status);
 24
 25/*
 26 * Interrupt message handlers
 27 */
 28void bfa_isr_unhandled(struct bfa_s *bfa, struct bfi_msg_s *m);
 29
 30/*
 31 * Request and response queue related defines
 32 */
 33#define BFA_REQQ_NELEMS_MIN	(4)
 34#define BFA_RSPQ_NELEMS_MIN	(4)
 35
 36#define bfa_reqq_pi(__bfa, __reqq)	((__bfa)->iocfc.req_cq_pi[__reqq])
 37#define bfa_reqq_ci(__bfa, __reqq)					\
 38	(*(u32 *)((__bfa)->iocfc.req_cq_shadow_ci[__reqq].kva))
 39
 40#define bfa_reqq_full(__bfa, __reqq)				\
 41	(((bfa_reqq_pi(__bfa, __reqq) + 1) &			\
 42	  ((__bfa)->iocfc.cfg.drvcfg.num_reqq_elems - 1)) ==	\
 43	 bfa_reqq_ci(__bfa, __reqq))
 44
 45#define bfa_reqq_next(__bfa, __reqq)					\
 46	(bfa_reqq_full(__bfa, __reqq) ? NULL :				\
 47	 ((void *)((struct bfi_msg_s *)((__bfa)->iocfc.req_cq_ba[__reqq].kva) \
 48		   + bfa_reqq_pi((__bfa), (__reqq)))))
 49
 50#define bfa_reqq_produce(__bfa, __reqq, __mh)  do {			\
 51		(__mh).mtag.h2i.qid     = (__bfa)->iocfc.hw_qid[__reqq];\
 52		(__bfa)->iocfc.req_cq_pi[__reqq]++;			\
 53		(__bfa)->iocfc.req_cq_pi[__reqq] &=			\
 54			((__bfa)->iocfc.cfg.drvcfg.num_reqq_elems - 1); \
 55		writel((__bfa)->iocfc.req_cq_pi[__reqq],		\
 56			(__bfa)->iocfc.bfa_regs.cpe_q_pi[__reqq]);	\
 57		} while (0)
 58
 59#define bfa_rspq_pi(__bfa, __rspq)					\
 60	(*(u32 *)((__bfa)->iocfc.rsp_cq_shadow_pi[__rspq].kva))
 61
 62#define bfa_rspq_ci(__bfa, __rspq)	((__bfa)->iocfc.rsp_cq_ci[__rspq])
 63#define bfa_rspq_elem(__bfa, __rspq, __ci)				\
 64	(&((struct bfi_msg_s *)((__bfa)->iocfc.rsp_cq_ba[__rspq].kva))[__ci])
 65
 66#define CQ_INCR(__index, __size) do {			\
 67	(__index)++;					\
 68	(__index) &= ((__size) - 1);			\
 69} while (0)
 70
 71/*
 72 * Circular queue usage assignments
 73 */
 74enum {
 75	BFA_REQQ_IOC	= 0,	/*  all low-priority IOC msgs	*/
 76	BFA_REQQ_FCXP	= 0,	/*  all FCXP messages		*/
 77	BFA_REQQ_LPS	= 0,	/*  all lport service msgs	*/
 78	BFA_REQQ_PORT	= 0,	/*  all port messages		*/
 79	BFA_REQQ_FLASH	= 0,	/*  for flash module		*/
 80	BFA_REQQ_DIAG	= 0,	/*  for diag module		*/
 81	BFA_REQQ_RPORT	= 0,	/*  all port messages		*/
 82	BFA_REQQ_SBOOT	= 0,	/*  all san boot messages	*/
 83	BFA_REQQ_QOS_LO	= 1,	/*  all low priority IO	*/
 84	BFA_REQQ_QOS_MD	= 2,	/*  all medium priority IO	*/
 85	BFA_REQQ_QOS_HI	= 3,	/*  all high priority IO	*/
 86};
 87
 88static inline void
 89bfa_reqq_winit(struct bfa_reqq_wait_s *wqe, void (*qresume) (void *cbarg),
 90	       void *cbarg)
 91{
 92	wqe->qresume = qresume;
 93	wqe->cbarg = cbarg;
 94}
 95
 96#define bfa_reqq(__bfa, __reqq)	(&(__bfa)->reqq_waitq[__reqq])
 97
 98/*
 99 * static inline void
100 * bfa_reqq_wait(struct bfa_s *bfa, int reqq, struct bfa_reqq_wait_s *wqe)
101 */
102#define bfa_reqq_wait(__bfa, __reqq, __wqe) do {			\
103									\
104		struct list_head *waitq = bfa_reqq(__bfa, __reqq);      \
105									\
106		WARN_ON(((__reqq) >= BFI_IOC_MAX_CQS));			\
107		WARN_ON(!((__wqe)->qresume && (__wqe)->cbarg));		\
108									\
109		list_add_tail(&(__wqe)->qe, waitq);      \
110	} while (0)
111
112#define bfa_reqq_wcancel(__wqe)	list_del(&(__wqe)->qe)
113
114#define bfa_cb_queue(__bfa, __hcb_qe, __cbfn, __cbarg) do {	\
115		(__hcb_qe)->cbfn  = (__cbfn);      \
116		(__hcb_qe)->cbarg = (__cbarg);      \
117		(__hcb_qe)->pre_rmv = BFA_FALSE;		\
118		list_add_tail(&(__hcb_qe)->qe, &(__bfa)->comp_q);      \
119	} while (0)
120
121#define bfa_cb_dequeue(__hcb_qe)	list_del(&(__hcb_qe)->qe)
122
123#define bfa_cb_queue_once(__bfa, __hcb_qe, __cbfn, __cbarg) do {	\
124		(__hcb_qe)->cbfn  = (__cbfn);      \
125		(__hcb_qe)->cbarg = (__cbarg);      \
126		if (!(__hcb_qe)->once) {      \
127			list_add_tail(&(__hcb_qe)->qe, &(__bfa)->comp_q);      \
128			(__hcb_qe)->once = BFA_TRUE;			\
129		}							\
130	} while (0)
131
132#define bfa_cb_queue_status(__bfa, __hcb_qe, __status) do {		\
133		(__hcb_qe)->fw_status = (__status);			\
134		list_add_tail(&(__hcb_qe)->qe, &(__bfa)->comp_q);	\
135} while (0)
136
137#define bfa_cb_queue_done(__hcb_qe) do {	\
138		(__hcb_qe)->once = BFA_FALSE;	\
139	} while (0)
140
141
142/*
143 * PCI devices supported by the current BFA
144 */
145struct bfa_pciid_s {
146	u16	device_id;
147	u16	vendor_id;
148};
149
150extern char     bfa_version[];
151
152struct bfa_iocfc_regs_s {
153	void __iomem	*intr_status;
154	void __iomem	*intr_mask;
155	void __iomem	*cpe_q_pi[BFI_IOC_MAX_CQS];
156	void __iomem	*cpe_q_ci[BFI_IOC_MAX_CQS];
157	void __iomem	*cpe_q_ctrl[BFI_IOC_MAX_CQS];
158	void __iomem	*rme_q_ci[BFI_IOC_MAX_CQS];
159	void __iomem	*rme_q_pi[BFI_IOC_MAX_CQS];
160	void __iomem	*rme_q_ctrl[BFI_IOC_MAX_CQS];
161};
162
163/*
164 * MSIX vector handlers
165 */
166#define BFA_MSIX_MAX_VECTORS	22
167typedef void (*bfa_msix_handler_t)(struct bfa_s *bfa, int vec);
168struct bfa_msix_s {
169	int	nvecs;
170	bfa_msix_handler_t handler[BFA_MSIX_MAX_VECTORS];
171};
172
173/*
174 * Chip specific interfaces
175 */
176struct bfa_hwif_s {
177	void (*hw_reginit)(struct bfa_s *bfa);
178	void (*hw_reqq_ack)(struct bfa_s *bfa, int reqq);
179	void (*hw_rspq_ack)(struct bfa_s *bfa, int rspq, u32 ci);
180	void (*hw_msix_init)(struct bfa_s *bfa, int nvecs);
181	void (*hw_msix_ctrl_install)(struct bfa_s *bfa);
182	void (*hw_msix_queue_install)(struct bfa_s *bfa);
183	void (*hw_msix_uninstall)(struct bfa_s *bfa);
184	void (*hw_isr_mode_set)(struct bfa_s *bfa, bfa_boolean_t msix);
185	void (*hw_msix_getvecs)(struct bfa_s *bfa, u32 *vecmap,
186				u32 *nvecs, u32 *maxvec);
187	void (*hw_msix_get_rme_range) (struct bfa_s *bfa, u32 *start,
188				       u32 *end);
189	int	cpe_vec_q0;
190	int	rme_vec_q0;
191};
192typedef void (*bfa_cb_iocfc_t) (void *cbarg, enum bfa_status status);
193
194struct bfa_faa_cbfn_s {
195	bfa_cb_iocfc_t	faa_cbfn;
196	void		*faa_cbarg;
197};
198
199#define BFA_FAA_ENABLED		1
200#define BFA_FAA_DISABLED	2
201
202/*
203 *	FAA attributes
204 */
205struct bfa_faa_attr_s {
206	wwn_t	faa;
207	u8	faa_state;
208	u8	pwwn_source;
209	u8	rsvd[6];
210};
211
212struct bfa_faa_args_s {
213	struct bfa_faa_attr_s	*faa_attr;
214	struct bfa_faa_cbfn_s	faa_cb;
215	u8			faa_state;
216	bfa_boolean_t		busy;
217};
218
219struct bfa_iocfc_s {
220	bfa_fsm_t		fsm;
221	struct bfa_s		*bfa;
222	struct bfa_iocfc_cfg_s	cfg;
223	u32		req_cq_pi[BFI_IOC_MAX_CQS];
224	u32		rsp_cq_ci[BFI_IOC_MAX_CQS];
225	u8		hw_qid[BFI_IOC_MAX_CQS];
226	struct bfa_cb_qe_s	init_hcb_qe;
227	struct bfa_cb_qe_s	stop_hcb_qe;
228	struct bfa_cb_qe_s	dis_hcb_qe;
229	struct bfa_cb_qe_s	en_hcb_qe;
230	struct bfa_cb_qe_s	stats_hcb_qe;
231	bfa_boolean_t		submod_enabled;
232	bfa_boolean_t		cb_reqd;	/* Driver call back reqd */
233	bfa_status_t		op_status;	/* Status of bfa iocfc op */
234
235	struct bfa_dma_s	cfg_info;
236	struct bfi_iocfc_cfg_s *cfginfo;
237	struct bfa_dma_s	cfgrsp_dma;
238	struct bfi_iocfc_cfgrsp_s *cfgrsp;
239	struct bfa_dma_s	req_cq_ba[BFI_IOC_MAX_CQS];
240	struct bfa_dma_s	req_cq_shadow_ci[BFI_IOC_MAX_CQS];
241	struct bfa_dma_s	rsp_cq_ba[BFI_IOC_MAX_CQS];
242	struct bfa_dma_s	rsp_cq_shadow_pi[BFI_IOC_MAX_CQS];
243	struct bfa_iocfc_regs_s	bfa_regs;	/*  BFA device registers */
244	struct bfa_hwif_s	hwif;
245	bfa_cb_iocfc_t		updateq_cbfn; /*  bios callback function */
246	void			*updateq_cbarg;	/*  bios callback arg */
247	u32	intr_mask;
248	struct bfa_faa_args_s	faa_args;
249	struct bfa_mem_dma_s	ioc_dma;
250	struct bfa_mem_dma_s	iocfc_dma;
251	struct bfa_mem_dma_s	reqq_dma[BFI_IOC_MAX_CQS];
252	struct bfa_mem_dma_s	rspq_dma[BFI_IOC_MAX_CQS];
253	struct bfa_mem_kva_s	kva_seg;
254};
255
256#define BFA_MEM_IOC_DMA(_bfa)		(&((_bfa)->iocfc.ioc_dma))
257#define BFA_MEM_IOCFC_DMA(_bfa)		(&((_bfa)->iocfc.iocfc_dma))
258#define BFA_MEM_REQQ_DMA(_bfa, _qno)	(&((_bfa)->iocfc.reqq_dma[(_qno)]))
259#define BFA_MEM_RSPQ_DMA(_bfa, _qno)	(&((_bfa)->iocfc.rspq_dma[(_qno)]))
260#define BFA_MEM_IOCFC_KVA(_bfa)		(&((_bfa)->iocfc.kva_seg))
261
262#define bfa_fn_lpu(__bfa)	\
263	bfi_fn_lpu(bfa_ioc_pcifn(&(__bfa)->ioc), bfa_ioc_portid(&(__bfa)->ioc))
264#define bfa_msix_init(__bfa, __nvecs)					\
265	((__bfa)->iocfc.hwif.hw_msix_init(__bfa, __nvecs))
266#define bfa_msix_ctrl_install(__bfa)					\
267	((__bfa)->iocfc.hwif.hw_msix_ctrl_install(__bfa))
268#define bfa_msix_queue_install(__bfa)					\
269	((__bfa)->iocfc.hwif.hw_msix_queue_install(__bfa))
270#define bfa_msix_uninstall(__bfa)					\
271	((__bfa)->iocfc.hwif.hw_msix_uninstall(__bfa))
272#define bfa_isr_rspq_ack(__bfa, __queue, __ci)				\
273	((__bfa)->iocfc.hwif.hw_rspq_ack(__bfa, __queue, __ci))
274#define bfa_isr_reqq_ack(__bfa, __queue) do {				\
275	if ((__bfa)->iocfc.hwif.hw_reqq_ack)				\
276		(__bfa)->iocfc.hwif.hw_reqq_ack(__bfa, __queue);	\
277} while (0)
278#define bfa_isr_mode_set(__bfa, __msix) do {				\
279	if ((__bfa)->iocfc.hwif.hw_isr_mode_set)			\
280		(__bfa)->iocfc.hwif.hw_isr_mode_set(__bfa, __msix);	\
281} while (0)
282#define bfa_msix_getvecs(__bfa, __vecmap, __nvecs, __maxvec)		\
283	((__bfa)->iocfc.hwif.hw_msix_getvecs(__bfa, __vecmap,		\
284					__nvecs, __maxvec))
285#define bfa_msix_get_rme_range(__bfa, __start, __end)			\
286	((__bfa)->iocfc.hwif.hw_msix_get_rme_range(__bfa, __start, __end))
287#define bfa_msix(__bfa, __vec)						\
288	((__bfa)->msix.handler[__vec](__bfa, __vec))
289
290/*
291 * FC specific IOC functions.
292 */
293void bfa_iocfc_meminfo(struct bfa_iocfc_cfg_s *cfg,
294			struct bfa_meminfo_s *meminfo,
295			struct bfa_s *bfa);
296void bfa_iocfc_attach(struct bfa_s *bfa, void *bfad,
297		      struct bfa_iocfc_cfg_s *cfg,
298		      struct bfa_pcidev_s *pcidev);
299void bfa_iocfc_init(struct bfa_s *bfa);
300void bfa_iocfc_start(struct bfa_s *bfa);
301void bfa_iocfc_stop(struct bfa_s *bfa);
302void bfa_iocfc_isr(void *bfa, struct bfi_mbmsg_s *msg);
303void bfa_iocfc_set_snsbase(struct bfa_s *bfa, int seg_no, u64 snsbase_pa);
304bfa_boolean_t bfa_iocfc_is_operational(struct bfa_s *bfa);
305void bfa_iocfc_reset_queues(struct bfa_s *bfa);
306
307void bfa_msix_all(struct bfa_s *bfa, int vec);
308void bfa_msix_reqq(struct bfa_s *bfa, int vec);
309void bfa_msix_rspq(struct bfa_s *bfa, int vec);
310void bfa_msix_lpu_err(struct bfa_s *bfa, int vec);
311
312void bfa_hwcb_reginit(struct bfa_s *bfa);
313void bfa_hwcb_rspq_ack(struct bfa_s *bfa, int rspq, u32 ci);
314void bfa_hwcb_msix_init(struct bfa_s *bfa, int nvecs);
315void bfa_hwcb_msix_ctrl_install(struct bfa_s *bfa);
316void bfa_hwcb_msix_queue_install(struct bfa_s *bfa);
317void bfa_hwcb_msix_uninstall(struct bfa_s *bfa);
318void bfa_hwcb_isr_mode_set(struct bfa_s *bfa, bfa_boolean_t msix);
319void bfa_hwcb_msix_getvecs(struct bfa_s *bfa, u32 *vecmap, u32 *nvecs,
320			   u32 *maxvec);
321void bfa_hwcb_msix_get_rme_range(struct bfa_s *bfa, u32 *start,
322				 u32 *end);
323void bfa_hwct_reginit(struct bfa_s *bfa);
324void bfa_hwct2_reginit(struct bfa_s *bfa);
325void bfa_hwct_reqq_ack(struct bfa_s *bfa, int rspq);
326void bfa_hwct_rspq_ack(struct bfa_s *bfa, int rspq, u32 ci);
327void bfa_hwct2_rspq_ack(struct bfa_s *bfa, int rspq, u32 ci);
328void bfa_hwct_msix_init(struct bfa_s *bfa, int nvecs);
329void bfa_hwct_msix_ctrl_install(struct bfa_s *bfa);
330void bfa_hwct_msix_queue_install(struct bfa_s *bfa);
331void bfa_hwct_msix_uninstall(struct bfa_s *bfa);
332void bfa_hwct_isr_mode_set(struct bfa_s *bfa, bfa_boolean_t msix);
333void bfa_hwct_msix_getvecs(struct bfa_s *bfa, u32 *vecmap, u32 *nvecs,
334			   u32 *maxvec);
335void bfa_hwct_msix_get_rme_range(struct bfa_s *bfa, u32 *start,
336				 u32 *end);
337void bfa_iocfc_get_bootwwns(struct bfa_s *bfa, u8 *nwwns, wwn_t *wwns);
338int bfa_iocfc_get_pbc_vports(struct bfa_s *bfa,
339				struct bfi_pbc_vport_s *pbc_vport);
340
341
342/*
343 *----------------------------------------------------------------------
344 *		BFA public interfaces
345 *----------------------------------------------------------------------
346 */
347#define bfa_stats(_mod, _stats)	((_mod)->stats._stats++)
348#define bfa_ioc_get_stats(__bfa, __ioc_stats)		\
349	bfa_ioc_fetch_stats(&(__bfa)->ioc, __ioc_stats)
350#define bfa_ioc_clear_stats(__bfa)		\
351	bfa_ioc_clr_stats(&(__bfa)->ioc)
352#define bfa_get_nports(__bfa)			\
353	bfa_ioc_get_nports(&(__bfa)->ioc)
354#define bfa_get_adapter_manufacturer(__bfa, __manufacturer)		\
355	bfa_ioc_get_adapter_manufacturer(&(__bfa)->ioc, __manufacturer)
356#define bfa_get_adapter_model(__bfa, __model)			\
357	bfa_ioc_get_adapter_model(&(__bfa)->ioc, __model)
358#define bfa_get_adapter_serial_num(__bfa, __serial_num)			\
359	bfa_ioc_get_adapter_serial_num(&(__bfa)->ioc, __serial_num)
360#define bfa_get_adapter_fw_ver(__bfa, __fw_ver)			\
361	bfa_ioc_get_adapter_fw_ver(&(__bfa)->ioc, __fw_ver)
362#define bfa_get_adapter_optrom_ver(__bfa, __optrom_ver)			\
363	bfa_ioc_get_adapter_optrom_ver(&(__bfa)->ioc, __optrom_ver)
364#define bfa_get_pci_chip_rev(__bfa, __chip_rev)			\
365	bfa_ioc_get_pci_chip_rev(&(__bfa)->ioc, __chip_rev)
366#define bfa_get_ioc_state(__bfa)		\
367	bfa_ioc_get_state(&(__bfa)->ioc)
368#define bfa_get_type(__bfa)			\
369	bfa_ioc_get_type(&(__bfa)->ioc)
370#define bfa_get_mac(__bfa)			\
371	bfa_ioc_get_mac(&(__bfa)->ioc)
372#define bfa_get_mfg_mac(__bfa)			\
373	bfa_ioc_get_mfg_mac(&(__bfa)->ioc)
374#define bfa_get_fw_clock_res(__bfa)		\
375	((__bfa)->iocfc.cfgrsp->fwcfg.fw_tick_res)
376
377/*
378 * lun mask macros return NULL when min cfg is enabled and there is
379 * no memory allocated for lunmask.
380 */
381#define bfa_get_lun_mask(__bfa)					\
382	((&(__bfa)->modules.dconf_mod)->min_cfg) ? NULL :	\
383	 (&(BFA_DCONF_MOD(__bfa)->dconf->lun_mask))
384
385#define bfa_get_lun_mask_list(_bfa)				\
386	((&(_bfa)->modules.dconf_mod)->min_cfg) ? NULL :	\
387	 (bfa_get_lun_mask(_bfa)->lun_list)
388
389#define bfa_get_lun_mask_status(_bfa)				\
390	(((&(_bfa)->modules.dconf_mod)->min_cfg)		\
391	 ? BFA_LUNMASK_MINCFG : ((bfa_get_lun_mask(_bfa))->status))
392
393void bfa_get_pciids(struct bfa_pciid_s **pciids, int *npciids);
394void bfa_cfg_get_default(struct bfa_iocfc_cfg_s *cfg);
395void bfa_cfg_get_min(struct bfa_iocfc_cfg_s *cfg);
396void bfa_cfg_get_meminfo(struct bfa_iocfc_cfg_s *cfg,
397			struct bfa_meminfo_s *meminfo,
398			struct bfa_s *bfa);
399void bfa_attach(struct bfa_s *bfa, void *bfad, struct bfa_iocfc_cfg_s *cfg,
400		struct bfa_meminfo_s *meminfo,
401		struct bfa_pcidev_s *pcidev);
402void bfa_detach(struct bfa_s *bfa);
403void bfa_cb_init(void *bfad, bfa_status_t status);
404void bfa_cb_updateq(void *bfad, bfa_status_t status);
405
406bfa_boolean_t bfa_intx(struct bfa_s *bfa);
407void bfa_isr_enable(struct bfa_s *bfa);
408void bfa_isr_disable(struct bfa_s *bfa);
409
410void bfa_comp_deq(struct bfa_s *bfa, struct list_head *comp_q);
411void bfa_comp_process(struct bfa_s *bfa, struct list_head *comp_q);
412void bfa_comp_free(struct bfa_s *bfa, struct list_head *comp_q);
413
414typedef void (*bfa_cb_ioc_t) (void *cbarg, enum bfa_status status);
415void bfa_iocfc_get_attr(struct bfa_s *bfa, struct bfa_iocfc_attr_s *attr);
416
417
418bfa_status_t bfa_iocfc_israttr_set(struct bfa_s *bfa,
419				   struct bfa_iocfc_intr_attr_s *attr);
420
421void bfa_iocfc_enable(struct bfa_s *bfa);
422void bfa_iocfc_disable(struct bfa_s *bfa);
423#define bfa_timer_start(_bfa, _timer, _timercb, _arg, _timeout)		\
424	bfa_timer_begin(&(_bfa)->timer_mod, _timer, _timercb, _arg, _timeout)
425
426struct bfa_cb_pending_q_s {
427	struct bfa_cb_qe_s	hcb_qe;
428	void			*data;  /* Driver buffer */
429};
430
431/* Common macros to operate on pending stats/attr apis */
432#define bfa_pending_q_init(__qe, __cbfn, __cbarg, __data) do {	\
433	bfa_q_qe_init(&((__qe)->hcb_qe.qe));			\
434	(__qe)->hcb_qe.cbfn = (__cbfn);				\
435	(__qe)->hcb_qe.cbarg = (__cbarg);			\
436	(__qe)->hcb_qe.pre_rmv = BFA_TRUE;			\
437	(__qe)->data = (__data);				\
438} while (0)
439
440#endif /* __BFA_H__ */