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/drivers/scsi/bfa/bfa_defs.h

http://github.com/mirrors/linux
C Header | 1280 lines | 966 code | 118 blank | 196 comment | 36 complexity | de16bd5bce7dde51c7565bffd34f6391 MD5 | raw file
   1/* SPDX-License-Identifier: GPL-2.0-only */
   2/*
   3 * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
   4 * Copyright (c) 2014- QLogic Corporation.
   5 * All rights reserved
   6 * www.qlogic.com
   7 *
   8 * Linux driver for QLogic BR-series Fibre Channel Host Bus Adapter.
   9 */
  10
  11#ifndef __BFA_DEFS_H__
  12#define __BFA_DEFS_H__
  13
  14#include "bfa_fc.h"
  15#include "bfad_drv.h"
  16
  17#define BFA_MFG_SERIALNUM_SIZE                  11
  18#define STRSZ(_n)                               (((_n) + 4) & ~3)
  19
  20/*
  21 * Manufacturing card type
  22 */
  23enum {
  24	BFA_MFG_TYPE_CB_MAX  = 825,      /*  Crossbow card type max     */
  25	BFA_MFG_TYPE_FC8P2   = 825,      /*  8G 2port FC card           */
  26	BFA_MFG_TYPE_FC8P1   = 815,      /*  8G 1port FC card           */
  27	BFA_MFG_TYPE_FC4P2   = 425,      /*  4G 2port FC card           */
  28	BFA_MFG_TYPE_FC4P1   = 415,      /*  4G 1port FC card           */
  29	BFA_MFG_TYPE_CNA10P2 = 1020,     /*  10G 2port CNA card */
  30	BFA_MFG_TYPE_CNA10P1 = 1010,     /*  10G 1port CNA card */
  31	BFA_MFG_TYPE_JAYHAWK = 804,      /*  Jayhawk mezz card          */
  32	BFA_MFG_TYPE_WANCHESE = 1007,    /*  Wanchese mezz card */
  33	BFA_MFG_TYPE_ASTRA    = 807,     /*  Astra mezz card            */
  34	BFA_MFG_TYPE_LIGHTNING_P0 = 902, /*  Lightning mezz card - old  */
  35	BFA_MFG_TYPE_LIGHTNING = 1741,   /*  Lightning mezz card        */
  36	BFA_MFG_TYPE_PROWLER_F = 1560,	 /*  Prowler FC only cards	*/
  37	BFA_MFG_TYPE_PROWLER_N = 1410,	 /*  Prowler NIC only cards	*/
  38	BFA_MFG_TYPE_PROWLER_C = 1710,   /*  Prowler CNA only cards	*/
  39	BFA_MFG_TYPE_PROWLER_D = 1860,   /*  Prowler Dual cards		*/
  40	BFA_MFG_TYPE_CHINOOK   = 1867,   /*  Chinook cards		*/
  41	BFA_MFG_TYPE_CHINOOK2   = 1869,	 /*!< Chinook2 cards		*/
  42	BFA_MFG_TYPE_INVALID = 0,        /*  Invalid card type		*/
  43};
  44
  45#pragma pack(1)
  46
  47/*
  48 * Check if Mezz card
  49 */
  50#define bfa_mfg_is_mezz(type) (( \
  51	(type) == BFA_MFG_TYPE_JAYHAWK || \
  52	(type) == BFA_MFG_TYPE_WANCHESE || \
  53	(type) == BFA_MFG_TYPE_ASTRA || \
  54	(type) == BFA_MFG_TYPE_LIGHTNING_P0 || \
  55	(type) == BFA_MFG_TYPE_LIGHTNING || \
  56	(type) == BFA_MFG_TYPE_CHINOOK || \
  57	(type) == BFA_MFG_TYPE_CHINOOK2))
  58
  59/*
  60 * Check if the card having old wwn/mac handling
  61 */
  62#define bfa_mfg_is_old_wwn_mac_model(type) (( \
  63	(type) == BFA_MFG_TYPE_FC8P2 || \
  64	(type) == BFA_MFG_TYPE_FC8P1 || \
  65	(type) == BFA_MFG_TYPE_FC4P2 || \
  66	(type) == BFA_MFG_TYPE_FC4P1 || \
  67	(type) == BFA_MFG_TYPE_CNA10P2 || \
  68	(type) == BFA_MFG_TYPE_CNA10P1 || \
  69	(type) == BFA_MFG_TYPE_JAYHAWK || \
  70	(type) == BFA_MFG_TYPE_WANCHESE))
  71
  72#define bfa_mfg_increment_wwn_mac(m, i)                         \
  73do {                                                            \
  74	u32 t = ((u32)(m)[0] << 16) | ((u32)(m)[1] << 8) | \
  75		(u32)(m)[2];  \
  76	t += (i);      \
  77	(m)[0] = (t >> 16) & 0xFF;                              \
  78	(m)[1] = (t >> 8) & 0xFF;                               \
  79	(m)[2] = t & 0xFF;                                      \
  80} while (0)
  81
  82/*
  83 * VPD data length
  84 */
  85#define BFA_MFG_VPD_LEN                 512
  86
  87/*
  88 * VPD vendor tag
  89 */
  90enum {
  91	BFA_MFG_VPD_UNKNOWN     = 0,     /*  vendor unknown             */
  92	BFA_MFG_VPD_IBM         = 1,     /*  vendor IBM                 */
  93	BFA_MFG_VPD_HP          = 2,     /*  vendor HP                  */
  94	BFA_MFG_VPD_DELL        = 3,     /*  vendor DELL                */
  95	BFA_MFG_VPD_PCI_IBM     = 0x08,  /*  PCI VPD IBM                */
  96	BFA_MFG_VPD_PCI_HP      = 0x10,  /*  PCI VPD HP         */
  97	BFA_MFG_VPD_PCI_DELL    = 0x20,  /*  PCI VPD DELL               */
  98	BFA_MFG_VPD_PCI_BRCD    = 0xf8,  /*  PCI VPD Brocade            */
  99};
 100
 101/*
 102 * All numerical fields are in big-endian format.
 103 */
 104struct bfa_mfg_vpd_s {
 105	u8              version;        /*  vpd data version */
 106	u8              vpd_sig[3];     /*  characters 'V', 'P', 'D' */
 107	u8              chksum;         /*  u8 checksum */
 108	u8              vendor;         /*  vendor */
 109	u8      len;            /*  vpd data length excluding header */
 110	u8      rsv;
 111	u8              data[BFA_MFG_VPD_LEN];  /*  vpd data */
 112};
 113
 114#pragma pack()
 115
 116/*
 117 * Status return values
 118 */
 119enum bfa_status {
 120	BFA_STATUS_OK		= 0,	/*  Success */
 121	BFA_STATUS_FAILED	= 1,	/*  Operation failed */
 122	BFA_STATUS_EINVAL	= 2,	/*  Invalid params Check input
 123					 *  parameters */
 124	BFA_STATUS_ENOMEM	= 3,	/*  Out of resources */
 125	BFA_STATUS_ETIMER	= 5,	/*  Timer expired - Retry, if persists,
 126					 *  contact support */
 127	BFA_STATUS_EPROTOCOL	= 6,	/*  Protocol error */
 128	BFA_STATUS_BADFLASH	= 9,	/*  Flash is bad */
 129	BFA_STATUS_SFP_UNSUPP	= 10,	/*  Unsupported SFP - Replace SFP */
 130	BFA_STATUS_UNKNOWN_VFID = 11,	/*  VF_ID not found */
 131	BFA_STATUS_DATACORRUPTED = 12,  /*  Diag returned data corrupted */
 132	BFA_STATUS_DEVBUSY	= 13,	/*  Device busy - Retry operation */
 133	BFA_STATUS_HDMA_FAILED  = 16,   /* Host dma failed contact support */
 134	BFA_STATUS_FLASH_BAD_LEN = 17,	/*  Flash bad length */
 135	BFA_STATUS_UNKNOWN_LWWN = 18,	/*  LPORT PWWN not found */
 136	BFA_STATUS_UNKNOWN_RWWN = 19,	/*  RPORT PWWN not found */
 137	BFA_STATUS_VPORT_EXISTS = 21,	/*  VPORT already exists */
 138	BFA_STATUS_VPORT_MAX	= 22,	/*  Reached max VPORT supported limit */
 139	BFA_STATUS_UNSUPP_SPEED	= 23,	/*  Invalid Speed Check speed setting */
 140	BFA_STATUS_INVLD_DFSZ	= 24,	/*  Invalid Max data field size */
 141	BFA_STATUS_CMD_NOTSUPP  = 26,   /*  Command/API not supported */
 142	BFA_STATUS_FABRIC_RJT	= 29,	/*  Reject from attached fabric */
 143	BFA_STATUS_UNKNOWN_VWWN = 30,	/*  VPORT PWWN not found */
 144	BFA_STATUS_PORT_OFFLINE = 34,	/*  Port is not online */
 145	BFA_STATUS_VPORT_WWN_BP	= 46,	/*  WWN is same as base port's WWN */
 146	BFA_STATUS_PORT_NOT_DISABLED = 47, /* Port not disabled disable port */
 147	BFA_STATUS_NO_FCPIM_NEXUS = 52,	/* No FCP Nexus exists with the rport */
 148	BFA_STATUS_IOC_FAILURE	= 56,	/* IOC failure - Retry, if persists
 149					 * contact support */
 150	BFA_STATUS_INVALID_WWN	= 57,	/*  Invalid WWN */
 151	BFA_STATUS_ADAPTER_ENABLED = 60, /* Adapter is not disabled */
 152	BFA_STATUS_IOC_NON_OP   = 61,	/* IOC is not operational */
 153	BFA_STATUS_VERSION_FAIL = 70, /* Application/Driver version mismatch */
 154	BFA_STATUS_DIAG_BUSY	= 71,	/*  diag busy */
 155	BFA_STATUS_BEACON_ON    = 72,   /* Port Beacon already on */
 156	BFA_STATUS_ENOFSAVE	= 78,	/*  No saved firmware trace */
 157	BFA_STATUS_IOC_DISABLED = 82,   /* IOC is already disabled */
 158	BFA_STATUS_ERROR_TRL_ENABLED  = 87,   /* TRL is enabled */
 159	BFA_STATUS_ERROR_QOS_ENABLED  = 88,   /* QoS is enabled */
 160	BFA_STATUS_NO_SFP_DEV = 89,	/* No SFP device check or replace SFP */
 161	BFA_STATUS_MEMTEST_FAILED = 90, /* Memory test failed contact support */
 162	BFA_STATUS_LEDTEST_OP = 109, /* LED test is operating */
 163	BFA_STATUS_INVALID_MAC  = 134, /*  Invalid MAC address */
 164	BFA_STATUS_CMD_NOTSUPP_CNA = 146, /* Command not supported for CNA */
 165	BFA_STATUS_PBC		= 154, /*  Operation not allowed for pre-boot
 166					*  configuration */
 167	BFA_STATUS_BAD_FWCFG = 156,	/* Bad firmware configuration */
 168	BFA_STATUS_INVALID_VENDOR = 158, /* Invalid switch vendor */
 169	BFA_STATUS_SFP_NOT_READY = 159,	/* SFP info is not ready. Retry */
 170	BFA_STATUS_TRUNK_ENABLED = 164, /* Trunk is already enabled on
 171					 * this adapter */
 172	BFA_STATUS_TRUNK_DISABLED  = 165, /* Trunking is disabled on
 173					   * the adapter */
 174	BFA_STATUS_IOPROFILE_OFF = 175, /* IO profile OFF */
 175	BFA_STATUS_PHY_NOT_PRESENT = 183, /* PHY module not present */
 176	BFA_STATUS_FEATURE_NOT_SUPPORTED = 192,	/* Feature not supported */
 177	BFA_STATUS_ENTRY_EXISTS = 193,	/* Entry already exists */
 178	BFA_STATUS_ENTRY_NOT_EXISTS = 194, /* Entry does not exist */
 179	BFA_STATUS_NO_CHANGE = 195,	/* Feature already in that state */
 180	BFA_STATUS_FAA_ENABLED = 197,	/* FAA is already enabled */
 181	BFA_STATUS_FAA_DISABLED = 198,	/* FAA is already disabled */
 182	BFA_STATUS_FAA_ACQUIRED = 199,	/* FAA is already acquired */
 183	BFA_STATUS_FAA_ACQ_ADDR = 200,	/* Acquiring addr */
 184	BFA_STATUS_BBCR_FC_ONLY = 201, /*!< BBCredit Recovery is supported for *
 185					* FC mode only */
 186	BFA_STATUS_ERROR_TRUNK_ENABLED = 203,	/* Trunk enabled on adapter */
 187	BFA_STATUS_MAX_ENTRY_REACHED = 212,	/* MAX entry reached */
 188	BFA_STATUS_TOPOLOGY_LOOP = 230, /* Topology is set to Loop */
 189	BFA_STATUS_LOOP_UNSUPP_MEZZ = 231, /* Loop topology is not supported
 190					    * on mezz cards */
 191	BFA_STATUS_INVALID_BW = 233,	/* Invalid bandwidth value */
 192	BFA_STATUS_QOS_BW_INVALID = 234,   /* Invalid QOS bandwidth
 193					    * configuration */
 194	BFA_STATUS_DPORT_ENABLED = 235, /* D-port mode is already enabled */
 195	BFA_STATUS_DPORT_DISABLED = 236, /* D-port mode is already disabled */
 196	BFA_STATUS_CMD_NOTSUPP_MEZZ = 239, /* Cmd not supported for MEZZ card */
 197	BFA_STATUS_FRU_NOT_PRESENT = 240, /* fru module not present */
 198	BFA_STATUS_DPORT_NO_SFP = 243, /* SFP is not present.\n D-port will be
 199					* enabled but it will be operational
 200					* only after inserting a valid SFP. */
 201	BFA_STATUS_DPORT_ERR = 245,	/* D-port mode is enabled */
 202	BFA_STATUS_DPORT_ENOSYS = 254, /* Switch has no D_Port functionality */
 203	BFA_STATUS_DPORT_CANT_PERF = 255, /* Switch port is not D_Port capable
 204					* or D_Port is disabled */
 205	BFA_STATUS_DPORT_LOGICALERR = 256, /* Switch D_Port fail */
 206	BFA_STATUS_DPORT_SWBUSY = 257, /* Switch port busy */
 207	BFA_STATUS_ERR_BBCR_SPEED_UNSUPPORT = 258, /*!< BB credit recovery is
 208					* supported at max port speed alone */
 209	BFA_STATUS_ERROR_BBCR_ENABLED  = 259, /*!< BB credit recovery
 210					* is enabled */
 211	BFA_STATUS_INVALID_BBSCN = 260, /*!< Invalid BBSCN value.
 212					 * Valid range is [1-15] */
 213	BFA_STATUS_DDPORT_ERR = 261, /* Dynamic D_Port mode is active.\n To
 214					* exit dynamic mode, disable D_Port on
 215					* the remote port */
 216	BFA_STATUS_DPORT_SFPWRAP_ERR = 262, /* Clear e/o_wrap fail, check or
 217						* replace SFP */
 218	BFA_STATUS_BBCR_CFG_NO_CHANGE = 265, /*!< BBCR is operational.
 219			* Disable BBCR and try this operation again. */
 220	BFA_STATUS_DPORT_SW_NOTREADY = 268, /* Remote port is not ready to
 221					* start dport test. Check remote
 222					* port status. */
 223	BFA_STATUS_DPORT_INV_SFP = 271, /* Invalid SFP for D-PORT mode. */
 224	BFA_STATUS_DPORT_CMD_NOTSUPP    = 273, /* Dport is not supported by
 225					* remote port */
 226	BFA_STATUS_MAX_VAL		/* Unknown error code */
 227};
 228#define bfa_status_t enum bfa_status
 229
 230enum bfa_eproto_status {
 231	BFA_EPROTO_BAD_ACCEPT = 0,
 232	BFA_EPROTO_UNKNOWN_RSP = 1
 233};
 234#define bfa_eproto_status_t enum bfa_eproto_status
 235
 236enum bfa_boolean {
 237	BFA_FALSE = 0,
 238	BFA_TRUE  = 1
 239};
 240#define bfa_boolean_t enum bfa_boolean
 241
 242#define BFA_STRING_32	32
 243#define BFA_VERSION_LEN 64
 244
 245/*
 246 * ---------------------- adapter definitions ------------
 247 */
 248
 249/*
 250 * BFA adapter level attributes.
 251 */
 252enum {
 253	BFA_ADAPTER_SERIAL_NUM_LEN = STRSZ(BFA_MFG_SERIALNUM_SIZE),
 254					/*
 255					 *!< adapter serial num length
 256					 */
 257	BFA_ADAPTER_MODEL_NAME_LEN  = 16,  /*  model name length */
 258	BFA_ADAPTER_MODEL_DESCR_LEN = 128, /*  model description length */
 259	BFA_ADAPTER_MFG_NAME_LEN    = 8,   /*  manufacturer name length */
 260	BFA_ADAPTER_SYM_NAME_LEN    = 64,  /*  adapter symbolic name length */
 261	BFA_ADAPTER_OS_TYPE_LEN	    = 64,  /*  adapter os type length */
 262	BFA_ADAPTER_UUID_LEN	    = 16,  /* adapter uuid length */
 263};
 264
 265struct bfa_adapter_attr_s {
 266	char		manufacturer[BFA_ADAPTER_MFG_NAME_LEN];
 267	char		serial_num[BFA_ADAPTER_SERIAL_NUM_LEN];
 268	u32	card_type;
 269	char		model[BFA_ADAPTER_MODEL_NAME_LEN];
 270	char		model_descr[BFA_ADAPTER_MODEL_DESCR_LEN];
 271	wwn_t		pwwn;
 272	char		node_symname[FC_SYMNAME_MAX];
 273	char		hw_ver[BFA_VERSION_LEN];
 274	char		fw_ver[BFA_VERSION_LEN];
 275	char		optrom_ver[BFA_VERSION_LEN];
 276	char		os_type[BFA_ADAPTER_OS_TYPE_LEN];
 277	struct bfa_mfg_vpd_s	vpd;
 278	struct mac_s	mac;
 279
 280	u8		nports;
 281	u8		max_speed;
 282	u8		prototype;
 283	char	        asic_rev;
 284
 285	u8		pcie_gen;
 286	u8		pcie_lanes_orig;
 287	u8		pcie_lanes;
 288	u8	        cna_capable;
 289
 290	u8		is_mezz;
 291	u8		trunk_capable;
 292	u8		mfg_day;	/* manufacturing day */
 293	u8		mfg_month;	/* manufacturing month */
 294	u16		mfg_year;	/* manufacturing year */
 295	u16		rsvd;
 296	u8		uuid[BFA_ADAPTER_UUID_LEN];
 297};
 298
 299/*
 300 * ---------------------- IOC definitions ------------
 301 */
 302
 303enum {
 304	BFA_IOC_DRIVER_LEN	= 16,
 305	BFA_IOC_CHIP_REV_LEN	= 8,
 306};
 307
 308/*
 309 * Driver and firmware versions.
 310 */
 311struct bfa_ioc_driver_attr_s {
 312	char		driver[BFA_IOC_DRIVER_LEN];	/*  driver name */
 313	char		driver_ver[BFA_VERSION_LEN];	/*  driver version */
 314	char		fw_ver[BFA_VERSION_LEN];	/*  firmware version */
 315	char		bios_ver[BFA_VERSION_LEN];	/*  bios version */
 316	char		efi_ver[BFA_VERSION_LEN];	/*  EFI version */
 317	char		ob_ver[BFA_VERSION_LEN];	/*  openboot version */
 318};
 319
 320/*
 321 * IOC PCI device attributes
 322 */
 323struct bfa_ioc_pci_attr_s {
 324	u16	vendor_id;	/*  PCI vendor ID */
 325	u16	device_id;	/*  PCI device ID */
 326	u16	ssid;		/*  subsystem ID */
 327	u16	ssvid;		/*  subsystem vendor ID */
 328	u32	pcifn;		/*  PCI device function */
 329	u32	rsvd;		/* padding */
 330	char		chip_rev[BFA_IOC_CHIP_REV_LEN];	 /*  chip revision */
 331};
 332
 333/*
 334 * IOC states
 335 */
 336enum bfa_ioc_state {
 337	BFA_IOC_UNINIT		= 1,	/*  IOC is in uninit state */
 338	BFA_IOC_RESET		= 2,	/*  IOC is in reset state */
 339	BFA_IOC_SEMWAIT		= 3,	/*  Waiting for IOC h/w semaphore */
 340	BFA_IOC_HWINIT		= 4,	/*  IOC h/w is being initialized */
 341	BFA_IOC_GETATTR		= 5,	/*  IOC is being configured */
 342	BFA_IOC_OPERATIONAL	= 6,	/*  IOC is operational */
 343	BFA_IOC_INITFAIL	= 7,	/*  IOC hardware failure */
 344	BFA_IOC_FAIL		= 8,	/*  IOC heart-beat failure */
 345	BFA_IOC_DISABLING	= 9,	/*  IOC is being disabled */
 346	BFA_IOC_DISABLED	= 10,	/*  IOC is disabled */
 347	BFA_IOC_FWMISMATCH	= 11,	/*  IOC f/w different from drivers */
 348	BFA_IOC_ENABLING	= 12,	/*  IOC is being enabled */
 349	BFA_IOC_HWFAIL		= 13,	/*  PCI mapping doesn't exist */
 350	BFA_IOC_ACQ_ADDR	= 14,	/*  Acquiring addr from fabric */
 351};
 352
 353/*
 354 * IOC firmware stats
 355 */
 356struct bfa_fw_ioc_stats_s {
 357	u32	enable_reqs;
 358	u32	disable_reqs;
 359	u32	get_attr_reqs;
 360	u32	dbg_sync;
 361	u32	dbg_dump;
 362	u32	unknown_reqs;
 363};
 364
 365/*
 366 * IOC driver stats
 367 */
 368struct bfa_ioc_drv_stats_s {
 369	u32	ioc_isrs;
 370	u32	ioc_enables;
 371	u32	ioc_disables;
 372	u32	ioc_hbfails;
 373	u32	ioc_boots;
 374	u32	stats_tmos;
 375	u32	hb_count;
 376	u32	disable_reqs;
 377	u32	enable_reqs;
 378	u32	disable_replies;
 379	u32	enable_replies;
 380	u32	rsvd;
 381};
 382
 383/*
 384 * IOC statistics
 385 */
 386struct bfa_ioc_stats_s {
 387	struct bfa_ioc_drv_stats_s	drv_stats; /*  driver IOC stats */
 388	struct bfa_fw_ioc_stats_s	fw_stats;  /*  firmware IOC stats */
 389};
 390
 391enum bfa_ioc_type_e {
 392	BFA_IOC_TYPE_FC		= 1,
 393	BFA_IOC_TYPE_FCoE	= 2,
 394	BFA_IOC_TYPE_LL		= 3,
 395};
 396
 397/*
 398 * IOC attributes returned in queries
 399 */
 400struct bfa_ioc_attr_s {
 401	enum bfa_ioc_type_e		ioc_type;
 402	enum bfa_ioc_state		state;		/*  IOC state      */
 403	struct bfa_adapter_attr_s	adapter_attr;	/*  HBA attributes */
 404	struct bfa_ioc_driver_attr_s	driver_attr;	/*  driver attr    */
 405	struct bfa_ioc_pci_attr_s	pci_attr;
 406	u8				port_id;	/*  port number    */
 407	u8				port_mode;	/*  bfa_mode_s	*/
 408	u8				cap_bm;		/*  capability	*/
 409	u8				port_mode_cfg;	/*  bfa_mode_s	*/
 410	u8				def_fn;		/* 1 if default fn */
 411	u8				rsvd[3];	/*  64bit align	*/
 412};
 413
 414/*
 415 *			AEN related definitions
 416 */
 417enum bfa_aen_category {
 418	BFA_AEN_CAT_ADAPTER	= 1,
 419	BFA_AEN_CAT_PORT	= 2,
 420	BFA_AEN_CAT_LPORT	= 3,
 421	BFA_AEN_CAT_RPORT	= 4,
 422	BFA_AEN_CAT_ITNIM	= 5,
 423	BFA_AEN_CAT_AUDIT	= 8,
 424	BFA_AEN_CAT_IOC		= 9,
 425};
 426
 427/* BFA adapter level events */
 428enum bfa_adapter_aen_event {
 429	BFA_ADAPTER_AEN_ADD	= 1,	/* New Adapter found event */
 430	BFA_ADAPTER_AEN_REMOVE	= 2,	/* Adapter removed event */
 431};
 432
 433struct bfa_adapter_aen_data_s {
 434	char	serial_num[BFA_ADAPTER_SERIAL_NUM_LEN];
 435	u32	nports; /* Number of NPorts */
 436	wwn_t	pwwn;   /* WWN of one of its physical port */
 437};
 438
 439/* BFA physical port Level events */
 440enum bfa_port_aen_event {
 441	BFA_PORT_AEN_ONLINE	= 1,    /* Physical Port online event */
 442	BFA_PORT_AEN_OFFLINE	= 2,    /* Physical Port offline event */
 443	BFA_PORT_AEN_RLIR	= 3,    /* RLIR event, not supported */
 444	BFA_PORT_AEN_SFP_INSERT	= 4,    /* SFP inserted event */
 445	BFA_PORT_AEN_SFP_REMOVE	= 5,    /* SFP removed event */
 446	BFA_PORT_AEN_SFP_POM	= 6,    /* SFP POM event */
 447	BFA_PORT_AEN_ENABLE	= 7,    /* Physical Port enable event */
 448	BFA_PORT_AEN_DISABLE	= 8,    /* Physical Port disable event */
 449	BFA_PORT_AEN_AUTH_ON	= 9,    /* Physical Port auth success event */
 450	BFA_PORT_AEN_AUTH_OFF	= 10,   /* Physical Port auth fail event */
 451	BFA_PORT_AEN_DISCONNECT	= 11,   /* Physical Port disconnect event */
 452	BFA_PORT_AEN_QOS_NEG	= 12,   /* Base Port QOS negotiation event */
 453	BFA_PORT_AEN_FABRIC_NAME_CHANGE	= 13, /* Fabric Name/WWN change */
 454	BFA_PORT_AEN_SFP_ACCESS_ERROR	= 14, /* SFP read error event */
 455	BFA_PORT_AEN_SFP_UNSUPPORT	= 15, /* Unsupported SFP event */
 456};
 457
 458enum bfa_port_aen_sfp_pom {
 459	BFA_PORT_AEN_SFP_POM_GREEN = 1, /* Normal */
 460	BFA_PORT_AEN_SFP_POM_AMBER = 2, /* Warning */
 461	BFA_PORT_AEN_SFP_POM_RED   = 3, /* Critical */
 462	BFA_PORT_AEN_SFP_POM_MAX   = BFA_PORT_AEN_SFP_POM_RED
 463};
 464
 465struct bfa_port_aen_data_s {
 466	wwn_t		pwwn;		/* WWN of the physical port */
 467	wwn_t		fwwn;		/* WWN of the fabric port */
 468	u32		phy_port_num;	/* For SFP related events */
 469	u16		ioc_type;
 470	u16		level;		/* Only transitions will be informed */
 471	mac_t		mac;		/* MAC address of the ethernet port */
 472	u16		rsvd;
 473};
 474
 475/* BFA AEN logical port events */
 476enum bfa_lport_aen_event {
 477	BFA_LPORT_AEN_NEW	= 1,		/* LPort created event */
 478	BFA_LPORT_AEN_DELETE	= 2,		/* LPort deleted event */
 479	BFA_LPORT_AEN_ONLINE	= 3,		/* LPort online event */
 480	BFA_LPORT_AEN_OFFLINE	= 4,		/* LPort offline event */
 481	BFA_LPORT_AEN_DISCONNECT = 5,		/* LPort disconnect event */
 482	BFA_LPORT_AEN_NEW_PROP	= 6,		/* VPort created event */
 483	BFA_LPORT_AEN_DELETE_PROP = 7,		/* VPort deleted event */
 484	BFA_LPORT_AEN_NEW_STANDARD = 8,		/* VPort created event */
 485	BFA_LPORT_AEN_DELETE_STANDARD = 9,	/* VPort deleted event */
 486	BFA_LPORT_AEN_NPIV_DUP_WWN = 10,	/* VPort with duplicate WWN */
 487	BFA_LPORT_AEN_NPIV_FABRIC_MAX = 11,	/* Max NPIV in fabric/fport */
 488	BFA_LPORT_AEN_NPIV_UNKNOWN = 12,	/* Unknown NPIV Error code */
 489};
 490
 491struct bfa_lport_aen_data_s {
 492	u16	vf_id;	/* vf_id of this logical port */
 493	u16	roles;	/* Logical port mode,IM/TM/IP etc */
 494	u32	rsvd;
 495	wwn_t	ppwwn;	/* WWN of its physical port */
 496	wwn_t	lpwwn;	/* WWN of this logical port */
 497};
 498
 499/* BFA ITNIM events */
 500enum bfa_itnim_aen_event {
 501	BFA_ITNIM_AEN_ONLINE	 = 1,	/* Target online */
 502	BFA_ITNIM_AEN_OFFLINE	 = 2,	/* Target offline */
 503	BFA_ITNIM_AEN_DISCONNECT = 3,	/* Target disconnected */
 504};
 505
 506struct bfa_itnim_aen_data_s {
 507	u16		vf_id;		/* vf_id of the IT nexus */
 508	u16		rsvd[3];
 509	wwn_t		ppwwn;		/* WWN of its physical port */
 510	wwn_t		lpwwn;		/* WWN of logical port */
 511	wwn_t		rpwwn;		/* WWN of remote(target) port */
 512};
 513
 514/* BFA audit events */
 515enum bfa_audit_aen_event {
 516	BFA_AUDIT_AEN_AUTH_ENABLE	= 1,
 517	BFA_AUDIT_AEN_AUTH_DISABLE	= 2,
 518	BFA_AUDIT_AEN_FLASH_ERASE	= 3,
 519	BFA_AUDIT_AEN_FLASH_UPDATE	= 4,
 520};
 521
 522struct bfa_audit_aen_data_s {
 523	wwn_t	pwwn;
 524	int	partition_inst;
 525	int	partition_type;
 526};
 527
 528/* BFA IOC level events */
 529enum bfa_ioc_aen_event {
 530	BFA_IOC_AEN_HBGOOD  = 1,	/* Heart Beat restore event	*/
 531	BFA_IOC_AEN_HBFAIL  = 2,	/* Heart Beat failure event	*/
 532	BFA_IOC_AEN_ENABLE  = 3,	/* IOC enabled event		*/
 533	BFA_IOC_AEN_DISABLE = 4,	/* IOC disabled event		*/
 534	BFA_IOC_AEN_FWMISMATCH  = 5,	/* IOC firmware mismatch	*/
 535	BFA_IOC_AEN_FWCFG_ERROR = 6,	/* IOC firmware config error	*/
 536	BFA_IOC_AEN_INVALID_VENDOR = 7,
 537	BFA_IOC_AEN_INVALID_NWWN = 8,	/* Zero NWWN			*/
 538	BFA_IOC_AEN_INVALID_PWWN = 9	/* Zero PWWN			*/
 539};
 540
 541struct bfa_ioc_aen_data_s {
 542	wwn_t	pwwn;
 543	u16	ioc_type;
 544	mac_t	mac;
 545};
 546
 547/*
 548 * ---------------------- mfg definitions ------------
 549 */
 550
 551/*
 552 * Checksum size
 553 */
 554#define BFA_MFG_CHKSUM_SIZE			16
 555
 556#define BFA_MFG_PARTNUM_SIZE			14
 557#define BFA_MFG_SUPPLIER_ID_SIZE		10
 558#define BFA_MFG_SUPPLIER_PARTNUM_SIZE		20
 559#define BFA_MFG_SUPPLIER_SERIALNUM_SIZE		20
 560#define BFA_MFG_SUPPLIER_REVISION_SIZE		4
 561/*
 562 * Initial capability definition
 563 */
 564#define BFA_MFG_IC_FC	0x01
 565#define BFA_MFG_IC_ETH	0x02
 566
 567/*
 568 * Adapter capability mask definition
 569 */
 570#define BFA_CM_HBA	0x01
 571#define BFA_CM_CNA	0x02
 572#define BFA_CM_NIC	0x04
 573#define BFA_CM_FC16G	0x08
 574#define BFA_CM_SRIOV	0x10
 575#define BFA_CM_MEZZ	0x20
 576
 577#pragma pack(1)
 578
 579/*
 580 * All numerical fields are in big-endian format.
 581 */
 582struct bfa_mfg_block_s {
 583	u8	version;    /*!< manufacturing block version */
 584	u8     mfg_sig[3]; /*!< characters 'M', 'F', 'G' */
 585	u16    mfgsize;    /*!< mfg block size */
 586	u16    u16_chksum; /*!< old u16 checksum */
 587	char        brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)];
 588	char        brcd_partnum[STRSZ(BFA_MFG_PARTNUM_SIZE)];
 589	u8     mfg_day;    /*!< manufacturing day */
 590	u8     mfg_month;  /*!< manufacturing month */
 591	u16    mfg_year;   /*!< manufacturing year */
 592	wwn_t       mfg_wwn;    /*!< wwn base for this adapter */
 593	u8     num_wwn;    /*!< number of wwns assigned */
 594	u8     mfg_speeds; /*!< speeds allowed for this adapter */
 595	u8     rsv[2];
 596	char    supplier_id[STRSZ(BFA_MFG_SUPPLIER_ID_SIZE)];
 597	char    supplier_partnum[STRSZ(BFA_MFG_SUPPLIER_PARTNUM_SIZE)];
 598	char    supplier_serialnum[STRSZ(BFA_MFG_SUPPLIER_SERIALNUM_SIZE)];
 599	char    supplier_revision[STRSZ(BFA_MFG_SUPPLIER_REVISION_SIZE)];
 600	mac_t       mfg_mac;    /*!< base mac address */
 601	u8     num_mac;    /*!< number of mac addresses */
 602	u8     rsv2;
 603	u32    card_type;  /*!< card type          */
 604	char        cap_nic;    /*!< capability nic     */
 605	char        cap_cna;    /*!< capability cna     */
 606	char        cap_hba;    /*!< capability hba     */
 607	char        cap_fc16g;  /*!< capability fc 16g      */
 608	char        cap_sriov;  /*!< capability sriov       */
 609	char        cap_mezz;   /*!< capability mezz        */
 610	u8     rsv3;
 611	u8     mfg_nports; /*!< number of ports        */
 612	char        media[8];   /*!< xfi/xaui           */
 613	char        initial_mode[8]; /*!< initial mode: hba/cna/nic */
 614	u8     rsv4[84];
 615	u8     md5_chksum[BFA_MFG_CHKSUM_SIZE]; /*!< md5 checksum */
 616};
 617
 618#pragma pack()
 619
 620/*
 621 * ---------------------- pci definitions ------------
 622 */
 623
 624/*
 625 * PCI device and vendor ID information
 626 */
 627enum {
 628	BFA_PCI_VENDOR_ID_BROCADE	= 0x1657,
 629	BFA_PCI_DEVICE_ID_FC_8G2P	= 0x13,
 630	BFA_PCI_DEVICE_ID_FC_8G1P	= 0x17,
 631	BFA_PCI_DEVICE_ID_CT		= 0x14,
 632	BFA_PCI_DEVICE_ID_CT_FC		= 0x21,
 633	BFA_PCI_DEVICE_ID_CT2		= 0x22,
 634	BFA_PCI_DEVICE_ID_CT2_QUAD	= 0x23,
 635};
 636
 637#define bfa_asic_id_cb(__d)			\
 638	((__d) == BFA_PCI_DEVICE_ID_FC_8G2P ||	\
 639	 (__d) == BFA_PCI_DEVICE_ID_FC_8G1P)
 640#define bfa_asic_id_ct(__d)			\
 641	((__d) == BFA_PCI_DEVICE_ID_CT ||	\
 642	 (__d) == BFA_PCI_DEVICE_ID_CT_FC)
 643#define bfa_asic_id_ct2(__d)			\
 644	((__d) == BFA_PCI_DEVICE_ID_CT2 ||	\
 645	(__d) == BFA_PCI_DEVICE_ID_CT2_QUAD)
 646#define bfa_asic_id_ctc(__d)	\
 647	(bfa_asic_id_ct(__d) || bfa_asic_id_ct2(__d))
 648
 649/*
 650 * PCI sub-system device and vendor ID information
 651 */
 652enum {
 653	BFA_PCI_FCOE_SSDEVICE_ID	= 0x14,
 654	BFA_PCI_CT2_SSID_FCoE		= 0x22,
 655	BFA_PCI_CT2_SSID_ETH		= 0x23,
 656	BFA_PCI_CT2_SSID_FC		= 0x24,
 657};
 658
 659/*
 660 * Maximum number of device address ranges mapped through different BAR(s)
 661 */
 662#define BFA_PCI_ACCESS_RANGES 1
 663
 664/*
 665 *	Port speed settings. Each specific speed is a bit field. Use multiple
 666 *	bits to specify speeds to be selected for auto-negotiation.
 667 */
 668enum bfa_port_speed {
 669	BFA_PORT_SPEED_UNKNOWN = 0,
 670	BFA_PORT_SPEED_1GBPS	= 1,
 671	BFA_PORT_SPEED_2GBPS	= 2,
 672	BFA_PORT_SPEED_4GBPS	= 4,
 673	BFA_PORT_SPEED_8GBPS	= 8,
 674	BFA_PORT_SPEED_10GBPS	= 10,
 675	BFA_PORT_SPEED_16GBPS	= 16,
 676	BFA_PORT_SPEED_AUTO	= 0xf,
 677};
 678#define bfa_port_speed_t enum bfa_port_speed
 679
 680enum {
 681	BFA_BOOT_BOOTLUN_MAX = 4,       /*  maximum boot lun per IOC */
 682	BFA_PREBOOT_BOOTLUN_MAX = 8,    /*  maximum preboot lun per IOC */
 683};
 684
 685#define BOOT_CFG_REV1   1
 686#define BOOT_CFG_VLAN   1
 687
 688/*
 689 *      Boot options setting. Boot options setting determines from where
 690 *      to get the boot lun information
 691 */
 692enum bfa_boot_bootopt {
 693	BFA_BOOT_AUTO_DISCOVER  = 0, /*  Boot from blun provided by fabric */
 694	BFA_BOOT_STORED_BLUN = 1, /*  Boot from bluns stored in flash */
 695	BFA_BOOT_FIRST_LUN      = 2, /*  Boot from first discovered blun */
 696	BFA_BOOT_PBC    = 3, /*  Boot from pbc configured blun  */
 697};
 698
 699#pragma pack(1)
 700/*
 701 * Boot lun information.
 702 */
 703struct bfa_boot_bootlun_s {
 704	wwn_t   pwwn;		/*  port wwn of target */
 705	struct scsi_lun   lun;  /*  64-bit lun */
 706};
 707#pragma pack()
 708
 709/*
 710 * BOOT boot configuraton
 711 */
 712struct bfa_boot_cfg_s {
 713	u8		version;
 714	u8		rsvd1;
 715	u16		chksum;
 716	u8		enable;		/* enable/disable SAN boot */
 717	u8		speed;          /* boot speed settings */
 718	u8		topology;       /* boot topology setting */
 719	u8		bootopt;        /* bfa_boot_bootopt_t */
 720	u32		nbluns;         /* number of boot luns */
 721	u32		rsvd2;
 722	struct bfa_boot_bootlun_s blun[BFA_BOOT_BOOTLUN_MAX];
 723	struct bfa_boot_bootlun_s blun_disc[BFA_BOOT_BOOTLUN_MAX];
 724};
 725
 726struct bfa_boot_pbc_s {
 727	u8              enable;         /*  enable/disable SAN boot */
 728	u8              speed;          /*  boot speed settings */
 729	u8              topology;       /*  boot topology setting */
 730	u8              rsvd1;
 731	u32     nbluns;         /*  number of boot luns */
 732	struct bfa_boot_bootlun_s pblun[BFA_PREBOOT_BOOTLUN_MAX];
 733};
 734
 735struct bfa_ethboot_cfg_s {
 736	u8		version;
 737	u8		rsvd1;
 738	u16		chksum;
 739	u8		enable;	/* enable/disable Eth/PXE boot */
 740	u8		rsvd2;
 741	u16		vlan;
 742};
 743
 744/*
 745 * ASIC block configuration related structures
 746 */
 747#define BFA_ABLK_MAX_PORTS	2
 748#define BFA_ABLK_MAX_PFS	16
 749#define BFA_ABLK_MAX		2
 750
 751#pragma pack(1)
 752enum bfa_mode_s {
 753	BFA_MODE_HBA	= 1,
 754	BFA_MODE_CNA	= 2,
 755	BFA_MODE_NIC	= 3
 756};
 757
 758struct bfa_adapter_cfg_mode_s {
 759	u16	max_pf;
 760	u16	max_vf;
 761	enum bfa_mode_s	mode;
 762};
 763
 764struct bfa_ablk_cfg_pf_s {
 765	u16	pers;
 766	u8	port_id;
 767	u8	optrom;
 768	u8	valid;
 769	u8	sriov;
 770	u8	max_vfs;
 771	u8	rsvd[1];
 772	u16	num_qpairs;
 773	u16	num_vectors;
 774	u16	bw_min;
 775	u16	bw_max;
 776};
 777
 778struct bfa_ablk_cfg_port_s {
 779	u8	mode;
 780	u8	type;
 781	u8	max_pfs;
 782	u8	rsvd[5];
 783};
 784
 785struct bfa_ablk_cfg_inst_s {
 786	u8	nports;
 787	u8	max_pfs;
 788	u8	rsvd[6];
 789	struct bfa_ablk_cfg_pf_s	pf_cfg[BFA_ABLK_MAX_PFS];
 790	struct bfa_ablk_cfg_port_s	port_cfg[BFA_ABLK_MAX_PORTS];
 791};
 792
 793struct bfa_ablk_cfg_s {
 794	struct bfa_ablk_cfg_inst_s	inst[BFA_ABLK_MAX];
 795};
 796
 797
 798/*
 799 *	SFP module specific
 800 */
 801#define SFP_DIAGMON_SIZE	10 /* num bytes of diag monitor data */
 802
 803/* SFP state change notification event */
 804#define BFA_SFP_SCN_REMOVED	0
 805#define BFA_SFP_SCN_INSERTED	1
 806#define BFA_SFP_SCN_POM		2
 807#define BFA_SFP_SCN_FAILED	3
 808#define BFA_SFP_SCN_UNSUPPORT	4
 809#define BFA_SFP_SCN_VALID	5
 810
 811enum bfa_defs_sfp_media_e {
 812	BFA_SFP_MEDIA_UNKNOWN	= 0x00,
 813	BFA_SFP_MEDIA_CU	= 0x01,
 814	BFA_SFP_MEDIA_LW	= 0x02,
 815	BFA_SFP_MEDIA_SW	= 0x03,
 816	BFA_SFP_MEDIA_EL	= 0x04,
 817	BFA_SFP_MEDIA_UNSUPPORT	= 0x05,
 818};
 819
 820/*
 821 * values for xmtr_tech above
 822 */
 823enum {
 824	SFP_XMTR_TECH_CU = (1 << 0),	/* copper FC-BaseT */
 825	SFP_XMTR_TECH_CP = (1 << 1),	/* copper passive */
 826	SFP_XMTR_TECH_CA = (1 << 2),	/* copper active */
 827	SFP_XMTR_TECH_LL = (1 << 3),	/* longwave laser */
 828	SFP_XMTR_TECH_SL = (1 << 4),	/* shortwave laser w/ OFC */
 829	SFP_XMTR_TECH_SN = (1 << 5),	/* shortwave laser w/o OFC */
 830	SFP_XMTR_TECH_EL_INTRA = (1 << 6), /* elec intra-enclosure */
 831	SFP_XMTR_TECH_EL_INTER = (1 << 7), /* elec inter-enclosure */
 832	SFP_XMTR_TECH_LC = (1 << 8),	/* longwave laser */
 833	SFP_XMTR_TECH_SA = (1 << 9)
 834};
 835
 836/*
 837 * Serial ID: Data Fields -- Address A0h
 838 * Basic ID field total 64 bytes
 839 */
 840struct sfp_srlid_base_s {
 841	u8	id;		/* 00: Identifier */
 842	u8	extid;		/* 01: Extended Identifier */
 843	u8	connector;	/* 02: Connector */
 844	u8	xcvr[8];	/* 03-10: Transceiver */
 845	u8	encoding;	/* 11: Encoding */
 846	u8	br_norm;	/* 12: BR, Nominal */
 847	u8	rate_id;	/* 13: Rate Identifier */
 848	u8	len_km;		/* 14: Length single mode km */
 849	u8	len_100m;	/* 15: Length single mode 100m */
 850	u8	len_om2;	/* 16: Length om2 fiber 10m */
 851	u8	len_om1;	/* 17: Length om1 fiber 10m */
 852	u8	len_cu;		/* 18: Length copper 1m */
 853	u8	len_om3;	/* 19: Length om3 fiber 10m */
 854	u8	vendor_name[16];/* 20-35 */
 855	u8	unalloc1;
 856	u8	vendor_oui[3];	/* 37-39 */
 857	u8	vendor_pn[16];	/* 40-55 */
 858	u8	vendor_rev[4];	/* 56-59 */
 859	u8	wavelen[2];	/* 60-61 */
 860	u8	unalloc2;
 861	u8	cc_base;	/* 63: check code for base id field */
 862};
 863
 864/*
 865 * Serial ID: Data Fields -- Address A0h
 866 * Extended id field total 32 bytes
 867 */
 868struct sfp_srlid_ext_s {
 869	u8	options[2];
 870	u8	br_max;
 871	u8	br_min;
 872	u8	vendor_sn[16];
 873	u8	date_code[8];
 874	u8	diag_mon_type;  /* 92: Diagnostic Monitoring type */
 875	u8	en_options;
 876	u8	sff_8472;
 877	u8	cc_ext;
 878};
 879
 880/*
 881 * Diagnostic: Data Fields -- Address A2h
 882 * Diagnostic and control/status base field total 96 bytes
 883 */
 884struct sfp_diag_base_s {
 885	/*
 886	 * Alarm and warning Thresholds 40 bytes
 887	 */
 888	u8	temp_high_alarm[2]; /* 00-01 */
 889	u8	temp_low_alarm[2];  /* 02-03 */
 890	u8	temp_high_warning[2];   /* 04-05 */
 891	u8	temp_low_warning[2];    /* 06-07 */
 892
 893	u8	volt_high_alarm[2]; /* 08-09 */
 894	u8	volt_low_alarm[2];  /* 10-11 */
 895	u8	volt_high_warning[2];   /* 12-13 */
 896	u8	volt_low_warning[2];    /* 14-15 */
 897
 898	u8	bias_high_alarm[2]; /* 16-17 */
 899	u8	bias_low_alarm[2];  /* 18-19 */
 900	u8	bias_high_warning[2];   /* 20-21 */
 901	u8	bias_low_warning[2];    /* 22-23 */
 902
 903	u8	tx_pwr_high_alarm[2];   /* 24-25 */
 904	u8	tx_pwr_low_alarm[2];    /* 26-27 */
 905	u8	tx_pwr_high_warning[2]; /* 28-29 */
 906	u8	tx_pwr_low_warning[2];  /* 30-31 */
 907
 908	u8	rx_pwr_high_alarm[2];   /* 32-33 */
 909	u8	rx_pwr_low_alarm[2];    /* 34-35 */
 910	u8	rx_pwr_high_warning[2]; /* 36-37 */
 911	u8	rx_pwr_low_warning[2];  /* 38-39 */
 912
 913	u8	unallocate_1[16];
 914
 915	/*
 916	 * ext_cal_const[36]
 917	 */
 918	u8	rx_pwr[20];
 919	u8	tx_i[4];
 920	u8	tx_pwr[4];
 921	u8	temp[4];
 922	u8	volt[4];
 923	u8	unallocate_2[3];
 924	u8	cc_dmi;
 925};
 926
 927/*
 928 * Diagnostic: Data Fields -- Address A2h
 929 * Diagnostic and control/status extended field total 24 bytes
 930 */
 931struct sfp_diag_ext_s {
 932	u8	diag[SFP_DIAGMON_SIZE];
 933	u8	unalloc1[4];
 934	u8	status_ctl;
 935	u8	rsvd;
 936	u8	alarm_flags[2];
 937	u8	unalloc2[2];
 938	u8	warning_flags[2];
 939	u8	ext_status_ctl[2];
 940};
 941
 942/*
 943 * Diagnostic: Data Fields -- Address A2h
 944 * General Use Fields: User Writable Table - Features's Control Registers
 945 * Total 32 bytes
 946 */
 947struct sfp_usr_eeprom_s {
 948	u8	rsvd1[2];       /* 128-129 */
 949	u8	ewrap;          /* 130 */
 950	u8	rsvd2[2];       /*  */
 951	u8	owrap;          /* 133 */
 952	u8	rsvd3[2];       /*  */
 953	u8	prbs;           /* 136: PRBS 7 generator */
 954	u8	rsvd4[2];       /*  */
 955	u8	tx_eqz_16;      /* 139: TX Equalizer (16xFC) */
 956	u8	tx_eqz_8;       /* 140: TX Equalizer (8xFC) */
 957	u8	rsvd5[2];       /*  */
 958	u8	rx_emp_16;      /* 143: RX Emphasis (16xFC) */
 959	u8	rx_emp_8;       /* 144: RX Emphasis (8xFC) */
 960	u8	rsvd6[2];       /*  */
 961	u8	tx_eye_adj;     /* 147: TX eye Threshold Adjust */
 962	u8	rsvd7[3];       /*  */
 963	u8	tx_eye_qctl;    /* 151: TX eye Quality Control */
 964	u8	tx_eye_qres;    /* 152: TX eye Quality Result */
 965	u8	rsvd8[2];       /*  */
 966	u8	poh[3];         /* 155-157: Power On Hours */
 967	u8	rsvd9[2];       /*  */
 968};
 969
 970struct sfp_mem_s {
 971	struct sfp_srlid_base_s	srlid_base;
 972	struct sfp_srlid_ext_s	srlid_ext;
 973	struct sfp_diag_base_s	diag_base;
 974	struct sfp_diag_ext_s	diag_ext;
 975	struct sfp_usr_eeprom_s usr_eeprom;
 976};
 977
 978/*
 979 * transceiver codes (SFF-8472 Rev 10.2 Table 3.5)
 980 */
 981union sfp_xcvr_e10g_code_u {
 982	u8		b;
 983	struct {
 984#ifdef __BIG_ENDIAN
 985		u8	e10g_unall:1;   /* 10G Ethernet compliance */
 986		u8	e10g_lrm:1;
 987		u8	e10g_lr:1;
 988		u8	e10g_sr:1;
 989		u8	ib_sx:1;    /* Infiniband compliance */
 990		u8	ib_lx:1;
 991		u8	ib_cu_a:1;
 992		u8	ib_cu_p:1;
 993#else
 994		u8	ib_cu_p:1;
 995		u8	ib_cu_a:1;
 996		u8	ib_lx:1;
 997		u8	ib_sx:1;    /* Infiniband compliance */
 998		u8	e10g_sr:1;
 999		u8	e10g_lr:1;
1000		u8	e10g_lrm:1;
1001		u8	e10g_unall:1;   /* 10G Ethernet compliance */
1002#endif
1003	} r;
1004};
1005
1006union sfp_xcvr_so1_code_u {
1007	u8		b;
1008	struct {
1009		u8	escon:2;    /* ESCON compliance code */
1010		u8	oc192_reach:1;  /* SONET compliance code */
1011		u8	so_reach:2;
1012		u8	oc48_reach:3;
1013	} r;
1014};
1015
1016union sfp_xcvr_so2_code_u {
1017	u8		b;
1018	struct {
1019		u8	reserved:1;
1020		u8	oc12_reach:3;   /* OC12 reach */
1021		u8	reserved1:1;
1022		u8	oc3_reach:3;    /* OC3 reach */
1023	} r;
1024};
1025
1026union sfp_xcvr_eth_code_u {
1027	u8		b;
1028	struct {
1029		u8	base_px:1;
1030		u8	base_bx10:1;
1031		u8	e100base_fx:1;
1032		u8	e100base_lx:1;
1033		u8	e1000base_t:1;
1034		u8	e1000base_cx:1;
1035		u8	e1000base_lx:1;
1036		u8	e1000base_sx:1;
1037	} r;
1038};
1039
1040struct sfp_xcvr_fc1_code_s {
1041	u8	link_len:5; /* FC link length */
1042	u8	xmtr_tech2:3;
1043	u8	xmtr_tech1:7;   /* FC transmitter technology */
1044	u8	reserved1:1;
1045};
1046
1047union sfp_xcvr_fc2_code_u {
1048	u8		b;
1049	struct {
1050		u8	tw_media:1; /* twin axial pair (tw) */
1051		u8	tp_media:1; /* shielded twisted pair (sp) */
1052		u8	mi_media:1; /* miniature coax (mi) */
1053		u8	tv_media:1; /* video coax (tv) */
1054		u8	m6_media:1; /* multimode, 62.5m (m6) */
1055		u8	m5_media:1; /* multimode, 50m (m5) */
1056		u8	reserved:1;
1057		u8	sm_media:1; /* single mode (sm) */
1058	} r;
1059};
1060
1061union sfp_xcvr_fc3_code_u {
1062	u8		b;
1063	struct {
1064#ifdef __BIG_ENDIAN
1065		u8	rsv4:1;
1066		u8	mb800:1;    /* 800 Mbytes/sec */
1067		u8	mb1600:1;   /* 1600 Mbytes/sec */
1068		u8	mb400:1;    /* 400 Mbytes/sec */
1069		u8	rsv2:1;
1070		u8	mb200:1;    /* 200 Mbytes/sec */
1071		u8	rsv1:1;
1072		u8	mb100:1;    /* 100 Mbytes/sec */
1073#else
1074		u8	mb100:1;    /* 100 Mbytes/sec */
1075		u8	rsv1:1;
1076		u8	mb200:1;    /* 200 Mbytes/sec */
1077		u8	rsv2:1;
1078		u8	mb400:1;    /* 400 Mbytes/sec */
1079		u8	mb1600:1;   /* 1600 Mbytes/sec */
1080		u8	mb800:1;    /* 800 Mbytes/sec */
1081		u8	rsv4:1;
1082#endif
1083	} r;
1084};
1085
1086struct sfp_xcvr_s {
1087	union sfp_xcvr_e10g_code_u	e10g;
1088	union sfp_xcvr_so1_code_u	so1;
1089	union sfp_xcvr_so2_code_u	so2;
1090	union sfp_xcvr_eth_code_u	eth;
1091	struct sfp_xcvr_fc1_code_s	fc1;
1092	union sfp_xcvr_fc2_code_u	fc2;
1093	union sfp_xcvr_fc3_code_u	fc3;
1094};
1095
1096/*
1097 *	Flash module specific
1098 */
1099#define BFA_FLASH_PART_ENTRY_SIZE	32	/* partition entry size */
1100#define BFA_FLASH_PART_MAX		32	/* maximal # of partitions */
1101
1102enum bfa_flash_part_type {
1103	BFA_FLASH_PART_OPTROM   = 1,    /* option rom partition */
1104	BFA_FLASH_PART_FWIMG    = 2,    /* firmware image partition */
1105	BFA_FLASH_PART_FWCFG    = 3,    /* firmware tuneable config */
1106	BFA_FLASH_PART_DRV      = 4,    /* IOC driver config */
1107	BFA_FLASH_PART_BOOT     = 5,    /* boot config */
1108	BFA_FLASH_PART_ASIC     = 6,    /* asic bootstrap configuration */
1109	BFA_FLASH_PART_MFG      = 7,    /* manufacturing block partition */
1110	BFA_FLASH_PART_OPTROM2  = 8,    /* 2nd option rom partition */
1111	BFA_FLASH_PART_VPD      = 9,    /* vpd data of OEM info */
1112	BFA_FLASH_PART_PBC      = 10,   /* pre-boot config */
1113	BFA_FLASH_PART_BOOTOVL  = 11,   /* boot overlay partition */
1114	BFA_FLASH_PART_LOG      = 12,   /* firmware log partition */
1115	BFA_FLASH_PART_PXECFG   = 13,   /* pxe boot config partition */
1116	BFA_FLASH_PART_PXEOVL   = 14,   /* pxe boot overlay partition */
1117	BFA_FLASH_PART_PORTCFG  = 15,   /* port cfg partition */
1118	BFA_FLASH_PART_ASICBK   = 16,   /* asic backup partition */
1119};
1120
1121/*
1122 * flash partition attributes
1123 */
1124struct bfa_flash_part_attr_s {
1125	u32	part_type;      /* partition type */
1126	u32	part_instance;  /* partition instance */
1127	u32	part_off;       /* partition offset */
1128	u32	part_size;      /* partition size */
1129	u32	part_len;       /* partition content length */
1130	u32	part_status;    /* partition status */
1131	char	rsv[BFA_FLASH_PART_ENTRY_SIZE - 24];
1132};
1133
1134/*
1135 * flash attributes
1136 */
1137struct bfa_flash_attr_s {
1138	u32	status; /* flash overall status */
1139	u32	npart;  /* num of partitions */
1140	struct bfa_flash_part_attr_s part[BFA_FLASH_PART_MAX];
1141};
1142
1143/*
1144 *	DIAG module specific
1145 */
1146#define LB_PATTERN_DEFAULT	0xB5B5B5B5
1147#define QTEST_CNT_DEFAULT	10
1148#define QTEST_PAT_DEFAULT	LB_PATTERN_DEFAULT
1149#define DPORT_ENABLE_LOOPCNT_DEFAULT (1024 * 1024)
1150
1151struct bfa_diag_memtest_s {
1152	u8	algo;
1153	u8	rsvd[7];
1154};
1155
1156struct bfa_diag_memtest_result {
1157	u32	status;
1158	u32	addr;
1159	u32	exp; /* expect value read from reg */
1160	u32	act; /* actually value read */
1161	u32	err_status;             /* error status reg */
1162	u32	err_status1;    /* extra error info reg */
1163	u32	err_addr; /* error address reg */
1164	u8	algo;
1165	u8	rsv[3];
1166};
1167
1168struct bfa_diag_loopback_result_s {
1169	u32	numtxmfrm;      /* no. of transmit frame */
1170	u32	numosffrm;      /* no. of outstanding frame */
1171	u32	numrcvfrm;      /* no. of received good frame */
1172	u32	badfrminf;      /* mis-match info */
1173	u32	badfrmnum;      /* mis-match fram number */
1174	u8	status;         /* loopback test result */
1175	u8	rsvd[3];
1176};
1177
1178enum bfa_diag_dport_test_status {
1179	DPORT_TEST_ST_IDLE	= 0,    /* the test has not started yet. */
1180	DPORT_TEST_ST_FINAL	= 1,    /* the test done successfully */
1181	DPORT_TEST_ST_SKIP	= 2,    /* the test skipped */
1182	DPORT_TEST_ST_FAIL	= 3,    /* the test failed */
1183	DPORT_TEST_ST_INPRG	= 4,    /* the testing is in progress */
1184	DPORT_TEST_ST_RESPONDER	= 5,    /* test triggered from remote port */
1185	DPORT_TEST_ST_STOPPED	= 6,    /* the test stopped by user. */
1186	DPORT_TEST_ST_MAX
1187};
1188
1189enum bfa_diag_dport_test_type {
1190	DPORT_TEST_ELOOP	= 0,
1191	DPORT_TEST_OLOOP	= 1,
1192	DPORT_TEST_ROLOOP	= 2,
1193	DPORT_TEST_LINK		= 3,
1194	DPORT_TEST_MAX
1195};
1196
1197enum bfa_diag_dport_test_opmode {
1198	BFA_DPORT_OPMODE_AUTO	= 0,
1199	BFA_DPORT_OPMODE_MANU	= 1,
1200};
1201
1202struct bfa_diag_dport_subtest_result_s {
1203	u8	status;		/* bfa_diag_dport_test_status */
1204	u8	rsvd[7];	/* 64bit align */
1205	u64	start_time;	/* timestamp  */
1206};
1207
1208struct bfa_diag_dport_result_s {
1209	wwn_t	rp_pwwn;	/* switch port wwn  */
1210	wwn_t	rp_nwwn;	/* switch node wwn  */
1211	u64	start_time;	/* user/sw start time */
1212	u64	end_time;	/* timestamp  */
1213	u8	status;		/* bfa_diag_dport_test_status */
1214	u8	mode;		/* bfa_diag_dport_test_opmode */
1215	u8	rsvd;		/* 64bit align */
1216	u8	speed;		/* link speed for buf_reqd */
1217	u16	buffer_required;
1218	u16	frmsz;		/* frame size for buf_reqd */
1219	u32	lpcnt;		/* Frame count */
1220	u32	pat;		/* Pattern */
1221	u32	roundtrip_latency;	/* in nano sec */
1222	u32	est_cable_distance;	/* in meter */
1223	struct bfa_diag_dport_subtest_result_s subtest[DPORT_TEST_MAX];
1224};
1225
1226struct bfa_diag_ledtest_s {
1227	u32	cmd;    /* bfa_led_op_t */
1228	u32	color;  /* bfa_led_color_t */
1229	u16	freq;   /* no. of blinks every 10 secs */
1230	u8	led;    /* bitmap of LEDs to be tested */
1231	u8	rsvd[5];
1232};
1233
1234struct bfa_diag_loopback_s {
1235	u32	loopcnt;
1236	u32	pattern;
1237	u8	lb_mode;    /* bfa_port_opmode_t */
1238	u8	speed;      /* bfa_port_speed_t */
1239	u8	rsvd[2];
1240};
1241
1242/*
1243 *	PHY module specific
1244 */
1245enum bfa_phy_status_e {
1246	BFA_PHY_STATUS_GOOD	= 0, /* phy is good */
1247	BFA_PHY_STATUS_NOT_PRESENT	= 1, /* phy does not exist */
1248	BFA_PHY_STATUS_BAD	= 2, /* phy is bad */
1249};
1250
1251/*
1252 * phy attributes for phy query
1253 */
1254struct bfa_phy_attr_s {
1255	u32	status;         /* phy present/absent status */
1256	u32	length;         /* firmware length */
1257	u32	fw_ver;         /* firmware version */
1258	u32	an_status;      /* AN status */
1259	u32	pma_pmd_status; /* PMA/PMD link status */
1260	u32	pma_pmd_signal; /* PMA/PMD signal detect */
1261	u32	pcs_status;     /* PCS link status */
1262};
1263
1264/*
1265 * phy stats
1266 */
1267struct bfa_phy_stats_s {
1268	u32	status;         /* phy stats status */
1269	u32	link_breaks;    /* Num of link breaks after linkup */
1270	u32	pma_pmd_fault;  /* NPMA/PMD fault */
1271	u32	pcs_fault;      /* PCS fault */
1272	u32	speed_neg;      /* Num of speed negotiation */
1273	u32	tx_eq_training; /* Num of TX EQ training */
1274	u32	tx_eq_timeout;  /* Num of TX EQ timeout */
1275	u32	crc_error;      /* Num of CRC errors */
1276};
1277
1278#pragma pack()
1279
1280#endif /* __BFA_DEFS_H__ */