/drivers/scsi/fnic/vnic_dev.c

http://github.com/mirrors/linux · C · 953 lines · 737 code · 180 blank · 36 comment · 94 complexity · c66746fb68d96c0a6e82b3798ce799bb MD5 · raw file

  1. /*
  2. * Copyright 2008 Cisco Systems, Inc. All rights reserved.
  3. * Copyright 2007 Nuova Systems, Inc. All rights reserved.
  4. *
  5. * This program is free software; you may redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  10. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  11. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  12. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  13. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  14. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  15. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  16. * SOFTWARE.
  17. */
  18. #include <linux/kernel.h>
  19. #include <linux/errno.h>
  20. #include <linux/types.h>
  21. #include <linux/pci.h>
  22. #include <linux/delay.h>
  23. #include <linux/if_ether.h>
  24. #include <linux/slab.h>
  25. #include "vnic_resource.h"
  26. #include "vnic_devcmd.h"
  27. #include "vnic_dev.h"
  28. #include "vnic_stats.h"
  29. #include "vnic_wq.h"
  30. struct devcmd2_controller {
  31. struct vnic_wq_ctrl *wq_ctrl;
  32. struct vnic_dev_ring results_ring;
  33. struct vnic_wq wq;
  34. struct vnic_devcmd2 *cmd_ring;
  35. struct devcmd2_result *result;
  36. u16 next_result;
  37. u16 result_size;
  38. int color;
  39. };
  40. enum vnic_proxy_type {
  41. PROXY_NONE,
  42. PROXY_BY_BDF,
  43. PROXY_BY_INDEX,
  44. };
  45. struct vnic_res {
  46. void __iomem *vaddr;
  47. unsigned int count;
  48. };
  49. struct vnic_dev {
  50. void *priv;
  51. struct pci_dev *pdev;
  52. struct vnic_res res[RES_TYPE_MAX];
  53. enum vnic_dev_intr_mode intr_mode;
  54. struct vnic_devcmd __iomem *devcmd;
  55. struct vnic_devcmd_notify *notify;
  56. struct vnic_devcmd_notify notify_copy;
  57. dma_addr_t notify_pa;
  58. u32 *linkstatus;
  59. dma_addr_t linkstatus_pa;
  60. struct vnic_stats *stats;
  61. dma_addr_t stats_pa;
  62. struct vnic_devcmd_fw_info *fw_info;
  63. dma_addr_t fw_info_pa;
  64. enum vnic_proxy_type proxy;
  65. u32 proxy_index;
  66. u64 args[VNIC_DEVCMD_NARGS];
  67. struct devcmd2_controller *devcmd2;
  68. int (*devcmd_rtn)(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
  69. int wait);
  70. };
  71. #define VNIC_MAX_RES_HDR_SIZE \
  72. (sizeof(struct vnic_resource_header) + \
  73. sizeof(struct vnic_resource) * RES_TYPE_MAX)
  74. #define VNIC_RES_STRIDE 128
  75. void *vnic_dev_priv(struct vnic_dev *vdev)
  76. {
  77. return vdev->priv;
  78. }
  79. static int vnic_dev_discover_res(struct vnic_dev *vdev,
  80. struct vnic_dev_bar *bar)
  81. {
  82. struct vnic_resource_header __iomem *rh;
  83. struct vnic_resource __iomem *r;
  84. u8 type;
  85. if (bar->len < VNIC_MAX_RES_HDR_SIZE) {
  86. printk(KERN_ERR "vNIC BAR0 res hdr length error\n");
  87. return -EINVAL;
  88. }
  89. rh = bar->vaddr;
  90. if (!rh) {
  91. printk(KERN_ERR "vNIC BAR0 res hdr not mem-mapped\n");
  92. return -EINVAL;
  93. }
  94. if (ioread32(&rh->magic) != VNIC_RES_MAGIC ||
  95. ioread32(&rh->version) != VNIC_RES_VERSION) {
  96. printk(KERN_ERR "vNIC BAR0 res magic/version error "
  97. "exp (%lx/%lx) curr (%x/%x)\n",
  98. VNIC_RES_MAGIC, VNIC_RES_VERSION,
  99. ioread32(&rh->magic), ioread32(&rh->version));
  100. return -EINVAL;
  101. }
  102. r = (struct vnic_resource __iomem *)(rh + 1);
  103. while ((type = ioread8(&r->type)) != RES_TYPE_EOL) {
  104. u8 bar_num = ioread8(&r->bar);
  105. u32 bar_offset = ioread32(&r->bar_offset);
  106. u32 count = ioread32(&r->count);
  107. u32 len;
  108. r++;
  109. if (bar_num != 0) /* only mapping in BAR0 resources */
  110. continue;
  111. switch (type) {
  112. case RES_TYPE_WQ:
  113. case RES_TYPE_RQ:
  114. case RES_TYPE_CQ:
  115. case RES_TYPE_INTR_CTRL:
  116. /* each count is stride bytes long */
  117. len = count * VNIC_RES_STRIDE;
  118. if (len + bar_offset > bar->len) {
  119. printk(KERN_ERR "vNIC BAR0 resource %d "
  120. "out-of-bounds, offset 0x%x + "
  121. "size 0x%x > bar len 0x%lx\n",
  122. type, bar_offset,
  123. len,
  124. bar->len);
  125. return -EINVAL;
  126. }
  127. break;
  128. case RES_TYPE_INTR_PBA_LEGACY:
  129. case RES_TYPE_DEVCMD2:
  130. case RES_TYPE_DEVCMD:
  131. len = count;
  132. break;
  133. default:
  134. continue;
  135. }
  136. vdev->res[type].count = count;
  137. vdev->res[type].vaddr = (char __iomem *)bar->vaddr + bar_offset;
  138. }
  139. return 0;
  140. }
  141. unsigned int vnic_dev_get_res_count(struct vnic_dev *vdev,
  142. enum vnic_res_type type)
  143. {
  144. return vdev->res[type].count;
  145. }
  146. void __iomem *vnic_dev_get_res(struct vnic_dev *vdev, enum vnic_res_type type,
  147. unsigned int index)
  148. {
  149. if (!vdev->res[type].vaddr)
  150. return NULL;
  151. switch (type) {
  152. case RES_TYPE_WQ:
  153. case RES_TYPE_RQ:
  154. case RES_TYPE_CQ:
  155. case RES_TYPE_INTR_CTRL:
  156. return (char __iomem *)vdev->res[type].vaddr +
  157. index * VNIC_RES_STRIDE;
  158. default:
  159. return (char __iomem *)vdev->res[type].vaddr;
  160. }
  161. }
  162. unsigned int vnic_dev_desc_ring_size(struct vnic_dev_ring *ring,
  163. unsigned int desc_count,
  164. unsigned int desc_size)
  165. {
  166. /* The base address of the desc rings must be 512 byte aligned.
  167. * Descriptor count is aligned to groups of 32 descriptors. A
  168. * count of 0 means the maximum 4096 descriptors. Descriptor
  169. * size is aligned to 16 bytes.
  170. */
  171. unsigned int count_align = 32;
  172. unsigned int desc_align = 16;
  173. ring->base_align = 512;
  174. if (desc_count == 0)
  175. desc_count = 4096;
  176. ring->desc_count = ALIGN(desc_count, count_align);
  177. ring->desc_size = ALIGN(desc_size, desc_align);
  178. ring->size = ring->desc_count * ring->desc_size;
  179. ring->size_unaligned = ring->size + ring->base_align;
  180. return ring->size_unaligned;
  181. }
  182. void vnic_dev_clear_desc_ring(struct vnic_dev_ring *ring)
  183. {
  184. memset(ring->descs, 0, ring->size);
  185. }
  186. int vnic_dev_alloc_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring,
  187. unsigned int desc_count, unsigned int desc_size)
  188. {
  189. vnic_dev_desc_ring_size(ring, desc_count, desc_size);
  190. ring->descs_unaligned = dma_alloc_coherent(&vdev->pdev->dev,
  191. ring->size_unaligned,
  192. &ring->base_addr_unaligned, GFP_KERNEL);
  193. if (!ring->descs_unaligned) {
  194. printk(KERN_ERR
  195. "Failed to allocate ring (size=%d), aborting\n",
  196. (int)ring->size);
  197. return -ENOMEM;
  198. }
  199. ring->base_addr = ALIGN(ring->base_addr_unaligned,
  200. ring->base_align);
  201. ring->descs = (u8 *)ring->descs_unaligned +
  202. (ring->base_addr - ring->base_addr_unaligned);
  203. vnic_dev_clear_desc_ring(ring);
  204. ring->desc_avail = ring->desc_count - 1;
  205. return 0;
  206. }
  207. void vnic_dev_free_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring)
  208. {
  209. if (ring->descs) {
  210. dma_free_coherent(&vdev->pdev->dev,
  211. ring->size_unaligned,
  212. ring->descs_unaligned,
  213. ring->base_addr_unaligned);
  214. ring->descs = NULL;
  215. }
  216. }
  217. int vnic_dev_cmd1(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd, int wait)
  218. {
  219. struct vnic_devcmd __iomem *devcmd = vdev->devcmd;
  220. int delay;
  221. u32 status;
  222. static const int dev_cmd_err[] = {
  223. /* convert from fw's version of error.h to host's version */
  224. 0, /* ERR_SUCCESS */
  225. EINVAL, /* ERR_EINVAL */
  226. EFAULT, /* ERR_EFAULT */
  227. EPERM, /* ERR_EPERM */
  228. EBUSY, /* ERR_EBUSY */
  229. };
  230. int err;
  231. u64 *a0 = &vdev->args[0];
  232. u64 *a1 = &vdev->args[1];
  233. status = ioread32(&devcmd->status);
  234. if (status & STAT_BUSY) {
  235. printk(KERN_ERR "Busy devcmd %d\n", _CMD_N(cmd));
  236. return -EBUSY;
  237. }
  238. if (_CMD_DIR(cmd) & _CMD_DIR_WRITE) {
  239. writeq(*a0, &devcmd->args[0]);
  240. writeq(*a1, &devcmd->args[1]);
  241. wmb();
  242. }
  243. iowrite32(cmd, &devcmd->cmd);
  244. if ((_CMD_FLAGS(cmd) & _CMD_FLAGS_NOWAIT))
  245. return 0;
  246. for (delay = 0; delay < wait; delay++) {
  247. udelay(100);
  248. status = ioread32(&devcmd->status);
  249. if (!(status & STAT_BUSY)) {
  250. if (status & STAT_ERROR) {
  251. err = dev_cmd_err[(int)readq(&devcmd->args[0])];
  252. printk(KERN_ERR "Error %d devcmd %d\n",
  253. err, _CMD_N(cmd));
  254. return -err;
  255. }
  256. if (_CMD_DIR(cmd) & _CMD_DIR_READ) {
  257. rmb();
  258. *a0 = readq(&devcmd->args[0]);
  259. *a1 = readq(&devcmd->args[1]);
  260. }
  261. return 0;
  262. }
  263. }
  264. printk(KERN_ERR "Timedout devcmd %d\n", _CMD_N(cmd));
  265. return -ETIMEDOUT;
  266. }
  267. int vnic_dev_cmd2(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
  268. int wait)
  269. {
  270. struct devcmd2_controller *dc2c = vdev->devcmd2;
  271. struct devcmd2_result *result;
  272. u8 color;
  273. unsigned int i;
  274. int delay;
  275. int err;
  276. u32 fetch_index;
  277. u32 posted;
  278. u32 new_posted;
  279. posted = ioread32(&dc2c->wq_ctrl->posted_index);
  280. fetch_index = ioread32(&dc2c->wq_ctrl->fetch_index);
  281. if (posted == 0xFFFFFFFF || fetch_index == 0xFFFFFFFF) {
  282. /* Hardware surprise removal: return error */
  283. pr_err("%s: devcmd2 invalid posted or fetch index on cmd %d\n",
  284. pci_name(vdev->pdev), _CMD_N(cmd));
  285. pr_err("%s: fetch index: %u, posted index: %u\n",
  286. pci_name(vdev->pdev), fetch_index, posted);
  287. return -ENODEV;
  288. }
  289. new_posted = (posted + 1) % DEVCMD2_RING_SIZE;
  290. if (new_posted == fetch_index) {
  291. pr_err("%s: devcmd2 wq full while issuing cmd %d\n",
  292. pci_name(vdev->pdev), _CMD_N(cmd));
  293. pr_err("%s: fetch index: %u, posted index: %u\n",
  294. pci_name(vdev->pdev), fetch_index, posted);
  295. return -EBUSY;
  296. }
  297. dc2c->cmd_ring[posted].cmd = cmd;
  298. dc2c->cmd_ring[posted].flags = 0;
  299. if ((_CMD_FLAGS(cmd) & _CMD_FLAGS_NOWAIT))
  300. dc2c->cmd_ring[posted].flags |= DEVCMD2_FNORESULT;
  301. if (_CMD_DIR(cmd) & _CMD_DIR_WRITE) {
  302. for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
  303. dc2c->cmd_ring[posted].args[i] = vdev->args[i];
  304. }
  305. /* Adding write memory barrier prevents compiler and/or CPU
  306. * reordering, thus avoiding descriptor posting before
  307. * descriptor is initialized. Otherwise, hardware can read
  308. * stale descriptor fields.
  309. */
  310. wmb();
  311. iowrite32(new_posted, &dc2c->wq_ctrl->posted_index);
  312. if (dc2c->cmd_ring[posted].flags & DEVCMD2_FNORESULT)
  313. return 0;
  314. result = dc2c->result + dc2c->next_result;
  315. color = dc2c->color;
  316. dc2c->next_result++;
  317. if (dc2c->next_result == dc2c->result_size) {
  318. dc2c->next_result = 0;
  319. dc2c->color = dc2c->color ? 0 : 1;
  320. }
  321. for (delay = 0; delay < wait; delay++) {
  322. udelay(100);
  323. if (result->color == color) {
  324. if (result->error) {
  325. err = -(int) result->error;
  326. if (err != ERR_ECMDUNKNOWN ||
  327. cmd != CMD_CAPABILITY)
  328. pr_err("%s:Error %d devcmd %d\n",
  329. pci_name(vdev->pdev),
  330. err, _CMD_N(cmd));
  331. return err;
  332. }
  333. if (_CMD_DIR(cmd) & _CMD_DIR_READ) {
  334. rmb(); /*prevent reorder while reding result*/
  335. for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
  336. vdev->args[i] = result->results[i];
  337. }
  338. return 0;
  339. }
  340. }
  341. pr_err("%s:Timed out devcmd %d\n", pci_name(vdev->pdev), _CMD_N(cmd));
  342. return -ETIMEDOUT;
  343. }
  344. int vnic_dev_init_devcmd1(struct vnic_dev *vdev)
  345. {
  346. vdev->devcmd = vnic_dev_get_res(vdev, RES_TYPE_DEVCMD, 0);
  347. if (!vdev->devcmd)
  348. return -ENODEV;
  349. vdev->devcmd_rtn = &vnic_dev_cmd1;
  350. return 0;
  351. }
  352. int vnic_dev_init_devcmd2(struct vnic_dev *vdev)
  353. {
  354. int err;
  355. unsigned int fetch_index;
  356. if (vdev->devcmd2)
  357. return 0;
  358. vdev->devcmd2 = kzalloc(sizeof(*vdev->devcmd2), GFP_ATOMIC);
  359. if (!vdev->devcmd2)
  360. return -ENOMEM;
  361. vdev->devcmd2->color = 1;
  362. vdev->devcmd2->result_size = DEVCMD2_RING_SIZE;
  363. err = vnic_wq_devcmd2_alloc(vdev, &vdev->devcmd2->wq,
  364. DEVCMD2_RING_SIZE, DEVCMD2_DESC_SIZE);
  365. if (err)
  366. goto err_free_devcmd2;
  367. fetch_index = ioread32(&vdev->devcmd2->wq.ctrl->fetch_index);
  368. if (fetch_index == 0xFFFFFFFF) { /* check for hardware gone */
  369. pr_err("error in devcmd2 init");
  370. return -ENODEV;
  371. }
  372. /*
  373. * Don't change fetch_index ever and
  374. * set posted_index same as fetch_index
  375. * when setting up the WQ for devcmd2.
  376. */
  377. vnic_wq_init_start(&vdev->devcmd2->wq, 0, fetch_index,
  378. fetch_index, 0, 0);
  379. vnic_wq_enable(&vdev->devcmd2->wq);
  380. err = vnic_dev_alloc_desc_ring(vdev, &vdev->devcmd2->results_ring,
  381. DEVCMD2_RING_SIZE, DEVCMD2_DESC_SIZE);
  382. if (err)
  383. goto err_free_wq;
  384. vdev->devcmd2->result =
  385. (struct devcmd2_result *) vdev->devcmd2->results_ring.descs;
  386. vdev->devcmd2->cmd_ring =
  387. (struct vnic_devcmd2 *) vdev->devcmd2->wq.ring.descs;
  388. vdev->devcmd2->wq_ctrl = vdev->devcmd2->wq.ctrl;
  389. vdev->args[0] = (u64) vdev->devcmd2->results_ring.base_addr |
  390. VNIC_PADDR_TARGET;
  391. vdev->args[1] = DEVCMD2_RING_SIZE;
  392. err = vnic_dev_cmd2(vdev, CMD_INITIALIZE_DEVCMD2, 1000);
  393. if (err)
  394. goto err_free_desc_ring;
  395. vdev->devcmd_rtn = &vnic_dev_cmd2;
  396. return 0;
  397. err_free_desc_ring:
  398. vnic_dev_free_desc_ring(vdev, &vdev->devcmd2->results_ring);
  399. err_free_wq:
  400. vnic_wq_disable(&vdev->devcmd2->wq);
  401. vnic_wq_free(&vdev->devcmd2->wq);
  402. err_free_devcmd2:
  403. kfree(vdev->devcmd2);
  404. vdev->devcmd2 = NULL;
  405. return err;
  406. }
  407. void vnic_dev_deinit_devcmd2(struct vnic_dev *vdev)
  408. {
  409. vnic_dev_free_desc_ring(vdev, &vdev->devcmd2->results_ring);
  410. vnic_wq_disable(&vdev->devcmd2->wq);
  411. vnic_wq_free(&vdev->devcmd2->wq);
  412. kfree(vdev->devcmd2);
  413. vdev->devcmd2 = NULL;
  414. vdev->devcmd_rtn = &vnic_dev_cmd1;
  415. }
  416. int vnic_dev_cmd_no_proxy(struct vnic_dev *vdev,
  417. enum vnic_devcmd_cmd cmd, u64 *a0, u64 *a1, int wait)
  418. {
  419. int err;
  420. vdev->args[0] = *a0;
  421. vdev->args[1] = *a1;
  422. err = (*vdev->devcmd_rtn)(vdev, cmd, wait);
  423. *a0 = vdev->args[0];
  424. *a1 = vdev->args[1];
  425. return err;
  426. }
  427. int vnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
  428. u64 *a0, u64 *a1, int wait)
  429. {
  430. memset(vdev->args, 0, sizeof(vdev->args));
  431. switch (vdev->proxy) {
  432. case PROXY_NONE:
  433. default:
  434. return vnic_dev_cmd_no_proxy(vdev, cmd, a0, a1, wait);
  435. }
  436. }
  437. int vnic_dev_fw_info(struct vnic_dev *vdev,
  438. struct vnic_devcmd_fw_info **fw_info)
  439. {
  440. u64 a0, a1 = 0;
  441. int wait = 1000;
  442. int err = 0;
  443. if (!vdev->fw_info) {
  444. vdev->fw_info = dma_alloc_coherent(&vdev->pdev->dev,
  445. sizeof(struct vnic_devcmd_fw_info),
  446. &vdev->fw_info_pa, GFP_KERNEL);
  447. if (!vdev->fw_info)
  448. return -ENOMEM;
  449. a0 = vdev->fw_info_pa;
  450. /* only get fw_info once and cache it */
  451. err = vnic_dev_cmd(vdev, CMD_MCPU_FW_INFO, &a0, &a1, wait);
  452. }
  453. *fw_info = vdev->fw_info;
  454. return err;
  455. }
  456. int vnic_dev_spec(struct vnic_dev *vdev, unsigned int offset, unsigned int size,
  457. void *value)
  458. {
  459. u64 a0, a1;
  460. int wait = 1000;
  461. int err;
  462. a0 = offset;
  463. a1 = size;
  464. err = vnic_dev_cmd(vdev, CMD_DEV_SPEC, &a0, &a1, wait);
  465. switch (size) {
  466. case 1:
  467. *(u8 *)value = (u8)a0;
  468. break;
  469. case 2:
  470. *(u16 *)value = (u16)a0;
  471. break;
  472. case 4:
  473. *(u32 *)value = (u32)a0;
  474. break;
  475. case 8:
  476. *(u64 *)value = a0;
  477. break;
  478. default:
  479. BUG();
  480. break;
  481. }
  482. return err;
  483. }
  484. int vnic_dev_stats_clear(struct vnic_dev *vdev)
  485. {
  486. u64 a0 = 0, a1 = 0;
  487. int wait = 1000;
  488. return vnic_dev_cmd(vdev, CMD_STATS_CLEAR, &a0, &a1, wait);
  489. }
  490. int vnic_dev_stats_dump(struct vnic_dev *vdev, struct vnic_stats **stats)
  491. {
  492. u64 a0, a1;
  493. int wait = 1000;
  494. if (!vdev->stats) {
  495. vdev->stats = dma_alloc_coherent(&vdev->pdev->dev,
  496. sizeof(struct vnic_stats), &vdev->stats_pa, GFP_KERNEL);
  497. if (!vdev->stats)
  498. return -ENOMEM;
  499. }
  500. *stats = vdev->stats;
  501. a0 = vdev->stats_pa;
  502. a1 = sizeof(struct vnic_stats);
  503. return vnic_dev_cmd(vdev, CMD_STATS_DUMP, &a0, &a1, wait);
  504. }
  505. int vnic_dev_close(struct vnic_dev *vdev)
  506. {
  507. u64 a0 = 0, a1 = 0;
  508. int wait = 1000;
  509. return vnic_dev_cmd(vdev, CMD_CLOSE, &a0, &a1, wait);
  510. }
  511. int vnic_dev_enable(struct vnic_dev *vdev)
  512. {
  513. u64 a0 = 0, a1 = 0;
  514. int wait = 1000;
  515. return vnic_dev_cmd(vdev, CMD_ENABLE, &a0, &a1, wait);
  516. }
  517. int vnic_dev_disable(struct vnic_dev *vdev)
  518. {
  519. u64 a0 = 0, a1 = 0;
  520. int wait = 1000;
  521. return vnic_dev_cmd(vdev, CMD_DISABLE, &a0, &a1, wait);
  522. }
  523. int vnic_dev_open(struct vnic_dev *vdev, int arg)
  524. {
  525. u64 a0 = (u32)arg, a1 = 0;
  526. int wait = 1000;
  527. return vnic_dev_cmd(vdev, CMD_OPEN, &a0, &a1, wait);
  528. }
  529. int vnic_dev_open_done(struct vnic_dev *vdev, int *done)
  530. {
  531. u64 a0 = 0, a1 = 0;
  532. int wait = 1000;
  533. int err;
  534. *done = 0;
  535. err = vnic_dev_cmd(vdev, CMD_OPEN_STATUS, &a0, &a1, wait);
  536. if (err)
  537. return err;
  538. *done = (a0 == 0);
  539. return 0;
  540. }
  541. int vnic_dev_soft_reset(struct vnic_dev *vdev, int arg)
  542. {
  543. u64 a0 = (u32)arg, a1 = 0;
  544. int wait = 1000;
  545. return vnic_dev_cmd(vdev, CMD_SOFT_RESET, &a0, &a1, wait);
  546. }
  547. int vnic_dev_soft_reset_done(struct vnic_dev *vdev, int *done)
  548. {
  549. u64 a0 = 0, a1 = 0;
  550. int wait = 1000;
  551. int err;
  552. *done = 0;
  553. err = vnic_dev_cmd(vdev, CMD_SOFT_RESET_STATUS, &a0, &a1, wait);
  554. if (err)
  555. return err;
  556. *done = (a0 == 0);
  557. return 0;
  558. }
  559. int vnic_dev_hang_notify(struct vnic_dev *vdev)
  560. {
  561. u64 a0 = 0, a1 = 0;
  562. int wait = 1000;
  563. return vnic_dev_cmd(vdev, CMD_HANG_NOTIFY, &a0, &a1, wait);
  564. }
  565. int vnic_dev_mac_addr(struct vnic_dev *vdev, u8 *mac_addr)
  566. {
  567. u64 a[2] = {};
  568. int wait = 1000;
  569. int err, i;
  570. for (i = 0; i < ETH_ALEN; i++)
  571. mac_addr[i] = 0;
  572. err = vnic_dev_cmd(vdev, CMD_MAC_ADDR, &a[0], &a[1], wait);
  573. if (err)
  574. return err;
  575. for (i = 0; i < ETH_ALEN; i++)
  576. mac_addr[i] = ((u8 *)&a)[i];
  577. return 0;
  578. }
  579. void vnic_dev_packet_filter(struct vnic_dev *vdev, int directed, int multicast,
  580. int broadcast, int promisc, int allmulti)
  581. {
  582. u64 a0, a1 = 0;
  583. int wait = 1000;
  584. int err;
  585. a0 = (directed ? CMD_PFILTER_DIRECTED : 0) |
  586. (multicast ? CMD_PFILTER_MULTICAST : 0) |
  587. (broadcast ? CMD_PFILTER_BROADCAST : 0) |
  588. (promisc ? CMD_PFILTER_PROMISCUOUS : 0) |
  589. (allmulti ? CMD_PFILTER_ALL_MULTICAST : 0);
  590. err = vnic_dev_cmd(vdev, CMD_PACKET_FILTER, &a0, &a1, wait);
  591. if (err)
  592. printk(KERN_ERR "Can't set packet filter\n");
  593. }
  594. void vnic_dev_add_addr(struct vnic_dev *vdev, u8 *addr)
  595. {
  596. u64 a[2] = {};
  597. int wait = 1000;
  598. int err;
  599. int i;
  600. for (i = 0; i < ETH_ALEN; i++)
  601. ((u8 *)&a)[i] = addr[i];
  602. err = vnic_dev_cmd(vdev, CMD_ADDR_ADD, &a[0], &a[1], wait);
  603. if (err)
  604. pr_err("Can't add addr [%pM], %d\n", addr, err);
  605. }
  606. void vnic_dev_del_addr(struct vnic_dev *vdev, u8 *addr)
  607. {
  608. u64 a[2] = {};
  609. int wait = 1000;
  610. int err;
  611. int i;
  612. for (i = 0; i < ETH_ALEN; i++)
  613. ((u8 *)&a)[i] = addr[i];
  614. err = vnic_dev_cmd(vdev, CMD_ADDR_DEL, &a[0], &a[1], wait);
  615. if (err)
  616. pr_err("Can't del addr [%pM], %d\n", addr, err);
  617. }
  618. int vnic_dev_notify_set(struct vnic_dev *vdev, u16 intr)
  619. {
  620. u64 a0, a1;
  621. int wait = 1000;
  622. if (!vdev->notify) {
  623. vdev->notify = dma_alloc_coherent(&vdev->pdev->dev,
  624. sizeof(struct vnic_devcmd_notify),
  625. &vdev->notify_pa, GFP_KERNEL);
  626. if (!vdev->notify)
  627. return -ENOMEM;
  628. }
  629. a0 = vdev->notify_pa;
  630. a1 = ((u64)intr << 32) & 0x0000ffff00000000ULL;
  631. a1 += sizeof(struct vnic_devcmd_notify);
  632. return vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
  633. }
  634. void vnic_dev_notify_unset(struct vnic_dev *vdev)
  635. {
  636. u64 a0, a1;
  637. int wait = 1000;
  638. a0 = 0; /* paddr = 0 to unset notify buffer */
  639. a1 = 0x0000ffff00000000ULL; /* intr num = -1 to unreg for intr */
  640. a1 += sizeof(struct vnic_devcmd_notify);
  641. vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
  642. }
  643. static int vnic_dev_notify_ready(struct vnic_dev *vdev)
  644. {
  645. u32 *words;
  646. unsigned int nwords = sizeof(struct vnic_devcmd_notify) / 4;
  647. unsigned int i;
  648. u32 csum;
  649. if (!vdev->notify)
  650. return 0;
  651. do {
  652. csum = 0;
  653. memcpy(&vdev->notify_copy, vdev->notify,
  654. sizeof(struct vnic_devcmd_notify));
  655. words = (u32 *)&vdev->notify_copy;
  656. for (i = 1; i < nwords; i++)
  657. csum += words[i];
  658. } while (csum != words[0]);
  659. return 1;
  660. }
  661. int vnic_dev_init(struct vnic_dev *vdev, int arg)
  662. {
  663. u64 a0 = (u32)arg, a1 = 0;
  664. int wait = 1000;
  665. return vnic_dev_cmd(vdev, CMD_INIT, &a0, &a1, wait);
  666. }
  667. u16 vnic_dev_set_default_vlan(struct vnic_dev *vdev, u16 new_default_vlan)
  668. {
  669. u64 a0 = new_default_vlan, a1 = 0;
  670. int wait = 1000;
  671. int old_vlan = 0;
  672. old_vlan = vnic_dev_cmd(vdev, CMD_SET_DEFAULT_VLAN, &a0, &a1, wait);
  673. return (u16)old_vlan;
  674. }
  675. int vnic_dev_link_status(struct vnic_dev *vdev)
  676. {
  677. if (vdev->linkstatus)
  678. return *vdev->linkstatus;
  679. if (!vnic_dev_notify_ready(vdev))
  680. return 0;
  681. return vdev->notify_copy.link_state;
  682. }
  683. u32 vnic_dev_port_speed(struct vnic_dev *vdev)
  684. {
  685. if (!vnic_dev_notify_ready(vdev))
  686. return 0;
  687. return vdev->notify_copy.port_speed;
  688. }
  689. u32 vnic_dev_msg_lvl(struct vnic_dev *vdev)
  690. {
  691. if (!vnic_dev_notify_ready(vdev))
  692. return 0;
  693. return vdev->notify_copy.msglvl;
  694. }
  695. u32 vnic_dev_mtu(struct vnic_dev *vdev)
  696. {
  697. if (!vnic_dev_notify_ready(vdev))
  698. return 0;
  699. return vdev->notify_copy.mtu;
  700. }
  701. u32 vnic_dev_link_down_cnt(struct vnic_dev *vdev)
  702. {
  703. if (!vnic_dev_notify_ready(vdev))
  704. return 0;
  705. return vdev->notify_copy.link_down_cnt;
  706. }
  707. void vnic_dev_set_intr_mode(struct vnic_dev *vdev,
  708. enum vnic_dev_intr_mode intr_mode)
  709. {
  710. vdev->intr_mode = intr_mode;
  711. }
  712. enum vnic_dev_intr_mode vnic_dev_get_intr_mode(
  713. struct vnic_dev *vdev)
  714. {
  715. return vdev->intr_mode;
  716. }
  717. void vnic_dev_unregister(struct vnic_dev *vdev)
  718. {
  719. if (vdev) {
  720. if (vdev->notify)
  721. dma_free_coherent(&vdev->pdev->dev,
  722. sizeof(struct vnic_devcmd_notify),
  723. vdev->notify,
  724. vdev->notify_pa);
  725. if (vdev->linkstatus)
  726. dma_free_coherent(&vdev->pdev->dev,
  727. sizeof(u32),
  728. vdev->linkstatus,
  729. vdev->linkstatus_pa);
  730. if (vdev->stats)
  731. dma_free_coherent(&vdev->pdev->dev,
  732. sizeof(struct vnic_stats),
  733. vdev->stats, vdev->stats_pa);
  734. if (vdev->fw_info)
  735. dma_free_coherent(&vdev->pdev->dev,
  736. sizeof(struct vnic_devcmd_fw_info),
  737. vdev->fw_info, vdev->fw_info_pa);
  738. if (vdev->devcmd2)
  739. vnic_dev_deinit_devcmd2(vdev);
  740. kfree(vdev);
  741. }
  742. }
  743. struct vnic_dev *vnic_dev_register(struct vnic_dev *vdev,
  744. void *priv, struct pci_dev *pdev, struct vnic_dev_bar *bar)
  745. {
  746. if (!vdev) {
  747. vdev = kzalloc(sizeof(struct vnic_dev), GFP_KERNEL);
  748. if (!vdev)
  749. return NULL;
  750. }
  751. vdev->priv = priv;
  752. vdev->pdev = pdev;
  753. if (vnic_dev_discover_res(vdev, bar))
  754. goto err_out;
  755. return vdev;
  756. err_out:
  757. vnic_dev_unregister(vdev);
  758. return NULL;
  759. }
  760. int vnic_dev_cmd_init(struct vnic_dev *vdev)
  761. {
  762. int err;
  763. void *p;
  764. p = vnic_dev_get_res(vdev, RES_TYPE_DEVCMD2, 0);
  765. if (p) {
  766. pr_err("fnic: DEVCMD2 resource found!\n");
  767. err = vnic_dev_init_devcmd2(vdev);
  768. } else {
  769. pr_err("fnic: DEVCMD2 not found, fall back to Devcmd\n");
  770. err = vnic_dev_init_devcmd1(vdev);
  771. }
  772. return err;
  773. }