/drivers/i2c/algos/i2c-algo-pca.c

http://github.com/mirrors/linux · C · 549 lines · 401 code · 70 blank · 78 comment · 56 complexity · ca19367efe78e39ee8d4ee08278b5fa2 MD5 · raw file

  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * i2c-algo-pca.c i2c driver algorithms for PCA9564 adapters
  4. * Copyright (C) 2004 Arcom Control Systems
  5. * Copyright (C) 2008 Pengutronix
  6. */
  7. #include <linux/kernel.h>
  8. #include <linux/module.h>
  9. #include <linux/moduleparam.h>
  10. #include <linux/delay.h>
  11. #include <linux/jiffies.h>
  12. #include <linux/errno.h>
  13. #include <linux/i2c.h>
  14. #include <linux/i2c-algo-pca.h>
  15. #define DEB1(fmt, args...) do { if (i2c_debug >= 1) \
  16. printk(KERN_DEBUG fmt, ## args); } while (0)
  17. #define DEB2(fmt, args...) do { if (i2c_debug >= 2) \
  18. printk(KERN_DEBUG fmt, ## args); } while (0)
  19. #define DEB3(fmt, args...) do { if (i2c_debug >= 3) \
  20. printk(KERN_DEBUG fmt, ## args); } while (0)
  21. static int i2c_debug;
  22. #define pca_outw(adap, reg, val) adap->write_byte(adap->data, reg, val)
  23. #define pca_inw(adap, reg) adap->read_byte(adap->data, reg)
  24. #define pca_status(adap) pca_inw(adap, I2C_PCA_STA)
  25. #define pca_clock(adap) adap->i2c_clock
  26. #define pca_set_con(adap, val) pca_outw(adap, I2C_PCA_CON, val)
  27. #define pca_get_con(adap) pca_inw(adap, I2C_PCA_CON)
  28. #define pca_wait(adap) adap->wait_for_completion(adap->data)
  29. static void pca_reset(struct i2c_algo_pca_data *adap)
  30. {
  31. if (adap->chip == I2C_PCA_CHIP_9665) {
  32. /* Ignore the reset function from the module,
  33. * we can use the parallel bus reset.
  34. */
  35. pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IPRESET);
  36. pca_outw(adap, I2C_PCA_IND, 0xA5);
  37. pca_outw(adap, I2C_PCA_IND, 0x5A);
  38. } else {
  39. adap->reset_chip(adap->data);
  40. }
  41. }
  42. /*
  43. * Generate a start condition on the i2c bus.
  44. *
  45. * returns after the start condition has occurred
  46. */
  47. static int pca_start(struct i2c_algo_pca_data *adap)
  48. {
  49. int sta = pca_get_con(adap);
  50. DEB2("=== START\n");
  51. sta |= I2C_PCA_CON_STA;
  52. sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
  53. pca_set_con(adap, sta);
  54. return pca_wait(adap);
  55. }
  56. /*
  57. * Generate a repeated start condition on the i2c bus
  58. *
  59. * return after the repeated start condition has occurred
  60. */
  61. static int pca_repeated_start(struct i2c_algo_pca_data *adap)
  62. {
  63. int sta = pca_get_con(adap);
  64. DEB2("=== REPEATED START\n");
  65. sta |= I2C_PCA_CON_STA;
  66. sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
  67. pca_set_con(adap, sta);
  68. return pca_wait(adap);
  69. }
  70. /*
  71. * Generate a stop condition on the i2c bus
  72. *
  73. * returns after the stop condition has been generated
  74. *
  75. * STOPs do not generate an interrupt or set the SI flag, since the
  76. * part returns the idle state (0xf8). Hence we don't need to
  77. * pca_wait here.
  78. */
  79. static void pca_stop(struct i2c_algo_pca_data *adap)
  80. {
  81. int sta = pca_get_con(adap);
  82. DEB2("=== STOP\n");
  83. sta |= I2C_PCA_CON_STO;
  84. sta &= ~(I2C_PCA_CON_STA|I2C_PCA_CON_SI);
  85. pca_set_con(adap, sta);
  86. }
  87. /*
  88. * Send the slave address and R/W bit
  89. *
  90. * returns after the address has been sent
  91. */
  92. static int pca_address(struct i2c_algo_pca_data *adap,
  93. struct i2c_msg *msg)
  94. {
  95. int sta = pca_get_con(adap);
  96. int addr = i2c_8bit_addr_from_msg(msg);
  97. DEB2("=== SLAVE ADDRESS %#04x+%c=%#04x\n",
  98. msg->addr, msg->flags & I2C_M_RD ? 'R' : 'W', addr);
  99. pca_outw(adap, I2C_PCA_DAT, addr);
  100. sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
  101. pca_set_con(adap, sta);
  102. return pca_wait(adap);
  103. }
  104. /*
  105. * Transmit a byte.
  106. *
  107. * Returns after the byte has been transmitted
  108. */
  109. static int pca_tx_byte(struct i2c_algo_pca_data *adap,
  110. __u8 b)
  111. {
  112. int sta = pca_get_con(adap);
  113. DEB2("=== WRITE %#04x\n", b);
  114. pca_outw(adap, I2C_PCA_DAT, b);
  115. sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
  116. pca_set_con(adap, sta);
  117. return pca_wait(adap);
  118. }
  119. /*
  120. * Receive a byte
  121. *
  122. * returns immediately.
  123. */
  124. static void pca_rx_byte(struct i2c_algo_pca_data *adap,
  125. __u8 *b, int ack)
  126. {
  127. *b = pca_inw(adap, I2C_PCA_DAT);
  128. DEB2("=== READ %#04x %s\n", *b, ack ? "ACK" : "NACK");
  129. }
  130. /*
  131. * Setup ACK or NACK for next received byte and wait for it to arrive.
  132. *
  133. * Returns after next byte has arrived.
  134. */
  135. static int pca_rx_ack(struct i2c_algo_pca_data *adap,
  136. int ack)
  137. {
  138. int sta = pca_get_con(adap);
  139. sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI|I2C_PCA_CON_AA);
  140. if (ack)
  141. sta |= I2C_PCA_CON_AA;
  142. pca_set_con(adap, sta);
  143. return pca_wait(adap);
  144. }
  145. static int pca_xfer(struct i2c_adapter *i2c_adap,
  146. struct i2c_msg *msgs,
  147. int num)
  148. {
  149. struct i2c_algo_pca_data *adap = i2c_adap->algo_data;
  150. struct i2c_msg *msg = NULL;
  151. int curmsg;
  152. int numbytes = 0;
  153. int state;
  154. int ret;
  155. int completed = 1;
  156. unsigned long timeout = jiffies + i2c_adap->timeout;
  157. while ((state = pca_status(adap)) != 0xf8) {
  158. if (time_before(jiffies, timeout)) {
  159. msleep(10);
  160. } else {
  161. dev_dbg(&i2c_adap->dev, "bus is not idle. status is "
  162. "%#04x\n", state);
  163. return -EBUSY;
  164. }
  165. }
  166. DEB1("{{{ XFER %d messages\n", num);
  167. if (i2c_debug >= 2) {
  168. for (curmsg = 0; curmsg < num; curmsg++) {
  169. int addr, i;
  170. msg = &msgs[curmsg];
  171. addr = (0x7f & msg->addr) ;
  172. if (msg->flags & I2C_M_RD)
  173. printk(KERN_INFO " [%02d] RD %d bytes from %#02x [%#02x, ...]\n",
  174. curmsg, msg->len, addr, (addr << 1) | 1);
  175. else {
  176. printk(KERN_INFO " [%02d] WR %d bytes to %#02x [%#02x%s",
  177. curmsg, msg->len, addr, addr << 1,
  178. msg->len == 0 ? "" : ", ");
  179. for (i = 0; i < msg->len; i++)
  180. printk("%#04x%s", msg->buf[i], i == msg->len - 1 ? "" : ", ");
  181. printk("]\n");
  182. }
  183. }
  184. }
  185. curmsg = 0;
  186. ret = -EIO;
  187. while (curmsg < num) {
  188. state = pca_status(adap);
  189. DEB3("STATE is 0x%02x\n", state);
  190. msg = &msgs[curmsg];
  191. switch (state) {
  192. case 0xf8: /* On reset or stop the bus is idle */
  193. completed = pca_start(adap);
  194. break;
  195. case 0x08: /* A START condition has been transmitted */
  196. case 0x10: /* A repeated start condition has been transmitted */
  197. completed = pca_address(adap, msg);
  198. break;
  199. case 0x18: /* SLA+W has been transmitted; ACK has been received */
  200. case 0x28: /* Data byte in I2CDAT has been transmitted; ACK has been received */
  201. if (numbytes < msg->len) {
  202. completed = pca_tx_byte(adap,
  203. msg->buf[numbytes]);
  204. numbytes++;
  205. break;
  206. }
  207. curmsg++; numbytes = 0;
  208. if (curmsg == num)
  209. pca_stop(adap);
  210. else
  211. completed = pca_repeated_start(adap);
  212. break;
  213. case 0x20: /* SLA+W has been transmitted; NOT ACK has been received */
  214. DEB2("NOT ACK received after SLA+W\n");
  215. pca_stop(adap);
  216. ret = -ENXIO;
  217. goto out;
  218. case 0x40: /* SLA+R has been transmitted; ACK has been received */
  219. completed = pca_rx_ack(adap, msg->len > 1);
  220. break;
  221. case 0x50: /* Data bytes has been received; ACK has been returned */
  222. if (numbytes < msg->len) {
  223. pca_rx_byte(adap, &msg->buf[numbytes], 1);
  224. numbytes++;
  225. completed = pca_rx_ack(adap,
  226. numbytes < msg->len - 1);
  227. break;
  228. }
  229. curmsg++; numbytes = 0;
  230. if (curmsg == num)
  231. pca_stop(adap);
  232. else
  233. completed = pca_repeated_start(adap);
  234. break;
  235. case 0x48: /* SLA+R has been transmitted; NOT ACK has been received */
  236. DEB2("NOT ACK received after SLA+R\n");
  237. pca_stop(adap);
  238. ret = -ENXIO;
  239. goto out;
  240. case 0x30: /* Data byte in I2CDAT has been transmitted; NOT ACK has been received */
  241. DEB2("NOT ACK received after data byte\n");
  242. pca_stop(adap);
  243. goto out;
  244. case 0x38: /* Arbitration lost during SLA+W, SLA+R or data bytes */
  245. DEB2("Arbitration lost\n");
  246. /*
  247. * The PCA9564 data sheet (2006-09-01) says "A
  248. * START condition will be transmitted when the
  249. * bus becomes free (STOP or SCL and SDA high)"
  250. * when the STA bit is set (p. 11).
  251. *
  252. * In case this won't work, try pca_reset()
  253. * instead.
  254. */
  255. pca_start(adap);
  256. goto out;
  257. case 0x58: /* Data byte has been received; NOT ACK has been returned */
  258. if (numbytes == msg->len - 1) {
  259. pca_rx_byte(adap, &msg->buf[numbytes], 0);
  260. curmsg++; numbytes = 0;
  261. if (curmsg == num)
  262. pca_stop(adap);
  263. else
  264. completed = pca_repeated_start(adap);
  265. } else {
  266. DEB2("NOT ACK sent after data byte received. "
  267. "Not final byte. numbytes %d. len %d\n",
  268. numbytes, msg->len);
  269. pca_stop(adap);
  270. goto out;
  271. }
  272. break;
  273. case 0x70: /* Bus error - SDA stuck low */
  274. DEB2("BUS ERROR - SDA Stuck low\n");
  275. pca_reset(adap);
  276. goto out;
  277. case 0x90: /* Bus error - SCL stuck low */
  278. DEB2("BUS ERROR - SCL Stuck low\n");
  279. pca_reset(adap);
  280. goto out;
  281. case 0x00: /* Bus error during master or slave mode due to illegal START or STOP condition */
  282. DEB2("BUS ERROR - Illegal START or STOP\n");
  283. pca_reset(adap);
  284. goto out;
  285. default:
  286. dev_err(&i2c_adap->dev, "unhandled SIO state 0x%02x\n", state);
  287. break;
  288. }
  289. if (!completed)
  290. goto out;
  291. }
  292. ret = curmsg;
  293. out:
  294. DEB1("}}} transferred %d/%d messages. "
  295. "status is %#04x. control is %#04x\n",
  296. curmsg, num, pca_status(adap),
  297. pca_get_con(adap));
  298. return ret;
  299. }
  300. static u32 pca_func(struct i2c_adapter *adap)
  301. {
  302. return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
  303. }
  304. static const struct i2c_algorithm pca_algo = {
  305. .master_xfer = pca_xfer,
  306. .functionality = pca_func,
  307. };
  308. static unsigned int pca_probe_chip(struct i2c_adapter *adap)
  309. {
  310. struct i2c_algo_pca_data *pca_data = adap->algo_data;
  311. /* The trick here is to check if there is an indirect register
  312. * available. If there is one, we will read the value we first
  313. * wrote on I2C_PCA_IADR. Otherwise, we will read the last value
  314. * we wrote on I2C_PCA_ADR
  315. */
  316. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
  317. pca_outw(pca_data, I2C_PCA_IND, 0xAA);
  318. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ITO);
  319. pca_outw(pca_data, I2C_PCA_IND, 0x00);
  320. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
  321. if (pca_inw(pca_data, I2C_PCA_IND) == 0xAA) {
  322. printk(KERN_INFO "%s: PCA9665 detected.\n", adap->name);
  323. pca_data->chip = I2C_PCA_CHIP_9665;
  324. } else {
  325. printk(KERN_INFO "%s: PCA9564 detected.\n", adap->name);
  326. pca_data->chip = I2C_PCA_CHIP_9564;
  327. }
  328. return pca_data->chip;
  329. }
  330. static int pca_init(struct i2c_adapter *adap)
  331. {
  332. struct i2c_algo_pca_data *pca_data = adap->algo_data;
  333. adap->algo = &pca_algo;
  334. if (pca_probe_chip(adap) == I2C_PCA_CHIP_9564) {
  335. static int freqs[] = {330, 288, 217, 146, 88, 59, 44, 36};
  336. int clock;
  337. if (pca_data->i2c_clock > 7) {
  338. switch (pca_data->i2c_clock) {
  339. case 330000:
  340. pca_data->i2c_clock = I2C_PCA_CON_330kHz;
  341. break;
  342. case 288000:
  343. pca_data->i2c_clock = I2C_PCA_CON_288kHz;
  344. break;
  345. case 217000:
  346. pca_data->i2c_clock = I2C_PCA_CON_217kHz;
  347. break;
  348. case 146000:
  349. pca_data->i2c_clock = I2C_PCA_CON_146kHz;
  350. break;
  351. case 88000:
  352. pca_data->i2c_clock = I2C_PCA_CON_88kHz;
  353. break;
  354. case 59000:
  355. pca_data->i2c_clock = I2C_PCA_CON_59kHz;
  356. break;
  357. case 44000:
  358. pca_data->i2c_clock = I2C_PCA_CON_44kHz;
  359. break;
  360. case 36000:
  361. pca_data->i2c_clock = I2C_PCA_CON_36kHz;
  362. break;
  363. default:
  364. printk(KERN_WARNING
  365. "%s: Invalid I2C clock speed selected."
  366. " Using default 59kHz.\n", adap->name);
  367. pca_data->i2c_clock = I2C_PCA_CON_59kHz;
  368. }
  369. } else {
  370. printk(KERN_WARNING "%s: "
  371. "Choosing the clock frequency based on "
  372. "index is deprecated."
  373. " Use the nominal frequency.\n", adap->name);
  374. }
  375. pca_reset(pca_data);
  376. clock = pca_clock(pca_data);
  377. printk(KERN_INFO "%s: Clock frequency is %dkHz\n",
  378. adap->name, freqs[clock]);
  379. pca_set_con(pca_data, I2C_PCA_CON_ENSIO | clock);
  380. } else {
  381. int clock;
  382. int mode;
  383. int tlow, thi;
  384. /* Values can be found on PCA9665 datasheet section 7.3.2.6 */
  385. int min_tlow, min_thi;
  386. /* These values are the maximum raise and fall values allowed
  387. * by the I2C operation mode (Standard, Fast or Fast+)
  388. * They are used (added) below to calculate the clock dividers
  389. * of PCA9665. Note that they are slightly different of the
  390. * real maximum, to allow the change on mode exactly on the
  391. * maximum clock rate for each mode
  392. */
  393. int raise_fall_time;
  394. if (pca_data->i2c_clock > 1265800) {
  395. printk(KERN_WARNING "%s: I2C clock speed too high."
  396. " Using 1265.8kHz.\n", adap->name);
  397. pca_data->i2c_clock = 1265800;
  398. }
  399. if (pca_data->i2c_clock < 60300) {
  400. printk(KERN_WARNING "%s: I2C clock speed too low."
  401. " Using 60.3kHz.\n", adap->name);
  402. pca_data->i2c_clock = 60300;
  403. }
  404. /* To avoid integer overflow, use clock/100 for calculations */
  405. clock = pca_clock(pca_data) / 100;
  406. if (pca_data->i2c_clock > I2C_MAX_FAST_MODE_PLUS_FREQ) {
  407. mode = I2C_PCA_MODE_TURBO;
  408. min_tlow = 14;
  409. min_thi = 5;
  410. raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
  411. } else if (pca_data->i2c_clock > I2C_MAX_FAST_MODE_FREQ) {
  412. mode = I2C_PCA_MODE_FASTP;
  413. min_tlow = 17;
  414. min_thi = 9;
  415. raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
  416. } else if (pca_data->i2c_clock > I2C_MAX_STANDARD_MODE_FREQ) {
  417. mode = I2C_PCA_MODE_FAST;
  418. min_tlow = 44;
  419. min_thi = 20;
  420. raise_fall_time = 58; /* Raise 29e-8s, Fall 29e-8s */
  421. } else {
  422. mode = I2C_PCA_MODE_STD;
  423. min_tlow = 157;
  424. min_thi = 134;
  425. raise_fall_time = 127; /* Raise 29e-8s, Fall 98e-8s */
  426. }
  427. /* The minimum clock that respects the thi/tlow = 134/157 is
  428. * 64800 Hz. Below that, we have to fix the tlow to 255 and
  429. * calculate the thi factor.
  430. */
  431. if (clock < 648) {
  432. tlow = 255;
  433. thi = 1000000 - clock * raise_fall_time;
  434. thi /= (I2C_PCA_OSC_PER * clock) - tlow;
  435. } else {
  436. tlow = (1000000 - clock * raise_fall_time) * min_tlow;
  437. tlow /= I2C_PCA_OSC_PER * clock * (min_thi + min_tlow);
  438. thi = tlow * min_thi / min_tlow;
  439. }
  440. pca_reset(pca_data);
  441. printk(KERN_INFO
  442. "%s: Clock frequency is %dHz\n", adap->name, clock * 100);
  443. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IMODE);
  444. pca_outw(pca_data, I2C_PCA_IND, mode);
  445. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLL);
  446. pca_outw(pca_data, I2C_PCA_IND, tlow);
  447. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLH);
  448. pca_outw(pca_data, I2C_PCA_IND, thi);
  449. pca_set_con(pca_data, I2C_PCA_CON_ENSIO);
  450. }
  451. udelay(500); /* 500 us for oscillator to stabilise */
  452. return 0;
  453. }
  454. /*
  455. * registering functions to load algorithms at runtime
  456. */
  457. int i2c_pca_add_bus(struct i2c_adapter *adap)
  458. {
  459. int rval;
  460. rval = pca_init(adap);
  461. if (rval)
  462. return rval;
  463. return i2c_add_adapter(adap);
  464. }
  465. EXPORT_SYMBOL(i2c_pca_add_bus);
  466. int i2c_pca_add_numbered_bus(struct i2c_adapter *adap)
  467. {
  468. int rval;
  469. rval = pca_init(adap);
  470. if (rval)
  471. return rval;
  472. return i2c_add_numbered_adapter(adap);
  473. }
  474. EXPORT_SYMBOL(i2c_pca_add_numbered_bus);
  475. MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>, "
  476. "Wolfram Sang <w.sang@pengutronix.de>");
  477. MODULE_DESCRIPTION("I2C-Bus PCA9564/PCA9665 algorithm");
  478. MODULE_LICENSE("GPL");
  479. module_param(i2c_debug, int, 0);