/drivers/tty/mxser.c
C | 2811 lines | 2224 code | 393 blank | 194 comment | 457 complexity | e5abd45582c8e37a188940e2f739c024 MD5 | raw file
Large files files are truncated, but you can click here to view the full file
1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * mxser.c -- MOXA Smartio/Industio family multiport serial driver. 4 * 5 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com). 6 * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com> 7 * 8 * This code is loosely based on the 1.8 moxa driver which is based on 9 * Linux serial driver, written by Linus Torvalds, Theodore T'so and 10 * others. 11 * 12 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox 13 * <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on 14 * www.moxa.com. 15 * - Fixed x86_64 cleanness 16 */ 17 18#include <linux/module.h> 19#include <linux/errno.h> 20#include <linux/signal.h> 21#include <linux/sched.h> 22#include <linux/timer.h> 23#include <linux/interrupt.h> 24#include <linux/tty.h> 25#include <linux/tty_flip.h> 26#include <linux/serial.h> 27#include <linux/serial_reg.h> 28#include <linux/major.h> 29#include <linux/string.h> 30#include <linux/fcntl.h> 31#include <linux/ptrace.h> 32#include <linux/ioport.h> 33#include <linux/mm.h> 34#include <linux/delay.h> 35#include <linux/pci.h> 36#include <linux/bitops.h> 37#include <linux/slab.h> 38#include <linux/ratelimit.h> 39 40#include <asm/io.h> 41#include <asm/irq.h> 42#include <linux/uaccess.h> 43 44#include "mxser.h" 45 46#define MXSER_VERSION "2.0.5" /* 1.14 */ 47#define MXSERMAJOR 174 48 49#define MXSER_BOARDS 4 /* Max. boards */ 50#define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */ 51#define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD) 52#define MXSER_ISR_PASS_LIMIT 100 53 54/*CheckIsMoxaMust return value*/ 55#define MOXA_OTHER_UART 0x00 56#define MOXA_MUST_MU150_HWID 0x01 57#define MOXA_MUST_MU860_HWID 0x02 58 59#define WAKEUP_CHARS 256 60 61#define UART_MCR_AFE 0x20 62#define UART_LSR_SPECIAL 0x1E 63 64#define PCI_DEVICE_ID_POS104UL 0x1044 65#define PCI_DEVICE_ID_CB108 0x1080 66#define PCI_DEVICE_ID_CP102UF 0x1023 67#define PCI_DEVICE_ID_CP112UL 0x1120 68#define PCI_DEVICE_ID_CB114 0x1142 69#define PCI_DEVICE_ID_CP114UL 0x1143 70#define PCI_DEVICE_ID_CB134I 0x1341 71#define PCI_DEVICE_ID_CP138U 0x1380 72 73 74#define C168_ASIC_ID 1 75#define C104_ASIC_ID 2 76#define C102_ASIC_ID 0xB 77#define CI132_ASIC_ID 4 78#define CI134_ASIC_ID 3 79#define CI104J_ASIC_ID 5 80 81#define MXSER_HIGHBAUD 1 82#define MXSER_HAS2 2 83 84/* This is only for PCI */ 85static const struct { 86 int type; 87 int tx_fifo; 88 int rx_fifo; 89 int xmit_fifo_size; 90 int rx_high_water; 91 int rx_trigger; 92 int rx_low_water; 93 long max_baud; 94} Gpci_uart_info[] = { 95 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L}, 96 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L}, 97 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L} 98}; 99#define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info) 100 101struct mxser_cardinfo { 102 char *name; 103 unsigned int nports; 104 unsigned int flags; 105}; 106 107static const struct mxser_cardinfo mxser_cards[] = { 108/* 0*/ { "C168 series", 8, }, 109 { "C104 series", 4, }, 110 { "CI-104J series", 4, }, 111 { "C168H/PCI series", 8, }, 112 { "C104H/PCI series", 4, }, 113/* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */ 114 { "CI-132 series", 4, MXSER_HAS2 }, 115 { "CI-134 series", 4, }, 116 { "CP-132 series", 2, }, 117 { "CP-114 series", 4, }, 118/*10*/ { "CT-114 series", 4, }, 119 { "CP-102 series", 2, MXSER_HIGHBAUD }, 120 { "CP-104U series", 4, }, 121 { "CP-168U series", 8, }, 122 { "CP-132U series", 2, }, 123/*15*/ { "CP-134U series", 4, }, 124 { "CP-104JU series", 4, }, 125 { "Moxa UC7000 Serial", 8, }, /* RC7000 */ 126 { "CP-118U series", 8, }, 127 { "CP-102UL series", 2, }, 128/*20*/ { "CP-102U series", 2, }, 129 { "CP-118EL series", 8, }, 130 { "CP-168EL series", 8, }, 131 { "CP-104EL series", 4, }, 132 { "CB-108 series", 8, }, 133/*25*/ { "CB-114 series", 4, }, 134 { "CB-134I series", 4, }, 135 { "CP-138U series", 8, }, 136 { "POS-104UL series", 4, }, 137 { "CP-114UL series", 4, }, 138/*30*/ { "CP-102UF series", 2, }, 139 { "CP-112UL series", 2, }, 140}; 141 142/* driver_data correspond to the lines in the structure above 143 see also ISA probe function before you change something */ 144static const struct pci_device_id mxser_pcibrds[] = { 145 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 }, 146 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 }, 147 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 }, 148 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 }, 149 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 }, 150 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 }, 151 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 }, 152 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 }, 153 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 }, 154 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 }, 155 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 }, 156 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 }, 157 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 }, 158 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 }, 159 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 }, 160 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 }, 161 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 }, 162 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 }, 163 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 }, 164 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 }, 165 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 }, 166 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 }, 167 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 }, 168 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 }, 169 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 }, 170 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP112UL), .driver_data = 31 }, 171 { } 172}; 173MODULE_DEVICE_TABLE(pci, mxser_pcibrds); 174 175static unsigned long ioaddr[MXSER_BOARDS]; 176static int ttymajor = MXSERMAJOR; 177 178/* Variables for insmod */ 179 180MODULE_AUTHOR("Casper Yang"); 181MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver"); 182module_param_hw_array(ioaddr, ulong, ioport, NULL, 0); 183MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board"); 184module_param(ttymajor, int, 0); 185MODULE_LICENSE("GPL"); 186 187struct mxser_log { 188 int tick; 189 unsigned long rxcnt[MXSER_PORTS]; 190 unsigned long txcnt[MXSER_PORTS]; 191}; 192 193struct mxser_mon { 194 unsigned long rxcnt; 195 unsigned long txcnt; 196 unsigned long up_rxcnt; 197 unsigned long up_txcnt; 198 int modem_status; 199 unsigned char hold_reason; 200}; 201 202struct mxser_mon_ext { 203 unsigned long rx_cnt[32]; 204 unsigned long tx_cnt[32]; 205 unsigned long up_rxcnt[32]; 206 unsigned long up_txcnt[32]; 207 int modem_status[32]; 208 209 long baudrate[32]; 210 int databits[32]; 211 int stopbits[32]; 212 int parity[32]; 213 int flowctrl[32]; 214 int fifo[32]; 215 int iftype[32]; 216}; 217 218struct mxser_board; 219 220struct mxser_port { 221 struct tty_port port; 222 struct mxser_board *board; 223 224 unsigned long ioaddr; 225 unsigned long opmode_ioaddr; 226 int max_baud; 227 228 int rx_high_water; 229 int rx_trigger; /* Rx fifo trigger level */ 230 int rx_low_water; 231 int baud_base; /* max. speed */ 232 int type; /* UART type */ 233 234 int x_char; /* xon/xoff character */ 235 int IER; /* Interrupt Enable Register */ 236 int MCR; /* Modem control register */ 237 238 unsigned char stop_rx; 239 unsigned char ldisc_stop_rx; 240 241 int custom_divisor; 242 unsigned char err_shadow; 243 244 struct async_icount icount; /* kernel counters for 4 input interrupts */ 245 unsigned int timeout; 246 247 int read_status_mask; 248 int ignore_status_mask; 249 unsigned int xmit_fifo_size; 250 int xmit_head; 251 int xmit_tail; 252 int xmit_cnt; 253 int closing; 254 255 struct ktermios normal_termios; 256 257 struct mxser_mon mon_data; 258 259 spinlock_t slock; 260}; 261 262struct mxser_board { 263 unsigned int idx; 264 int irq; 265 const struct mxser_cardinfo *info; 266 unsigned long vector; 267 unsigned long vector_mask; 268 269 int chip_flag; 270 int uart_type; 271 272 struct mxser_port ports[MXSER_PORTS_PER_BOARD]; 273}; 274 275struct mxser_mstatus { 276 tcflag_t cflag; 277 int cts; 278 int dsr; 279 int ri; 280 int dcd; 281}; 282 283static struct mxser_board mxser_boards[MXSER_BOARDS]; 284static struct tty_driver *mxvar_sdriver; 285static struct mxser_log mxvar_log; 286static int mxser_set_baud_method[MXSER_PORTS + 1]; 287 288static void mxser_enable_must_enchance_mode(unsigned long baseio) 289{ 290 u8 oldlcr; 291 u8 efr; 292 293 oldlcr = inb(baseio + UART_LCR); 294 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 295 296 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 297 efr |= MOXA_MUST_EFR_EFRB_ENABLE; 298 299 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 300 outb(oldlcr, baseio + UART_LCR); 301} 302 303#ifdef CONFIG_PCI 304static void mxser_disable_must_enchance_mode(unsigned long baseio) 305{ 306 u8 oldlcr; 307 u8 efr; 308 309 oldlcr = inb(baseio + UART_LCR); 310 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 311 312 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 313 efr &= ~MOXA_MUST_EFR_EFRB_ENABLE; 314 315 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 316 outb(oldlcr, baseio + UART_LCR); 317} 318#endif 319 320static void mxser_set_must_xon1_value(unsigned long baseio, u8 value) 321{ 322 u8 oldlcr; 323 u8 efr; 324 325 oldlcr = inb(baseio + UART_LCR); 326 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 327 328 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 329 efr &= ~MOXA_MUST_EFR_BANK_MASK; 330 efr |= MOXA_MUST_EFR_BANK0; 331 332 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 333 outb(value, baseio + MOXA_MUST_XON1_REGISTER); 334 outb(oldlcr, baseio + UART_LCR); 335} 336 337static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value) 338{ 339 u8 oldlcr; 340 u8 efr; 341 342 oldlcr = inb(baseio + UART_LCR); 343 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 344 345 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 346 efr &= ~MOXA_MUST_EFR_BANK_MASK; 347 efr |= MOXA_MUST_EFR_BANK0; 348 349 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 350 outb(value, baseio + MOXA_MUST_XOFF1_REGISTER); 351 outb(oldlcr, baseio + UART_LCR); 352} 353 354static void mxser_set_must_fifo_value(struct mxser_port *info) 355{ 356 u8 oldlcr; 357 u8 efr; 358 359 oldlcr = inb(info->ioaddr + UART_LCR); 360 outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR); 361 362 efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER); 363 efr &= ~MOXA_MUST_EFR_BANK_MASK; 364 efr |= MOXA_MUST_EFR_BANK1; 365 366 outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER); 367 outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER); 368 outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER); 369 outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER); 370 outb(oldlcr, info->ioaddr + UART_LCR); 371} 372 373static void mxser_set_must_enum_value(unsigned long baseio, u8 value) 374{ 375 u8 oldlcr; 376 u8 efr; 377 378 oldlcr = inb(baseio + UART_LCR); 379 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 380 381 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 382 efr &= ~MOXA_MUST_EFR_BANK_MASK; 383 efr |= MOXA_MUST_EFR_BANK2; 384 385 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 386 outb(value, baseio + MOXA_MUST_ENUM_REGISTER); 387 outb(oldlcr, baseio + UART_LCR); 388} 389 390#ifdef CONFIG_PCI 391static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId) 392{ 393 u8 oldlcr; 394 u8 efr; 395 396 oldlcr = inb(baseio + UART_LCR); 397 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 398 399 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 400 efr &= ~MOXA_MUST_EFR_BANK_MASK; 401 efr |= MOXA_MUST_EFR_BANK2; 402 403 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 404 *pId = inb(baseio + MOXA_MUST_HWID_REGISTER); 405 outb(oldlcr, baseio + UART_LCR); 406} 407#endif 408 409static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio) 410{ 411 u8 oldlcr; 412 u8 efr; 413 414 oldlcr = inb(baseio + UART_LCR); 415 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 416 417 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 418 efr &= ~MOXA_MUST_EFR_SF_MASK; 419 420 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 421 outb(oldlcr, baseio + UART_LCR); 422} 423 424static void mxser_enable_must_tx_software_flow_control(unsigned long baseio) 425{ 426 u8 oldlcr; 427 u8 efr; 428 429 oldlcr = inb(baseio + UART_LCR); 430 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 431 432 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 433 efr &= ~MOXA_MUST_EFR_SF_TX_MASK; 434 efr |= MOXA_MUST_EFR_SF_TX1; 435 436 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 437 outb(oldlcr, baseio + UART_LCR); 438} 439 440static void mxser_disable_must_tx_software_flow_control(unsigned long baseio) 441{ 442 u8 oldlcr; 443 u8 efr; 444 445 oldlcr = inb(baseio + UART_LCR); 446 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 447 448 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 449 efr &= ~MOXA_MUST_EFR_SF_TX_MASK; 450 451 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 452 outb(oldlcr, baseio + UART_LCR); 453} 454 455static void mxser_enable_must_rx_software_flow_control(unsigned long baseio) 456{ 457 u8 oldlcr; 458 u8 efr; 459 460 oldlcr = inb(baseio + UART_LCR); 461 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 462 463 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 464 efr &= ~MOXA_MUST_EFR_SF_RX_MASK; 465 efr |= MOXA_MUST_EFR_SF_RX1; 466 467 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 468 outb(oldlcr, baseio + UART_LCR); 469} 470 471static void mxser_disable_must_rx_software_flow_control(unsigned long baseio) 472{ 473 u8 oldlcr; 474 u8 efr; 475 476 oldlcr = inb(baseio + UART_LCR); 477 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 478 479 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 480 efr &= ~MOXA_MUST_EFR_SF_RX_MASK; 481 482 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 483 outb(oldlcr, baseio + UART_LCR); 484} 485 486#ifdef CONFIG_PCI 487static int CheckIsMoxaMust(unsigned long io) 488{ 489 u8 oldmcr, hwid; 490 int i; 491 492 outb(0, io + UART_LCR); 493 mxser_disable_must_enchance_mode(io); 494 oldmcr = inb(io + UART_MCR); 495 outb(0, io + UART_MCR); 496 mxser_set_must_xon1_value(io, 0x11); 497 if ((hwid = inb(io + UART_MCR)) != 0) { 498 outb(oldmcr, io + UART_MCR); 499 return MOXA_OTHER_UART; 500 } 501 502 mxser_get_must_hardware_id(io, &hwid); 503 for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */ 504 if (hwid == Gpci_uart_info[i].type) 505 return (int)hwid; 506 } 507 return MOXA_OTHER_UART; 508} 509#endif 510 511static void process_txrx_fifo(struct mxser_port *info) 512{ 513 int i; 514 515 if ((info->type == PORT_16450) || (info->type == PORT_8250)) { 516 info->rx_trigger = 1; 517 info->rx_high_water = 1; 518 info->rx_low_water = 1; 519 info->xmit_fifo_size = 1; 520 } else 521 for (i = 0; i < UART_INFO_NUM; i++) 522 if (info->board->chip_flag == Gpci_uart_info[i].type) { 523 info->rx_trigger = Gpci_uart_info[i].rx_trigger; 524 info->rx_low_water = Gpci_uart_info[i].rx_low_water; 525 info->rx_high_water = Gpci_uart_info[i].rx_high_water; 526 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size; 527 break; 528 } 529} 530 531static unsigned char mxser_get_msr(int baseaddr, int mode, int port) 532{ 533 static unsigned char mxser_msr[MXSER_PORTS + 1]; 534 unsigned char status = 0; 535 536 status = inb(baseaddr + UART_MSR); 537 538 mxser_msr[port] &= 0x0F; 539 mxser_msr[port] |= status; 540 status = mxser_msr[port]; 541 if (mode) 542 mxser_msr[port] = 0; 543 544 return status; 545} 546 547static int mxser_carrier_raised(struct tty_port *port) 548{ 549 struct mxser_port *mp = container_of(port, struct mxser_port, port); 550 return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0; 551} 552 553static void mxser_dtr_rts(struct tty_port *port, int on) 554{ 555 struct mxser_port *mp = container_of(port, struct mxser_port, port); 556 unsigned long flags; 557 558 spin_lock_irqsave(&mp->slock, flags); 559 if (on) 560 outb(inb(mp->ioaddr + UART_MCR) | 561 UART_MCR_DTR | UART_MCR_RTS, mp->ioaddr + UART_MCR); 562 else 563 outb(inb(mp->ioaddr + UART_MCR)&~(UART_MCR_DTR | UART_MCR_RTS), 564 mp->ioaddr + UART_MCR); 565 spin_unlock_irqrestore(&mp->slock, flags); 566} 567 568static int mxser_set_baud(struct tty_struct *tty, long newspd) 569{ 570 struct mxser_port *info = tty->driver_data; 571 unsigned int quot = 0, baud; 572 unsigned char cval; 573 u64 timeout; 574 575 if (!info->ioaddr) 576 return -1; 577 578 if (newspd > info->max_baud) 579 return -1; 580 581 if (newspd == 134) { 582 quot = 2 * info->baud_base / 269; 583 tty_encode_baud_rate(tty, 134, 134); 584 } else if (newspd) { 585 quot = info->baud_base / newspd; 586 if (quot == 0) 587 quot = 1; 588 baud = info->baud_base/quot; 589 tty_encode_baud_rate(tty, baud, baud); 590 } else { 591 quot = 0; 592 } 593 594 /* 595 * worst case (128 * 1000 * 10 * 18432) needs 35 bits, so divide in the 596 * u64 domain 597 */ 598 timeout = (u64)info->xmit_fifo_size * HZ * 10 * quot; 599 do_div(timeout, info->baud_base); 600 info->timeout = timeout + HZ / 50; /* Add .02 seconds of slop */ 601 602 if (quot) { 603 info->MCR |= UART_MCR_DTR; 604 outb(info->MCR, info->ioaddr + UART_MCR); 605 } else { 606 info->MCR &= ~UART_MCR_DTR; 607 outb(info->MCR, info->ioaddr + UART_MCR); 608 return 0; 609 } 610 611 cval = inb(info->ioaddr + UART_LCR); 612 613 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */ 614 615 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */ 616 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */ 617 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */ 618 619#ifdef BOTHER 620 if (C_BAUD(tty) == BOTHER) { 621 quot = info->baud_base % newspd; 622 quot *= 8; 623 if (quot % newspd > newspd / 2) { 624 quot /= newspd; 625 quot++; 626 } else 627 quot /= newspd; 628 629 mxser_set_must_enum_value(info->ioaddr, quot); 630 } else 631#endif 632 mxser_set_must_enum_value(info->ioaddr, 0); 633 634 return 0; 635} 636 637/* 638 * This routine is called to set the UART divisor registers to match 639 * the specified baud rate for a serial port. 640 */ 641static int mxser_change_speed(struct tty_struct *tty) 642{ 643 struct mxser_port *info = tty->driver_data; 644 unsigned cflag, cval, fcr; 645 int ret = 0; 646 unsigned char status; 647 648 cflag = tty->termios.c_cflag; 649 if (!info->ioaddr) 650 return ret; 651 652 if (mxser_set_baud_method[tty->index] == 0) 653 mxser_set_baud(tty, tty_get_baud_rate(tty)); 654 655 /* byte size and parity */ 656 switch (cflag & CSIZE) { 657 case CS5: 658 cval = 0x00; 659 break; 660 case CS6: 661 cval = 0x01; 662 break; 663 case CS7: 664 cval = 0x02; 665 break; 666 case CS8: 667 cval = 0x03; 668 break; 669 default: 670 cval = 0x00; 671 break; /* too keep GCC shut... */ 672 } 673 if (cflag & CSTOPB) 674 cval |= 0x04; 675 if (cflag & PARENB) 676 cval |= UART_LCR_PARITY; 677 if (!(cflag & PARODD)) 678 cval |= UART_LCR_EPAR; 679 if (cflag & CMSPAR) 680 cval |= UART_LCR_SPAR; 681 682 if ((info->type == PORT_8250) || (info->type == PORT_16450)) { 683 if (info->board->chip_flag) { 684 fcr = UART_FCR_ENABLE_FIFO; 685 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE; 686 mxser_set_must_fifo_value(info); 687 } else 688 fcr = 0; 689 } else { 690 fcr = UART_FCR_ENABLE_FIFO; 691 if (info->board->chip_flag) { 692 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE; 693 mxser_set_must_fifo_value(info); 694 } else { 695 switch (info->rx_trigger) { 696 case 1: 697 fcr |= UART_FCR_TRIGGER_1; 698 break; 699 case 4: 700 fcr |= UART_FCR_TRIGGER_4; 701 break; 702 case 8: 703 fcr |= UART_FCR_TRIGGER_8; 704 break; 705 default: 706 fcr |= UART_FCR_TRIGGER_14; 707 break; 708 } 709 } 710 } 711 712 /* CTS flow control flag and modem status interrupts */ 713 info->IER &= ~UART_IER_MSI; 714 info->MCR &= ~UART_MCR_AFE; 715 tty_port_set_cts_flow(&info->port, cflag & CRTSCTS); 716 if (cflag & CRTSCTS) { 717 info->IER |= UART_IER_MSI; 718 if ((info->type == PORT_16550A) || (info->board->chip_flag)) { 719 info->MCR |= UART_MCR_AFE; 720 } else { 721 status = inb(info->ioaddr + UART_MSR); 722 if (tty->hw_stopped) { 723 if (status & UART_MSR_CTS) { 724 tty->hw_stopped = 0; 725 if (info->type != PORT_16550A && 726 !info->board->chip_flag) { 727 outb(info->IER & ~UART_IER_THRI, 728 info->ioaddr + 729 UART_IER); 730 info->IER |= UART_IER_THRI; 731 outb(info->IER, info->ioaddr + 732 UART_IER); 733 } 734 tty_wakeup(tty); 735 } 736 } else { 737 if (!(status & UART_MSR_CTS)) { 738 tty->hw_stopped = 1; 739 if ((info->type != PORT_16550A) && 740 (!info->board->chip_flag)) { 741 info->IER &= ~UART_IER_THRI; 742 outb(info->IER, info->ioaddr + 743 UART_IER); 744 } 745 } 746 } 747 } 748 } 749 outb(info->MCR, info->ioaddr + UART_MCR); 750 tty_port_set_check_carrier(&info->port, ~cflag & CLOCAL); 751 if (~cflag & CLOCAL) 752 info->IER |= UART_IER_MSI; 753 outb(info->IER, info->ioaddr + UART_IER); 754 755 /* 756 * Set up parity check flag 757 */ 758 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; 759 if (I_INPCK(tty)) 760 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE; 761 if (I_BRKINT(tty) || I_PARMRK(tty)) 762 info->read_status_mask |= UART_LSR_BI; 763 764 info->ignore_status_mask = 0; 765 766 if (I_IGNBRK(tty)) { 767 info->ignore_status_mask |= UART_LSR_BI; 768 info->read_status_mask |= UART_LSR_BI; 769 /* 770 * If we're ignore parity and break indicators, ignore 771 * overruns too. (For real raw support). 772 */ 773 if (I_IGNPAR(tty)) { 774 info->ignore_status_mask |= 775 UART_LSR_OE | 776 UART_LSR_PE | 777 UART_LSR_FE; 778 info->read_status_mask |= 779 UART_LSR_OE | 780 UART_LSR_PE | 781 UART_LSR_FE; 782 } 783 } 784 if (info->board->chip_flag) { 785 mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty)); 786 mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty)); 787 if (I_IXON(tty)) { 788 mxser_enable_must_rx_software_flow_control( 789 info->ioaddr); 790 } else { 791 mxser_disable_must_rx_software_flow_control( 792 info->ioaddr); 793 } 794 if (I_IXOFF(tty)) { 795 mxser_enable_must_tx_software_flow_control( 796 info->ioaddr); 797 } else { 798 mxser_disable_must_tx_software_flow_control( 799 info->ioaddr); 800 } 801 } 802 803 804 outb(fcr, info->ioaddr + UART_FCR); /* set fcr */ 805 outb(cval, info->ioaddr + UART_LCR); 806 807 return ret; 808} 809 810static void mxser_check_modem_status(struct tty_struct *tty, 811 struct mxser_port *port, int status) 812{ 813 /* update input line counters */ 814 if (status & UART_MSR_TERI) 815 port->icount.rng++; 816 if (status & UART_MSR_DDSR) 817 port->icount.dsr++; 818 if (status & UART_MSR_DDCD) 819 port->icount.dcd++; 820 if (status & UART_MSR_DCTS) 821 port->icount.cts++; 822 port->mon_data.modem_status = status; 823 wake_up_interruptible(&port->port.delta_msr_wait); 824 825 if (tty_port_check_carrier(&port->port) && (status & UART_MSR_DDCD)) { 826 if (status & UART_MSR_DCD) 827 wake_up_interruptible(&port->port.open_wait); 828 } 829 830 if (tty_port_cts_enabled(&port->port)) { 831 if (tty->hw_stopped) { 832 if (status & UART_MSR_CTS) { 833 tty->hw_stopped = 0; 834 835 if ((port->type != PORT_16550A) && 836 (!port->board->chip_flag)) { 837 outb(port->IER & ~UART_IER_THRI, 838 port->ioaddr + UART_IER); 839 port->IER |= UART_IER_THRI; 840 outb(port->IER, port->ioaddr + 841 UART_IER); 842 } 843 tty_wakeup(tty); 844 } 845 } else { 846 if (!(status & UART_MSR_CTS)) { 847 tty->hw_stopped = 1; 848 if (port->type != PORT_16550A && 849 !port->board->chip_flag) { 850 port->IER &= ~UART_IER_THRI; 851 outb(port->IER, port->ioaddr + 852 UART_IER); 853 } 854 } 855 } 856 } 857} 858 859static int mxser_activate(struct tty_port *port, struct tty_struct *tty) 860{ 861 struct mxser_port *info = container_of(port, struct mxser_port, port); 862 unsigned long page; 863 unsigned long flags; 864 865 page = __get_free_page(GFP_KERNEL); 866 if (!page) 867 return -ENOMEM; 868 869 spin_lock_irqsave(&info->slock, flags); 870 871 if (!info->ioaddr || !info->type) { 872 set_bit(TTY_IO_ERROR, &tty->flags); 873 free_page(page); 874 spin_unlock_irqrestore(&info->slock, flags); 875 return 0; 876 } 877 info->port.xmit_buf = (unsigned char *) page; 878 879 /* 880 * Clear the FIFO buffers and disable them 881 * (they will be reenabled in mxser_change_speed()) 882 */ 883 if (info->board->chip_flag) 884 outb((UART_FCR_CLEAR_RCVR | 885 UART_FCR_CLEAR_XMIT | 886 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR); 887 else 888 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), 889 info->ioaddr + UART_FCR); 890 891 /* 892 * At this point there's no way the LSR could still be 0xFF; 893 * if it is, then bail out, because there's likely no UART 894 * here. 895 */ 896 if (inb(info->ioaddr + UART_LSR) == 0xff) { 897 spin_unlock_irqrestore(&info->slock, flags); 898 if (capable(CAP_SYS_ADMIN)) { 899 set_bit(TTY_IO_ERROR, &tty->flags); 900 return 0; 901 } else 902 return -ENODEV; 903 } 904 905 /* 906 * Clear the interrupt registers. 907 */ 908 (void) inb(info->ioaddr + UART_LSR); 909 (void) inb(info->ioaddr + UART_RX); 910 (void) inb(info->ioaddr + UART_IIR); 911 (void) inb(info->ioaddr + UART_MSR); 912 913 /* 914 * Now, initialize the UART 915 */ 916 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */ 917 info->MCR = UART_MCR_DTR | UART_MCR_RTS; 918 outb(info->MCR, info->ioaddr + UART_MCR); 919 920 /* 921 * Finally, enable interrupts 922 */ 923 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI; 924 925 if (info->board->chip_flag) 926 info->IER |= MOXA_MUST_IER_EGDAI; 927 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */ 928 929 /* 930 * And clear the interrupt registers again for luck. 931 */ 932 (void) inb(info->ioaddr + UART_LSR); 933 (void) inb(info->ioaddr + UART_RX); 934 (void) inb(info->ioaddr + UART_IIR); 935 (void) inb(info->ioaddr + UART_MSR); 936 937 clear_bit(TTY_IO_ERROR, &tty->flags); 938 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; 939 940 /* 941 * and set the speed of the serial port 942 */ 943 mxser_change_speed(tty); 944 spin_unlock_irqrestore(&info->slock, flags); 945 946 return 0; 947} 948 949/* 950 * This routine will shutdown a serial port 951 */ 952static void mxser_shutdown_port(struct tty_port *port) 953{ 954 struct mxser_port *info = container_of(port, struct mxser_port, port); 955 unsigned long flags; 956 957 spin_lock_irqsave(&info->slock, flags); 958 959 /* 960 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq 961 * here so the queue might never be waken up 962 */ 963 wake_up_interruptible(&info->port.delta_msr_wait); 964 965 /* 966 * Free the xmit buffer, if necessary 967 */ 968 if (info->port.xmit_buf) { 969 free_page((unsigned long) info->port.xmit_buf); 970 info->port.xmit_buf = NULL; 971 } 972 973 info->IER = 0; 974 outb(0x00, info->ioaddr + UART_IER); 975 976 /* clear Rx/Tx FIFO's */ 977 if (info->board->chip_flag) 978 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | 979 MOXA_MUST_FCR_GDA_MODE_ENABLE, 980 info->ioaddr + UART_FCR); 981 else 982 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT, 983 info->ioaddr + UART_FCR); 984 985 /* read data port to reset things */ 986 (void) inb(info->ioaddr + UART_RX); 987 988 989 if (info->board->chip_flag) 990 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr); 991 992 spin_unlock_irqrestore(&info->slock, flags); 993} 994 995/* 996 * This routine is called whenever a serial port is opened. It 997 * enables interrupts for a serial port, linking in its async structure into 998 * the IRQ chain. It also performs the serial-specific 999 * initialization for the tty structure. 1000 */ 1001static int mxser_open(struct tty_struct *tty, struct file *filp) 1002{ 1003 struct mxser_port *info; 1004 int line; 1005 1006 line = tty->index; 1007 if (line == MXSER_PORTS) 1008 return 0; 1009 info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD]; 1010 if (!info->ioaddr) 1011 return -ENODEV; 1012 1013 tty->driver_data = info; 1014 return tty_port_open(&info->port, tty, filp); 1015} 1016 1017static void mxser_flush_buffer(struct tty_struct *tty) 1018{ 1019 struct mxser_port *info = tty->driver_data; 1020 char fcr; 1021 unsigned long flags; 1022 1023 1024 spin_lock_irqsave(&info->slock, flags); 1025 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; 1026 1027 fcr = inb(info->ioaddr + UART_FCR); 1028 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), 1029 info->ioaddr + UART_FCR); 1030 outb(fcr, info->ioaddr + UART_FCR); 1031 1032 spin_unlock_irqrestore(&info->slock, flags); 1033 1034 tty_wakeup(tty); 1035} 1036 1037 1038static void mxser_close_port(struct tty_port *port) 1039{ 1040 struct mxser_port *info = container_of(port, struct mxser_port, port); 1041 unsigned long timeout; 1042 /* 1043 * At this point we stop accepting input. To do this, we 1044 * disable the receive line status interrupts, and tell the 1045 * interrupt driver to stop checking the data ready bit in the 1046 * line status register. 1047 */ 1048 info->IER &= ~UART_IER_RLSI; 1049 if (info->board->chip_flag) 1050 info->IER &= ~MOXA_MUST_RECV_ISR; 1051 1052 outb(info->IER, info->ioaddr + UART_IER); 1053 /* 1054 * Before we drop DTR, make sure the UART transmitter 1055 * has completely drained; this is especially 1056 * important if there is a transmit FIFO! 1057 */ 1058 timeout = jiffies + HZ; 1059 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) { 1060 schedule_timeout_interruptible(5); 1061 if (time_after(jiffies, timeout)) 1062 break; 1063 } 1064} 1065 1066/* 1067 * This routine is called when the serial port gets closed. First, we 1068 * wait for the last remaining data to be sent. Then, we unlink its 1069 * async structure from the interrupt chain if necessary, and we free 1070 * that IRQ if nothing is left in the chain. 1071 */ 1072static void mxser_close(struct tty_struct *tty, struct file *filp) 1073{ 1074 struct mxser_port *info = tty->driver_data; 1075 struct tty_port *port = &info->port; 1076 1077 if (tty->index == MXSER_PORTS || info == NULL) 1078 return; 1079 if (tty_port_close_start(port, tty, filp) == 0) 1080 return; 1081 info->closing = 1; 1082 mutex_lock(&port->mutex); 1083 mxser_close_port(port); 1084 mxser_flush_buffer(tty); 1085 if (tty_port_initialized(port) && C_HUPCL(tty)) 1086 tty_port_lower_dtr_rts(port); 1087 mxser_shutdown_port(port); 1088 tty_port_set_initialized(port, 0); 1089 mutex_unlock(&port->mutex); 1090 info->closing = 0; 1091 /* Right now the tty_port set is done outside of the close_end helper 1092 as we don't yet have everyone using refcounts */ 1093 tty_port_close_end(port, tty); 1094 tty_port_tty_set(port, NULL); 1095} 1096 1097static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count) 1098{ 1099 int c, total = 0; 1100 struct mxser_port *info = tty->driver_data; 1101 unsigned long flags; 1102 1103 if (!info->port.xmit_buf) 1104 return 0; 1105 1106 while (1) { 1107 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1, 1108 SERIAL_XMIT_SIZE - info->xmit_head)); 1109 if (c <= 0) 1110 break; 1111 1112 memcpy(info->port.xmit_buf + info->xmit_head, buf, c); 1113 spin_lock_irqsave(&info->slock, flags); 1114 info->xmit_head = (info->xmit_head + c) & 1115 (SERIAL_XMIT_SIZE - 1); 1116 info->xmit_cnt += c; 1117 spin_unlock_irqrestore(&info->slock, flags); 1118 1119 buf += c; 1120 count -= c; 1121 total += c; 1122 } 1123 1124 if (info->xmit_cnt && !tty->stopped) { 1125 if (!tty->hw_stopped || 1126 (info->type == PORT_16550A) || 1127 (info->board->chip_flag)) { 1128 spin_lock_irqsave(&info->slock, flags); 1129 outb(info->IER & ~UART_IER_THRI, info->ioaddr + 1130 UART_IER); 1131 info->IER |= UART_IER_THRI; 1132 outb(info->IER, info->ioaddr + UART_IER); 1133 spin_unlock_irqrestore(&info->slock, flags); 1134 } 1135 } 1136 return total; 1137} 1138 1139static int mxser_put_char(struct tty_struct *tty, unsigned char ch) 1140{ 1141 struct mxser_port *info = tty->driver_data; 1142 unsigned long flags; 1143 1144 if (!info->port.xmit_buf) 1145 return 0; 1146 1147 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1) 1148 return 0; 1149 1150 spin_lock_irqsave(&info->slock, flags); 1151 info->port.xmit_buf[info->xmit_head++] = ch; 1152 info->xmit_head &= SERIAL_XMIT_SIZE - 1; 1153 info->xmit_cnt++; 1154 spin_unlock_irqrestore(&info->slock, flags); 1155 if (!tty->stopped) { 1156 if (!tty->hw_stopped || 1157 (info->type == PORT_16550A) || 1158 info->board->chip_flag) { 1159 spin_lock_irqsave(&info->slock, flags); 1160 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); 1161 info->IER |= UART_IER_THRI; 1162 outb(info->IER, info->ioaddr + UART_IER); 1163 spin_unlock_irqrestore(&info->slock, flags); 1164 } 1165 } 1166 return 1; 1167} 1168 1169 1170static void mxser_flush_chars(struct tty_struct *tty) 1171{ 1172 struct mxser_port *info = tty->driver_data; 1173 unsigned long flags; 1174 1175 if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf || 1176 (tty->hw_stopped && info->type != PORT_16550A && 1177 !info->board->chip_flag)) 1178 return; 1179 1180 spin_lock_irqsave(&info->slock, flags); 1181 1182 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); 1183 info->IER |= UART_IER_THRI; 1184 outb(info->IER, info->ioaddr + UART_IER); 1185 1186 spin_unlock_irqrestore(&info->slock, flags); 1187} 1188 1189static int mxser_write_room(struct tty_struct *tty) 1190{ 1191 struct mxser_port *info = tty->driver_data; 1192 int ret; 1193 1194 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1; 1195 return ret < 0 ? 0 : ret; 1196} 1197 1198static int mxser_chars_in_buffer(struct tty_struct *tty) 1199{ 1200 struct mxser_port *info = tty->driver_data; 1201 return info->xmit_cnt; 1202} 1203 1204/* 1205 * ------------------------------------------------------------ 1206 * friends of mxser_ioctl() 1207 * ------------------------------------------------------------ 1208 */ 1209static int mxser_get_serial_info(struct tty_struct *tty, 1210 struct serial_struct *ss) 1211{ 1212 struct mxser_port *info = tty->driver_data; 1213 struct tty_port *port = &info->port; 1214 1215 if (tty->index == MXSER_PORTS) 1216 return -ENOTTY; 1217 1218 mutex_lock(&port->mutex); 1219 ss->type = info->type, 1220 ss->line = tty->index, 1221 ss->port = info->ioaddr, 1222 ss->irq = info->board->irq, 1223 ss->flags = info->port.flags, 1224 ss->baud_base = info->baud_base, 1225 ss->close_delay = info->port.close_delay, 1226 ss->closing_wait = info->port.closing_wait, 1227 ss->custom_divisor = info->custom_divisor, 1228 mutex_unlock(&port->mutex); 1229 return 0; 1230} 1231 1232static int mxser_set_serial_info(struct tty_struct *tty, 1233 struct serial_struct *ss) 1234{ 1235 struct mxser_port *info = tty->driver_data; 1236 struct tty_port *port = &info->port; 1237 speed_t baud; 1238 unsigned long sl_flags; 1239 unsigned int flags; 1240 int retval = 0; 1241 1242 if (tty->index == MXSER_PORTS) 1243 return -ENOTTY; 1244 if (tty_io_error(tty)) 1245 return -EIO; 1246 1247 mutex_lock(&port->mutex); 1248 if (!info->ioaddr) { 1249 mutex_unlock(&port->mutex); 1250 return -ENODEV; 1251 } 1252 1253 if (ss->irq != info->board->irq || 1254 ss->port != info->ioaddr) { 1255 mutex_unlock(&port->mutex); 1256 return -EINVAL; 1257 } 1258 1259 flags = port->flags & ASYNC_SPD_MASK; 1260 1261 if (!capable(CAP_SYS_ADMIN)) { 1262 if ((ss->baud_base != info->baud_base) || 1263 (ss->close_delay != info->port.close_delay) || 1264 ((ss->flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK))) { 1265 mutex_unlock(&port->mutex); 1266 return -EPERM; 1267 } 1268 info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) | 1269 (ss->flags & ASYNC_USR_MASK)); 1270 } else { 1271 /* 1272 * OK, past this point, all the error checking has been done. 1273 * At this point, we start making changes..... 1274 */ 1275 port->flags = ((port->flags & ~ASYNC_FLAGS) | 1276 (ss->flags & ASYNC_FLAGS)); 1277 port->close_delay = ss->close_delay * HZ / 100; 1278 port->closing_wait = ss->closing_wait * HZ / 100; 1279 port->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0; 1280 if ((port->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST && 1281 (ss->baud_base != info->baud_base || 1282 ss->custom_divisor != 1283 info->custom_divisor)) { 1284 if (ss->custom_divisor == 0) { 1285 mutex_unlock(&port->mutex); 1286 return -EINVAL; 1287 } 1288 baud = ss->baud_base / ss->custom_divisor; 1289 tty_encode_baud_rate(tty, baud, baud); 1290 } 1291 } 1292 1293 info->type = ss->type; 1294 1295 process_txrx_fifo(info); 1296 1297 if (tty_port_initialized(port)) { 1298 if (flags != (port->flags & ASYNC_SPD_MASK)) { 1299 spin_lock_irqsave(&info->slock, sl_flags); 1300 mxser_change_speed(tty); 1301 spin_unlock_irqrestore(&info->slock, sl_flags); 1302 } 1303 } else { 1304 retval = mxser_activate(port, tty); 1305 if (retval == 0) 1306 tty_port_set_initialized(port, 1); 1307 } 1308 mutex_unlock(&port->mutex); 1309 return retval; 1310} 1311 1312/* 1313 * mxser_get_lsr_info - get line status register info 1314 * 1315 * Purpose: Let user call ioctl() to get info when the UART physically 1316 * is emptied. On bus types like RS485, the transmitter must 1317 * release the bus after transmitting. This must be done when 1318 * the transmit shift register is empty, not be done when the 1319 * transmit holding register is empty. This functionality 1320 * allows an RS485 driver to be written in user space. 1321 */ 1322static int mxser_get_lsr_info(struct mxser_port *info, 1323 unsigned int __user *value) 1324{ 1325 unsigned char status; 1326 unsigned int result; 1327 unsigned long flags; 1328 1329 spin_lock_irqsave(&info->slock, flags); 1330 status = inb(info->ioaddr + UART_LSR); 1331 spin_unlock_irqrestore(&info->slock, flags); 1332 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0); 1333 return put_user(result, value); 1334} 1335 1336static int mxser_tiocmget(struct tty_struct *tty) 1337{ 1338 struct mxser_port *info = tty->driver_data; 1339 unsigned char control, status; 1340 unsigned long flags; 1341 1342 1343 if (tty->index == MXSER_PORTS) 1344 return -ENOIOCTLCMD; 1345 if (tty_io_error(tty)) 1346 return -EIO; 1347 1348 control = info->MCR; 1349 1350 spin_lock_irqsave(&info->slock, flags); 1351 status = inb(info->ioaddr + UART_MSR); 1352 if (status & UART_MSR_ANY_DELTA) 1353 mxser_check_modem_status(tty, info, status); 1354 spin_unlock_irqrestore(&info->slock, flags); 1355 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) | 1356 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) | 1357 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) | 1358 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) | 1359 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) | 1360 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0); 1361} 1362 1363static int mxser_tiocmset(struct tty_struct *tty, 1364 unsigned int set, unsigned int clear) 1365{ 1366 struct mxser_port *info = tty->driver_data; 1367 unsigned long flags; 1368 1369 1370 if (tty->index == MXSER_PORTS) 1371 return -ENOIOCTLCMD; 1372 if (tty_io_error(tty)) 1373 return -EIO; 1374 1375 spin_lock_irqsave(&info->slock, flags); 1376 1377 if (set & TIOCM_RTS) 1378 info->MCR |= UART_MCR_RTS; 1379 if (set & TIOCM_DTR) 1380 info->MCR |= UART_MCR_DTR; 1381 1382 if (clear & TIOCM_RTS) 1383 info->MCR &= ~UART_MCR_RTS; 1384 if (clear & TIOCM_DTR) 1385 info->MCR &= ~UART_MCR_DTR; 1386 1387 outb(info->MCR, info->ioaddr + UART_MCR); 1388 spin_unlock_irqrestore(&info->slock, flags); 1389 return 0; 1390} 1391 1392static int __init mxser_program_mode(int port) 1393{ 1394 int id, i, j, n; 1395 1396 outb(0, port); 1397 outb(0, port); 1398 outb(0, port); 1399 (void)inb(port); 1400 (void)inb(port); 1401 outb(0, port); 1402 (void)inb(port); 1403 1404 id = inb(port + 1) & 0x1F; 1405 if ((id != C168_ASIC_ID) && 1406 (id != C104_ASIC_ID) && 1407 (id != C102_ASIC_ID) && 1408 (id != CI132_ASIC_ID) && 1409 (id != CI134_ASIC_ID) && 1410 (id != CI104J_ASIC_ID)) 1411 return -1; 1412 for (i = 0, j = 0; i < 4; i++) { 1413 n = inb(port + 2); 1414 if (n == 'M') { 1415 j = 1; 1416 } else if ((j == 1) && (n == 1)) { 1417 j = 2; 1418 break; 1419 } else 1420 j = 0; 1421 } 1422 if (j != 2) 1423 id = -2; 1424 return id; 1425} 1426 1427static void __init mxser_normal_mode(int port) 1428{ 1429 int i, n; 1430 1431 outb(0xA5, port + 1); 1432 outb(0x80, port + 3); 1433 outb(12, port + 0); /* 9600 bps */ 1434 outb(0, port + 1); 1435 outb(0x03, port + 3); /* 8 data bits */ 1436 outb(0x13, port + 4); /* loop back mode */ 1437 for (i = 0; i < 16; i++) { 1438 n = inb(port + 5); 1439 if ((n & 0x61) == 0x60) 1440 break; 1441 if ((n & 1) == 1) 1442 (void)inb(port); 1443 } 1444 outb(0x00, port + 4); 1445} 1446 1447#define CHIP_SK 0x01 /* Serial Data Clock in Eprom */ 1448#define CHIP_DO 0x02 /* Serial Data Output in Eprom */ 1449#define CHIP_CS 0x04 /* Serial Chip Select in Eprom */ 1450#define CHIP_DI 0x08 /* Serial Data Input in Eprom */ 1451#define EN_CCMD 0x000 /* Chip's command register */ 1452#define EN0_RSARLO 0x008 /* Remote start address reg 0 */ 1453#define EN0_RSARHI 0x009 /* Remote start address reg 1 */ 1454#define EN0_RCNTLO 0x00A /* Remote byte count reg WR */ 1455#define EN0_RCNTHI 0x00B /* Remote byte count reg WR */ 1456#define EN0_DCFG 0x00E /* Data configuration reg WR */ 1457#define EN0_PORT 0x010 /* Rcv missed frame error counter RD */ 1458#define ENC_PAGE0 0x000 /* Select page 0 of chip registers */ 1459#define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */ 1460static int __init mxser_read_register(int port, unsigned short *regs) 1461{ 1462 int i, k, value, id; 1463 unsigned int j; 1464 1465 id = mxser_program_mode(port); 1466 if (id < 0) 1467 return id; 1468 for (i = 0; i < 14; i++) { 1469 k = (i & 0x3F) | 0x180; 1470 for (j = 0x100; j > 0; j >>= 1) { 1471 outb(CHIP_CS, port); 1472 if (k & j) { 1473 outb(CHIP_CS | CHIP_DO, port); 1474 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */ 1475 } else { 1476 outb(CHIP_CS, port); 1477 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */ 1478 } 1479 } 1480 (void)inb(port); 1481 value = 0; 1482 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) { 1483 outb(CHIP_CS, port); 1484 outb(CHIP_CS | CHIP_SK, port); 1485 if (inb(port) & CHIP_DI) 1486 value |= j; 1487 } 1488 regs[i] = value; 1489 outb(0, port); 1490 } 1491 mxser_normal_mode(port); 1492 return id; 1493} 1494 1495static int mxser_ioctl_special(unsigned int cmd, void __user *argp) 1496{ 1497 struct mxser_port *ip; 1498 struct tty_port *port; 1499 struct tty_struct *tty; 1500 int result, status; 1501 unsigned int i, j; 1502 int ret = 0; 1503 1504 switch (cmd) { 1505 case MOXA_GET_MAJOR: 1506 printk_ratelimited(KERN_WARNING "mxser: '%s' uses deprecated ioctl " 1507 "%x (GET_MAJOR), fix your userspace\n", 1508 current->comm, cmd); 1509 return put_user(ttymajor, (int __user *)argp); 1510 1511 case MOXA_CHKPORTENABLE: 1512 result = 0; 1513 for (i = 0; i < MXSER_BOARDS; i++) 1514 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) 1515 if (mxser_boards[i].ports[j].ioaddr) 1516 result |= (1 << i); 1517 return put_user(result, (unsigned long __user *)argp); 1518 case MOXA_GETDATACOUNT: 1519 /* The receive side is locked by port->slock but it isn't 1520 clear that an exact snapshot is worth copying here */ 1521 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log))) 1522 ret = -EFAULT; 1523 return ret; 1524 case MOXA_GETMSTATUS: { 1525 struct mxser_mstatus ms, __user *msu = argp; 1526 for (i = 0; i < MXSER_BOARDS; i++) 1527 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) { 1528 ip = &mxser_boards[i].ports[j]; 1529 port = &ip->port; 1530 memset(&ms, 0, sizeof(ms)); 1531 1532 mutex_lock(&port->mutex); 1533 if (!ip->ioaddr) 1534 goto copy; 1535 1536 tty = tty_port_tty_get(port); 1537 1538 if (!tty) 1539 ms.cflag = ip->normal_termios.c_cflag; 1540 else 1541 ms.cflag = tty->termios.c_cflag; 1542 tty_kref_put(tty); 1543 spin_lock_irq(&ip->slock); 1544 status = inb(ip->ioaddr + UART_MSR); 1545 spin_unlock_irq(&ip->slock); 1546 if (status & UART_MSR_DCD) 1547 ms.dcd = 1; 1548 if (status & UART_MSR_DSR) 1549 ms.dsr = 1; 1550 if (status & UART_MSR_CTS) 1551 ms.cts = 1; 1552 copy: 1553 mutex_unlock(&port->mutex); 1554 if (copy_to_user(msu, &ms, sizeof(ms))) 1555 return -EFAULT; 1556 msu++; 1557 } 1558 return 0; 1559 } 1560 case MOXA_ASPP_MON_EXT: { 1561 struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */ 1562 unsigned int cflag, iflag, p; 1563 u8 opmode; 1564 1565 me = kzalloc(sizeof(*me), GFP_KERNEL); 1566 if (!me) 1567 return -ENOMEM; 1568 1569 for (i = 0, p = 0; i < MXSER_BOARDS; i++) { 1570 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) { 1571 if (p >= ARRAY_SIZE(me->rx_cnt)) { 1572 i = MXSER_BOARDS; 1573 break; 1574 } 1575 ip = &mxser_boards[i].ports[j]; 1576 port = &ip->port; 1577 1578 mutex_lock(&port->mutex); 1579 if (!ip->ioaddr) { 1580 mutex_unlock(&port->mutex); 1581 continue; 1582 } 1583 1584 spin_lock_irq(&ip->slock); 1585 status = mxser_get_msr(ip->ioaddr, 0, p); 1586 1587 if (status & UART_MSR_TERI) 1588 ip->icount.rng++; 1589 if (status & UART_MSR_DDSR) 1590 ip->icount.dsr++; 1591 if (status & UART_MSR_DDCD) 1592 ip->icount.dcd++; 1593 if (status & UART_MSR_DCTS) 1594 ip->icount.cts++; 1595 1596 ip->mon_data.modem_status = status; 1597 me->rx_cnt[p] = ip->mon_data.rxcnt; 1598 me->tx_cnt[p] = ip->mon_data.txcnt; 1599 me->up_rxcnt[p] = ip->mon_data.up_rxcnt; 1600 me->up_txcnt[p] = ip->mon_data.up_txcnt; 1601 me->modem_status[p] = 1602 ip->mon_data.modem_status; 1603 spin_unlock_irq(&ip->slock); 1604 1605 tty = tty_port_tty_get(&ip->port); 1606 1607 if (!tty) { 1608 cflag = ip->normal_termios.c_cflag; 1609 iflag = ip->normal_termios.c_iflag; 1610 me->baudrate[p] = tty_termios_baud_rate(&ip->normal_termios); 1611 } else { 1612 cflag = tty->termios.c_cflag; 1613 iflag = tty->termios.c_iflag; 1614 me->baudrate[p] = tty_get_baud_rate(tty); 1615 } 1616 tty_kref_put(tty); 1617 1618 me->databits[p] = cflag & CSIZE; 1619 me->stopbits[p] = cflag & CSTOPB; 1620 me->parity[p] = cflag & (PARENB | PARODD | 1621 CMSPAR); 1622 1623 if (cflag & CRTSCTS) 1624 me->flowctrl[p] |= 0x03; 1625 1626 if (iflag & (IXON | IXOFF)) 1627 me->flowctrl[p] |= 0x0C; 1628 1629 if (ip->type == PORT_16550A) 1630 me->fifo[p] = 1; 1631 1632 if (ip->board->chip_flag == MOXA_MUST_MU860_HWID) { 1633 opmode = inb(ip->opmode_ioaddr)>>((p % 4) * 2); 1634 opmode &= OP_MODE_MASK; 1635 } else { 1636 opmode = RS232_MODE; 1637 } 1638 me->iftype[p] = opmode; 1639 mutex_unlock(&port->mutex); 1640 } 1641 } 1642 if (copy_to_user(argp, me, sizeof(*me))) 1643 ret = -EFAULT; 1644 kfree(me); 1645 return ret; 1646 } 1647 default: 1648 return -ENOIOCTLCMD; 1649 } 1650 return 0; 1651} 1652 1653static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg, 1654 struct async_icount *cprev) 1655{ 1656 struct async_icount cnow; 1657 unsigned long flags; 1658 int ret; 1659 1660 spin_lock_irqsave(&info->slock, flags); 1661 cnow = info->icount; /* atomic copy */ 1662 spin_unlock_irqrestore(&info->slock, flags); 1663 1664 ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) || 1665 ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) || 1666 ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) || 1667 ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts)); 1668 1669 *cprev = cnow; 1670 1671 return ret; 1672} 1673 1674static int mxser_ioctl(struct tty_struct *tty, 1675 unsigned int cmd, unsigned long arg) 1676{ 1677 struct mxser_port *info = tty->driver_data; 1678 struct async_icount cnow; 1679 unsigned long flags; 1680 void __user *argp = (void __user *)arg; 1681 1682 if (tty->index == MXSER_PORTS) 1683 return mxser_ioctl_special(cmd, argp); 1684 1685 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) { 1686 int p; 1687 unsigned long opmode; 1688 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f }; 1689 int shiftbit; 1690 unsigned char val, mask; 1691 1692 if (info->board->chip_flag != MOXA_MUST_MU860_HWID) 1693 return -EFAULT; 1694 1695 p = tty->index % 4; 1696 if (cmd == MOXA_SET_OP_MODE) { 1697 if (get_user(opmode, (int __user *) argp)) 1698 return -EFAULT; 1699 if (opmode != RS232_MODE && 1700 opmode != RS485_2WIRE_MODE && 1701 opmode != RS422_MODE && 1702 opmode != RS485_4WIRE_MODE) 1703 return -EFAULT; 1704 mask = ModeMask[p]; 1705 shiftbit = p * 2; 1706 spin_lock_irq(&info->slock); 1707 val = inb(info->opmode_ioaddr); 1708 val &= mask; 1709 val |= (opmode << shiftbit); 1710 outb(val, info->opmode_ioaddr); 1711 spin_unlock_irq(&info->slock); 1712 } else { 1713 shiftbit = p * 2; 1714 spin_lock_irq(&info->slock); 1715 opmode = inb(info->opmode_ioaddr) >> shiftbit; 1716 spin_unlock_irq(&info->slock); 1717 opmode &= OP_MODE_MASK; 1718 if (put_user(opmode, (int __user *)argp)) 1719 return -EFAULT; 1720 } 1721 return 0; 1722 } 1723 1724 if (cmd != TIOCMIWAIT && tty_io_error(tty)) 1725 return -EIO; 1726 1727 switch (cmd) { 1728 case TIOCSERGETLSR: /* Get line status register */ 1729 return mxser_get_lsr_info(info, argp); 1730 /* 1731 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change 1732 * - mask passed in arg for lines of interest 1733 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking) 1734 * Caller should use TIOCGICOUNT to see which one it was 1735 */ 1736 case TIOCMIWAIT: 1737 spin_lock_irqsave(&info->slock, flags); 1738 cnow = info->icount; /* note the counters on entry */ 1739 spin_unlock_irqrestore(&info->slock, flags); 1740 1741 return wait_event_interruptible(info->port.delta_msr_wait, 1742 mxser_cflags_changed(info, arg, &cnow)); 1743 case MOXA_HighSpeedOn: 1744 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp); 1745 case MOXA_SDS_RSTICOUNTER: 1746 spin_lock_irq(&info->slock); 1747 info->mon_data.rxcnt = 0; 1748 info->mon_data.txcnt = 0; 1749 spin_unlock_irq(&info->slock); 1750 return 0; 1751 1752 case MOXA_ASPP_OQUEUE:{ 1753 int len, lsr; 1754 1755 len = mxser_chars_in_buffer(tty); 1756 spin_lock_irq(&info->slock); 1757 lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_THRE; 1758 spin_unlock_irq(&info->slock); 1759 len += (lsr ? 0 : 1); 1760 1761 return put_user(len, (int __user *)argp); 1762 } 1763 case MOXA_ASPP_MON: { 1764 int mcr, status; 1765 1766 spin_lock_irq(&info->slock); 1767 status = mxser_get_msr(info->ioaddr, 1, tty->index); 1768 mxser_check_modem_status(tty, info, status); 1769 1770 mcr = inb(info->ioaddr + UART_MCR); 1771 spin_unlock_irq(&info->slock); 1772 1773 if (mcr & MOXA_MUST_MCR_XON_FLAG) 1774 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD; 1775 else 1776 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD; 1777 1778 if (mcr & MOXA_MUST_MCR_TX_XON) 1779 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT; 1780 else 1781 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT; 1782 1783 if (tty->hw_stopped) 1784 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD; 1785 else 1786 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD; 1787 1788 if (copy_to_user(argp, &info->mon_data, 1789 sizeof(struct mxser_mon))) 1790 return -EFAULT; 1791 1792 return 0; 1793 } 1794 case MOXA_ASPP_LSTATUS: { 1795 if (put_user(info->err_shadow, (unsigned char __user *)argp)) 1796 return -EFAULT; 1797 1798 info->err_shadow = 0; 1799 return 0; 1800 } 1801 case MOXA_SET_BAUD_METHOD: { 1802 int method; 1803 1804 if (get_user(method, (int __user *)argp)) 1805 return -EFAULT; 1806 mxser_set_baud_method[tty->index] = method; 1807 return put_user(method, (int __user *)argp); 1808 } 1809 default: 1810 return -ENOIOCTLCMD; 1811 } 1812 return 0; 1813} 1814 1815 /* 1816 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) 1817 * Return: write counters to the user passed counter struct 1818 * NB: both 1->0 and 0->1 transitions are counted except for 1819 * RI where only 0->1 is counted. 1820 */ 1821 1822static int mxser_get_icount(struct tty_struct *tty, 1823 struct serial_icounter_struct *icount) 1824 1825{ 1826 struct mxser_port *info = tty->driver_data; 1827 struct async_icount cnow; 1828 unsigned long flags; 1829 1830 spin_lock_irqsave(&info->slock, flags); 1831 cnow = info->icount; 1832 spin_unlock_irqrestore(&info->slock, flags); 1833 1834 icount->frame = cnow.frame; 1835 icount->brk = cnow.brk; 1836 icount->overrun = cnow.overrun; 1837 icount->buf_overrun = cnow.buf_overrun; 1838 icount->parity = cnow.parity; 1839 icount->rx = cnow.rx; 1840 icount->tx = cnow.tx; 1841 icount->cts = cnow.cts; 1842 icount->dsr = cnow.dsr; 1843 icount->rng = cnow.rng; 1844 icount->dcd = cnow.dcd; 1845 return 0; 1846} 1847 1848static void mxser_stoprx(struct tty_struct *tty) 1849{ 1850 struct mxser_port *info = tty->driver_data; 1851 1852 info->ldisc_stop_rx = 1; 1853 if (I_IXOFF(tty)) { 1854 if (info->board->chip_flag) { 1855 info->IER &= ~MOXA_MUST_RECV_ISR; 1856 outb(info->IER, info->ioaddr + UART_IER); 1857 } else { 1858 info->x_char = STOP_CHAR(tty); 1859 outb(0, info->ioaddr + UART_IER); 1860 info->IER |= UART_IER_THRI; 1861 outb(info->IER, info->ioaddr + UART_IER); 1862 } 1863 } 1864 1865 if (C_CRTSCTS(tty)) { 1866 info->MCR &= ~UART_MCR_RTS; 1867 outb(info->MCR, info->ioaddr + UART_MCR); 1868 } 1869} 1870 1871/* 1872 * This routine is called by the upper-layer tty layer to signal that 1873 * incoming characters should be throttled. 1874 */ 1875static void mxser_throttle(struct tty_struct *tty) 1876{ 1877 mxser_stoprx(tty); 1878} 1879 1880static void mxser_unthrottle(struct tty_struct *tty) 1881{ 1882 struct mxser_port *info = tty->driver_data; 1883 1884 /* startrx */ 1885 info->ldisc_stop_rx = 0; 1886 if (I_IXOFF(tty)) { 1887 if (info->x_char) 1888 info->x_char = 0; 1889 else { 1890 if (info->board->chip_flag) { 1891 info->IER |= MOXA_MUST_RECV_ISR; 1892 outb(info->IER, info->ioaddr + UART_IER); 1893 } else { 1894 info->x_char = START_CHAR(tty); 1895 outb(0, info->ioaddr + UART_IER); 1896 info->IER |= UART_IER_THRI; 1897 outb(info->IER, info->ioaddr + UART_IER); 1898 } 1899 } 1900 } 1901 1902 if (C_CRTSCTS(tty)) { 1903 info->MCR |= UART_MCR_RTS; 1904 outb(info->MCR, info->ioaddr + UART_MCR); 1905 } 1906} 1907 1908/* 1909 * mxser_stop() and mxser_start() 1910 * 1911 * This routines are called before setting or resetting tty->stopped. 1912 * They enable or disable transmitter interrupts, as necessary. 1913 */ 1914static void mxser_stop(struct tty_struct *tty) 1915{ 1916 struct mxser_port *info = tty->driver_data; 1917 unsigned long flags; 1918 1919 spin_lock_irqsave(&info->slock, flags); 1920 if (info->IER & UART_IER_THRI) { 1921 info->IER &= ~UART_IER_THRI; 1922 outb(info->IER, info->ioaddr + UART_IER); 1923 } 1924 spin_unlock_irqrestore(&info->slock, flags); 1925} 1926 1927static void mxser_start(struct tty_struct *tty) 1928{ 1929 struct mxser_port *info = tty->driver_data; 1930 unsigned long flags; 1931 1932 spin_lock_irqsave(&info->slock, flags); 1933 if (info->xmit_cnt && info->port.xmit_buf) { 1934 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); 1935 info->IER |= UART_IER_THRI; 1936 outb(info->IER, info->ioaddr + UART_IER); 1937 } 1938 spin_unlock_irqrestore(&info->slock, flags); 1939} 1940 1941static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios) 1942{ 1943 struct mxser_port *info = tty->driver_data; 1944 unsigned long flags; 1945 1946 spin_lock_irqsave(&info->slock, flags); 1947 mxser_change_speed(tty); 1948 spin_unlock_irq…
Large files files are truncated, but you can click here to view the full file