/drivers/net/phy/marvell.c

http://github.com/mirrors/linux · C · 2485 lines · 1891 code · 404 blank · 190 comment · 262 complexity · a19fcc66eae61925c1beed4ce29d113e MD5 · raw file

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * drivers/net/phy/marvell.c
  4. *
  5. * Driver for Marvell PHYs
  6. *
  7. * Author: Andy Fleming
  8. *
  9. * Copyright (c) 2004 Freescale Semiconductor, Inc.
  10. *
  11. * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/string.h>
  15. #include <linux/ctype.h>
  16. #include <linux/errno.h>
  17. #include <linux/unistd.h>
  18. #include <linux/hwmon.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/init.h>
  21. #include <linux/delay.h>
  22. #include <linux/netdevice.h>
  23. #include <linux/etherdevice.h>
  24. #include <linux/skbuff.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/mm.h>
  27. #include <linux/module.h>
  28. #include <linux/mii.h>
  29. #include <linux/ethtool.h>
  30. #include <linux/phy.h>
  31. #include <linux/marvell_phy.h>
  32. #include <linux/bitfield.h>
  33. #include <linux/of.h>
  34. #include <linux/io.h>
  35. #include <asm/irq.h>
  36. #include <linux/uaccess.h>
  37. #define MII_MARVELL_PHY_PAGE 22
  38. #define MII_MARVELL_COPPER_PAGE 0x00
  39. #define MII_MARVELL_FIBER_PAGE 0x01
  40. #define MII_MARVELL_MSCR_PAGE 0x02
  41. #define MII_MARVELL_LED_PAGE 0x03
  42. #define MII_MARVELL_MISC_TEST_PAGE 0x06
  43. #define MII_MARVELL_WOL_PAGE 0x11
  44. #define MII_M1011_IEVENT 0x13
  45. #define MII_M1011_IEVENT_CLEAR 0x0000
  46. #define MII_M1011_IMASK 0x12
  47. #define MII_M1011_IMASK_INIT 0x6400
  48. #define MII_M1011_IMASK_CLEAR 0x0000
  49. #define MII_M1011_PHY_SCR 0x10
  50. #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
  51. #define MII_M1011_PHY_SCR_DOWNSHIFT_MASK GENMASK(14, 12)
  52. #define MII_M1011_PHY_SCR_DOWNSHIFT_MAX 8
  53. #define MII_M1011_PHY_SCR_MDI (0x0 << 5)
  54. #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
  55. #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
  56. #define MII_M1011_PHY_SSR 0x11
  57. #define MII_M1011_PHY_SSR_DOWNSHIFT BIT(5)
  58. #define MII_M1111_PHY_LED_CONTROL 0x18
  59. #define MII_M1111_PHY_LED_DIRECT 0x4100
  60. #define MII_M1111_PHY_LED_COMBINE 0x411c
  61. #define MII_M1111_PHY_EXT_CR 0x14
  62. #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK GENMASK(11, 9)
  63. #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX 8
  64. #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN BIT(8)
  65. #define MII_M1111_RGMII_RX_DELAY BIT(7)
  66. #define MII_M1111_RGMII_TX_DELAY BIT(1)
  67. #define MII_M1111_PHY_EXT_SR 0x1b
  68. #define MII_M1111_HWCFG_MODE_MASK 0xf
  69. #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
  70. #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
  71. #define MII_M1111_HWCFG_MODE_RTBI 0x7
  72. #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
  73. #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
  74. #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
  75. #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
  76. #define MII_88E1121_PHY_MSCR_REG 21
  77. #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
  78. #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
  79. #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4))
  80. #define MII_88E1121_MISC_TEST 0x1a
  81. #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
  82. #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
  83. #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
  84. #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
  85. #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
  86. #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
  87. #define MII_88E1510_TEMP_SENSOR 0x1b
  88. #define MII_88E1510_TEMP_SENSOR_MASK 0xff
  89. #define MII_88E1540_COPPER_CTRL3 0x1a
  90. #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK GENMASK(11, 10)
  91. #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS 0
  92. #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS 1
  93. #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS 2
  94. #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS 3
  95. #define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN BIT(9)
  96. #define MII_88E6390_MISC_TEST 0x1b
  97. #define MII_88E6390_MISC_TEST_SAMPLE_1S 0
  98. #define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14)
  99. #define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15)
  100. #define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0
  101. #define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14)
  102. #define MII_88E6390_TEMP_SENSOR 0x1c
  103. #define MII_88E6390_TEMP_SENSOR_MASK 0xff
  104. #define MII_88E6390_TEMP_SENSOR_SAMPLES 10
  105. #define MII_88E1318S_PHY_MSCR1_REG 16
  106. #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
  107. /* Copper Specific Interrupt Enable Register */
  108. #define MII_88E1318S_PHY_CSIER 0x12
  109. /* WOL Event Interrupt Enable */
  110. #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
  111. /* LED Timer Control Register */
  112. #define MII_88E1318S_PHY_LED_TCR 0x12
  113. #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
  114. #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
  115. #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
  116. /* Magic Packet MAC address registers */
  117. #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
  118. #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
  119. #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
  120. #define MII_88E1318S_PHY_WOL_CTRL 0x10
  121. #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
  122. #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
  123. #define MII_PHY_LED_CTRL 16
  124. #define MII_88E1121_PHY_LED_DEF 0x0030
  125. #define MII_88E1510_PHY_LED_DEF 0x1177
  126. #define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE 0x1040
  127. #define MII_M1011_PHY_STATUS 0x11
  128. #define MII_M1011_PHY_STATUS_1000 0x8000
  129. #define MII_M1011_PHY_STATUS_100 0x4000
  130. #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
  131. #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
  132. #define MII_M1011_PHY_STATUS_RESOLVED 0x0800
  133. #define MII_M1011_PHY_STATUS_LINK 0x0400
  134. #define MII_88E3016_PHY_SPEC_CTRL 0x10
  135. #define MII_88E3016_DISABLE_SCRAMBLER 0x0200
  136. #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
  137. #define MII_88E1510_GEN_CTRL_REG_1 0x14
  138. #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
  139. #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
  140. #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
  141. #define LPA_PAUSE_FIBER 0x180
  142. #define LPA_PAUSE_ASYM_FIBER 0x100
  143. #define NB_FIBER_STATS 1
  144. MODULE_DESCRIPTION("Marvell PHY driver");
  145. MODULE_AUTHOR("Andy Fleming");
  146. MODULE_LICENSE("GPL");
  147. struct marvell_hw_stat {
  148. const char *string;
  149. u8 page;
  150. u8 reg;
  151. u8 bits;
  152. };
  153. static struct marvell_hw_stat marvell_hw_stats[] = {
  154. { "phy_receive_errors_copper", 0, 21, 16},
  155. { "phy_idle_errors", 0, 10, 8 },
  156. { "phy_receive_errors_fiber", 1, 21, 16},
  157. };
  158. struct marvell_priv {
  159. u64 stats[ARRAY_SIZE(marvell_hw_stats)];
  160. char *hwmon_name;
  161. struct device *hwmon_dev;
  162. };
  163. static int marvell_read_page(struct phy_device *phydev)
  164. {
  165. return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
  166. }
  167. static int marvell_write_page(struct phy_device *phydev, int page)
  168. {
  169. return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
  170. }
  171. static int marvell_set_page(struct phy_device *phydev, int page)
  172. {
  173. return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
  174. }
  175. static int marvell_ack_interrupt(struct phy_device *phydev)
  176. {
  177. int err;
  178. /* Clear the interrupts by reading the reg */
  179. err = phy_read(phydev, MII_M1011_IEVENT);
  180. if (err < 0)
  181. return err;
  182. return 0;
  183. }
  184. static int marvell_config_intr(struct phy_device *phydev)
  185. {
  186. int err;
  187. if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
  188. err = phy_write(phydev, MII_M1011_IMASK,
  189. MII_M1011_IMASK_INIT);
  190. else
  191. err = phy_write(phydev, MII_M1011_IMASK,
  192. MII_M1011_IMASK_CLEAR);
  193. return err;
  194. }
  195. static int marvell_set_polarity(struct phy_device *phydev, int polarity)
  196. {
  197. int reg;
  198. int err;
  199. int val;
  200. /* get the current settings */
  201. reg = phy_read(phydev, MII_M1011_PHY_SCR);
  202. if (reg < 0)
  203. return reg;
  204. val = reg;
  205. val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
  206. switch (polarity) {
  207. case ETH_TP_MDI:
  208. val |= MII_M1011_PHY_SCR_MDI;
  209. break;
  210. case ETH_TP_MDI_X:
  211. val |= MII_M1011_PHY_SCR_MDI_X;
  212. break;
  213. case ETH_TP_MDI_AUTO:
  214. case ETH_TP_MDI_INVALID:
  215. default:
  216. val |= MII_M1011_PHY_SCR_AUTO_CROSS;
  217. break;
  218. }
  219. if (val != reg) {
  220. /* Set the new polarity value in the register */
  221. err = phy_write(phydev, MII_M1011_PHY_SCR, val);
  222. if (err)
  223. return err;
  224. }
  225. return val != reg;
  226. }
  227. static int marvell_config_aneg(struct phy_device *phydev)
  228. {
  229. int changed = 0;
  230. int err;
  231. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  232. if (err < 0)
  233. return err;
  234. changed = err;
  235. err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
  236. MII_M1111_PHY_LED_DIRECT);
  237. if (err < 0)
  238. return err;
  239. err = genphy_config_aneg(phydev);
  240. if (err < 0)
  241. return err;
  242. if (phydev->autoneg != AUTONEG_ENABLE || changed) {
  243. /* A write to speed/duplex bits (that is performed by
  244. * genphy_config_aneg() call above) must be followed by
  245. * a software reset. Otherwise, the write has no effect.
  246. */
  247. err = genphy_soft_reset(phydev);
  248. if (err < 0)
  249. return err;
  250. }
  251. return 0;
  252. }
  253. static int m88e1101_config_aneg(struct phy_device *phydev)
  254. {
  255. int err;
  256. /* This Marvell PHY has an errata which requires
  257. * that certain registers get written in order
  258. * to restart autonegotiation
  259. */
  260. err = genphy_soft_reset(phydev);
  261. if (err < 0)
  262. return err;
  263. err = phy_write(phydev, 0x1d, 0x1f);
  264. if (err < 0)
  265. return err;
  266. err = phy_write(phydev, 0x1e, 0x200c);
  267. if (err < 0)
  268. return err;
  269. err = phy_write(phydev, 0x1d, 0x5);
  270. if (err < 0)
  271. return err;
  272. err = phy_write(phydev, 0x1e, 0);
  273. if (err < 0)
  274. return err;
  275. err = phy_write(phydev, 0x1e, 0x100);
  276. if (err < 0)
  277. return err;
  278. return marvell_config_aneg(phydev);
  279. }
  280. #ifdef CONFIG_OF_MDIO
  281. /* Set and/or override some configuration registers based on the
  282. * marvell,reg-init property stored in the of_node for the phydev.
  283. *
  284. * marvell,reg-init = <reg-page reg mask value>,...;
  285. *
  286. * There may be one or more sets of <reg-page reg mask value>:
  287. *
  288. * reg-page: which register bank to use.
  289. * reg: the register.
  290. * mask: if non-zero, ANDed with existing register value.
  291. * value: ORed with the masked value and written to the regiser.
  292. *
  293. */
  294. static int marvell_of_reg_init(struct phy_device *phydev)
  295. {
  296. const __be32 *paddr;
  297. int len, i, saved_page, current_page, ret = 0;
  298. if (!phydev->mdio.dev.of_node)
  299. return 0;
  300. paddr = of_get_property(phydev->mdio.dev.of_node,
  301. "marvell,reg-init", &len);
  302. if (!paddr || len < (4 * sizeof(*paddr)))
  303. return 0;
  304. saved_page = phy_save_page(phydev);
  305. if (saved_page < 0)
  306. goto err;
  307. current_page = saved_page;
  308. len /= sizeof(*paddr);
  309. for (i = 0; i < len - 3; i += 4) {
  310. u16 page = be32_to_cpup(paddr + i);
  311. u16 reg = be32_to_cpup(paddr + i + 1);
  312. u16 mask = be32_to_cpup(paddr + i + 2);
  313. u16 val_bits = be32_to_cpup(paddr + i + 3);
  314. int val;
  315. if (page != current_page) {
  316. current_page = page;
  317. ret = marvell_write_page(phydev, page);
  318. if (ret < 0)
  319. goto err;
  320. }
  321. val = 0;
  322. if (mask) {
  323. val = __phy_read(phydev, reg);
  324. if (val < 0) {
  325. ret = val;
  326. goto err;
  327. }
  328. val &= mask;
  329. }
  330. val |= val_bits;
  331. ret = __phy_write(phydev, reg, val);
  332. if (ret < 0)
  333. goto err;
  334. }
  335. err:
  336. return phy_restore_page(phydev, saved_page, ret);
  337. }
  338. #else
  339. static int marvell_of_reg_init(struct phy_device *phydev)
  340. {
  341. return 0;
  342. }
  343. #endif /* CONFIG_OF_MDIO */
  344. static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
  345. {
  346. int mscr;
  347. if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
  348. mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
  349. MII_88E1121_PHY_MSCR_TX_DELAY;
  350. else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
  351. mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
  352. else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
  353. mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
  354. else
  355. mscr = 0;
  356. return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
  357. MII_88E1121_PHY_MSCR_REG,
  358. MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
  359. }
  360. static int m88e1121_config_aneg(struct phy_device *phydev)
  361. {
  362. int changed = 0;
  363. int err = 0;
  364. if (phy_interface_is_rgmii(phydev)) {
  365. err = m88e1121_config_aneg_rgmii_delays(phydev);
  366. if (err < 0)
  367. return err;
  368. }
  369. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  370. if (err < 0)
  371. return err;
  372. changed = err;
  373. err = genphy_config_aneg(phydev);
  374. if (err < 0)
  375. return err;
  376. if (phydev->autoneg != AUTONEG_ENABLE || changed) {
  377. /* A software reset is used to ensure a "commit" of the
  378. * changes is done.
  379. */
  380. err = genphy_soft_reset(phydev);
  381. if (err < 0)
  382. return err;
  383. }
  384. return 0;
  385. }
  386. static int m88e1318_config_aneg(struct phy_device *phydev)
  387. {
  388. int err;
  389. err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
  390. MII_88E1318S_PHY_MSCR1_REG,
  391. 0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
  392. if (err < 0)
  393. return err;
  394. return m88e1121_config_aneg(phydev);
  395. }
  396. /**
  397. * linkmode_adv_to_fiber_adv_t
  398. * @advertise: the linkmode advertisement settings
  399. *
  400. * A small helper function that translates linkmode advertisement
  401. * settings to phy autonegotiation advertisements for the MII_ADV
  402. * register for fiber link.
  403. */
  404. static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise)
  405. {
  406. u32 result = 0;
  407. if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise))
  408. result |= ADVERTISE_1000XHALF;
  409. if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise))
  410. result |= ADVERTISE_1000XFULL;
  411. if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) &&
  412. linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
  413. result |= ADVERTISE_1000XPSE_ASYM;
  414. else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
  415. result |= ADVERTISE_1000XPAUSE;
  416. return result;
  417. }
  418. /**
  419. * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
  420. * @phydev: target phy_device struct
  421. *
  422. * Description: If auto-negotiation is enabled, we configure the
  423. * advertising, and then restart auto-negotiation. If it is not
  424. * enabled, then we write the BMCR. Adapted for fiber link in
  425. * some Marvell's devices.
  426. */
  427. static int marvell_config_aneg_fiber(struct phy_device *phydev)
  428. {
  429. int changed = 0;
  430. int err;
  431. u16 adv;
  432. if (phydev->autoneg != AUTONEG_ENABLE)
  433. return genphy_setup_forced(phydev);
  434. /* Only allow advertising what this PHY supports */
  435. linkmode_and(phydev->advertising, phydev->advertising,
  436. phydev->supported);
  437. adv = linkmode_adv_to_fiber_adv_t(phydev->advertising);
  438. /* Setup fiber advertisement */
  439. err = phy_modify_changed(phydev, MII_ADVERTISE,
  440. ADVERTISE_1000XHALF | ADVERTISE_1000XFULL |
  441. ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM,
  442. adv);
  443. if (err < 0)
  444. return err;
  445. if (err > 0)
  446. changed = 1;
  447. return genphy_check_and_restart_aneg(phydev, changed);
  448. }
  449. static int m88e1510_config_aneg(struct phy_device *phydev)
  450. {
  451. int err;
  452. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  453. if (err < 0)
  454. goto error;
  455. /* Configure the copper link first */
  456. err = m88e1318_config_aneg(phydev);
  457. if (err < 0)
  458. goto error;
  459. /* Do not touch the fiber page if we're in copper->sgmii mode */
  460. if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
  461. return 0;
  462. /* Then the fiber link */
  463. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  464. if (err < 0)
  465. goto error;
  466. err = marvell_config_aneg_fiber(phydev);
  467. if (err < 0)
  468. goto error;
  469. return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  470. error:
  471. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  472. return err;
  473. }
  474. static void marvell_config_led(struct phy_device *phydev)
  475. {
  476. u16 def_config;
  477. int err;
  478. switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
  479. /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
  480. case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
  481. case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
  482. def_config = MII_88E1121_PHY_LED_DEF;
  483. break;
  484. /* Default PHY LED config:
  485. * LED[0] .. 1000Mbps Link
  486. * LED[1] .. 100Mbps Link
  487. * LED[2] .. Blink, Activity
  488. */
  489. case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
  490. if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE)
  491. def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE;
  492. else
  493. def_config = MII_88E1510_PHY_LED_DEF;
  494. break;
  495. default:
  496. return;
  497. }
  498. err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
  499. def_config);
  500. if (err < 0)
  501. phydev_warn(phydev, "Fail to config marvell phy LED.\n");
  502. }
  503. static int marvell_config_init(struct phy_device *phydev)
  504. {
  505. /* Set defalut LED */
  506. marvell_config_led(phydev);
  507. /* Set registers from marvell,reg-init DT property */
  508. return marvell_of_reg_init(phydev);
  509. }
  510. static int m88e3016_config_init(struct phy_device *phydev)
  511. {
  512. int ret;
  513. /* Enable Scrambler and Auto-Crossover */
  514. ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
  515. MII_88E3016_DISABLE_SCRAMBLER,
  516. MII_88E3016_AUTO_MDIX_CROSSOVER);
  517. if (ret < 0)
  518. return ret;
  519. return marvell_config_init(phydev);
  520. }
  521. static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
  522. u16 mode,
  523. int fibre_copper_auto)
  524. {
  525. if (fibre_copper_auto)
  526. mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
  527. return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
  528. MII_M1111_HWCFG_MODE_MASK |
  529. MII_M1111_HWCFG_FIBER_COPPER_AUTO |
  530. MII_M1111_HWCFG_FIBER_COPPER_RES,
  531. mode);
  532. }
  533. static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
  534. {
  535. int delay;
  536. if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
  537. delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
  538. } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
  539. delay = MII_M1111_RGMII_RX_DELAY;
  540. } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
  541. delay = MII_M1111_RGMII_TX_DELAY;
  542. } else {
  543. delay = 0;
  544. }
  545. return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
  546. MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
  547. delay);
  548. }
  549. static int m88e1111_config_init_rgmii(struct phy_device *phydev)
  550. {
  551. int temp;
  552. int err;
  553. err = m88e1111_config_init_rgmii_delays(phydev);
  554. if (err < 0)
  555. return err;
  556. temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
  557. if (temp < 0)
  558. return temp;
  559. temp &= ~(MII_M1111_HWCFG_MODE_MASK);
  560. if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
  561. temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
  562. else
  563. temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
  564. return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
  565. }
  566. static int m88e1111_config_init_sgmii(struct phy_device *phydev)
  567. {
  568. int err;
  569. err = m88e1111_config_init_hwcfg_mode(
  570. phydev,
  571. MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
  572. MII_M1111_HWCFG_FIBER_COPPER_AUTO);
  573. if (err < 0)
  574. return err;
  575. /* make sure copper is selected */
  576. return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  577. }
  578. static int m88e1111_config_init_rtbi(struct phy_device *phydev)
  579. {
  580. int err;
  581. err = m88e1111_config_init_rgmii_delays(phydev);
  582. if (err < 0)
  583. return err;
  584. err = m88e1111_config_init_hwcfg_mode(
  585. phydev,
  586. MII_M1111_HWCFG_MODE_RTBI,
  587. MII_M1111_HWCFG_FIBER_COPPER_AUTO);
  588. if (err < 0)
  589. return err;
  590. /* soft reset */
  591. err = genphy_soft_reset(phydev);
  592. if (err < 0)
  593. return err;
  594. return m88e1111_config_init_hwcfg_mode(
  595. phydev,
  596. MII_M1111_HWCFG_MODE_RTBI,
  597. MII_M1111_HWCFG_FIBER_COPPER_AUTO);
  598. }
  599. static int m88e1111_config_init(struct phy_device *phydev)
  600. {
  601. int err;
  602. if (phy_interface_is_rgmii(phydev)) {
  603. err = m88e1111_config_init_rgmii(phydev);
  604. if (err < 0)
  605. return err;
  606. }
  607. if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
  608. err = m88e1111_config_init_sgmii(phydev);
  609. if (err < 0)
  610. return err;
  611. }
  612. if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
  613. err = m88e1111_config_init_rtbi(phydev);
  614. if (err < 0)
  615. return err;
  616. }
  617. err = marvell_of_reg_init(phydev);
  618. if (err < 0)
  619. return err;
  620. return genphy_soft_reset(phydev);
  621. }
  622. static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data)
  623. {
  624. int val, cnt, enable;
  625. val = phy_read(phydev, MII_M1111_PHY_EXT_CR);
  626. if (val < 0)
  627. return val;
  628. enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val);
  629. cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1;
  630. *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
  631. return 0;
  632. }
  633. static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt)
  634. {
  635. int val;
  636. if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX)
  637. return -E2BIG;
  638. if (!cnt)
  639. return phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR,
  640. MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN);
  641. val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN;
  642. val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1);
  643. return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
  644. MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN |
  645. MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK,
  646. val);
  647. }
  648. static int m88e1111_get_tunable(struct phy_device *phydev,
  649. struct ethtool_tunable *tuna, void *data)
  650. {
  651. switch (tuna->id) {
  652. case ETHTOOL_PHY_DOWNSHIFT:
  653. return m88e1111_get_downshift(phydev, data);
  654. default:
  655. return -EOPNOTSUPP;
  656. }
  657. }
  658. static int m88e1111_set_tunable(struct phy_device *phydev,
  659. struct ethtool_tunable *tuna, const void *data)
  660. {
  661. switch (tuna->id) {
  662. case ETHTOOL_PHY_DOWNSHIFT:
  663. return m88e1111_set_downshift(phydev, *(const u8 *)data);
  664. default:
  665. return -EOPNOTSUPP;
  666. }
  667. }
  668. static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data)
  669. {
  670. int val, cnt, enable;
  671. val = phy_read(phydev, MII_M1011_PHY_SCR);
  672. if (val < 0)
  673. return val;
  674. enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val);
  675. cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1;
  676. *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
  677. return 0;
  678. }
  679. static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt)
  680. {
  681. int val;
  682. if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX)
  683. return -E2BIG;
  684. if (!cnt)
  685. return phy_clear_bits(phydev, MII_M1011_PHY_SCR,
  686. MII_M1011_PHY_SCR_DOWNSHIFT_EN);
  687. val = MII_M1011_PHY_SCR_DOWNSHIFT_EN;
  688. val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1);
  689. return phy_modify(phydev, MII_M1011_PHY_SCR,
  690. MII_M1011_PHY_SCR_DOWNSHIFT_EN |
  691. MII_M1011_PHY_SCR_DOWNSHIFT_MASK,
  692. val);
  693. }
  694. static int m88e1011_get_tunable(struct phy_device *phydev,
  695. struct ethtool_tunable *tuna, void *data)
  696. {
  697. switch (tuna->id) {
  698. case ETHTOOL_PHY_DOWNSHIFT:
  699. return m88e1011_get_downshift(phydev, data);
  700. default:
  701. return -EOPNOTSUPP;
  702. }
  703. }
  704. static int m88e1011_set_tunable(struct phy_device *phydev,
  705. struct ethtool_tunable *tuna, const void *data)
  706. {
  707. switch (tuna->id) {
  708. case ETHTOOL_PHY_DOWNSHIFT:
  709. return m88e1011_set_downshift(phydev, *(const u8 *)data);
  710. default:
  711. return -EOPNOTSUPP;
  712. }
  713. }
  714. static int m88e1116r_config_init(struct phy_device *phydev)
  715. {
  716. int err;
  717. err = genphy_soft_reset(phydev);
  718. if (err < 0)
  719. return err;
  720. msleep(500);
  721. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  722. if (err < 0)
  723. return err;
  724. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  725. if (err < 0)
  726. return err;
  727. err = m88e1011_set_downshift(phydev, 8);
  728. if (err < 0)
  729. return err;
  730. if (phy_interface_is_rgmii(phydev)) {
  731. err = m88e1121_config_aneg_rgmii_delays(phydev);
  732. if (err < 0)
  733. return err;
  734. }
  735. err = genphy_soft_reset(phydev);
  736. if (err < 0)
  737. return err;
  738. return marvell_config_init(phydev);
  739. }
  740. static int m88e1318_config_init(struct phy_device *phydev)
  741. {
  742. if (phy_interrupt_is_valid(phydev)) {
  743. int err = phy_modify_paged(
  744. phydev, MII_MARVELL_LED_PAGE,
  745. MII_88E1318S_PHY_LED_TCR,
  746. MII_88E1318S_PHY_LED_TCR_FORCE_INT,
  747. MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
  748. MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
  749. if (err < 0)
  750. return err;
  751. }
  752. return marvell_config_init(phydev);
  753. }
  754. static int m88e1510_config_init(struct phy_device *phydev)
  755. {
  756. int err;
  757. /* SGMII-to-Copper mode initialization */
  758. if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
  759. /* Select page 18 */
  760. err = marvell_set_page(phydev, 18);
  761. if (err < 0)
  762. return err;
  763. /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
  764. err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
  765. MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
  766. MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
  767. if (err < 0)
  768. return err;
  769. /* PHY reset is necessary after changing MODE[2:0] */
  770. err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0,
  771. MII_88E1510_GEN_CTRL_REG_1_RESET);
  772. if (err < 0)
  773. return err;
  774. /* Reset page selection */
  775. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  776. if (err < 0)
  777. return err;
  778. }
  779. return m88e1318_config_init(phydev);
  780. }
  781. static int m88e1118_config_aneg(struct phy_device *phydev)
  782. {
  783. int err;
  784. err = genphy_soft_reset(phydev);
  785. if (err < 0)
  786. return err;
  787. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  788. if (err < 0)
  789. return err;
  790. err = genphy_config_aneg(phydev);
  791. return 0;
  792. }
  793. static int m88e1118_config_init(struct phy_device *phydev)
  794. {
  795. int err;
  796. /* Change address */
  797. err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
  798. if (err < 0)
  799. return err;
  800. /* Enable 1000 Mbit */
  801. err = phy_write(phydev, 0x15, 0x1070);
  802. if (err < 0)
  803. return err;
  804. /* Change address */
  805. err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
  806. if (err < 0)
  807. return err;
  808. /* Adjust LED Control */
  809. if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
  810. err = phy_write(phydev, 0x10, 0x1100);
  811. else
  812. err = phy_write(phydev, 0x10, 0x021e);
  813. if (err < 0)
  814. return err;
  815. err = marvell_of_reg_init(phydev);
  816. if (err < 0)
  817. return err;
  818. /* Reset address */
  819. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  820. if (err < 0)
  821. return err;
  822. return genphy_soft_reset(phydev);
  823. }
  824. static int m88e1149_config_init(struct phy_device *phydev)
  825. {
  826. int err;
  827. /* Change address */
  828. err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
  829. if (err < 0)
  830. return err;
  831. /* Enable 1000 Mbit */
  832. err = phy_write(phydev, 0x15, 0x1048);
  833. if (err < 0)
  834. return err;
  835. err = marvell_of_reg_init(phydev);
  836. if (err < 0)
  837. return err;
  838. /* Reset address */
  839. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  840. if (err < 0)
  841. return err;
  842. return genphy_soft_reset(phydev);
  843. }
  844. static int m88e1145_config_init_rgmii(struct phy_device *phydev)
  845. {
  846. int err;
  847. err = m88e1111_config_init_rgmii_delays(phydev);
  848. if (err < 0)
  849. return err;
  850. if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
  851. err = phy_write(phydev, 0x1d, 0x0012);
  852. if (err < 0)
  853. return err;
  854. err = phy_modify(phydev, 0x1e, 0x0fc0,
  855. 2 << 9 | /* 36 ohm */
  856. 2 << 6); /* 39 ohm */
  857. if (err < 0)
  858. return err;
  859. err = phy_write(phydev, 0x1d, 0x3);
  860. if (err < 0)
  861. return err;
  862. err = phy_write(phydev, 0x1e, 0x8000);
  863. }
  864. return err;
  865. }
  866. static int m88e1145_config_init_sgmii(struct phy_device *phydev)
  867. {
  868. return m88e1111_config_init_hwcfg_mode(
  869. phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
  870. MII_M1111_HWCFG_FIBER_COPPER_AUTO);
  871. }
  872. static int m88e1145_config_init(struct phy_device *phydev)
  873. {
  874. int err;
  875. /* Take care of errata E0 & E1 */
  876. err = phy_write(phydev, 0x1d, 0x001b);
  877. if (err < 0)
  878. return err;
  879. err = phy_write(phydev, 0x1e, 0x418f);
  880. if (err < 0)
  881. return err;
  882. err = phy_write(phydev, 0x1d, 0x0016);
  883. if (err < 0)
  884. return err;
  885. err = phy_write(phydev, 0x1e, 0xa2da);
  886. if (err < 0)
  887. return err;
  888. if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
  889. err = m88e1145_config_init_rgmii(phydev);
  890. if (err < 0)
  891. return err;
  892. }
  893. if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
  894. err = m88e1145_config_init_sgmii(phydev);
  895. if (err < 0)
  896. return err;
  897. }
  898. err = marvell_of_reg_init(phydev);
  899. if (err < 0)
  900. return err;
  901. return 0;
  902. }
  903. static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs)
  904. {
  905. int val;
  906. val = phy_read(phydev, MII_88E1540_COPPER_CTRL3);
  907. if (val < 0)
  908. return val;
  909. if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) {
  910. *msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF;
  911. return 0;
  912. }
  913. val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
  914. switch (val) {
  915. case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS:
  916. *msecs = 0;
  917. break;
  918. case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS:
  919. *msecs = 10;
  920. break;
  921. case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS:
  922. *msecs = 20;
  923. break;
  924. case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS:
  925. *msecs = 40;
  926. break;
  927. default:
  928. return -EINVAL;
  929. }
  930. return 0;
  931. }
  932. static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs)
  933. {
  934. struct ethtool_eee eee;
  935. int val, ret;
  936. if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF)
  937. return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3,
  938. MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
  939. /* According to the Marvell data sheet EEE must be disabled for
  940. * Fast Link Down detection to work properly
  941. */
  942. ret = phy_ethtool_get_eee(phydev, &eee);
  943. if (!ret && eee.eee_enabled) {
  944. phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n");
  945. return -EBUSY;
  946. }
  947. if (*msecs <= 5)
  948. val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS;
  949. else if (*msecs <= 15)
  950. val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS;
  951. else if (*msecs <= 30)
  952. val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS;
  953. else
  954. val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS;
  955. val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
  956. ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3,
  957. MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
  958. if (ret)
  959. return ret;
  960. return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3,
  961. MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
  962. }
  963. static int m88e1540_get_tunable(struct phy_device *phydev,
  964. struct ethtool_tunable *tuna, void *data)
  965. {
  966. switch (tuna->id) {
  967. case ETHTOOL_PHY_FAST_LINK_DOWN:
  968. return m88e1540_get_fld(phydev, data);
  969. case ETHTOOL_PHY_DOWNSHIFT:
  970. return m88e1011_get_downshift(phydev, data);
  971. default:
  972. return -EOPNOTSUPP;
  973. }
  974. }
  975. static int m88e1540_set_tunable(struct phy_device *phydev,
  976. struct ethtool_tunable *tuna, const void *data)
  977. {
  978. switch (tuna->id) {
  979. case ETHTOOL_PHY_FAST_LINK_DOWN:
  980. return m88e1540_set_fld(phydev, data);
  981. case ETHTOOL_PHY_DOWNSHIFT:
  982. return m88e1011_set_downshift(phydev, *(const u8 *)data);
  983. default:
  984. return -EOPNOTSUPP;
  985. }
  986. }
  987. /* The VOD can be out of specification on link up. Poke an
  988. * undocumented register, in an undocumented page, with a magic value
  989. * to fix this.
  990. */
  991. static int m88e6390_errata(struct phy_device *phydev)
  992. {
  993. int err;
  994. err = phy_write(phydev, MII_BMCR,
  995. BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
  996. if (err)
  997. return err;
  998. usleep_range(300, 400);
  999. err = phy_write_paged(phydev, 0xf8, 0x08, 0x36);
  1000. if (err)
  1001. return err;
  1002. return genphy_soft_reset(phydev);
  1003. }
  1004. static int m88e6390_config_aneg(struct phy_device *phydev)
  1005. {
  1006. int err;
  1007. err = m88e6390_errata(phydev);
  1008. if (err)
  1009. return err;
  1010. return m88e1510_config_aneg(phydev);
  1011. }
  1012. /**
  1013. * fiber_lpa_mod_linkmode_lpa_t
  1014. * @advertising: the linkmode advertisement settings
  1015. * @lpa: value of the MII_LPA register for fiber link
  1016. *
  1017. * A small helper function that translates MII_LPA bits to linkmode LP
  1018. * advertisement settings. Other bits in advertising are left
  1019. * unchanged.
  1020. */
  1021. static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa)
  1022. {
  1023. linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
  1024. advertising, lpa & LPA_1000XHALF);
  1025. linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
  1026. advertising, lpa & LPA_1000XFULL);
  1027. }
  1028. static int marvell_read_status_page_an(struct phy_device *phydev,
  1029. int fiber, int status)
  1030. {
  1031. int lpa;
  1032. int err;
  1033. if (!(status & MII_M1011_PHY_STATUS_RESOLVED)) {
  1034. phydev->link = 0;
  1035. return 0;
  1036. }
  1037. if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
  1038. phydev->duplex = DUPLEX_FULL;
  1039. else
  1040. phydev->duplex = DUPLEX_HALF;
  1041. switch (status & MII_M1011_PHY_STATUS_SPD_MASK) {
  1042. case MII_M1011_PHY_STATUS_1000:
  1043. phydev->speed = SPEED_1000;
  1044. break;
  1045. case MII_M1011_PHY_STATUS_100:
  1046. phydev->speed = SPEED_100;
  1047. break;
  1048. default:
  1049. phydev->speed = SPEED_10;
  1050. break;
  1051. }
  1052. if (!fiber) {
  1053. err = genphy_read_lpa(phydev);
  1054. if (err < 0)
  1055. return err;
  1056. phy_resolve_aneg_pause(phydev);
  1057. } else {
  1058. lpa = phy_read(phydev, MII_LPA);
  1059. if (lpa < 0)
  1060. return lpa;
  1061. /* The fiber link is only 1000M capable */
  1062. fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
  1063. if (phydev->duplex == DUPLEX_FULL) {
  1064. if (!(lpa & LPA_PAUSE_FIBER)) {
  1065. phydev->pause = 0;
  1066. phydev->asym_pause = 0;
  1067. } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
  1068. phydev->pause = 1;
  1069. phydev->asym_pause = 1;
  1070. } else {
  1071. phydev->pause = 1;
  1072. phydev->asym_pause = 0;
  1073. }
  1074. }
  1075. }
  1076. return 0;
  1077. }
  1078. /* marvell_read_status_page
  1079. *
  1080. * Description:
  1081. * Check the link, then figure out the current state
  1082. * by comparing what we advertise with what the link partner
  1083. * advertises. Start by checking the gigabit possibilities,
  1084. * then move on to 10/100.
  1085. */
  1086. static int marvell_read_status_page(struct phy_device *phydev, int page)
  1087. {
  1088. int status;
  1089. int fiber;
  1090. int err;
  1091. status = phy_read(phydev, MII_M1011_PHY_STATUS);
  1092. if (status < 0)
  1093. return status;
  1094. /* Use the generic register for copper link status,
  1095. * and the PHY status register for fiber link status.
  1096. */
  1097. if (page == MII_MARVELL_FIBER_PAGE) {
  1098. phydev->link = !!(status & MII_M1011_PHY_STATUS_LINK);
  1099. } else {
  1100. err = genphy_update_link(phydev);
  1101. if (err)
  1102. return err;
  1103. }
  1104. if (page == MII_MARVELL_FIBER_PAGE)
  1105. fiber = 1;
  1106. else
  1107. fiber = 0;
  1108. linkmode_zero(phydev->lp_advertising);
  1109. phydev->pause = 0;
  1110. phydev->asym_pause = 0;
  1111. phydev->speed = SPEED_UNKNOWN;
  1112. phydev->duplex = DUPLEX_UNKNOWN;
  1113. if (phydev->autoneg == AUTONEG_ENABLE)
  1114. err = marvell_read_status_page_an(phydev, fiber, status);
  1115. else
  1116. err = genphy_read_status_fixed(phydev);
  1117. return err;
  1118. }
  1119. /* marvell_read_status
  1120. *
  1121. * Some Marvell's phys have two modes: fiber and copper.
  1122. * Both need status checked.
  1123. * Description:
  1124. * First, check the fiber link and status.
  1125. * If the fiber link is down, check the copper link and status which
  1126. * will be the default value if both link are down.
  1127. */
  1128. static int marvell_read_status(struct phy_device *phydev)
  1129. {
  1130. int err;
  1131. /* Check the fiber mode first */
  1132. if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
  1133. phydev->supported) &&
  1134. phydev->interface != PHY_INTERFACE_MODE_SGMII) {
  1135. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  1136. if (err < 0)
  1137. goto error;
  1138. err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
  1139. if (err < 0)
  1140. goto error;
  1141. /* If the fiber link is up, it is the selected and
  1142. * used link. In this case, we need to stay in the
  1143. * fiber page. Please to be careful about that, avoid
  1144. * to restore Copper page in other functions which
  1145. * could break the behaviour for some fiber phy like
  1146. * 88E1512.
  1147. */
  1148. if (phydev->link)
  1149. return 0;
  1150. /* If fiber link is down, check and save copper mode state */
  1151. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1152. if (err < 0)
  1153. goto error;
  1154. }
  1155. return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
  1156. error:
  1157. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1158. return err;
  1159. }
  1160. /* marvell_suspend
  1161. *
  1162. * Some Marvell's phys have two modes: fiber and copper.
  1163. * Both need to be suspended
  1164. */
  1165. static int marvell_suspend(struct phy_device *phydev)
  1166. {
  1167. int err;
  1168. /* Suspend the fiber mode first */
  1169. if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
  1170. phydev->supported)) {
  1171. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  1172. if (err < 0)
  1173. goto error;
  1174. /* With the page set, use the generic suspend */
  1175. err = genphy_suspend(phydev);
  1176. if (err < 0)
  1177. goto error;
  1178. /* Then, the copper link */
  1179. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1180. if (err < 0)
  1181. goto error;
  1182. }
  1183. /* With the page set, use the generic suspend */
  1184. return genphy_suspend(phydev);
  1185. error:
  1186. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1187. return err;
  1188. }
  1189. /* marvell_resume
  1190. *
  1191. * Some Marvell's phys have two modes: fiber and copper.
  1192. * Both need to be resumed
  1193. */
  1194. static int marvell_resume(struct phy_device *phydev)
  1195. {
  1196. int err;
  1197. /* Resume the fiber mode first */
  1198. if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
  1199. phydev->supported)) {
  1200. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  1201. if (err < 0)
  1202. goto error;
  1203. /* With the page set, use the generic resume */
  1204. err = genphy_resume(phydev);
  1205. if (err < 0)
  1206. goto error;
  1207. /* Then, the copper link */
  1208. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1209. if (err < 0)
  1210. goto error;
  1211. }
  1212. /* With the page set, use the generic resume */
  1213. return genphy_resume(phydev);
  1214. error:
  1215. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1216. return err;
  1217. }
  1218. static int marvell_aneg_done(struct phy_device *phydev)
  1219. {
  1220. int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
  1221. return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
  1222. }
  1223. static int m88e1121_did_interrupt(struct phy_device *phydev)
  1224. {
  1225. int imask;
  1226. imask = phy_read(phydev, MII_M1011_IEVENT);
  1227. if (imask & MII_M1011_IMASK_INIT)
  1228. return 1;
  1229. return 0;
  1230. }
  1231. static void m88e1318_get_wol(struct phy_device *phydev,
  1232. struct ethtool_wolinfo *wol)
  1233. {
  1234. int oldpage, ret = 0;
  1235. wol->supported = WAKE_MAGIC;
  1236. wol->wolopts = 0;
  1237. oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE);
  1238. if (oldpage < 0)
  1239. goto error;
  1240. ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
  1241. if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
  1242. wol->wolopts |= WAKE_MAGIC;
  1243. error:
  1244. phy_restore_page(phydev, oldpage, ret);
  1245. }
  1246. static int m88e1318_set_wol(struct phy_device *phydev,
  1247. struct ethtool_wolinfo *wol)
  1248. {
  1249. int err = 0, oldpage;
  1250. oldpage = phy_save_page(phydev);
  1251. if (oldpage < 0)
  1252. goto error;
  1253. if (wol->wolopts & WAKE_MAGIC) {
  1254. /* Explicitly switch to page 0x00, just to be sure */
  1255. err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
  1256. if (err < 0)
  1257. goto error;
  1258. /* If WOL event happened once, the LED[2] interrupt pin
  1259. * will not be cleared unless we reading the interrupt status
  1260. * register. If interrupts are in use, the normal interrupt
  1261. * handling will clear the WOL event. Clear the WOL event
  1262. * before enabling it if !phy_interrupt_is_valid()
  1263. */
  1264. if (!phy_interrupt_is_valid(phydev))
  1265. __phy_read(phydev, MII_M1011_IEVENT);
  1266. /* Enable the WOL interrupt */
  1267. err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0,
  1268. MII_88E1318S_PHY_CSIER_WOL_EIE);
  1269. if (err < 0)
  1270. goto error;
  1271. err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
  1272. if (err < 0)
  1273. goto error;
  1274. /* Setup LED[2] as interrupt pin (active low) */
  1275. err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
  1276. MII_88E1318S_PHY_LED_TCR_FORCE_INT,
  1277. MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
  1278. MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
  1279. if (err < 0)
  1280. goto error;
  1281. err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
  1282. if (err < 0)
  1283. goto error;
  1284. /* Store the device address for the magic packet */
  1285. err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
  1286. ((phydev->attached_dev->dev_addr[5] << 8) |
  1287. phydev->attached_dev->dev_addr[4]));
  1288. if (err < 0)
  1289. goto error;
  1290. err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
  1291. ((phydev->attached_dev->dev_addr[3] << 8) |
  1292. phydev->attached_dev->dev_addr[2]));
  1293. if (err < 0)
  1294. goto error;
  1295. err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
  1296. ((phydev->attached_dev->dev_addr[1] << 8) |
  1297. phydev->attached_dev->dev_addr[0]));
  1298. if (err < 0)
  1299. goto error;
  1300. /* Clear WOL status and enable magic packet matching */
  1301. err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
  1302. MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
  1303. MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
  1304. if (err < 0)
  1305. goto error;
  1306. } else {
  1307. err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
  1308. if (err < 0)
  1309. goto error;
  1310. /* Clear WOL status and disable magic packet matching */
  1311. err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
  1312. MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
  1313. MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
  1314. if (err < 0)
  1315. goto error;
  1316. }
  1317. error:
  1318. return phy_restore_page(phydev, oldpage, err);
  1319. }
  1320. static int marvell_get_sset_count(struct phy_device *phydev)
  1321. {
  1322. if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
  1323. phydev->supported))
  1324. return ARRAY_SIZE(marvell_hw_stats);
  1325. else
  1326. return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
  1327. }
  1328. static void marvell_get_strings(struct phy_device *phydev, u8 *data)
  1329. {
  1330. int count = marvell_get_sset_count(phydev);
  1331. int i;
  1332. for (i = 0; i < count; i++) {
  1333. strlcpy(data + i * ETH_GSTRING_LEN,
  1334. marvell_hw_stats[i].string, ETH_GSTRING_LEN);
  1335. }
  1336. }
  1337. static u64 marvell_get_stat(struct phy_device *phydev, int i)
  1338. {
  1339. struct marvell_hw_stat stat = marvell_hw_stats[i];
  1340. struct marvell_priv *priv = phydev->priv;
  1341. int val;
  1342. u64 ret;
  1343. val = phy_read_paged(phydev, stat.page, stat.reg);
  1344. if (val < 0) {
  1345. ret = U64_MAX;
  1346. } else {
  1347. val = val & ((1 << stat.bits) - 1);
  1348. priv->stats[i] += val;
  1349. ret = priv->stats[i];
  1350. }
  1351. return ret;
  1352. }
  1353. static void marvell_get_stats(struct phy_device *phydev,
  1354. struct ethtool_stats *stats, u64 *data)
  1355. {
  1356. int count = marvell_get_sset_count(phydev);
  1357. int i;
  1358. for (i = 0; i < count; i++)
  1359. data[i] = marvell_get_stat(phydev, i);
  1360. }
  1361. #ifdef CONFIG_HWMON
  1362. static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
  1363. {
  1364. int oldpage;
  1365. int ret = 0;
  1366. int val;
  1367. *temp = 0;
  1368. oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
  1369. if (oldpage < 0)
  1370. goto error;
  1371. /* Enable temperature sensor */
  1372. ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
  1373. if (ret < 0)
  1374. goto error;
  1375. ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
  1376. ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
  1377. if (ret < 0)
  1378. goto error;
  1379. /* Wait for temperature to stabilize */
  1380. usleep_range(10000, 12000);
  1381. val = __phy_read(phydev, MII_88E1121_MISC_TEST);
  1382. if (val < 0) {
  1383. ret = val;
  1384. goto error;
  1385. }
  1386. /* Disable temperature sensor */
  1387. ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
  1388. ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
  1389. if (ret < 0)
  1390. goto error;
  1391. *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
  1392. error:
  1393. return phy_restore_page(phydev, oldpage, ret);
  1394. }
  1395. static int m88e1121_hwmon_read(struct device *dev,
  1396. enum hwmon_sensor_types type,
  1397. u32 attr, int channel, long *temp)
  1398. {
  1399. struct phy_device *phydev = dev_get_drvdata(dev);
  1400. int err;
  1401. switch (attr) {
  1402. case hwmon_temp_input:
  1403. err = m88e1121_get_temp(phydev, temp);
  1404. break;
  1405. default:
  1406. return -EOPNOTSUPP;
  1407. }
  1408. return err;
  1409. }
  1410. static umode_t m88e1121_hwmon_is_visible(const void *data,
  1411. enum hwmon_sensor_types type,
  1412. u32 attr, int channel)
  1413. {
  1414. if (type != hwmon_temp)
  1415. return 0;
  1416. switch (attr) {
  1417. case hwmon_temp_input:
  1418. return 0444;
  1419. default:
  1420. return 0;
  1421. }
  1422. }
  1423. static u32 m88e1121_hwmon_chip_config[] = {
  1424. HWMON_C_REGISTER_TZ,
  1425. 0
  1426. };
  1427. static const struct hwmon_channel_info m88e1121_hwmon_chip = {
  1428. .type = hwmon_chip,
  1429. .config = m88e1121_hwmon_chip_config,
  1430. };
  1431. static u32 m88e1121_hwmon_temp_config[] = {
  1432. HWMON_T_INPUT,
  1433. 0
  1434. };
  1435. static const struct hwmon_channel_info m88e1121_hwmon_temp = {
  1436. .type = hwmon_temp,
  1437. .config = m88e1121_hwmon_temp_config,
  1438. };
  1439. static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
  1440. &m88e1121_hwmon_chip,
  1441. &m88e1121_hwmon_temp,
  1442. NULL
  1443. };
  1444. static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
  1445. .is_visible = m88e1121_hwmon_is_visible,
  1446. .read = m88e1121_hwmon_read,
  1447. };
  1448. static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
  1449. .ops = &m88e1121_hwmon_hwmon_ops,
  1450. .info = m88e1121_hwmon_info,
  1451. };
  1452. static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
  1453. {
  1454. int ret;
  1455. *temp = 0;
  1456. ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
  1457. MII_88E1510_TEMP_SENSOR);
  1458. if (ret < 0)
  1459. return ret;
  1460. *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
  1461. return 0;
  1462. }
  1463. static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
  1464. {
  1465. int ret;
  1466. *temp = 0;
  1467. ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
  1468. MII_88E1121_MISC_TEST);
  1469. if (ret < 0)
  1470. return ret;
  1471. *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
  1472. MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
  1473. /* convert to mC */
  1474. *temp *= 1000;
  1475. return 0;
  1476. }
  1477. static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
  1478. {
  1479. temp = temp / 1000;
  1480. temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
  1481. return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
  1482. MII_88E1121_MISC_TEST,
  1483. MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
  1484. temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
  1485. }
  1486. static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
  1487. {
  1488. int ret;
  1489. *alarm = false;
  1490. ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
  1491. MII_88E1121_MISC_TEST);
  1492. if (ret < 0)
  1493. return ret;
  1494. *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
  1495. return 0;
  1496. }
  1497. static int m88e1510_hwmon_read(struct device *dev,
  1498. enum hwmon_sensor_types type,
  1499. u32 attr, int channel, long *temp)
  1500. {
  1501. struct phy_device *phydev = dev_get_drvdata(dev);
  1502. int err;
  1503. switch (attr) {
  1504. case hwmon_temp_input:
  1505. err = m88e1510_get_temp(phydev, temp);
  1506. break;
  1507. case hwmon_temp_crit:
  1508. err = m88e1510_get_temp_critical(phydev, temp);
  1509. break;
  1510. case hwmon_temp_max_alarm:
  1511. err = m88e1510_get_temp_alarm(phydev, temp);
  1512. break;
  1513. default:
  1514. return -EOPNOTSUPP;
  1515. }
  1516. return err;
  1517. }
  1518. static int m88e1510_hwmon_write(struct device *dev,
  1519. enum hwmon_sensor_types type,
  1520. u32 attr, int channel, long temp)
  1521. {
  1522. struct phy_device *phydev = dev_get_drvdata(dev);
  1523. int err;
  1524. switch (attr) {
  1525. case hwmon_temp_crit:
  1526. err = m88e1510_set_temp_critical(phydev, temp);
  1527. break;
  1528. default:
  1529. return -EOPNOTSUPP;
  1530. }
  1531. return err;
  1532. }
  1533. static umode_t m88e1510_hwmon_is_visible(const void *data,
  1534. enum hwmon_sensor_types type,
  1535. u32 attr, int channel)
  1536. {
  1537. if (type != hwmon_temp)
  1538. return 0;
  1539. switch (attr) {
  1540. case hwmon_temp_input:
  1541. case hwmon_temp_max_alarm:
  1542. return 0444;
  1543. case hwmon_temp_crit:
  1544. return 0644;
  1545. default:
  1546. return 0;
  1547. }
  1548. }
  1549. static u32 m88e1510_hwmon_temp_config[] = {
  1550. HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
  1551. 0
  1552. };
  1553. static const struct hwmon_channel_info m88e1510_hwmon_temp = {
  1554. .type = hwmon_temp,
  1555. .config = m88e1510_hwmon_temp_config,
  1556. };
  1557. static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
  1558. &m88e1121_hwmon_chip,
  1559. &m88e1510_hwmon_temp,
  1560. NULL
  1561. };
  1562. static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
  1563. .is_visible = m88e1510_hwmon_is_visible,
  1564. .read = m88e1510_hwmon_read,
  1565. .write = m88e1510_hwmon_write,
  1566. };
  1567. static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
  1568. .ops = &m88e1510_hwmon_hwmon_ops,
  1569. .info = m88e1510_hwmon_info,
  1570. };
  1571. static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
  1572. {
  1573. int sum = 0;
  1574. int oldpage;
  1575. int ret = 0;
  1576. int i;
  1577. *temp = 0;
  1578. oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
  1579. if (oldpage < 0)
  1580. goto error;
  1581. /* Enable temperature sensor */
  1582. ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
  1583. if (ret < 0)
  1584. goto error;
  1585. ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
  1586. ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE |
  1587. MII_88E6390_MISC_TEST_SAMPLE_1S;
  1588. ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
  1589. if (ret < 0)
  1590. goto error;
  1591. /* Wait for temperature to stabilize */
  1592. usleep_range(10000, 12000);
  1593. /* Reading the temperature sense has an errata. You need to read
  1594. * a number of times and take an average.
  1595. */
  1596. for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
  1597. ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
  1598. if (ret < 0)
  1599. goto error;
  1600. sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
  1601. }
  1602. sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
  1603. *temp = (sum - 75) * 1000;
  1604. /* Disable temperature sensor */
  1605. ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
  1606. if (ret < 0)
  1607. goto error;
  1608. ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
  1609. ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE;
  1610. ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
  1611. error:
  1612. phy_restore_page(phydev, oldpage, ret);
  1613. return ret;
  1614. }
  1615. static int m88e6390_hwmon_read(struct device *dev,
  1616. enum hwmon_sensor_types type,
  1617. u32 attr, int channel, long *temp)
  1618. {
  1619. struct phy_device *phydev = dev_get_drvdata(dev);
  1620. int err;
  1621. switch (attr) {
  1622. case hwmon_temp_input:
  1623. err = m88e6390_get_temp(phydev, temp);
  1624. break;
  1625. default:
  1626. return -EOPNOTSUPP;
  1627. }
  1628. return err;
  1629. }
  1630. static umode_t m88e6390_hwmon_is_visible(const void *data,
  1631. enum hwmon_sensor_types type,
  1632. u32 attr, int channel)
  1633. {
  1634. if (type != hwmon_temp)
  1635. return 0;
  1636. switch (attr) {
  1637. case hwmon_temp_input:
  1638. return 0444;
  1639. default:
  1640. return 0;
  1641. }
  1642. }
  1643. static u32 m88e6390_hwmon_temp_config[] = {
  1644. HWMON_T_INPUT,
  1645. 0
  1646. };
  1647. static const struct hwmon_channel_info m88e6390_hwmon_temp = {
  1648. .type = hwmon_temp,
  1649. .config = m88e6390_hwmon_temp_config,
  1650. };
  1651. static const struct hwmon_channel_info *m88e6390_hwmon_info[] = {
  1652. &m88e1121_hwmon_chip,
  1653. &m88e6390_hwmon_temp,
  1654. NULL
  1655. };
  1656. static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = {
  1657. .is_visible = m88e6390_hwmon_is_visible,
  1658. .read = m88e6390_hwmon_read,
  1659. };
  1660. static const struct hwmon_chip_info m88e6390_hwmon_chip_info = {
  1661. .ops = &m88e6390_hwmon_hwmon_ops,
  1662. .info = m88e6390_hwmon_info,
  1663. };
  1664. static int marvell_hwmon_name(struct phy_device *phydev)
  1665. {
  1666. struct marvell_priv *priv = phydev->priv;
  1667. struct device *dev = &phydev->mdio.dev;
  1668. const char *devname = dev_name(dev);
  1669. size_t len = strlen(devname);
  1670. int i, j;
  1671. priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
  1672. if (!priv->hwmon_name)
  1673. return -ENOMEM;
  1674. for (i = j = 0; i < len && devname[i]; i++) {
  1675. if (isalnum(devname[i]))
  1676. priv->hwmon_name[j++] = devname[i];
  1677. }
  1678. return 0;
  1679. }
  1680. static int marvell_hwmon_probe(struct phy_device *phydev,
  1681. const struct hwmon_chip_info *chip)
  1682. {
  1683. struct marvell_priv *priv = phydev->priv;
  1684. struct device *dev = &phydev->mdio.dev;
  1685. int err;
  1686. err = marvell_hwmon_name(phydev);
  1687. if (err)
  1688. return err;
  1689. priv->hwmon_dev = devm_hwmon_device_register_with_info(
  1690. dev, priv->hwmon_name, phydev, chip, NULL);
  1691. return PTR_ERR_OR_ZERO(priv->hwmon_dev);
  1692. }
  1693. static int m88e1121_hwmon_probe(struct phy_device *phydev)
  1694. {
  1695. return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
  1696. }
  1697. static int m88e1510_hwmon_probe(struct phy_device *phydev)
  1698. {
  1699. return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
  1700. }
  1701. static int m88e6390_hwmon_probe(struct phy_device *phydev)
  1702. {
  1703. return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info);
  1704. }
  1705. #else
  1706. static int m88e1121_hwmon_probe(struct phy_device *phydev)
  1707. {
  1708. return 0;
  1709. }
  1710. static int m88e1510_hwmon_probe(struct phy_device *phydev)
  1711. {
  1712. return 0;
  1713. }
  1714. static int m88e6390_hwmon_probe(struct phy_device *phydev)
  1715. {
  1716. return 0;
  1717. }
  1718. #endif
  1719. static int marvell_probe(struct phy_device *phydev)
  1720. {
  1721. struct marvell_priv *priv;
  1722. priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
  1723. if (!priv)
  1724. return -ENOMEM;
  1725. phydev->priv = priv;
  1726. return 0;
  1727. }
  1728. static int m88e1121_probe(struct phy_device *phydev)
  1729. {
  1730. int err;
  1731. err = marvell_probe(phydev);
  1732. if (err)
  1733. return err;
  1734. return m88e1121_hwmon_probe(phydev);
  1735. }
  1736. static int m88e1510_probe(struct phy_device *phydev)
  1737. {
  1738. int err;
  1739. err =