/drivers/net/ethernet/intel/e1000e/ethtool.c

http://github.com/mirrors/linux · C · 2345 lines · 1812 code · 354 blank · 179 comment · 351 complexity · 3a920fd181ef20021f6bfc81035b5643 MD5 · raw file

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /* Copyright(c) 1999 - 2018 Intel Corporation. */
  3. /* ethtool support for e1000 */
  4. #include <linux/netdevice.h>
  5. #include <linux/interrupt.h>
  6. #include <linux/ethtool.h>
  7. #include <linux/pci.h>
  8. #include <linux/slab.h>
  9. #include <linux/delay.h>
  10. #include <linux/vmalloc.h>
  11. #include <linux/pm_runtime.h>
  12. #include "e1000.h"
  13. enum { NETDEV_STATS, E1000_STATS };
  14. struct e1000_stats {
  15. char stat_string[ETH_GSTRING_LEN];
  16. int type;
  17. int sizeof_stat;
  18. int stat_offset;
  19. };
  20. #define E1000_STAT(str, m) { \
  21. .stat_string = str, \
  22. .type = E1000_STATS, \
  23. .sizeof_stat = sizeof(((struct e1000_adapter *)0)->m), \
  24. .stat_offset = offsetof(struct e1000_adapter, m) }
  25. #define E1000_NETDEV_STAT(str, m) { \
  26. .stat_string = str, \
  27. .type = NETDEV_STATS, \
  28. .sizeof_stat = sizeof(((struct rtnl_link_stats64 *)0)->m), \
  29. .stat_offset = offsetof(struct rtnl_link_stats64, m) }
  30. static const struct e1000_stats e1000_gstrings_stats[] = {
  31. E1000_STAT("rx_packets", stats.gprc),
  32. E1000_STAT("tx_packets", stats.gptc),
  33. E1000_STAT("rx_bytes", stats.gorc),
  34. E1000_STAT("tx_bytes", stats.gotc),
  35. E1000_STAT("rx_broadcast", stats.bprc),
  36. E1000_STAT("tx_broadcast", stats.bptc),
  37. E1000_STAT("rx_multicast", stats.mprc),
  38. E1000_STAT("tx_multicast", stats.mptc),
  39. E1000_NETDEV_STAT("rx_errors", rx_errors),
  40. E1000_NETDEV_STAT("tx_errors", tx_errors),
  41. E1000_NETDEV_STAT("tx_dropped", tx_dropped),
  42. E1000_STAT("multicast", stats.mprc),
  43. E1000_STAT("collisions", stats.colc),
  44. E1000_NETDEV_STAT("rx_length_errors", rx_length_errors),
  45. E1000_NETDEV_STAT("rx_over_errors", rx_over_errors),
  46. E1000_STAT("rx_crc_errors", stats.crcerrs),
  47. E1000_NETDEV_STAT("rx_frame_errors", rx_frame_errors),
  48. E1000_STAT("rx_no_buffer_count", stats.rnbc),
  49. E1000_STAT("rx_missed_errors", stats.mpc),
  50. E1000_STAT("tx_aborted_errors", stats.ecol),
  51. E1000_STAT("tx_carrier_errors", stats.tncrs),
  52. E1000_NETDEV_STAT("tx_fifo_errors", tx_fifo_errors),
  53. E1000_NETDEV_STAT("tx_heartbeat_errors", tx_heartbeat_errors),
  54. E1000_STAT("tx_window_errors", stats.latecol),
  55. E1000_STAT("tx_abort_late_coll", stats.latecol),
  56. E1000_STAT("tx_deferred_ok", stats.dc),
  57. E1000_STAT("tx_single_coll_ok", stats.scc),
  58. E1000_STAT("tx_multi_coll_ok", stats.mcc),
  59. E1000_STAT("tx_timeout_count", tx_timeout_count),
  60. E1000_STAT("tx_restart_queue", restart_queue),
  61. E1000_STAT("rx_long_length_errors", stats.roc),
  62. E1000_STAT("rx_short_length_errors", stats.ruc),
  63. E1000_STAT("rx_align_errors", stats.algnerrc),
  64. E1000_STAT("tx_tcp_seg_good", stats.tsctc),
  65. E1000_STAT("tx_tcp_seg_failed", stats.tsctfc),
  66. E1000_STAT("rx_flow_control_xon", stats.xonrxc),
  67. E1000_STAT("rx_flow_control_xoff", stats.xoffrxc),
  68. E1000_STAT("tx_flow_control_xon", stats.xontxc),
  69. E1000_STAT("tx_flow_control_xoff", stats.xofftxc),
  70. E1000_STAT("rx_csum_offload_good", hw_csum_good),
  71. E1000_STAT("rx_csum_offload_errors", hw_csum_err),
  72. E1000_STAT("rx_header_split", rx_hdr_split),
  73. E1000_STAT("alloc_rx_buff_failed", alloc_rx_buff_failed),
  74. E1000_STAT("tx_smbus", stats.mgptc),
  75. E1000_STAT("rx_smbus", stats.mgprc),
  76. E1000_STAT("dropped_smbus", stats.mgpdc),
  77. E1000_STAT("rx_dma_failed", rx_dma_failed),
  78. E1000_STAT("tx_dma_failed", tx_dma_failed),
  79. E1000_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared),
  80. E1000_STAT("uncorr_ecc_errors", uncorr_errors),
  81. E1000_STAT("corr_ecc_errors", corr_errors),
  82. E1000_STAT("tx_hwtstamp_timeouts", tx_hwtstamp_timeouts),
  83. E1000_STAT("tx_hwtstamp_skipped", tx_hwtstamp_skipped),
  84. };
  85. #define E1000_GLOBAL_STATS_LEN ARRAY_SIZE(e1000_gstrings_stats)
  86. #define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN)
  87. static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
  88. "Register test (offline)", "Eeprom test (offline)",
  89. "Interrupt test (offline)", "Loopback test (offline)",
  90. "Link test (on/offline)"
  91. };
  92. #define E1000_TEST_LEN ARRAY_SIZE(e1000_gstrings_test)
  93. static int e1000_get_link_ksettings(struct net_device *netdev,
  94. struct ethtool_link_ksettings *cmd)
  95. {
  96. struct e1000_adapter *adapter = netdev_priv(netdev);
  97. struct e1000_hw *hw = &adapter->hw;
  98. u32 speed, supported, advertising;
  99. if (hw->phy.media_type == e1000_media_type_copper) {
  100. supported = (SUPPORTED_10baseT_Half |
  101. SUPPORTED_10baseT_Full |
  102. SUPPORTED_100baseT_Half |
  103. SUPPORTED_100baseT_Full |
  104. SUPPORTED_1000baseT_Full |
  105. SUPPORTED_Autoneg |
  106. SUPPORTED_TP);
  107. if (hw->phy.type == e1000_phy_ife)
  108. supported &= ~SUPPORTED_1000baseT_Full;
  109. advertising = ADVERTISED_TP;
  110. if (hw->mac.autoneg == 1) {
  111. advertising |= ADVERTISED_Autoneg;
  112. /* the e1000 autoneg seems to match ethtool nicely */
  113. advertising |= hw->phy.autoneg_advertised;
  114. }
  115. cmd->base.port = PORT_TP;
  116. cmd->base.phy_address = hw->phy.addr;
  117. } else {
  118. supported = (SUPPORTED_1000baseT_Full |
  119. SUPPORTED_FIBRE |
  120. SUPPORTED_Autoneg);
  121. advertising = (ADVERTISED_1000baseT_Full |
  122. ADVERTISED_FIBRE |
  123. ADVERTISED_Autoneg);
  124. cmd->base.port = PORT_FIBRE;
  125. }
  126. speed = SPEED_UNKNOWN;
  127. cmd->base.duplex = DUPLEX_UNKNOWN;
  128. if (netif_running(netdev)) {
  129. if (netif_carrier_ok(netdev)) {
  130. speed = adapter->link_speed;
  131. cmd->base.duplex = adapter->link_duplex - 1;
  132. }
  133. } else if (!pm_runtime_suspended(netdev->dev.parent)) {
  134. u32 status = er32(STATUS);
  135. if (status & E1000_STATUS_LU) {
  136. if (status & E1000_STATUS_SPEED_1000)
  137. speed = SPEED_1000;
  138. else if (status & E1000_STATUS_SPEED_100)
  139. speed = SPEED_100;
  140. else
  141. speed = SPEED_10;
  142. if (status & E1000_STATUS_FD)
  143. cmd->base.duplex = DUPLEX_FULL;
  144. else
  145. cmd->base.duplex = DUPLEX_HALF;
  146. }
  147. }
  148. cmd->base.speed = speed;
  149. cmd->base.autoneg = ((hw->phy.media_type == e1000_media_type_fiber) ||
  150. hw->mac.autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
  151. /* MDI-X => 2; MDI =>1; Invalid =>0 */
  152. if ((hw->phy.media_type == e1000_media_type_copper) &&
  153. netif_carrier_ok(netdev))
  154. cmd->base.eth_tp_mdix = hw->phy.is_mdix ?
  155. ETH_TP_MDI_X : ETH_TP_MDI;
  156. else
  157. cmd->base.eth_tp_mdix = ETH_TP_MDI_INVALID;
  158. if (hw->phy.mdix == AUTO_ALL_MODES)
  159. cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_AUTO;
  160. else
  161. cmd->base.eth_tp_mdix_ctrl = hw->phy.mdix;
  162. if (hw->phy.media_type != e1000_media_type_copper)
  163. cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_INVALID;
  164. ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
  165. supported);
  166. ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
  167. advertising);
  168. return 0;
  169. }
  170. static int e1000_set_spd_dplx(struct e1000_adapter *adapter, u32 spd, u8 dplx)
  171. {
  172. struct e1000_mac_info *mac = &adapter->hw.mac;
  173. mac->autoneg = 0;
  174. /* Make sure dplx is at most 1 bit and lsb of speed is not set
  175. * for the switch() below to work
  176. */
  177. if ((spd & 1) || (dplx & ~1))
  178. goto err_inval;
  179. /* Fiber NICs only allow 1000 gbps Full duplex */
  180. if ((adapter->hw.phy.media_type == e1000_media_type_fiber) &&
  181. (spd != SPEED_1000) && (dplx != DUPLEX_FULL)) {
  182. goto err_inval;
  183. }
  184. switch (spd + dplx) {
  185. case SPEED_10 + DUPLEX_HALF:
  186. mac->forced_speed_duplex = ADVERTISE_10_HALF;
  187. break;
  188. case SPEED_10 + DUPLEX_FULL:
  189. mac->forced_speed_duplex = ADVERTISE_10_FULL;
  190. break;
  191. case SPEED_100 + DUPLEX_HALF:
  192. mac->forced_speed_duplex = ADVERTISE_100_HALF;
  193. break;
  194. case SPEED_100 + DUPLEX_FULL:
  195. mac->forced_speed_duplex = ADVERTISE_100_FULL;
  196. break;
  197. case SPEED_1000 + DUPLEX_FULL:
  198. if (adapter->hw.phy.media_type == e1000_media_type_copper) {
  199. mac->autoneg = 1;
  200. adapter->hw.phy.autoneg_advertised =
  201. ADVERTISE_1000_FULL;
  202. } else {
  203. mac->forced_speed_duplex = ADVERTISE_1000_FULL;
  204. }
  205. break;
  206. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  207. default:
  208. goto err_inval;
  209. }
  210. /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
  211. adapter->hw.phy.mdix = AUTO_ALL_MODES;
  212. return 0;
  213. err_inval:
  214. e_err("Unsupported Speed/Duplex configuration\n");
  215. return -EINVAL;
  216. }
  217. static int e1000_set_link_ksettings(struct net_device *netdev,
  218. const struct ethtool_link_ksettings *cmd)
  219. {
  220. struct e1000_adapter *adapter = netdev_priv(netdev);
  221. struct e1000_hw *hw = &adapter->hw;
  222. int ret_val = 0;
  223. u32 advertising;
  224. ethtool_convert_link_mode_to_legacy_u32(&advertising,
  225. cmd->link_modes.advertising);
  226. pm_runtime_get_sync(netdev->dev.parent);
  227. /* When SoL/IDER sessions are active, autoneg/speed/duplex
  228. * cannot be changed
  229. */
  230. if (hw->phy.ops.check_reset_block &&
  231. hw->phy.ops.check_reset_block(hw)) {
  232. e_err("Cannot change link characteristics when SoL/IDER is active.\n");
  233. ret_val = -EINVAL;
  234. goto out;
  235. }
  236. /* MDI setting is only allowed when autoneg enabled because
  237. * some hardware doesn't allow MDI setting when speed or
  238. * duplex is forced.
  239. */
  240. if (cmd->base.eth_tp_mdix_ctrl) {
  241. if (hw->phy.media_type != e1000_media_type_copper) {
  242. ret_val = -EOPNOTSUPP;
  243. goto out;
  244. }
  245. if ((cmd->base.eth_tp_mdix_ctrl != ETH_TP_MDI_AUTO) &&
  246. (cmd->base.autoneg != AUTONEG_ENABLE)) {
  247. e_err("forcing MDI/MDI-X state is not supported when link speed and/or duplex are forced\n");
  248. ret_val = -EINVAL;
  249. goto out;
  250. }
  251. }
  252. while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
  253. usleep_range(1000, 2000);
  254. if (cmd->base.autoneg == AUTONEG_ENABLE) {
  255. hw->mac.autoneg = 1;
  256. if (hw->phy.media_type == e1000_media_type_fiber)
  257. hw->phy.autoneg_advertised = ADVERTISED_1000baseT_Full |
  258. ADVERTISED_FIBRE | ADVERTISED_Autoneg;
  259. else
  260. hw->phy.autoneg_advertised = advertising |
  261. ADVERTISED_TP | ADVERTISED_Autoneg;
  262. advertising = hw->phy.autoneg_advertised;
  263. if (adapter->fc_autoneg)
  264. hw->fc.requested_mode = e1000_fc_default;
  265. } else {
  266. u32 speed = cmd->base.speed;
  267. /* calling this overrides forced MDI setting */
  268. if (e1000_set_spd_dplx(adapter, speed, cmd->base.duplex)) {
  269. ret_val = -EINVAL;
  270. goto out;
  271. }
  272. }
  273. /* MDI-X => 2; MDI => 1; Auto => 3 */
  274. if (cmd->base.eth_tp_mdix_ctrl) {
  275. /* fix up the value for auto (3 => 0) as zero is mapped
  276. * internally to auto
  277. */
  278. if (cmd->base.eth_tp_mdix_ctrl == ETH_TP_MDI_AUTO)
  279. hw->phy.mdix = AUTO_ALL_MODES;
  280. else
  281. hw->phy.mdix = cmd->base.eth_tp_mdix_ctrl;
  282. }
  283. /* reset the link */
  284. if (netif_running(adapter->netdev)) {
  285. e1000e_down(adapter, true);
  286. e1000e_up(adapter);
  287. } else {
  288. e1000e_reset(adapter);
  289. }
  290. out:
  291. pm_runtime_put_sync(netdev->dev.parent);
  292. clear_bit(__E1000_RESETTING, &adapter->state);
  293. return ret_val;
  294. }
  295. static void e1000_get_pauseparam(struct net_device *netdev,
  296. struct ethtool_pauseparam *pause)
  297. {
  298. struct e1000_adapter *adapter = netdev_priv(netdev);
  299. struct e1000_hw *hw = &adapter->hw;
  300. pause->autoneg =
  301. (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
  302. if (hw->fc.current_mode == e1000_fc_rx_pause) {
  303. pause->rx_pause = 1;
  304. } else if (hw->fc.current_mode == e1000_fc_tx_pause) {
  305. pause->tx_pause = 1;
  306. } else if (hw->fc.current_mode == e1000_fc_full) {
  307. pause->rx_pause = 1;
  308. pause->tx_pause = 1;
  309. }
  310. }
  311. static int e1000_set_pauseparam(struct net_device *netdev,
  312. struct ethtool_pauseparam *pause)
  313. {
  314. struct e1000_adapter *adapter = netdev_priv(netdev);
  315. struct e1000_hw *hw = &adapter->hw;
  316. int retval = 0;
  317. adapter->fc_autoneg = pause->autoneg;
  318. while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
  319. usleep_range(1000, 2000);
  320. pm_runtime_get_sync(netdev->dev.parent);
  321. if (adapter->fc_autoneg == AUTONEG_ENABLE) {
  322. hw->fc.requested_mode = e1000_fc_default;
  323. if (netif_running(adapter->netdev)) {
  324. e1000e_down(adapter, true);
  325. e1000e_up(adapter);
  326. } else {
  327. e1000e_reset(adapter);
  328. }
  329. } else {
  330. if (pause->rx_pause && pause->tx_pause)
  331. hw->fc.requested_mode = e1000_fc_full;
  332. else if (pause->rx_pause && !pause->tx_pause)
  333. hw->fc.requested_mode = e1000_fc_rx_pause;
  334. else if (!pause->rx_pause && pause->tx_pause)
  335. hw->fc.requested_mode = e1000_fc_tx_pause;
  336. else if (!pause->rx_pause && !pause->tx_pause)
  337. hw->fc.requested_mode = e1000_fc_none;
  338. hw->fc.current_mode = hw->fc.requested_mode;
  339. if (hw->phy.media_type == e1000_media_type_fiber) {
  340. retval = hw->mac.ops.setup_link(hw);
  341. /* implicit goto out */
  342. } else {
  343. retval = e1000e_force_mac_fc(hw);
  344. if (retval)
  345. goto out;
  346. e1000e_set_fc_watermarks(hw);
  347. }
  348. }
  349. out:
  350. pm_runtime_put_sync(netdev->dev.parent);
  351. clear_bit(__E1000_RESETTING, &adapter->state);
  352. return retval;
  353. }
  354. static u32 e1000_get_msglevel(struct net_device *netdev)
  355. {
  356. struct e1000_adapter *adapter = netdev_priv(netdev);
  357. return adapter->msg_enable;
  358. }
  359. static void e1000_set_msglevel(struct net_device *netdev, u32 data)
  360. {
  361. struct e1000_adapter *adapter = netdev_priv(netdev);
  362. adapter->msg_enable = data;
  363. }
  364. static int e1000_get_regs_len(struct net_device __always_unused *netdev)
  365. {
  366. #define E1000_REGS_LEN 32 /* overestimate */
  367. return E1000_REGS_LEN * sizeof(u32);
  368. }
  369. static void e1000_get_regs(struct net_device *netdev,
  370. struct ethtool_regs *regs, void *p)
  371. {
  372. struct e1000_adapter *adapter = netdev_priv(netdev);
  373. struct e1000_hw *hw = &adapter->hw;
  374. u32 *regs_buff = p;
  375. u16 phy_data;
  376. pm_runtime_get_sync(netdev->dev.parent);
  377. memset(p, 0, E1000_REGS_LEN * sizeof(u32));
  378. regs->version = (1u << 24) |
  379. (adapter->pdev->revision << 16) |
  380. adapter->pdev->device;
  381. regs_buff[0] = er32(CTRL);
  382. regs_buff[1] = er32(STATUS);
  383. regs_buff[2] = er32(RCTL);
  384. regs_buff[3] = er32(RDLEN(0));
  385. regs_buff[4] = er32(RDH(0));
  386. regs_buff[5] = er32(RDT(0));
  387. regs_buff[6] = er32(RDTR);
  388. regs_buff[7] = er32(TCTL);
  389. regs_buff[8] = er32(TDLEN(0));
  390. regs_buff[9] = er32(TDH(0));
  391. regs_buff[10] = er32(TDT(0));
  392. regs_buff[11] = er32(TIDV);
  393. regs_buff[12] = adapter->hw.phy.type; /* PHY type (IGP=1, M88=0) */
  394. /* ethtool doesn't use anything past this point, so all this
  395. * code is likely legacy junk for apps that may or may not exist
  396. */
  397. if (hw->phy.type == e1000_phy_m88) {
  398. e1e_rphy(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
  399. regs_buff[13] = (u32)phy_data; /* cable length */
  400. regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  401. regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  402. regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  403. e1e_rphy(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
  404. regs_buff[17] = (u32)phy_data; /* extended 10bt distance */
  405. regs_buff[18] = regs_buff[13]; /* cable polarity */
  406. regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  407. regs_buff[20] = regs_buff[17]; /* polarity correction */
  408. /* phy receive errors */
  409. regs_buff[22] = adapter->phy_stats.receive_errors;
  410. regs_buff[23] = regs_buff[13]; /* mdix mode */
  411. }
  412. regs_buff[21] = 0; /* was idle_errors */
  413. e1e_rphy(hw, MII_STAT1000, &phy_data);
  414. regs_buff[24] = (u32)phy_data; /* phy local receiver status */
  415. regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
  416. pm_runtime_put_sync(netdev->dev.parent);
  417. }
  418. static int e1000_get_eeprom_len(struct net_device *netdev)
  419. {
  420. struct e1000_adapter *adapter = netdev_priv(netdev);
  421. return adapter->hw.nvm.word_size * 2;
  422. }
  423. static int e1000_get_eeprom(struct net_device *netdev,
  424. struct ethtool_eeprom *eeprom, u8 *bytes)
  425. {
  426. struct e1000_adapter *adapter = netdev_priv(netdev);
  427. struct e1000_hw *hw = &adapter->hw;
  428. u16 *eeprom_buff;
  429. int first_word;
  430. int last_word;
  431. int ret_val = 0;
  432. u16 i;
  433. if (eeprom->len == 0)
  434. return -EINVAL;
  435. eeprom->magic = adapter->pdev->vendor | (adapter->pdev->device << 16);
  436. first_word = eeprom->offset >> 1;
  437. last_word = (eeprom->offset + eeprom->len - 1) >> 1;
  438. eeprom_buff = kmalloc_array(last_word - first_word + 1, sizeof(u16),
  439. GFP_KERNEL);
  440. if (!eeprom_buff)
  441. return -ENOMEM;
  442. pm_runtime_get_sync(netdev->dev.parent);
  443. if (hw->nvm.type == e1000_nvm_eeprom_spi) {
  444. ret_val = e1000_read_nvm(hw, first_word,
  445. last_word - first_word + 1,
  446. eeprom_buff);
  447. } else {
  448. for (i = 0; i < last_word - first_word + 1; i++) {
  449. ret_val = e1000_read_nvm(hw, first_word + i, 1,
  450. &eeprom_buff[i]);
  451. if (ret_val)
  452. break;
  453. }
  454. }
  455. pm_runtime_put_sync(netdev->dev.parent);
  456. if (ret_val) {
  457. /* a read error occurred, throw away the result */
  458. memset(eeprom_buff, 0xff, sizeof(u16) *
  459. (last_word - first_word + 1));
  460. } else {
  461. /* Device's eeprom is always little-endian, word addressable */
  462. for (i = 0; i < last_word - first_word + 1; i++)
  463. le16_to_cpus(&eeprom_buff[i]);
  464. }
  465. memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
  466. kfree(eeprom_buff);
  467. return ret_val;
  468. }
  469. static int e1000_set_eeprom(struct net_device *netdev,
  470. struct ethtool_eeprom *eeprom, u8 *bytes)
  471. {
  472. struct e1000_adapter *adapter = netdev_priv(netdev);
  473. struct e1000_hw *hw = &adapter->hw;
  474. u16 *eeprom_buff;
  475. void *ptr;
  476. int max_len;
  477. int first_word;
  478. int last_word;
  479. int ret_val = 0;
  480. u16 i;
  481. if (eeprom->len == 0)
  482. return -EOPNOTSUPP;
  483. if (eeprom->magic !=
  484. (adapter->pdev->vendor | (adapter->pdev->device << 16)))
  485. return -EFAULT;
  486. if (adapter->flags & FLAG_READ_ONLY_NVM)
  487. return -EINVAL;
  488. max_len = hw->nvm.word_size * 2;
  489. first_word = eeprom->offset >> 1;
  490. last_word = (eeprom->offset + eeprom->len - 1) >> 1;
  491. eeprom_buff = kmalloc(max_len, GFP_KERNEL);
  492. if (!eeprom_buff)
  493. return -ENOMEM;
  494. ptr = (void *)eeprom_buff;
  495. pm_runtime_get_sync(netdev->dev.parent);
  496. if (eeprom->offset & 1) {
  497. /* need read/modify/write of first changed EEPROM word */
  498. /* only the second byte of the word is being modified */
  499. ret_val = e1000_read_nvm(hw, first_word, 1, &eeprom_buff[0]);
  500. ptr++;
  501. }
  502. if (((eeprom->offset + eeprom->len) & 1) && (!ret_val))
  503. /* need read/modify/write of last changed EEPROM word */
  504. /* only the first byte of the word is being modified */
  505. ret_val = e1000_read_nvm(hw, last_word, 1,
  506. &eeprom_buff[last_word - first_word]);
  507. if (ret_val)
  508. goto out;
  509. /* Device's eeprom is always little-endian, word addressable */
  510. for (i = 0; i < last_word - first_word + 1; i++)
  511. le16_to_cpus(&eeprom_buff[i]);
  512. memcpy(ptr, bytes, eeprom->len);
  513. for (i = 0; i < last_word - first_word + 1; i++)
  514. cpu_to_le16s(&eeprom_buff[i]);
  515. ret_val = e1000_write_nvm(hw, first_word,
  516. last_word - first_word + 1, eeprom_buff);
  517. if (ret_val)
  518. goto out;
  519. /* Update the checksum over the first part of the EEPROM if needed
  520. * and flush shadow RAM for applicable controllers
  521. */
  522. if ((first_word <= NVM_CHECKSUM_REG) ||
  523. (hw->mac.type == e1000_82583) ||
  524. (hw->mac.type == e1000_82574) ||
  525. (hw->mac.type == e1000_82573))
  526. ret_val = e1000e_update_nvm_checksum(hw);
  527. out:
  528. pm_runtime_put_sync(netdev->dev.parent);
  529. kfree(eeprom_buff);
  530. return ret_val;
  531. }
  532. static void e1000_get_drvinfo(struct net_device *netdev,
  533. struct ethtool_drvinfo *drvinfo)
  534. {
  535. struct e1000_adapter *adapter = netdev_priv(netdev);
  536. strlcpy(drvinfo->driver, e1000e_driver_name, sizeof(drvinfo->driver));
  537. strlcpy(drvinfo->version, e1000e_driver_version,
  538. sizeof(drvinfo->version));
  539. /* EEPROM image version # is reported as firmware version # for
  540. * PCI-E controllers
  541. */
  542. snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
  543. "%d.%d-%d",
  544. (adapter->eeprom_vers & 0xF000) >> 12,
  545. (adapter->eeprom_vers & 0x0FF0) >> 4,
  546. (adapter->eeprom_vers & 0x000F));
  547. strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
  548. sizeof(drvinfo->bus_info));
  549. }
  550. static void e1000_get_ringparam(struct net_device *netdev,
  551. struct ethtool_ringparam *ring)
  552. {
  553. struct e1000_adapter *adapter = netdev_priv(netdev);
  554. ring->rx_max_pending = E1000_MAX_RXD;
  555. ring->tx_max_pending = E1000_MAX_TXD;
  556. ring->rx_pending = adapter->rx_ring_count;
  557. ring->tx_pending = adapter->tx_ring_count;
  558. }
  559. static int e1000_set_ringparam(struct net_device *netdev,
  560. struct ethtool_ringparam *ring)
  561. {
  562. struct e1000_adapter *adapter = netdev_priv(netdev);
  563. struct e1000_ring *temp_tx = NULL, *temp_rx = NULL;
  564. int err = 0, size = sizeof(struct e1000_ring);
  565. bool set_tx = false, set_rx = false;
  566. u16 new_rx_count, new_tx_count;
  567. if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
  568. return -EINVAL;
  569. new_rx_count = clamp_t(u32, ring->rx_pending, E1000_MIN_RXD,
  570. E1000_MAX_RXD);
  571. new_rx_count = ALIGN(new_rx_count, REQ_RX_DESCRIPTOR_MULTIPLE);
  572. new_tx_count = clamp_t(u32, ring->tx_pending, E1000_MIN_TXD,
  573. E1000_MAX_TXD);
  574. new_tx_count = ALIGN(new_tx_count, REQ_TX_DESCRIPTOR_MULTIPLE);
  575. if ((new_tx_count == adapter->tx_ring_count) &&
  576. (new_rx_count == adapter->rx_ring_count))
  577. /* nothing to do */
  578. return 0;
  579. while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
  580. usleep_range(1000, 2000);
  581. if (!netif_running(adapter->netdev)) {
  582. /* Set counts now and allocate resources during open() */
  583. adapter->tx_ring->count = new_tx_count;
  584. adapter->rx_ring->count = new_rx_count;
  585. adapter->tx_ring_count = new_tx_count;
  586. adapter->rx_ring_count = new_rx_count;
  587. goto clear_reset;
  588. }
  589. set_tx = (new_tx_count != adapter->tx_ring_count);
  590. set_rx = (new_rx_count != adapter->rx_ring_count);
  591. /* Allocate temporary storage for ring updates */
  592. if (set_tx) {
  593. temp_tx = vmalloc(size);
  594. if (!temp_tx) {
  595. err = -ENOMEM;
  596. goto free_temp;
  597. }
  598. }
  599. if (set_rx) {
  600. temp_rx = vmalloc(size);
  601. if (!temp_rx) {
  602. err = -ENOMEM;
  603. goto free_temp;
  604. }
  605. }
  606. pm_runtime_get_sync(netdev->dev.parent);
  607. e1000e_down(adapter, true);
  608. /* We can't just free everything and then setup again, because the
  609. * ISRs in MSI-X mode get passed pointers to the Tx and Rx ring
  610. * structs. First, attempt to allocate new resources...
  611. */
  612. if (set_tx) {
  613. memcpy(temp_tx, adapter->tx_ring, size);
  614. temp_tx->count = new_tx_count;
  615. err = e1000e_setup_tx_resources(temp_tx);
  616. if (err)
  617. goto err_setup;
  618. }
  619. if (set_rx) {
  620. memcpy(temp_rx, adapter->rx_ring, size);
  621. temp_rx->count = new_rx_count;
  622. err = e1000e_setup_rx_resources(temp_rx);
  623. if (err)
  624. goto err_setup_rx;
  625. }
  626. /* ...then free the old resources and copy back any new ring data */
  627. if (set_tx) {
  628. e1000e_free_tx_resources(adapter->tx_ring);
  629. memcpy(adapter->tx_ring, temp_tx, size);
  630. adapter->tx_ring_count = new_tx_count;
  631. }
  632. if (set_rx) {
  633. e1000e_free_rx_resources(adapter->rx_ring);
  634. memcpy(adapter->rx_ring, temp_rx, size);
  635. adapter->rx_ring_count = new_rx_count;
  636. }
  637. err_setup_rx:
  638. if (err && set_tx)
  639. e1000e_free_tx_resources(temp_tx);
  640. err_setup:
  641. e1000e_up(adapter);
  642. pm_runtime_put_sync(netdev->dev.parent);
  643. free_temp:
  644. vfree(temp_tx);
  645. vfree(temp_rx);
  646. clear_reset:
  647. clear_bit(__E1000_RESETTING, &adapter->state);
  648. return err;
  649. }
  650. static bool reg_pattern_test(struct e1000_adapter *adapter, u64 *data,
  651. int reg, int offset, u32 mask, u32 write)
  652. {
  653. u32 pat, val;
  654. static const u32 test[] = {
  655. 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF
  656. };
  657. for (pat = 0; pat < ARRAY_SIZE(test); pat++) {
  658. E1000_WRITE_REG_ARRAY(&adapter->hw, reg, offset,
  659. (test[pat] & write));
  660. val = E1000_READ_REG_ARRAY(&adapter->hw, reg, offset);
  661. if (val != (test[pat] & write & mask)) {
  662. e_err("pattern test failed (reg 0x%05X): got 0x%08X expected 0x%08X\n",
  663. reg + (offset << 2), val,
  664. (test[pat] & write & mask));
  665. *data = reg;
  666. return true;
  667. }
  668. }
  669. return false;
  670. }
  671. static bool reg_set_and_check(struct e1000_adapter *adapter, u64 *data,
  672. int reg, u32 mask, u32 write)
  673. {
  674. u32 val;
  675. __ew32(&adapter->hw, reg, write & mask);
  676. val = __er32(&adapter->hw, reg);
  677. if ((write & mask) != (val & mask)) {
  678. e_err("set/check test failed (reg 0x%05X): got 0x%08X expected 0x%08X\n",
  679. reg, (val & mask), (write & mask));
  680. *data = reg;
  681. return true;
  682. }
  683. return false;
  684. }
  685. #define REG_PATTERN_TEST_ARRAY(reg, offset, mask, write) \
  686. do { \
  687. if (reg_pattern_test(adapter, data, reg, offset, mask, write)) \
  688. return 1; \
  689. } while (0)
  690. #define REG_PATTERN_TEST(reg, mask, write) \
  691. REG_PATTERN_TEST_ARRAY(reg, 0, mask, write)
  692. #define REG_SET_AND_CHECK(reg, mask, write) \
  693. do { \
  694. if (reg_set_and_check(adapter, data, reg, mask, write)) \
  695. return 1; \
  696. } while (0)
  697. static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
  698. {
  699. struct e1000_hw *hw = &adapter->hw;
  700. struct e1000_mac_info *mac = &adapter->hw.mac;
  701. u32 value;
  702. u32 before;
  703. u32 after;
  704. u32 i;
  705. u32 toggle;
  706. u32 mask;
  707. u32 wlock_mac = 0;
  708. /* The status register is Read Only, so a write should fail.
  709. * Some bits that get toggled are ignored. There are several bits
  710. * on newer hardware that are r/w.
  711. */
  712. switch (mac->type) {
  713. case e1000_82571:
  714. case e1000_82572:
  715. case e1000_80003es2lan:
  716. toggle = 0x7FFFF3FF;
  717. break;
  718. default:
  719. toggle = 0x7FFFF033;
  720. break;
  721. }
  722. before = er32(STATUS);
  723. value = (er32(STATUS) & toggle);
  724. ew32(STATUS, toggle);
  725. after = er32(STATUS) & toggle;
  726. if (value != after) {
  727. e_err("failed STATUS register test got: 0x%08X expected: 0x%08X\n",
  728. after, value);
  729. *data = 1;
  730. return 1;
  731. }
  732. /* restore previous status */
  733. ew32(STATUS, before);
  734. if (!(adapter->flags & FLAG_IS_ICH)) {
  735. REG_PATTERN_TEST(E1000_FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
  736. REG_PATTERN_TEST(E1000_FCAH, 0x0000FFFF, 0xFFFFFFFF);
  737. REG_PATTERN_TEST(E1000_FCT, 0x0000FFFF, 0xFFFFFFFF);
  738. REG_PATTERN_TEST(E1000_VET, 0x0000FFFF, 0xFFFFFFFF);
  739. }
  740. REG_PATTERN_TEST(E1000_RDTR, 0x0000FFFF, 0xFFFFFFFF);
  741. REG_PATTERN_TEST(E1000_RDBAH(0), 0xFFFFFFFF, 0xFFFFFFFF);
  742. REG_PATTERN_TEST(E1000_RDLEN(0), 0x000FFF80, 0x000FFFFF);
  743. REG_PATTERN_TEST(E1000_RDH(0), 0x0000FFFF, 0x0000FFFF);
  744. REG_PATTERN_TEST(E1000_RDT(0), 0x0000FFFF, 0x0000FFFF);
  745. REG_PATTERN_TEST(E1000_FCRTH, 0x0000FFF8, 0x0000FFF8);
  746. REG_PATTERN_TEST(E1000_FCTTV, 0x0000FFFF, 0x0000FFFF);
  747. REG_PATTERN_TEST(E1000_TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
  748. REG_PATTERN_TEST(E1000_TDBAH(0), 0xFFFFFFFF, 0xFFFFFFFF);
  749. REG_PATTERN_TEST(E1000_TDLEN(0), 0x000FFF80, 0x000FFFFF);
  750. REG_SET_AND_CHECK(E1000_RCTL, 0xFFFFFFFF, 0x00000000);
  751. before = ((adapter->flags & FLAG_IS_ICH) ? 0x06C3B33E : 0x06DFB3FE);
  752. REG_SET_AND_CHECK(E1000_RCTL, before, 0x003FFFFB);
  753. REG_SET_AND_CHECK(E1000_TCTL, 0xFFFFFFFF, 0x00000000);
  754. REG_SET_AND_CHECK(E1000_RCTL, before, 0xFFFFFFFF);
  755. REG_PATTERN_TEST(E1000_RDBAL(0), 0xFFFFFFF0, 0xFFFFFFFF);
  756. if (!(adapter->flags & FLAG_IS_ICH))
  757. REG_PATTERN_TEST(E1000_TXCW, 0xC000FFFF, 0x0000FFFF);
  758. REG_PATTERN_TEST(E1000_TDBAL(0), 0xFFFFFFF0, 0xFFFFFFFF);
  759. REG_PATTERN_TEST(E1000_TIDV, 0x0000FFFF, 0x0000FFFF);
  760. mask = 0x8003FFFF;
  761. switch (mac->type) {
  762. case e1000_ich10lan:
  763. case e1000_pchlan:
  764. case e1000_pch2lan:
  765. case e1000_pch_lpt:
  766. case e1000_pch_spt:
  767. case e1000_pch_cnp:
  768. /* fall through */
  769. case e1000_pch_tgp:
  770. case e1000_pch_adp:
  771. mask |= BIT(18);
  772. break;
  773. default:
  774. break;
  775. }
  776. if (mac->type >= e1000_pch_lpt)
  777. wlock_mac = (er32(FWSM) & E1000_FWSM_WLOCK_MAC_MASK) >>
  778. E1000_FWSM_WLOCK_MAC_SHIFT;
  779. for (i = 0; i < mac->rar_entry_count; i++) {
  780. if (mac->type >= e1000_pch_lpt) {
  781. /* Cannot test write-protected SHRAL[n] registers */
  782. if ((wlock_mac == 1) || (wlock_mac && (i > wlock_mac)))
  783. continue;
  784. /* SHRAH[9] different than the others */
  785. if (i == 10)
  786. mask |= BIT(30);
  787. else
  788. mask &= ~BIT(30);
  789. }
  790. if (mac->type == e1000_pch2lan) {
  791. /* SHRAH[0,1,2] different than previous */
  792. if (i == 1)
  793. mask &= 0xFFF4FFFF;
  794. /* SHRAH[3] different than SHRAH[0,1,2] */
  795. if (i == 4)
  796. mask |= BIT(30);
  797. /* RAR[1-6] owned by management engine - skipping */
  798. if (i > 0)
  799. i += 6;
  800. }
  801. REG_PATTERN_TEST_ARRAY(E1000_RA, ((i << 1) + 1), mask,
  802. 0xFFFFFFFF);
  803. /* reset index to actual value */
  804. if ((mac->type == e1000_pch2lan) && (i > 6))
  805. i -= 6;
  806. }
  807. for (i = 0; i < mac->mta_reg_count; i++)
  808. REG_PATTERN_TEST_ARRAY(E1000_MTA, i, 0xFFFFFFFF, 0xFFFFFFFF);
  809. *data = 0;
  810. return 0;
  811. }
  812. static int e1000_eeprom_test(struct e1000_adapter *adapter, u64 *data)
  813. {
  814. u16 temp;
  815. u16 checksum = 0;
  816. u16 i;
  817. *data = 0;
  818. /* Read and add up the contents of the EEPROM */
  819. for (i = 0; i < (NVM_CHECKSUM_REG + 1); i++) {
  820. if ((e1000_read_nvm(&adapter->hw, i, 1, &temp)) < 0) {
  821. *data = 1;
  822. return *data;
  823. }
  824. checksum += temp;
  825. }
  826. /* If Checksum is not Correct return error else test passed */
  827. if ((checksum != (u16)NVM_SUM) && !(*data))
  828. *data = 2;
  829. return *data;
  830. }
  831. static irqreturn_t e1000_test_intr(int __always_unused irq, void *data)
  832. {
  833. struct net_device *netdev = (struct net_device *)data;
  834. struct e1000_adapter *adapter = netdev_priv(netdev);
  835. struct e1000_hw *hw = &adapter->hw;
  836. adapter->test_icr |= er32(ICR);
  837. return IRQ_HANDLED;
  838. }
  839. static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data)
  840. {
  841. struct net_device *netdev = adapter->netdev;
  842. struct e1000_hw *hw = &adapter->hw;
  843. u32 mask;
  844. u32 shared_int = 1;
  845. u32 irq = adapter->pdev->irq;
  846. int i;
  847. int ret_val = 0;
  848. int int_mode = E1000E_INT_MODE_LEGACY;
  849. *data = 0;
  850. /* NOTE: we don't test MSI/MSI-X interrupts here, yet */
  851. if (adapter->int_mode == E1000E_INT_MODE_MSIX) {
  852. int_mode = adapter->int_mode;
  853. e1000e_reset_interrupt_capability(adapter);
  854. adapter->int_mode = E1000E_INT_MODE_LEGACY;
  855. e1000e_set_interrupt_capability(adapter);
  856. }
  857. /* Hook up test interrupt handler just for this test */
  858. if (!request_irq(irq, e1000_test_intr, IRQF_PROBE_SHARED, netdev->name,
  859. netdev)) {
  860. shared_int = 0;
  861. } else if (request_irq(irq, e1000_test_intr, IRQF_SHARED, netdev->name,
  862. netdev)) {
  863. *data = 1;
  864. ret_val = -1;
  865. goto out;
  866. }
  867. e_info("testing %s interrupt\n", (shared_int ? "shared" : "unshared"));
  868. /* Disable all the interrupts */
  869. ew32(IMC, 0xFFFFFFFF);
  870. e1e_flush();
  871. usleep_range(10000, 11000);
  872. /* Test each interrupt */
  873. for (i = 0; i < 10; i++) {
  874. /* Interrupt to test */
  875. mask = BIT(i);
  876. if (adapter->flags & FLAG_IS_ICH) {
  877. switch (mask) {
  878. case E1000_ICR_RXSEQ:
  879. continue;
  880. case 0x00000100:
  881. if (adapter->hw.mac.type == e1000_ich8lan ||
  882. adapter->hw.mac.type == e1000_ich9lan)
  883. continue;
  884. break;
  885. default:
  886. break;
  887. }
  888. }
  889. if (!shared_int) {
  890. /* Disable the interrupt to be reported in
  891. * the cause register and then force the same
  892. * interrupt and see if one gets posted. If
  893. * an interrupt was posted to the bus, the
  894. * test failed.
  895. */
  896. adapter->test_icr = 0;
  897. ew32(IMC, mask);
  898. ew32(ICS, mask);
  899. e1e_flush();
  900. usleep_range(10000, 11000);
  901. if (adapter->test_icr & mask) {
  902. *data = 3;
  903. break;
  904. }
  905. }
  906. /* Enable the interrupt to be reported in
  907. * the cause register and then force the same
  908. * interrupt and see if one gets posted. If
  909. * an interrupt was not posted to the bus, the
  910. * test failed.
  911. */
  912. adapter->test_icr = 0;
  913. ew32(IMS, mask);
  914. ew32(ICS, mask);
  915. e1e_flush();
  916. usleep_range(10000, 11000);
  917. if (!(adapter->test_icr & mask)) {
  918. *data = 4;
  919. break;
  920. }
  921. if (!shared_int) {
  922. /* Disable the other interrupts to be reported in
  923. * the cause register and then force the other
  924. * interrupts and see if any get posted. If
  925. * an interrupt was posted to the bus, the
  926. * test failed.
  927. */
  928. adapter->test_icr = 0;
  929. ew32(IMC, ~mask & 0x00007FFF);
  930. ew32(ICS, ~mask & 0x00007FFF);
  931. e1e_flush();
  932. usleep_range(10000, 11000);
  933. if (adapter->test_icr) {
  934. *data = 5;
  935. break;
  936. }
  937. }
  938. }
  939. /* Disable all the interrupts */
  940. ew32(IMC, 0xFFFFFFFF);
  941. e1e_flush();
  942. usleep_range(10000, 11000);
  943. /* Unhook test interrupt handler */
  944. free_irq(irq, netdev);
  945. out:
  946. if (int_mode == E1000E_INT_MODE_MSIX) {
  947. e1000e_reset_interrupt_capability(adapter);
  948. adapter->int_mode = int_mode;
  949. e1000e_set_interrupt_capability(adapter);
  950. }
  951. return ret_val;
  952. }
  953. static void e1000_free_desc_rings(struct e1000_adapter *adapter)
  954. {
  955. struct e1000_ring *tx_ring = &adapter->test_tx_ring;
  956. struct e1000_ring *rx_ring = &adapter->test_rx_ring;
  957. struct pci_dev *pdev = adapter->pdev;
  958. struct e1000_buffer *buffer_info;
  959. int i;
  960. if (tx_ring->desc && tx_ring->buffer_info) {
  961. for (i = 0; i < tx_ring->count; i++) {
  962. buffer_info = &tx_ring->buffer_info[i];
  963. if (buffer_info->dma)
  964. dma_unmap_single(&pdev->dev,
  965. buffer_info->dma,
  966. buffer_info->length,
  967. DMA_TO_DEVICE);
  968. dev_kfree_skb(buffer_info->skb);
  969. }
  970. }
  971. if (rx_ring->desc && rx_ring->buffer_info) {
  972. for (i = 0; i < rx_ring->count; i++) {
  973. buffer_info = &rx_ring->buffer_info[i];
  974. if (buffer_info->dma)
  975. dma_unmap_single(&pdev->dev,
  976. buffer_info->dma,
  977. 2048, DMA_FROM_DEVICE);
  978. dev_kfree_skb(buffer_info->skb);
  979. }
  980. }
  981. if (tx_ring->desc) {
  982. dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
  983. tx_ring->dma);
  984. tx_ring->desc = NULL;
  985. }
  986. if (rx_ring->desc) {
  987. dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
  988. rx_ring->dma);
  989. rx_ring->desc = NULL;
  990. }
  991. kfree(tx_ring->buffer_info);
  992. tx_ring->buffer_info = NULL;
  993. kfree(rx_ring->buffer_info);
  994. rx_ring->buffer_info = NULL;
  995. }
  996. static int e1000_setup_desc_rings(struct e1000_adapter *adapter)
  997. {
  998. struct e1000_ring *tx_ring = &adapter->test_tx_ring;
  999. struct e1000_ring *rx_ring = &adapter->test_rx_ring;
  1000. struct pci_dev *pdev = adapter->pdev;
  1001. struct e1000_hw *hw = &adapter->hw;
  1002. u32 rctl;
  1003. int i;
  1004. int ret_val;
  1005. /* Setup Tx descriptor ring and Tx buffers */
  1006. if (!tx_ring->count)
  1007. tx_ring->count = E1000_DEFAULT_TXD;
  1008. tx_ring->buffer_info = kcalloc(tx_ring->count,
  1009. sizeof(struct e1000_buffer), GFP_KERNEL);
  1010. if (!tx_ring->buffer_info) {
  1011. ret_val = 1;
  1012. goto err_nomem;
  1013. }
  1014. tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
  1015. tx_ring->size = ALIGN(tx_ring->size, 4096);
  1016. tx_ring->desc = dma_alloc_coherent(&pdev->dev, tx_ring->size,
  1017. &tx_ring->dma, GFP_KERNEL);
  1018. if (!tx_ring->desc) {
  1019. ret_val = 2;
  1020. goto err_nomem;
  1021. }
  1022. tx_ring->next_to_use = 0;
  1023. tx_ring->next_to_clean = 0;
  1024. ew32(TDBAL(0), ((u64)tx_ring->dma & 0x00000000FFFFFFFF));
  1025. ew32(TDBAH(0), ((u64)tx_ring->dma >> 32));
  1026. ew32(TDLEN(0), tx_ring->count * sizeof(struct e1000_tx_desc));
  1027. ew32(TDH(0), 0);
  1028. ew32(TDT(0), 0);
  1029. ew32(TCTL, E1000_TCTL_PSP | E1000_TCTL_EN | E1000_TCTL_MULR |
  1030. E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
  1031. E1000_COLLISION_DISTANCE << E1000_COLD_SHIFT);
  1032. for (i = 0; i < tx_ring->count; i++) {
  1033. struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*tx_ring, i);
  1034. struct sk_buff *skb;
  1035. unsigned int skb_size = 1024;
  1036. skb = alloc_skb(skb_size, GFP_KERNEL);
  1037. if (!skb) {
  1038. ret_val = 3;
  1039. goto err_nomem;
  1040. }
  1041. skb_put(skb, skb_size);
  1042. tx_ring->buffer_info[i].skb = skb;
  1043. tx_ring->buffer_info[i].length = skb->len;
  1044. tx_ring->buffer_info[i].dma =
  1045. dma_map_single(&pdev->dev, skb->data, skb->len,
  1046. DMA_TO_DEVICE);
  1047. if (dma_mapping_error(&pdev->dev,
  1048. tx_ring->buffer_info[i].dma)) {
  1049. ret_val = 4;
  1050. goto err_nomem;
  1051. }
  1052. tx_desc->buffer_addr = cpu_to_le64(tx_ring->buffer_info[i].dma);
  1053. tx_desc->lower.data = cpu_to_le32(skb->len);
  1054. tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
  1055. E1000_TXD_CMD_IFCS |
  1056. E1000_TXD_CMD_RS);
  1057. tx_desc->upper.data = 0;
  1058. }
  1059. /* Setup Rx descriptor ring and Rx buffers */
  1060. if (!rx_ring->count)
  1061. rx_ring->count = E1000_DEFAULT_RXD;
  1062. rx_ring->buffer_info = kcalloc(rx_ring->count,
  1063. sizeof(struct e1000_buffer), GFP_KERNEL);
  1064. if (!rx_ring->buffer_info) {
  1065. ret_val = 5;
  1066. goto err_nomem;
  1067. }
  1068. rx_ring->size = rx_ring->count * sizeof(union e1000_rx_desc_extended);
  1069. rx_ring->desc = dma_alloc_coherent(&pdev->dev, rx_ring->size,
  1070. &rx_ring->dma, GFP_KERNEL);
  1071. if (!rx_ring->desc) {
  1072. ret_val = 6;
  1073. goto err_nomem;
  1074. }
  1075. rx_ring->next_to_use = 0;
  1076. rx_ring->next_to_clean = 0;
  1077. rctl = er32(RCTL);
  1078. if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
  1079. ew32(RCTL, rctl & ~E1000_RCTL_EN);
  1080. ew32(RDBAL(0), ((u64)rx_ring->dma & 0xFFFFFFFF));
  1081. ew32(RDBAH(0), ((u64)rx_ring->dma >> 32));
  1082. ew32(RDLEN(0), rx_ring->size);
  1083. ew32(RDH(0), 0);
  1084. ew32(RDT(0), 0);
  1085. rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
  1086. E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_LPE |
  1087. E1000_RCTL_SBP | E1000_RCTL_SECRC |
  1088. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1089. (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1090. ew32(RCTL, rctl);
  1091. for (i = 0; i < rx_ring->count; i++) {
  1092. union e1000_rx_desc_extended *rx_desc;
  1093. struct sk_buff *skb;
  1094. skb = alloc_skb(2048 + NET_IP_ALIGN, GFP_KERNEL);
  1095. if (!skb) {
  1096. ret_val = 7;
  1097. goto err_nomem;
  1098. }
  1099. skb_reserve(skb, NET_IP_ALIGN);
  1100. rx_ring->buffer_info[i].skb = skb;
  1101. rx_ring->buffer_info[i].dma =
  1102. dma_map_single(&pdev->dev, skb->data, 2048,
  1103. DMA_FROM_DEVICE);
  1104. if (dma_mapping_error(&pdev->dev,
  1105. rx_ring->buffer_info[i].dma)) {
  1106. ret_val = 8;
  1107. goto err_nomem;
  1108. }
  1109. rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
  1110. rx_desc->read.buffer_addr =
  1111. cpu_to_le64(rx_ring->buffer_info[i].dma);
  1112. memset(skb->data, 0x00, skb->len);
  1113. }
  1114. return 0;
  1115. err_nomem:
  1116. e1000_free_desc_rings(adapter);
  1117. return ret_val;
  1118. }
  1119. static void e1000_phy_disable_receiver(struct e1000_adapter *adapter)
  1120. {
  1121. /* Write out to PHY registers 29 and 30 to disable the Receiver. */
  1122. e1e_wphy(&adapter->hw, 29, 0x001F);
  1123. e1e_wphy(&adapter->hw, 30, 0x8FFC);
  1124. e1e_wphy(&adapter->hw, 29, 0x001A);
  1125. e1e_wphy(&adapter->hw, 30, 0x8FF0);
  1126. }
  1127. static int e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
  1128. {
  1129. struct e1000_hw *hw = &adapter->hw;
  1130. u32 ctrl_reg = 0;
  1131. u16 phy_reg = 0;
  1132. s32 ret_val = 0;
  1133. hw->mac.autoneg = 0;
  1134. if (hw->phy.type == e1000_phy_ife) {
  1135. /* force 100, set loopback */
  1136. e1e_wphy(hw, MII_BMCR, 0x6100);
  1137. /* Now set up the MAC to the same speed/duplex as the PHY. */
  1138. ctrl_reg = er32(CTRL);
  1139. ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
  1140. ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
  1141. E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
  1142. E1000_CTRL_SPD_100 |/* Force Speed to 100 */
  1143. E1000_CTRL_FD); /* Force Duplex to FULL */
  1144. ew32(CTRL, ctrl_reg);
  1145. e1e_flush();
  1146. usleep_range(500, 1000);
  1147. return 0;
  1148. }
  1149. /* Specific PHY configuration for loopback */
  1150. switch (hw->phy.type) {
  1151. case e1000_phy_m88:
  1152. /* Auto-MDI/MDIX Off */
  1153. e1e_wphy(hw, M88E1000_PHY_SPEC_CTRL, 0x0808);
  1154. /* reset to update Auto-MDI/MDIX */
  1155. e1e_wphy(hw, MII_BMCR, 0x9140);
  1156. /* autoneg off */
  1157. e1e_wphy(hw, MII_BMCR, 0x8140);
  1158. break;
  1159. case e1000_phy_gg82563:
  1160. e1e_wphy(hw, GG82563_PHY_KMRN_MODE_CTRL, 0x1CC);
  1161. break;
  1162. case e1000_phy_bm:
  1163. /* Set Default MAC Interface speed to 1GB */
  1164. e1e_rphy(hw, PHY_REG(2, 21), &phy_reg);
  1165. phy_reg &= ~0x0007;
  1166. phy_reg |= 0x006;
  1167. e1e_wphy(hw, PHY_REG(2, 21), phy_reg);
  1168. /* Assert SW reset for above settings to take effect */
  1169. hw->phy.ops.commit(hw);
  1170. usleep_range(1000, 2000);
  1171. /* Force Full Duplex */
  1172. e1e_rphy(hw, PHY_REG(769, 16), &phy_reg);
  1173. e1e_wphy(hw, PHY_REG(769, 16), phy_reg | 0x000C);
  1174. /* Set Link Up (in force link) */
  1175. e1e_rphy(hw, PHY_REG(776, 16), &phy_reg);
  1176. e1e_wphy(hw, PHY_REG(776, 16), phy_reg | 0x0040);
  1177. /* Force Link */
  1178. e1e_rphy(hw, PHY_REG(769, 16), &phy_reg);
  1179. e1e_wphy(hw, PHY_REG(769, 16), phy_reg | 0x0040);
  1180. /* Set Early Link Enable */
  1181. e1e_rphy(hw, PHY_REG(769, 20), &phy_reg);
  1182. e1e_wphy(hw, PHY_REG(769, 20), phy_reg | 0x0400);
  1183. break;
  1184. case e1000_phy_82577:
  1185. case e1000_phy_82578:
  1186. /* Workaround: K1 must be disabled for stable 1Gbps operation */
  1187. ret_val = hw->phy.ops.acquire(hw);
  1188. if (ret_val) {
  1189. e_err("Cannot setup 1Gbps loopback.\n");
  1190. return ret_val;
  1191. }
  1192. e1000_configure_k1_ich8lan(hw, false);
  1193. hw->phy.ops.release(hw);
  1194. break;
  1195. case e1000_phy_82579:
  1196. /* Disable PHY energy detect power down */
  1197. e1e_rphy(hw, PHY_REG(0, 21), &phy_reg);
  1198. e1e_wphy(hw, PHY_REG(0, 21), phy_reg & ~BIT(3));
  1199. /* Disable full chip energy detect */
  1200. e1e_rphy(hw, PHY_REG(776, 18), &phy_reg);
  1201. e1e_wphy(hw, PHY_REG(776, 18), phy_reg | 1);
  1202. /* Enable loopback on the PHY */
  1203. e1e_wphy(hw, I82577_PHY_LBK_CTRL, 0x8001);
  1204. break;
  1205. default:
  1206. break;
  1207. }
  1208. /* force 1000, set loopback */
  1209. e1e_wphy(hw, MII_BMCR, 0x4140);
  1210. msleep(250);
  1211. /* Now set up the MAC to the same speed/duplex as the PHY. */
  1212. ctrl_reg = er32(CTRL);
  1213. ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
  1214. ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
  1215. E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
  1216. E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
  1217. E1000_CTRL_FD); /* Force Duplex to FULL */
  1218. if (adapter->flags & FLAG_IS_ICH)
  1219. ctrl_reg |= E1000_CTRL_SLU; /* Set Link Up */
  1220. if (hw->phy.media_type == e1000_media_type_copper &&
  1221. hw->phy.type == e1000_phy_m88) {
  1222. ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
  1223. } else {
  1224. /* Set the ILOS bit on the fiber Nic if half duplex link is
  1225. * detected.
  1226. */
  1227. if ((er32(STATUS) & E1000_STATUS_FD) == 0)
  1228. ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
  1229. }
  1230. ew32(CTRL, ctrl_reg);
  1231. /* Disable the receiver on the PHY so when a cable is plugged in, the
  1232. * PHY does not begin to autoneg when a cable is reconnected to the NIC.
  1233. */
  1234. if (hw->phy.type == e1000_phy_m88)
  1235. e1000_phy_disable_receiver(adapter);
  1236. usleep_range(500, 1000);
  1237. return 0;
  1238. }
  1239. static int e1000_set_82571_fiber_loopback(struct e1000_adapter *adapter)
  1240. {
  1241. struct e1000_hw *hw = &adapter->hw;
  1242. u32 ctrl = er32(CTRL);
  1243. int link;
  1244. /* special requirements for 82571/82572 fiber adapters */
  1245. /* jump through hoops to make sure link is up because serdes
  1246. * link is hardwired up
  1247. */
  1248. ctrl |= E1000_CTRL_SLU;
  1249. ew32(CTRL, ctrl);
  1250. /* disable autoneg */
  1251. ctrl = er32(TXCW);
  1252. ctrl &= ~BIT(31);
  1253. ew32(TXCW, ctrl);
  1254. link = (er32(STATUS) & E1000_STATUS_LU);
  1255. if (!link) {
  1256. /* set invert loss of signal */
  1257. ctrl = er32(CTRL);
  1258. ctrl |= E1000_CTRL_ILOS;
  1259. ew32(CTRL, ctrl);
  1260. }
  1261. /* special write to serdes control register to enable SerDes analog
  1262. * loopback
  1263. */
  1264. ew32(SCTL, E1000_SCTL_ENABLE_SERDES_LOOPBACK);
  1265. e1e_flush();
  1266. usleep_range(10000, 11000);
  1267. return 0;
  1268. }
  1269. /* only call this for fiber/serdes connections to es2lan */
  1270. static int e1000_set_es2lan_mac_loopback(struct e1000_adapter *adapter)
  1271. {
  1272. struct e1000_hw *hw = &adapter->hw;
  1273. u32 ctrlext = er32(CTRL_EXT);
  1274. u32 ctrl = er32(CTRL);
  1275. /* save CTRL_EXT to restore later, reuse an empty variable (unused
  1276. * on mac_type 80003es2lan)
  1277. */
  1278. adapter->tx_fifo_head = ctrlext;
  1279. /* clear the serdes mode bits, putting the device into mac loopback */
  1280. ctrlext &= ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
  1281. ew32(CTRL_EXT, ctrlext);
  1282. /* force speed to 1000/FD, link up */
  1283. ctrl &= ~(E1000_CTRL_SPD_1000 | E1000_CTRL_SPD_100);
  1284. ctrl |= (E1000_CTRL_SLU | E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX |
  1285. E1000_CTRL_SPD_1000 | E1000_CTRL_FD);
  1286. ew32(CTRL, ctrl);
  1287. /* set mac loopback */
  1288. ctrl = er32(RCTL);
  1289. ctrl |= E1000_RCTL_LBM_MAC;
  1290. ew32(RCTL, ctrl);
  1291. /* set testing mode parameters (no need to reset later) */
  1292. #define KMRNCTRLSTA_OPMODE (0x1F << 16)
  1293. #define KMRNCTRLSTA_OPMODE_1GB_FD_GMII 0x0582
  1294. ew32(KMRNCTRLSTA,
  1295. (KMRNCTRLSTA_OPMODE | KMRNCTRLSTA_OPMODE_1GB_FD_GMII));
  1296. return 0;
  1297. }
  1298. static int e1000_setup_loopback_test(struct e1000_adapter *adapter)
  1299. {
  1300. struct e1000_hw *hw = &adapter->hw;
  1301. u32 rctl, fext_nvm11, tarc0;
  1302. if (hw->mac.type >= e1000_pch_spt) {
  1303. fext_nvm11 = er32(FEXTNVM11);
  1304. fext_nvm11 |= E1000_FEXTNVM11_DISABLE_MULR_FIX;
  1305. ew32(FEXTNVM11, fext_nvm11);
  1306. tarc0 = er32(TARC(0));
  1307. /* clear bits 28 & 29 (control of MULR concurrent requests) */
  1308. tarc0 &= 0xcfffffff;
  1309. /* set bit 29 (value of MULR requests is now 2) */
  1310. tarc0 |= 0x20000000;
  1311. ew32(TARC(0), tarc0);
  1312. }
  1313. if (hw->phy.media_type == e1000_media_type_fiber ||
  1314. hw->phy.media_type == e1000_media_type_internal_serdes) {
  1315. switch (hw->mac.type) {
  1316. case e1000_80003es2lan:
  1317. return e1000_set_es2lan_mac_loopback(adapter);
  1318. case e1000_82571:
  1319. case e1000_82572:
  1320. return e1000_set_82571_fiber_loopback(adapter);
  1321. default:
  1322. rctl = er32(RCTL);
  1323. rctl |= E1000_RCTL_LBM_TCVR;
  1324. ew32(RCTL, rctl);
  1325. return 0;
  1326. }
  1327. } else if (hw->phy.media_type == e1000_media_type_copper) {
  1328. return e1000_integrated_phy_loopback(adapter);
  1329. }
  1330. return 7;
  1331. }
  1332. static void e1000_loopback_cleanup(struct e1000_adapter *adapter)
  1333. {
  1334. struct e1000_hw *hw = &adapter->hw;
  1335. u32 rctl, fext_nvm11, tarc0;
  1336. u16 phy_reg;
  1337. rctl = er32(RCTL);
  1338. rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
  1339. ew32(RCTL, rctl);
  1340. switch (hw->mac.type) {
  1341. case e1000_pch_spt:
  1342. case e1000_pch_cnp:
  1343. case e1000_pch_tgp:
  1344. case e1000_pch_adp:
  1345. fext_nvm11 = er32(FEXTNVM11);
  1346. fext_nvm11 &= ~E1000_FEXTNVM11_DISABLE_MULR_FIX;
  1347. ew32(FEXTNVM11, fext_nvm11);
  1348. tarc0 = er32(TARC(0));
  1349. /* clear bits 28 & 29 (control of MULR concurrent requests) */
  1350. /* set bit 29 (value of MULR requests is now 0) */
  1351. tarc0 &= 0xcfffffff;
  1352. ew32(TARC(0), tarc0);
  1353. /* fall through */
  1354. case e1000_80003es2lan:
  1355. if (hw->phy.media_type == e1000_media_type_fiber ||
  1356. hw->phy.media_type == e1000_media_type_internal_serdes) {
  1357. /* restore CTRL_EXT, stealing space from tx_fifo_head */
  1358. ew32(CTRL_EXT, adapter->tx_fifo_head);
  1359. adapter->tx_fifo_head = 0;
  1360. }
  1361. /* fall through */
  1362. case e1000_82571:
  1363. case e1000_82572:
  1364. if (hw->phy.media_type == e1000_media_type_fiber ||
  1365. hw->phy.media_type == e1000_media_type_internal_serdes) {
  1366. ew32(SCTL, E1000_SCTL_DISABLE_SERDES_LOOPBACK);
  1367. e1e_flush();
  1368. usleep_range(10000, 11000);
  1369. break;
  1370. }
  1371. /* Fall Through */
  1372. default:
  1373. hw->mac.autoneg = 1;
  1374. if (hw->phy.type == e1000_phy_gg82563)
  1375. e1e_wphy(hw, GG82563_PHY_KMRN_MODE_CTRL, 0x180);
  1376. e1e_rphy(hw, MII_BMCR, &phy_reg);
  1377. if (phy_reg & BMCR_LOOPBACK) {
  1378. phy_reg &= ~BMCR_LOOPBACK;
  1379. e1e_wphy(hw, MII_BMCR, phy_reg);
  1380. if (hw->phy.ops.commit)
  1381. hw->phy.ops.commit(hw);
  1382. }
  1383. break;
  1384. }
  1385. }
  1386. static void e1000_create_lbtest_frame(struct sk_buff *skb,
  1387. unsigned int frame_size)
  1388. {
  1389. memset(skb->data, 0xFF, frame_size);
  1390. frame_size &= ~1;
  1391. memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
  1392. memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
  1393. memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
  1394. }
  1395. static int e1000_check_lbtest_frame(struct sk_buff *skb,
  1396. unsigned int frame_size)
  1397. {
  1398. frame_size &= ~1;
  1399. if (*(skb->data + 3) == 0xFF)
  1400. if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
  1401. (*(skb->data + frame_size / 2 + 12) == 0xAF))
  1402. return 0;
  1403. return 13;
  1404. }
  1405. static int e1000_run_loopback_test(struct e1000_adapter *adapter)
  1406. {
  1407. struct e1000_ring *tx_ring = &adapter->test_tx_ring;
  1408. struct e1000_ring *rx_ring = &adapter->test_rx_ring;
  1409. struct pci_dev *pdev = adapter->pdev;
  1410. struct e1000_hw *hw = &adapter->hw;
  1411. struct e1000_buffer *buffer_info;
  1412. int i, j, k, l;
  1413. int lc;
  1414. int good_cnt;
  1415. int ret_val = 0;
  1416. unsigned long time;
  1417. ew32(RDT(0), rx_ring->count - 1);
  1418. /* Calculate the loop count based on the largest descriptor ring
  1419. * The idea is to wrap the largest ring a number of times using 64
  1420. * send/receive pairs during each loop
  1421. */
  1422. if (rx_ring->count <= tx_ring->count)
  1423. lc = ((tx_ring->count / 64) * 2) + 1;
  1424. else
  1425. lc = ((rx_ring->count / 64) * 2) + 1;
  1426. k = 0;
  1427. l = 0;
  1428. /* loop count loop */
  1429. for (j = 0; j <= lc; j++) {
  1430. /* send the packets */
  1431. for (i = 0; i < 64; i++) {
  1432. buffer_info = &tx_ring->buffer_info[k];
  1433. e1000_create_lbtest_frame(buffer_info->skb, 1024);
  1434. dma_sync_single_for_device(&pdev->dev,
  1435. buffer_info->dma,
  1436. buffer_info->length,
  1437. DMA_TO_DEVICE);
  1438. k++;
  1439. if (k == tx_ring->count)
  1440. k = 0;
  1441. }
  1442. ew32(TDT(0), k);
  1443. e1e_flush();
  1444. msleep(200);
  1445. time = jiffies; /* set the start time for the receive */
  1446. good_cnt = 0;
  1447. /* receive the sent packets */
  1448. do {
  1449. buffer_info = &rx_ring->buffer_info[l];
  1450. dma_sync_single_for_cpu(&pdev->dev,
  1451. buffer_info->dma, 2048,
  1452. DMA_FROM_DEVICE);
  1453. ret_val = e1000_check_lbtest_frame(buffer_info->skb,
  1454. 1024);
  1455. if (!ret_val)
  1456. good_cnt++;
  1457. l++;
  1458. if (l == rx_ring->count)
  1459. l = 0;
  1460. /* time + 20 msecs (200 msecs on 2.4) is more than
  1461. * enough time to complete the receives, if it's
  1462. * exceeded, break and error off
  1463. */
  1464. } while ((good_cnt < 64) && !time_after(jiffies, time + 20));
  1465. if (good_cnt != 64) {
  1466. ret_val = 13; /* ret_val is the same as mis-compare */
  1467. break;
  1468. }
  1469. if (time_after(jiffies, time + 20)) {
  1470. ret_val = 14; /* error code for time out error */
  1471. break;
  1472. }
  1473. }
  1474. return ret_val;
  1475. }
  1476. static int e1000_loopback_test(struct e1000_adapter *adapter, u64 *data)
  1477. {
  1478. struct e1000_hw *hw = &adapter->hw;
  1479. /* PHY loopback cannot be performed if SoL/IDER sessions are active */
  1480. if (hw->phy.ops.check_reset_block &&
  1481. hw->phy.ops.check_reset_block(hw)) {
  1482. e_err("Cannot do PHY loopback test when SoL/IDER is active.\n");
  1483. *data = 0;
  1484. goto out;
  1485. }
  1486. *data = e1000_setup_desc_rings(adapter);
  1487. if (*data)
  1488. goto out;
  1489. *data = e1000_setup_loopback_test(adapter);
  1490. if (*data)
  1491. goto err_loopback;
  1492. *data = e1000_run_loopback_test(adapter);
  1493. e1000_loopback_cleanup(adapter);
  1494. err_loopback:
  1495. e1000_free_desc_rings(adapter);
  1496. out:
  1497. return *data;
  1498. }
  1499. static int e1000_link_test(struct e1000_adapter *adapter, u64 *data)
  1500. {
  1501. struct e1000_hw *hw = &adapter->hw;
  1502. *data = 0;
  1503. if (hw->phy.media_type == e1000_media_type_internal_serdes) {
  1504. int i = 0;
  1505. hw->mac.serdes_has_link = false;
  1506. /* On some blade server designs, link establishment
  1507. * could take as long as 2-3 minutes
  1508. */
  1509. do {
  1510. hw->mac.ops.check_for_link(hw);
  1511. if (hw->mac.serdes_has_link)
  1512. return *data;
  1513. msleep(20);
  1514. } while (i++ < 3750);
  1515. *data = 1;
  1516. } else {
  1517. hw->mac.ops.check_for_link(hw);
  1518. if (hw->mac.autoneg)
  1519. /* On some Phy/switch combinations, link establishment
  1520. * can take a few seconds more than expected.
  1521. */
  1522. msleep_interruptible(5000);
  1523. if (!(er32(STATUS) & E1000_STATUS_LU))
  1524. *data = 1;
  1525. }
  1526. return *data;
  1527. }
  1528. static int e1000e_get_sset_count(struct net_device __always_unused *netdev,
  1529. int sset)
  1530. {
  1531. switch (sset) {
  1532. case ETH_SS_TEST:
  1533. return E1000_TEST_LEN;
  1534. case ETH_SS_STATS:
  1535. return E1000_STATS_LEN;
  1536. default:
  1537. return -EOPNOTSUPP;
  1538. }
  1539. }
  1540. static void e1000_diag_test(struct net_device *netdev,
  1541. struct ethtool_test *eth_test, u64 *data)
  1542. {
  1543. struct e1000_adapter *adapter = netdev_priv(netdev);
  1544. u16 autoneg_advertised;
  1545. u8 forced_speed_duplex;
  1546. u8 autoneg;
  1547. bool if_running = netif_running(netdev);
  1548. pm_runtime_get_sync(netdev->dev.parent);
  1549. set_bit(__E1000_TESTING, &adapter->state);
  1550. if (!if_running) {
  1551. /* Get control of and reset hardware */
  1552. if (adapter->flags & FLAG_HAS_AMT)
  1553. e1000e_ge