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/drivers/net/ethernet/broadcom/cnic_defs.h

http://github.com/mirrors/linux
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   1
   2/* cnic.c: QLogic CNIC core network driver.
   3 *
   4 * Copyright (c) 2006-2014 Broadcom Corporation
   5 * Copyright (c) 2014 QLogic Corporation
   6 *
   7 * This program is free software; you can redistribute it and/or modify
   8 * it under the terms of the GNU General Public License as published by
   9 * the Free Software Foundation.
  10 *
  11 */
  12
  13#ifndef CNIC_DEFS_H
  14#define CNIC_DEFS_H
  15
  16/* KWQ (kernel work queue) request op codes */
  17#define L2_KWQE_OPCODE_VALUE_FLUSH                  (4)
  18#define L2_KWQE_OPCODE_VALUE_VM_FREE_RX_QUEUE       (8)
  19
  20#define L4_KWQE_OPCODE_VALUE_CONNECT1               (50)
  21#define L4_KWQE_OPCODE_VALUE_CONNECT2               (51)
  22#define L4_KWQE_OPCODE_VALUE_CONNECT3               (52)
  23#define L4_KWQE_OPCODE_VALUE_RESET                  (53)
  24#define L4_KWQE_OPCODE_VALUE_CLOSE                  (54)
  25#define L4_KWQE_OPCODE_VALUE_UPDATE_SECRET          (60)
  26#define L4_KWQE_OPCODE_VALUE_INIT_ULP               (61)
  27
  28#define L4_KWQE_OPCODE_VALUE_OFFLOAD_PG             (1)
  29#define L4_KWQE_OPCODE_VALUE_UPDATE_PG              (9)
  30#define L4_KWQE_OPCODE_VALUE_UPLOAD_PG              (14)
  31
  32#define L5CM_RAMROD_CMD_ID_BASE			(0x80)
  33#define L5CM_RAMROD_CMD_ID_TCP_CONNECT		(L5CM_RAMROD_CMD_ID_BASE + 3)
  34#define L5CM_RAMROD_CMD_ID_CLOSE		(L5CM_RAMROD_CMD_ID_BASE + 12)
  35#define L5CM_RAMROD_CMD_ID_ABORT		(L5CM_RAMROD_CMD_ID_BASE + 13)
  36#define L5CM_RAMROD_CMD_ID_SEARCHER_DELETE	(L5CM_RAMROD_CMD_ID_BASE + 14)
  37#define L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD	(L5CM_RAMROD_CMD_ID_BASE + 15)
  38
  39#define FCOE_RAMROD_CMD_ID_INIT_FUNC		(FCOE_KCQE_OPCODE_INIT_FUNC)
  40#define FCOE_RAMROD_CMD_ID_DESTROY_FUNC		(FCOE_KCQE_OPCODE_DESTROY_FUNC)
  41#define FCOE_RAMROD_CMD_ID_STAT_FUNC		(FCOE_KCQE_OPCODE_STAT_FUNC)
  42#define FCOE_RAMROD_CMD_ID_OFFLOAD_CONN		(FCOE_KCQE_OPCODE_OFFLOAD_CONN)
  43#define FCOE_RAMROD_CMD_ID_ENABLE_CONN		(FCOE_KCQE_OPCODE_ENABLE_CONN)
  44#define FCOE_RAMROD_CMD_ID_DISABLE_CONN		(FCOE_KCQE_OPCODE_DISABLE_CONN)
  45#define FCOE_RAMROD_CMD_ID_DESTROY_CONN		(FCOE_KCQE_OPCODE_DESTROY_CONN)
  46#define FCOE_RAMROD_CMD_ID_TERMINATE_CONN	(0x81)
  47
  48/* KCQ (kernel completion queue) response op codes */
  49#define L4_KCQE_OPCODE_VALUE_CLOSE_COMP             (53)
  50#define L4_KCQE_OPCODE_VALUE_RESET_COMP             (54)
  51#define L4_KCQE_OPCODE_VALUE_FW_TCP_UPDATE          (55)
  52#define L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE       (56)
  53#define L4_KCQE_OPCODE_VALUE_RESET_RECEIVED         (57)
  54#define L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED         (58)
  55#define L4_KCQE_OPCODE_VALUE_INIT_ULP               (61)
  56
  57#define L4_KCQE_OPCODE_VALUE_OFFLOAD_PG             (1)
  58#define L4_KCQE_OPCODE_VALUE_UPDATE_PG              (9)
  59#define L4_KCQE_OPCODE_VALUE_UPLOAD_PG              (14)
  60
  61/* KCQ (kernel completion queue) completion status */
  62#define L4_KCQE_COMPLETION_STATUS_SUCCESS           (0)
  63#define L4_KCQE_COMPLETION_STATUS_NIC_ERROR         (4)
  64#define L4_KCQE_COMPLETION_STATUS_PARITY_ERROR	    (0x81)
  65#define L4_KCQE_COMPLETION_STATUS_TIMEOUT           (0x93)
  66
  67#define L4_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAIL    (0x83)
  68#define L4_KCQE_COMPLETION_STATUS_OFFLOADED_PG      (0x89)
  69
  70#define L4_KCQE_OPCODE_VALUE_OOO_EVENT_NOTIFICATION (0xa0)
  71#define L4_KCQE_OPCODE_VALUE_OOO_FLUSH              (0xa1)
  72
  73#define L4_LAYER_CODE (4)
  74#define L2_LAYER_CODE (2)
  75
  76/*
  77 * L4 KCQ CQE
  78 */
  79struct l4_kcq {
  80	u32 cid;
  81	u32 pg_cid;
  82	u32 conn_id;
  83	u32 pg_host_opaque;
  84#if defined(__BIG_ENDIAN)
  85	u16 status;
  86	u16 reserved1;
  87#elif defined(__LITTLE_ENDIAN)
  88	u16 reserved1;
  89	u16 status;
  90#endif
  91	u32 reserved2[2];
  92#if defined(__BIG_ENDIAN)
  93	u8 flags;
  94#define L4_KCQ_RESERVED3 (0x7<<0)
  95#define L4_KCQ_RESERVED3_SHIFT 0
  96#define L4_KCQ_RAMROD_COMPLETION (0x1<<3) /* Everest only */
  97#define L4_KCQ_RAMROD_COMPLETION_SHIFT 3
  98#define L4_KCQ_LAYER_CODE (0x7<<4)
  99#define L4_KCQ_LAYER_CODE_SHIFT 4
 100#define L4_KCQ_RESERVED4 (0x1<<7)
 101#define L4_KCQ_RESERVED4_SHIFT 7
 102	u8 op_code;
 103	u16 qe_self_seq;
 104#elif defined(__LITTLE_ENDIAN)
 105	u16 qe_self_seq;
 106	u8 op_code;
 107	u8 flags;
 108#define L4_KCQ_RESERVED3 (0xF<<0)
 109#define L4_KCQ_RESERVED3_SHIFT 0
 110#define L4_KCQ_RAMROD_COMPLETION (0x1<<3) /* Everest only */
 111#define L4_KCQ_RAMROD_COMPLETION_SHIFT 3
 112#define L4_KCQ_LAYER_CODE (0x7<<4)
 113#define L4_KCQ_LAYER_CODE_SHIFT 4
 114#define L4_KCQ_RESERVED4 (0x1<<7)
 115#define L4_KCQ_RESERVED4_SHIFT 7
 116#endif
 117};
 118
 119
 120/*
 121 * L4 KCQ CQE PG upload
 122 */
 123struct l4_kcq_upload_pg {
 124	u32 pg_cid;
 125#if defined(__BIG_ENDIAN)
 126	u16 pg_status;
 127	u16 pg_ipid_count;
 128#elif defined(__LITTLE_ENDIAN)
 129	u16 pg_ipid_count;
 130	u16 pg_status;
 131#endif
 132	u32 reserved1[5];
 133#if defined(__BIG_ENDIAN)
 134	u8 flags;
 135#define L4_KCQ_UPLOAD_PG_RESERVED3 (0xF<<0)
 136#define L4_KCQ_UPLOAD_PG_RESERVED3_SHIFT 0
 137#define L4_KCQ_UPLOAD_PG_LAYER_CODE (0x7<<4)
 138#define L4_KCQ_UPLOAD_PG_LAYER_CODE_SHIFT 4
 139#define L4_KCQ_UPLOAD_PG_RESERVED4 (0x1<<7)
 140#define L4_KCQ_UPLOAD_PG_RESERVED4_SHIFT 7
 141	u8 op_code;
 142	u16 qe_self_seq;
 143#elif defined(__LITTLE_ENDIAN)
 144	u16 qe_self_seq;
 145	u8 op_code;
 146	u8 flags;
 147#define L4_KCQ_UPLOAD_PG_RESERVED3 (0xF<<0)
 148#define L4_KCQ_UPLOAD_PG_RESERVED3_SHIFT 0
 149#define L4_KCQ_UPLOAD_PG_LAYER_CODE (0x7<<4)
 150#define L4_KCQ_UPLOAD_PG_LAYER_CODE_SHIFT 4
 151#define L4_KCQ_UPLOAD_PG_RESERVED4 (0x1<<7)
 152#define L4_KCQ_UPLOAD_PG_RESERVED4_SHIFT 7
 153#endif
 154};
 155
 156
 157/*
 158 * Gracefully close the connection request
 159 */
 160struct l4_kwq_close_req {
 161#if defined(__BIG_ENDIAN)
 162	u8 flags;
 163#define L4_KWQ_CLOSE_REQ_RESERVED1 (0xF<<0)
 164#define L4_KWQ_CLOSE_REQ_RESERVED1_SHIFT 0
 165#define L4_KWQ_CLOSE_REQ_LAYER_CODE (0x7<<4)
 166#define L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT 4
 167#define L4_KWQ_CLOSE_REQ_LINKED_WITH_NEXT (0x1<<7)
 168#define L4_KWQ_CLOSE_REQ_LINKED_WITH_NEXT_SHIFT 7
 169	u8 op_code;
 170	u16 reserved0;
 171#elif defined(__LITTLE_ENDIAN)
 172	u16 reserved0;
 173	u8 op_code;
 174	u8 flags;
 175#define L4_KWQ_CLOSE_REQ_RESERVED1 (0xF<<0)
 176#define L4_KWQ_CLOSE_REQ_RESERVED1_SHIFT 0
 177#define L4_KWQ_CLOSE_REQ_LAYER_CODE (0x7<<4)
 178#define L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT 4
 179#define L4_KWQ_CLOSE_REQ_LINKED_WITH_NEXT (0x1<<7)
 180#define L4_KWQ_CLOSE_REQ_LINKED_WITH_NEXT_SHIFT 7
 181#endif
 182	u32 cid;
 183	u32 reserved2[6];
 184};
 185
 186
 187/*
 188 * The first request to be passed in order to establish connection in option2
 189 */
 190struct l4_kwq_connect_req1 {
 191#if defined(__BIG_ENDIAN)
 192	u8 flags;
 193#define L4_KWQ_CONNECT_REQ1_RESERVED1 (0xF<<0)
 194#define L4_KWQ_CONNECT_REQ1_RESERVED1_SHIFT 0
 195#define L4_KWQ_CONNECT_REQ1_LAYER_CODE (0x7<<4)
 196#define L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT 4
 197#define L4_KWQ_CONNECT_REQ1_LINKED_WITH_NEXT (0x1<<7)
 198#define L4_KWQ_CONNECT_REQ1_LINKED_WITH_NEXT_SHIFT 7
 199	u8 op_code;
 200	u8 reserved0;
 201	u8 conn_flags;
 202#define L4_KWQ_CONNECT_REQ1_IS_PG_HOST_OPAQUE (0x1<<0)
 203#define L4_KWQ_CONNECT_REQ1_IS_PG_HOST_OPAQUE_SHIFT 0
 204#define L4_KWQ_CONNECT_REQ1_IP_V6 (0x1<<1)
 205#define L4_KWQ_CONNECT_REQ1_IP_V6_SHIFT 1
 206#define L4_KWQ_CONNECT_REQ1_PASSIVE_FLAG (0x1<<2)
 207#define L4_KWQ_CONNECT_REQ1_PASSIVE_FLAG_SHIFT 2
 208#define L4_KWQ_CONNECT_REQ1_RSRV (0x1F<<3)
 209#define L4_KWQ_CONNECT_REQ1_RSRV_SHIFT 3
 210#elif defined(__LITTLE_ENDIAN)
 211	u8 conn_flags;
 212#define L4_KWQ_CONNECT_REQ1_IS_PG_HOST_OPAQUE (0x1<<0)
 213#define L4_KWQ_CONNECT_REQ1_IS_PG_HOST_OPAQUE_SHIFT 0
 214#define L4_KWQ_CONNECT_REQ1_IP_V6 (0x1<<1)
 215#define L4_KWQ_CONNECT_REQ1_IP_V6_SHIFT 1
 216#define L4_KWQ_CONNECT_REQ1_PASSIVE_FLAG (0x1<<2)
 217#define L4_KWQ_CONNECT_REQ1_PASSIVE_FLAG_SHIFT 2
 218#define L4_KWQ_CONNECT_REQ1_RSRV (0x1F<<3)
 219#define L4_KWQ_CONNECT_REQ1_RSRV_SHIFT 3
 220	u8 reserved0;
 221	u8 op_code;
 222	u8 flags;
 223#define L4_KWQ_CONNECT_REQ1_RESERVED1 (0xF<<0)
 224#define L4_KWQ_CONNECT_REQ1_RESERVED1_SHIFT 0
 225#define L4_KWQ_CONNECT_REQ1_LAYER_CODE (0x7<<4)
 226#define L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT 4
 227#define L4_KWQ_CONNECT_REQ1_LINKED_WITH_NEXT (0x1<<7)
 228#define L4_KWQ_CONNECT_REQ1_LINKED_WITH_NEXT_SHIFT 7
 229#endif
 230	u32 cid;
 231	u32 pg_cid;
 232	u32 src_ip;
 233	u32 dst_ip;
 234#if defined(__BIG_ENDIAN)
 235	u16 dst_port;
 236	u16 src_port;
 237#elif defined(__LITTLE_ENDIAN)
 238	u16 src_port;
 239	u16 dst_port;
 240#endif
 241#if defined(__BIG_ENDIAN)
 242	u8 rsrv1[3];
 243	u8 tcp_flags;
 244#define L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK (0x1<<0)
 245#define L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK_SHIFT 0
 246#define L4_KWQ_CONNECT_REQ1_KEEP_ALIVE (0x1<<1)
 247#define L4_KWQ_CONNECT_REQ1_KEEP_ALIVE_SHIFT 1
 248#define L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE (0x1<<2)
 249#define L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE_SHIFT 2
 250#define L4_KWQ_CONNECT_REQ1_TIME_STAMP (0x1<<3)
 251#define L4_KWQ_CONNECT_REQ1_TIME_STAMP_SHIFT 3
 252#define L4_KWQ_CONNECT_REQ1_SACK (0x1<<4)
 253#define L4_KWQ_CONNECT_REQ1_SACK_SHIFT 4
 254#define L4_KWQ_CONNECT_REQ1_SEG_SCALING (0x1<<5)
 255#define L4_KWQ_CONNECT_REQ1_SEG_SCALING_SHIFT 5
 256#define L4_KWQ_CONNECT_REQ1_RESERVED2 (0x3<<6)
 257#define L4_KWQ_CONNECT_REQ1_RESERVED2_SHIFT 6
 258#elif defined(__LITTLE_ENDIAN)
 259	u8 tcp_flags;
 260#define L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK (0x1<<0)
 261#define L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK_SHIFT 0
 262#define L4_KWQ_CONNECT_REQ1_KEEP_ALIVE (0x1<<1)
 263#define L4_KWQ_CONNECT_REQ1_KEEP_ALIVE_SHIFT 1
 264#define L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE (0x1<<2)
 265#define L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE_SHIFT 2
 266#define L4_KWQ_CONNECT_REQ1_TIME_STAMP (0x1<<3)
 267#define L4_KWQ_CONNECT_REQ1_TIME_STAMP_SHIFT 3
 268#define L4_KWQ_CONNECT_REQ1_SACK (0x1<<4)
 269#define L4_KWQ_CONNECT_REQ1_SACK_SHIFT 4
 270#define L4_KWQ_CONNECT_REQ1_SEG_SCALING (0x1<<5)
 271#define L4_KWQ_CONNECT_REQ1_SEG_SCALING_SHIFT 5
 272#define L4_KWQ_CONNECT_REQ1_RESERVED2 (0x3<<6)
 273#define L4_KWQ_CONNECT_REQ1_RESERVED2_SHIFT 6
 274	u8 rsrv1[3];
 275#endif
 276	u32 rsrv2;
 277};
 278
 279
 280/*
 281 * The second ( optional )request to be passed in order to establish
 282 * connection in option2 - for IPv6 only
 283 */
 284struct l4_kwq_connect_req2 {
 285#if defined(__BIG_ENDIAN)
 286	u8 flags;
 287#define L4_KWQ_CONNECT_REQ2_RESERVED1 (0xF<<0)
 288#define L4_KWQ_CONNECT_REQ2_RESERVED1_SHIFT 0
 289#define L4_KWQ_CONNECT_REQ2_LAYER_CODE (0x7<<4)
 290#define L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT 4
 291#define L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT (0x1<<7)
 292#define L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT_SHIFT 7
 293	u8 op_code;
 294	u8 reserved0;
 295	u8 rsrv;
 296#elif defined(__LITTLE_ENDIAN)
 297	u8 rsrv;
 298	u8 reserved0;
 299	u8 op_code;
 300	u8 flags;
 301#define L4_KWQ_CONNECT_REQ2_RESERVED1 (0xF<<0)
 302#define L4_KWQ_CONNECT_REQ2_RESERVED1_SHIFT 0
 303#define L4_KWQ_CONNECT_REQ2_LAYER_CODE (0x7<<4)
 304#define L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT 4
 305#define L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT (0x1<<7)
 306#define L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT_SHIFT 7
 307#endif
 308	u32 reserved2;
 309	u32 src_ip_v6_2;
 310	u32 src_ip_v6_3;
 311	u32 src_ip_v6_4;
 312	u32 dst_ip_v6_2;
 313	u32 dst_ip_v6_3;
 314	u32 dst_ip_v6_4;
 315};
 316
 317
 318/*
 319 * The third ( and last )request to be passed in order to establish
 320 * connection in option2
 321 */
 322struct l4_kwq_connect_req3 {
 323#if defined(__BIG_ENDIAN)
 324	u8 flags;
 325#define L4_KWQ_CONNECT_REQ3_RESERVED1 (0xF<<0)
 326#define L4_KWQ_CONNECT_REQ3_RESERVED1_SHIFT 0
 327#define L4_KWQ_CONNECT_REQ3_LAYER_CODE (0x7<<4)
 328#define L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT 4
 329#define L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT (0x1<<7)
 330#define L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT_SHIFT 7
 331	u8 op_code;
 332	u16 reserved0;
 333#elif defined(__LITTLE_ENDIAN)
 334	u16 reserved0;
 335	u8 op_code;
 336	u8 flags;
 337#define L4_KWQ_CONNECT_REQ3_RESERVED1 (0xF<<0)
 338#define L4_KWQ_CONNECT_REQ3_RESERVED1_SHIFT 0
 339#define L4_KWQ_CONNECT_REQ3_LAYER_CODE (0x7<<4)
 340#define L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT 4
 341#define L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT (0x1<<7)
 342#define L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT_SHIFT 7
 343#endif
 344	u32 ka_timeout;
 345	u32 ka_interval ;
 346#if defined(__BIG_ENDIAN)
 347	u8 snd_seq_scale;
 348	u8 ttl;
 349	u8 tos;
 350	u8 ka_max_probe_count;
 351#elif defined(__LITTLE_ENDIAN)
 352	u8 ka_max_probe_count;
 353	u8 tos;
 354	u8 ttl;
 355	u8 snd_seq_scale;
 356#endif
 357#if defined(__BIG_ENDIAN)
 358	u16 pmtu;
 359	u16 mss;
 360#elif defined(__LITTLE_ENDIAN)
 361	u16 mss;
 362	u16 pmtu;
 363#endif
 364	u32 rcv_buf;
 365	u32 snd_buf;
 366	u32 seed;
 367};
 368
 369
 370/*
 371 * a KWQE request to offload a PG connection
 372 */
 373struct l4_kwq_offload_pg {
 374#if defined(__BIG_ENDIAN)
 375	u8 flags;
 376#define L4_KWQ_OFFLOAD_PG_RESERVED1 (0xF<<0)
 377#define L4_KWQ_OFFLOAD_PG_RESERVED1_SHIFT 0
 378#define L4_KWQ_OFFLOAD_PG_LAYER_CODE (0x7<<4)
 379#define L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT 4
 380#define L4_KWQ_OFFLOAD_PG_LINKED_WITH_NEXT (0x1<<7)
 381#define L4_KWQ_OFFLOAD_PG_LINKED_WITH_NEXT_SHIFT 7
 382	u8 op_code;
 383	u16 reserved0;
 384#elif defined(__LITTLE_ENDIAN)
 385	u16 reserved0;
 386	u8 op_code;
 387	u8 flags;
 388#define L4_KWQ_OFFLOAD_PG_RESERVED1 (0xF<<0)
 389#define L4_KWQ_OFFLOAD_PG_RESERVED1_SHIFT 0
 390#define L4_KWQ_OFFLOAD_PG_LAYER_CODE (0x7<<4)
 391#define L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT 4
 392#define L4_KWQ_OFFLOAD_PG_LINKED_WITH_NEXT (0x1<<7)
 393#define L4_KWQ_OFFLOAD_PG_LINKED_WITH_NEXT_SHIFT 7
 394#endif
 395#if defined(__BIG_ENDIAN)
 396	u8 l2hdr_nbytes;
 397	u8 pg_flags;
 398#define L4_KWQ_OFFLOAD_PG_SNAP_ENCAP (0x1<<0)
 399#define L4_KWQ_OFFLOAD_PG_SNAP_ENCAP_SHIFT 0
 400#define L4_KWQ_OFFLOAD_PG_VLAN_TAGGING (0x1<<1)
 401#define L4_KWQ_OFFLOAD_PG_VLAN_TAGGING_SHIFT 1
 402#define L4_KWQ_OFFLOAD_PG_RESERVED2 (0x3F<<2)
 403#define L4_KWQ_OFFLOAD_PG_RESERVED2_SHIFT 2
 404	u8 da0;
 405	u8 da1;
 406#elif defined(__LITTLE_ENDIAN)
 407	u8 da1;
 408	u8 da0;
 409	u8 pg_flags;
 410#define L4_KWQ_OFFLOAD_PG_SNAP_ENCAP (0x1<<0)
 411#define L4_KWQ_OFFLOAD_PG_SNAP_ENCAP_SHIFT 0
 412#define L4_KWQ_OFFLOAD_PG_VLAN_TAGGING (0x1<<1)
 413#define L4_KWQ_OFFLOAD_PG_VLAN_TAGGING_SHIFT 1
 414#define L4_KWQ_OFFLOAD_PG_RESERVED2 (0x3F<<2)
 415#define L4_KWQ_OFFLOAD_PG_RESERVED2_SHIFT 2
 416	u8 l2hdr_nbytes;
 417#endif
 418#if defined(__BIG_ENDIAN)
 419	u8 da2;
 420	u8 da3;
 421	u8 da4;
 422	u8 da5;
 423#elif defined(__LITTLE_ENDIAN)
 424	u8 da5;
 425	u8 da4;
 426	u8 da3;
 427	u8 da2;
 428#endif
 429#if defined(__BIG_ENDIAN)
 430	u8 sa0;
 431	u8 sa1;
 432	u8 sa2;
 433	u8 sa3;
 434#elif defined(__LITTLE_ENDIAN)
 435	u8 sa3;
 436	u8 sa2;
 437	u8 sa1;
 438	u8 sa0;
 439#endif
 440#if defined(__BIG_ENDIAN)
 441	u8 sa4;
 442	u8 sa5;
 443	u16 etype;
 444#elif defined(__LITTLE_ENDIAN)
 445	u16 etype;
 446	u8 sa5;
 447	u8 sa4;
 448#endif
 449#if defined(__BIG_ENDIAN)
 450	u16 vlan_tag;
 451	u16 ipid_start;
 452#elif defined(__LITTLE_ENDIAN)
 453	u16 ipid_start;
 454	u16 vlan_tag;
 455#endif
 456#if defined(__BIG_ENDIAN)
 457	u16 ipid_count;
 458	u16 reserved3;
 459#elif defined(__LITTLE_ENDIAN)
 460	u16 reserved3;
 461	u16 ipid_count;
 462#endif
 463	u32 host_opaque;
 464};
 465
 466
 467/*
 468 * Abortively close the connection request
 469 */
 470struct l4_kwq_reset_req {
 471#if defined(__BIG_ENDIAN)
 472	u8 flags;
 473#define L4_KWQ_RESET_REQ_RESERVED1 (0xF<<0)
 474#define L4_KWQ_RESET_REQ_RESERVED1_SHIFT 0
 475#define L4_KWQ_RESET_REQ_LAYER_CODE (0x7<<4)
 476#define L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT 4
 477#define L4_KWQ_RESET_REQ_LINKED_WITH_NEXT (0x1<<7)
 478#define L4_KWQ_RESET_REQ_LINKED_WITH_NEXT_SHIFT 7
 479	u8 op_code;
 480	u16 reserved0;
 481#elif defined(__LITTLE_ENDIAN)
 482	u16 reserved0;
 483	u8 op_code;
 484	u8 flags;
 485#define L4_KWQ_RESET_REQ_RESERVED1 (0xF<<0)
 486#define L4_KWQ_RESET_REQ_RESERVED1_SHIFT 0
 487#define L4_KWQ_RESET_REQ_LAYER_CODE (0x7<<4)
 488#define L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT 4
 489#define L4_KWQ_RESET_REQ_LINKED_WITH_NEXT (0x1<<7)
 490#define L4_KWQ_RESET_REQ_LINKED_WITH_NEXT_SHIFT 7
 491#endif
 492	u32 cid;
 493	u32 reserved2[6];
 494};
 495
 496
 497/*
 498 * a KWQE request to update a PG connection
 499 */
 500struct l4_kwq_update_pg {
 501#if defined(__BIG_ENDIAN)
 502	u8 flags;
 503#define L4_KWQ_UPDATE_PG_RESERVED1 (0xF<<0)
 504#define L4_KWQ_UPDATE_PG_RESERVED1_SHIFT 0
 505#define L4_KWQ_UPDATE_PG_LAYER_CODE (0x7<<4)
 506#define L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT 4
 507#define L4_KWQ_UPDATE_PG_LINKED_WITH_NEXT (0x1<<7)
 508#define L4_KWQ_UPDATE_PG_LINKED_WITH_NEXT_SHIFT 7
 509	u8 opcode;
 510	u16 oper16;
 511#elif defined(__LITTLE_ENDIAN)
 512	u16 oper16;
 513	u8 opcode;
 514	u8 flags;
 515#define L4_KWQ_UPDATE_PG_RESERVED1 (0xF<<0)
 516#define L4_KWQ_UPDATE_PG_RESERVED1_SHIFT 0
 517#define L4_KWQ_UPDATE_PG_LAYER_CODE (0x7<<4)
 518#define L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT 4
 519#define L4_KWQ_UPDATE_PG_LINKED_WITH_NEXT (0x1<<7)
 520#define L4_KWQ_UPDATE_PG_LINKED_WITH_NEXT_SHIFT 7
 521#endif
 522	u32 pg_cid;
 523	u32 pg_host_opaque;
 524#if defined(__BIG_ENDIAN)
 525	u8 pg_valids;
 526#define L4_KWQ_UPDATE_PG_VALIDS_IPID_COUNT (0x1<<0)
 527#define L4_KWQ_UPDATE_PG_VALIDS_IPID_COUNT_SHIFT 0
 528#define L4_KWQ_UPDATE_PG_VALIDS_DA (0x1<<1)
 529#define L4_KWQ_UPDATE_PG_VALIDS_DA_SHIFT 1
 530#define L4_KWQ_UPDATE_PG_RESERVERD2 (0x3F<<2)
 531#define L4_KWQ_UPDATE_PG_RESERVERD2_SHIFT 2
 532	u8 pg_unused_a;
 533	u16 pg_ipid_count;
 534#elif defined(__LITTLE_ENDIAN)
 535	u16 pg_ipid_count;
 536	u8 pg_unused_a;
 537	u8 pg_valids;
 538#define L4_KWQ_UPDATE_PG_VALIDS_IPID_COUNT (0x1<<0)
 539#define L4_KWQ_UPDATE_PG_VALIDS_IPID_COUNT_SHIFT 0
 540#define L4_KWQ_UPDATE_PG_VALIDS_DA (0x1<<1)
 541#define L4_KWQ_UPDATE_PG_VALIDS_DA_SHIFT 1
 542#define L4_KWQ_UPDATE_PG_RESERVERD2 (0x3F<<2)
 543#define L4_KWQ_UPDATE_PG_RESERVERD2_SHIFT 2
 544#endif
 545#if defined(__BIG_ENDIAN)
 546	u16 reserved3;
 547	u8 da0;
 548	u8 da1;
 549#elif defined(__LITTLE_ENDIAN)
 550	u8 da1;
 551	u8 da0;
 552	u16 reserved3;
 553#endif
 554#if defined(__BIG_ENDIAN)
 555	u8 da2;
 556	u8 da3;
 557	u8 da4;
 558	u8 da5;
 559#elif defined(__LITTLE_ENDIAN)
 560	u8 da5;
 561	u8 da4;
 562	u8 da3;
 563	u8 da2;
 564#endif
 565	u32 reserved4;
 566	u32 reserved5;
 567};
 568
 569
 570/*
 571 * a KWQE request to upload a PG or L4 context
 572 */
 573struct l4_kwq_upload {
 574#if defined(__BIG_ENDIAN)
 575	u8 flags;
 576#define L4_KWQ_UPLOAD_RESERVED1 (0xF<<0)
 577#define L4_KWQ_UPLOAD_RESERVED1_SHIFT 0
 578#define L4_KWQ_UPLOAD_LAYER_CODE (0x7<<4)
 579#define L4_KWQ_UPLOAD_LAYER_CODE_SHIFT 4
 580#define L4_KWQ_UPLOAD_LINKED_WITH_NEXT (0x1<<7)
 581#define L4_KWQ_UPLOAD_LINKED_WITH_NEXT_SHIFT 7
 582	u8 opcode;
 583	u16 oper16;
 584#elif defined(__LITTLE_ENDIAN)
 585	u16 oper16;
 586	u8 opcode;
 587	u8 flags;
 588#define L4_KWQ_UPLOAD_RESERVED1 (0xF<<0)
 589#define L4_KWQ_UPLOAD_RESERVED1_SHIFT 0
 590#define L4_KWQ_UPLOAD_LAYER_CODE (0x7<<4)
 591#define L4_KWQ_UPLOAD_LAYER_CODE_SHIFT 4
 592#define L4_KWQ_UPLOAD_LINKED_WITH_NEXT (0x1<<7)
 593#define L4_KWQ_UPLOAD_LINKED_WITH_NEXT_SHIFT 7
 594#endif
 595	u32 cid;
 596	u32 reserved2[6];
 597};
 598
 599/*
 600 * bnx2x structures
 601 */
 602
 603/*
 604 * The iscsi aggregative context of Cstorm
 605 */
 606struct cstorm_iscsi_ag_context {
 607	u32 agg_vars1;
 608#define CSTORM_ISCSI_AG_CONTEXT_STATE (0xFF<<0)
 609#define CSTORM_ISCSI_AG_CONTEXT_STATE_SHIFT 0
 610#define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<8)
 611#define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 8
 612#define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<9)
 613#define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 9
 614#define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<10)
 615#define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 10
 616#define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<11)
 617#define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 11
 618#define __CSTORM_ISCSI_AG_CONTEXT_RESERVED_ULP_RX_SE_CF_EN (0x1<<12)
 619#define __CSTORM_ISCSI_AG_CONTEXT_RESERVED_ULP_RX_SE_CF_EN_SHIFT 12
 620#define __CSTORM_ISCSI_AG_CONTEXT_RESERVED_ULP_RX_INV_CF_EN (0x1<<13)
 621#define __CSTORM_ISCSI_AG_CONTEXT_RESERVED_ULP_RX_INV_CF_EN_SHIFT 13
 622#define __CSTORM_ISCSI_AG_CONTEXT_AUX4_CF (0x3<<14)
 623#define __CSTORM_ISCSI_AG_CONTEXT_AUX4_CF_SHIFT 14
 624#define __CSTORM_ISCSI_AG_CONTEXT_RESERVED66 (0x3<<16)
 625#define __CSTORM_ISCSI_AG_CONTEXT_RESERVED66_SHIFT 16
 626#define __CSTORM_ISCSI_AG_CONTEXT_FIN_RECEIVED_CF_EN (0x1<<18)
 627#define __CSTORM_ISCSI_AG_CONTEXT_FIN_RECEIVED_CF_EN_SHIFT 18
 628#define __CSTORM_ISCSI_AG_CONTEXT_AUX1_CF_EN (0x1<<19)
 629#define __CSTORM_ISCSI_AG_CONTEXT_AUX1_CF_EN_SHIFT 19
 630#define __CSTORM_ISCSI_AG_CONTEXT_AUX2_CF_EN (0x1<<20)
 631#define __CSTORM_ISCSI_AG_CONTEXT_AUX2_CF_EN_SHIFT 20
 632#define __CSTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN (0x1<<21)
 633#define __CSTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN_SHIFT 21
 634#define __CSTORM_ISCSI_AG_CONTEXT_AUX4_CF_EN (0x1<<22)
 635#define __CSTORM_ISCSI_AG_CONTEXT_AUX4_CF_EN_SHIFT 22
 636#define __CSTORM_ISCSI_AG_CONTEXT_REL_SEQ_RULE (0x7<<23)
 637#define __CSTORM_ISCSI_AG_CONTEXT_REL_SEQ_RULE_SHIFT 23
 638#define CSTORM_ISCSI_AG_CONTEXT_HQ_PROD_RULE (0x3<<26)
 639#define CSTORM_ISCSI_AG_CONTEXT_HQ_PROD_RULE_SHIFT 26
 640#define __CSTORM_ISCSI_AG_CONTEXT_RESERVED52 (0x3<<28)
 641#define __CSTORM_ISCSI_AG_CONTEXT_RESERVED52_SHIFT 28
 642#define __CSTORM_ISCSI_AG_CONTEXT_RESERVED53 (0x3<<30)
 643#define __CSTORM_ISCSI_AG_CONTEXT_RESERVED53_SHIFT 30
 644#if defined(__BIG_ENDIAN)
 645	u8 __aux1_th;
 646	u8 __aux1_val;
 647	u16 __agg_vars2;
 648#elif defined(__LITTLE_ENDIAN)
 649	u16 __agg_vars2;
 650	u8 __aux1_val;
 651	u8 __aux1_th;
 652#endif
 653	u32 rel_seq;
 654	u32 rel_seq_th;
 655#if defined(__BIG_ENDIAN)
 656	u16 hq_cons;
 657	u16 hq_prod;
 658#elif defined(__LITTLE_ENDIAN)
 659	u16 hq_prod;
 660	u16 hq_cons;
 661#endif
 662#if defined(__BIG_ENDIAN)
 663	u8 __reserved62;
 664	u8 __reserved61;
 665	u8 __reserved60;
 666	u8 __reserved59;
 667#elif defined(__LITTLE_ENDIAN)
 668	u8 __reserved59;
 669	u8 __reserved60;
 670	u8 __reserved61;
 671	u8 __reserved62;
 672#endif
 673#if defined(__BIG_ENDIAN)
 674	u16 __reserved64;
 675	u16 cq_u_prod;
 676#elif defined(__LITTLE_ENDIAN)
 677	u16 cq_u_prod;
 678	u16 __reserved64;
 679#endif
 680	u32 __cq_u_prod1;
 681#if defined(__BIG_ENDIAN)
 682	u16 __agg_vars3;
 683	u16 cq_u_pend;
 684#elif defined(__LITTLE_ENDIAN)
 685	u16 cq_u_pend;
 686	u16 __agg_vars3;
 687#endif
 688#if defined(__BIG_ENDIAN)
 689	u16 __aux2_th;
 690	u16 aux2_val;
 691#elif defined(__LITTLE_ENDIAN)
 692	u16 aux2_val;
 693	u16 __aux2_th;
 694#endif
 695};
 696
 697/*
 698 * The fcoe extra aggregative context section of Tstorm
 699 */
 700struct tstorm_fcoe_extra_ag_context_section {
 701	u32 __agg_val1;
 702#if defined(__BIG_ENDIAN)
 703	u8 __tcp_agg_vars2;
 704	u8 __agg_val3;
 705	u16 __agg_val2;
 706#elif defined(__LITTLE_ENDIAN)
 707	u16 __agg_val2;
 708	u8 __agg_val3;
 709	u8 __tcp_agg_vars2;
 710#endif
 711#if defined(__BIG_ENDIAN)
 712	u16 __agg_val5;
 713	u8 __agg_val6;
 714	u8 __tcp_agg_vars3;
 715#elif defined(__LITTLE_ENDIAN)
 716	u8 __tcp_agg_vars3;
 717	u8 __agg_val6;
 718	u16 __agg_val5;
 719#endif
 720	u32 __lcq_prod;
 721	u32 rtt_seq;
 722	u32 rtt_time;
 723	u32 __reserved66;
 724	u32 wnd_right_edge;
 725	u32 tcp_agg_vars1;
 726#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_FIN_SENT_FLAG (0x1<<0)
 727#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_FIN_SENT_FLAG_SHIFT 0
 728#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_LAST_PACKET_FIN_FLAG (0x1<<1)
 729#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_LAST_PACKET_FIN_FLAG_SHIFT 1
 730#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_WND_UPD_CF (0x3<<2)
 731#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_WND_UPD_CF_SHIFT 2
 732#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TIMEOUT_CF (0x3<<4)
 733#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TIMEOUT_CF_SHIFT 4
 734#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_WND_UPD_CF_EN (0x1<<6)
 735#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_WND_UPD_CF_EN_SHIFT 6
 736#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TIMEOUT_CF_EN (0x1<<7)
 737#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TIMEOUT_CF_EN_SHIFT 7
 738#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RETRANSMIT_SEQ_EN (0x1<<8)
 739#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RETRANSMIT_SEQ_EN_SHIFT 8
 740#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_LCQ_SND_EN (0x1<<9)
 741#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_LCQ_SND_EN_SHIFT 9
 742#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_FLAG (0x1<<10)
 743#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_FLAG_SHIFT 10
 744#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX2_FLAG (0x1<<11)
 745#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX2_FLAG_SHIFT 11
 746#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_CF_EN (0x1<<12)
 747#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_CF_EN_SHIFT 12
 748#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX2_CF_EN (0x1<<13)
 749#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX2_CF_EN_SHIFT 13
 750#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_CF (0x3<<14)
 751#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_CF_SHIFT 14
 752#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX2_CF (0x3<<16)
 753#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX2_CF_SHIFT 16
 754#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TX_BLOCKED (0x1<<18)
 755#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TX_BLOCKED_SHIFT 18
 756#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX10_CF_EN (0x1<<19)
 757#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX10_CF_EN_SHIFT 19
 758#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX11_CF_EN (0x1<<20)
 759#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX11_CF_EN_SHIFT 20
 760#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX12_CF_EN (0x1<<21)
 761#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX12_CF_EN_SHIFT 21
 762#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED1 (0x3<<22)
 763#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED1_SHIFT 22
 764#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RETRANSMIT_PEND_SEQ (0xF<<24)
 765#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RETRANSMIT_PEND_SEQ_SHIFT 24
 766#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RETRANSMIT_DONE_SEQ (0xF<<28)
 767#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RETRANSMIT_DONE_SEQ_SHIFT 28
 768	u32 snd_max;
 769	u32 __lcq_cons;
 770	u32 __reserved2;
 771};
 772
 773/*
 774 * The fcoe aggregative context of Tstorm
 775 */
 776struct tstorm_fcoe_ag_context {
 777#if defined(__BIG_ENDIAN)
 778	u16 ulp_credit;
 779	u8 agg_vars1;
 780#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0)
 781#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0
 782#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1)
 783#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1
 784#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2)
 785#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2
 786#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3)
 787#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3
 788#define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF (0x3<<4)
 789#define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF_SHIFT 4
 790#define __TSTORM_FCOE_AG_CONTEXT_AUX3_FLAG (0x1<<6)
 791#define __TSTORM_FCOE_AG_CONTEXT_AUX3_FLAG_SHIFT 6
 792#define __TSTORM_FCOE_AG_CONTEXT_AUX4_FLAG (0x1<<7)
 793#define __TSTORM_FCOE_AG_CONTEXT_AUX4_FLAG_SHIFT 7
 794	u8 state;
 795#elif defined(__LITTLE_ENDIAN)
 796	u8 state;
 797	u8 agg_vars1;
 798#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0)
 799#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0
 800#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1)
 801#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1
 802#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2)
 803#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2
 804#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3)
 805#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3
 806#define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF (0x3<<4)
 807#define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF_SHIFT 4
 808#define __TSTORM_FCOE_AG_CONTEXT_AUX3_FLAG (0x1<<6)
 809#define __TSTORM_FCOE_AG_CONTEXT_AUX3_FLAG_SHIFT 6
 810#define __TSTORM_FCOE_AG_CONTEXT_AUX4_FLAG (0x1<<7)
 811#define __TSTORM_FCOE_AG_CONTEXT_AUX4_FLAG_SHIFT 7
 812	u16 ulp_credit;
 813#endif
 814#if defined(__BIG_ENDIAN)
 815	u16 __agg_val4;
 816	u16 agg_vars2;
 817#define __TSTORM_FCOE_AG_CONTEXT_AUX5_FLAG (0x1<<0)
 818#define __TSTORM_FCOE_AG_CONTEXT_AUX5_FLAG_SHIFT 0
 819#define __TSTORM_FCOE_AG_CONTEXT_AUX6_FLAG (0x1<<1)
 820#define __TSTORM_FCOE_AG_CONTEXT_AUX6_FLAG_SHIFT 1
 821#define __TSTORM_FCOE_AG_CONTEXT_AUX4_CF (0x3<<2)
 822#define __TSTORM_FCOE_AG_CONTEXT_AUX4_CF_SHIFT 2
 823#define __TSTORM_FCOE_AG_CONTEXT_AUX5_CF (0x3<<4)
 824#define __TSTORM_FCOE_AG_CONTEXT_AUX5_CF_SHIFT 4
 825#define __TSTORM_FCOE_AG_CONTEXT_AUX6_CF (0x3<<6)
 826#define __TSTORM_FCOE_AG_CONTEXT_AUX6_CF_SHIFT 6
 827#define __TSTORM_FCOE_AG_CONTEXT_AUX7_CF (0x3<<8)
 828#define __TSTORM_FCOE_AG_CONTEXT_AUX7_CF_SHIFT 8
 829#define __TSTORM_FCOE_AG_CONTEXT_AUX7_FLAG (0x1<<10)
 830#define __TSTORM_FCOE_AG_CONTEXT_AUX7_FLAG_SHIFT 10
 831#define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF_EN (0x1<<11)
 832#define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF_EN_SHIFT 11
 833#define TSTORM_FCOE_AG_CONTEXT_AUX4_CF_EN (0x1<<12)
 834#define TSTORM_FCOE_AG_CONTEXT_AUX4_CF_EN_SHIFT 12
 835#define TSTORM_FCOE_AG_CONTEXT_AUX5_CF_EN (0x1<<13)
 836#define TSTORM_FCOE_AG_CONTEXT_AUX5_CF_EN_SHIFT 13
 837#define TSTORM_FCOE_AG_CONTEXT_AUX6_CF_EN (0x1<<14)
 838#define TSTORM_FCOE_AG_CONTEXT_AUX6_CF_EN_SHIFT 14
 839#define TSTORM_FCOE_AG_CONTEXT_AUX7_CF_EN (0x1<<15)
 840#define TSTORM_FCOE_AG_CONTEXT_AUX7_CF_EN_SHIFT 15
 841#elif defined(__LITTLE_ENDIAN)
 842	u16 agg_vars2;
 843#define __TSTORM_FCOE_AG_CONTEXT_AUX5_FLAG (0x1<<0)
 844#define __TSTORM_FCOE_AG_CONTEXT_AUX5_FLAG_SHIFT 0
 845#define __TSTORM_FCOE_AG_CONTEXT_AUX6_FLAG (0x1<<1)
 846#define __TSTORM_FCOE_AG_CONTEXT_AUX6_FLAG_SHIFT 1
 847#define __TSTORM_FCOE_AG_CONTEXT_AUX4_CF (0x3<<2)
 848#define __TSTORM_FCOE_AG_CONTEXT_AUX4_CF_SHIFT 2
 849#define __TSTORM_FCOE_AG_CONTEXT_AUX5_CF (0x3<<4)
 850#define __TSTORM_FCOE_AG_CONTEXT_AUX5_CF_SHIFT 4
 851#define __TSTORM_FCOE_AG_CONTEXT_AUX6_CF (0x3<<6)
 852#define __TSTORM_FCOE_AG_CONTEXT_AUX6_CF_SHIFT 6
 853#define __TSTORM_FCOE_AG_CONTEXT_AUX7_CF (0x3<<8)
 854#define __TSTORM_FCOE_AG_CONTEXT_AUX7_CF_SHIFT 8
 855#define __TSTORM_FCOE_AG_CONTEXT_AUX7_FLAG (0x1<<10)
 856#define __TSTORM_FCOE_AG_CONTEXT_AUX7_FLAG_SHIFT 10
 857#define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF_EN (0x1<<11)
 858#define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF_EN_SHIFT 11
 859#define TSTORM_FCOE_AG_CONTEXT_AUX4_CF_EN (0x1<<12)
 860#define TSTORM_FCOE_AG_CONTEXT_AUX4_CF_EN_SHIFT 12
 861#define TSTORM_FCOE_AG_CONTEXT_AUX5_CF_EN (0x1<<13)
 862#define TSTORM_FCOE_AG_CONTEXT_AUX5_CF_EN_SHIFT 13
 863#define TSTORM_FCOE_AG_CONTEXT_AUX6_CF_EN (0x1<<14)
 864#define TSTORM_FCOE_AG_CONTEXT_AUX6_CF_EN_SHIFT 14
 865#define TSTORM_FCOE_AG_CONTEXT_AUX7_CF_EN (0x1<<15)
 866#define TSTORM_FCOE_AG_CONTEXT_AUX7_CF_EN_SHIFT 15
 867	u16 __agg_val4;
 868#endif
 869	struct tstorm_fcoe_extra_ag_context_section __extra_section;
 870};
 871
 872
 873
 874/*
 875 * The tcp aggregative context section of Tstorm
 876 */
 877struct tstorm_tcp_tcp_ag_context_section {
 878	u32 __agg_val1;
 879#if defined(__BIG_ENDIAN)
 880	u8 __tcp_agg_vars2;
 881	u8 __agg_val3;
 882	u16 __agg_val2;
 883#elif defined(__LITTLE_ENDIAN)
 884	u16 __agg_val2;
 885	u8 __agg_val3;
 886	u8 __tcp_agg_vars2;
 887#endif
 888#if defined(__BIG_ENDIAN)
 889	u16 __agg_val5;
 890	u8 __agg_val6;
 891	u8 __tcp_agg_vars3;
 892#elif defined(__LITTLE_ENDIAN)
 893	u8 __tcp_agg_vars3;
 894	u8 __agg_val6;
 895	u16 __agg_val5;
 896#endif
 897	u32 snd_nxt;
 898	u32 rtt_seq;
 899	u32 rtt_time;
 900	u32 wnd_right_edge_local;
 901	u32 wnd_right_edge;
 902	u32 tcp_agg_vars1;
 903#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_FIN_SENT_FLAG (0x1<<0)
 904#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_FIN_SENT_FLAG_SHIFT 0
 905#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_LAST_PACKET_FIN_FLAG (0x1<<1)
 906#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_LAST_PACKET_FIN_FLAG_SHIFT 1
 907#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_WND_UPD_CF (0x3<<2)
 908#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_WND_UPD_CF_SHIFT 2
 909#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF (0x3<<4)
 910#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF_SHIFT 4
 911#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_WND_UPD_CF_EN (0x1<<6)
 912#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_WND_UPD_CF_EN_SHIFT 6
 913#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF_EN (0x1<<7)
 914#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF_EN_SHIFT 7
 915#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_SEQ_EN (0x1<<8)
 916#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_SEQ_EN_SHIFT 8
 917#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_SND_NXT_EN (0x1<<9)
 918#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_SND_NXT_EN_SHIFT 9
 919#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_FLAG (0x1<<10)
 920#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_FLAG_SHIFT 10
 921#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_FLAG (0x1<<11)
 922#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_FLAG_SHIFT 11
 923#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_CF_EN (0x1<<12)
 924#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_CF_EN_SHIFT 12
 925#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_CF_EN (0x1<<13)
 926#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_CF_EN_SHIFT 13
 927#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_CF (0x3<<14)
 928#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_CF_SHIFT 14
 929#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_CF (0x3<<16)
 930#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_CF_SHIFT 16
 931#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_BLOCKED (0x1<<18)
 932#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_BLOCKED_SHIFT 18
 933#define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX10_CF_EN (0x1<<19)
 934#define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX10_CF_EN_SHIFT 19
 935#define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX11_CF_EN (0x1<<20)
 936#define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX11_CF_EN_SHIFT 20
 937#define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX12_CF_EN (0x1<<21)
 938#define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX12_CF_EN_SHIFT 21
 939#define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RESERVED1 (0x3<<22)
 940#define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RESERVED1_SHIFT 22
 941#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_PEND_SEQ (0xF<<24)
 942#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_PEND_SEQ_SHIFT 24
 943#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_DONE_SEQ (0xF<<28)
 944#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_DONE_SEQ_SHIFT 28
 945	u32 snd_max;
 946	u32 snd_una;
 947	u32 __reserved2;
 948};
 949
 950/*
 951 * The iscsi aggregative context of Tstorm
 952 */
 953struct tstorm_iscsi_ag_context {
 954#if defined(__BIG_ENDIAN)
 955	u16 ulp_credit;
 956	u8 agg_vars1;
 957#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0)
 958#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0
 959#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1)
 960#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1
 961#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2)
 962#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2
 963#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3)
 964#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3
 965#define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF (0x3<<4)
 966#define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_SHIFT 4
 967#define __TSTORM_ISCSI_AG_CONTEXT_AUX3_FLAG (0x1<<6)
 968#define __TSTORM_ISCSI_AG_CONTEXT_AUX3_FLAG_SHIFT 6
 969#define __TSTORM_ISCSI_AG_CONTEXT_ACK_ON_FIN_SENT_FLAG (0x1<<7)
 970#define __TSTORM_ISCSI_AG_CONTEXT_ACK_ON_FIN_SENT_FLAG_SHIFT 7
 971	u8 state;
 972#elif defined(__LITTLE_ENDIAN)
 973	u8 state;
 974	u8 agg_vars1;
 975#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0)
 976#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0
 977#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1)
 978#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1
 979#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2)
 980#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2
 981#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3)
 982#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3
 983#define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF (0x3<<4)
 984#define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_SHIFT 4
 985#define __TSTORM_ISCSI_AG_CONTEXT_AUX3_FLAG (0x1<<6)
 986#define __TSTORM_ISCSI_AG_CONTEXT_AUX3_FLAG_SHIFT 6
 987#define __TSTORM_ISCSI_AG_CONTEXT_ACK_ON_FIN_SENT_FLAG (0x1<<7)
 988#define __TSTORM_ISCSI_AG_CONTEXT_ACK_ON_FIN_SENT_FLAG_SHIFT 7
 989	u16 ulp_credit;
 990#endif
 991#if defined(__BIG_ENDIAN)
 992	u16 __agg_val4;
 993	u16 agg_vars2;
 994#define __TSTORM_ISCSI_AG_CONTEXT_MSL_TIMER_SET_FLAG (0x1<<0)
 995#define __TSTORM_ISCSI_AG_CONTEXT_MSL_TIMER_SET_FLAG_SHIFT 0
 996#define __TSTORM_ISCSI_AG_CONTEXT_FIN_SENT_FIRST_FLAG (0x1<<1)
 997#define __TSTORM_ISCSI_AG_CONTEXT_FIN_SENT_FIRST_FLAG_SHIFT 1
 998#define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF (0x3<<2)
 999#define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_SHIFT 2
1000#define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF (0x3<<4)
1001#define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_SHIFT 4
1002#define __TSTORM_ISCSI_AG_CONTEXT_AUX6_CF (0x3<<6)
1003#define __TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_SHIFT 6
1004#define __TSTORM_ISCSI_AG_CONTEXT_AUX7_CF (0x3<<8)
1005#define __TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_SHIFT 8
1006#define __TSTORM_ISCSI_AG_CONTEXT_AUX7_FLAG (0x1<<10)
1007#define __TSTORM_ISCSI_AG_CONTEXT_AUX7_FLAG_SHIFT 10
1008#define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN (0x1<<11)
1009#define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN_SHIFT 11
1010#define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_EN (0x1<<12)
1011#define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_EN_SHIFT 12
1012#define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_EN (0x1<<13)
1013#define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_EN_SHIFT 13
1014#define TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_EN (0x1<<14)
1015#define TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_EN_SHIFT 14
1016#define TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_EN (0x1<<15)
1017#define TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_EN_SHIFT 15
1018#elif defined(__LITTLE_ENDIAN)
1019	u16 agg_vars2;
1020#define __TSTORM_ISCSI_AG_CONTEXT_MSL_TIMER_SET_FLAG (0x1<<0)
1021#define __TSTORM_ISCSI_AG_CONTEXT_MSL_TIMER_SET_FLAG_SHIFT 0
1022#define __TSTORM_ISCSI_AG_CONTEXT_FIN_SENT_FIRST_FLAG (0x1<<1)
1023#define __TSTORM_ISCSI_AG_CONTEXT_FIN_SENT_FIRST_FLAG_SHIFT 1
1024#define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF (0x3<<2)
1025#define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_SHIFT 2
1026#define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF (0x3<<4)
1027#define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_SHIFT 4
1028#define __TSTORM_ISCSI_AG_CONTEXT_AUX6_CF (0x3<<6)
1029#define __TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_SHIFT 6
1030#define __TSTORM_ISCSI_AG_CONTEXT_AUX7_CF (0x3<<8)
1031#define __TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_SHIFT 8
1032#define __TSTORM_ISCSI_AG_CONTEXT_AUX7_FLAG (0x1<<10)
1033#define __TSTORM_ISCSI_AG_CONTEXT_AUX7_FLAG_SHIFT 10
1034#define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN (0x1<<11)
1035#define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN_SHIFT 11
1036#define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_EN (0x1<<12)
1037#define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_EN_SHIFT 12
1038#define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_EN (0x1<<13)
1039#define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_EN_SHIFT 13
1040#define TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_EN (0x1<<14)
1041#define TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_EN_SHIFT 14
1042#define TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_EN (0x1<<15)
1043#define TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_EN_SHIFT 15
1044	u16 __agg_val4;
1045#endif
1046	struct tstorm_tcp_tcp_ag_context_section tcp;
1047};
1048
1049
1050
1051/*
1052 * The fcoe aggregative context of Ustorm
1053 */
1054struct ustorm_fcoe_ag_context {
1055#if defined(__BIG_ENDIAN)
1056	u8 __aux_counter_flags;
1057	u8 agg_vars2;
1058#define USTORM_FCOE_AG_CONTEXT_TX_CF (0x3<<0)
1059#define USTORM_FCOE_AG_CONTEXT_TX_CF_SHIFT 0
1060#define __USTORM_FCOE_AG_CONTEXT_TIMER_CF (0x3<<2)
1061#define __USTORM_FCOE_AG_CONTEXT_TIMER_CF_SHIFT 2
1062#define USTORM_FCOE_AG_CONTEXT_AGG_MISC4_RULE (0x7<<4)
1063#define USTORM_FCOE_AG_CONTEXT_AGG_MISC4_RULE_SHIFT 4
1064#define __USTORM_FCOE_AG_CONTEXT_AGG_VAL2_MASK (0x1<<7)
1065#define __USTORM_FCOE_AG_CONTEXT_AGG_VAL2_MASK_SHIFT 7
1066	u8 agg_vars1;
1067#define __USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0)
1068#define __USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0
1069#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1)
1070#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1
1071#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2)
1072#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2
1073#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3)
1074#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3
1075#define USTORM_FCOE_AG_CONTEXT_INV_CF (0x3<<4)
1076#define USTORM_FCOE_AG_CONTEXT_INV_CF_SHIFT 4
1077#define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF (0x3<<6)
1078#define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF_SHIFT 6
1079	u8 state;
1080#elif defined(__LITTLE_ENDIAN)
1081	u8 state;
1082	u8 agg_vars1;
1083#define __USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0)
1084#define __USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0
1085#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1)
1086#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1
1087#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2)
1088#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2
1089#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3)
1090#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3
1091#define USTORM_FCOE_AG_CONTEXT_INV_CF (0x3<<4)
1092#define USTORM_FCOE_AG_CONTEXT_INV_CF_SHIFT 4
1093#define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF (0x3<<6)
1094#define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF_SHIFT 6
1095	u8 agg_vars2;
1096#define USTORM_FCOE_AG_CONTEXT_TX_CF (0x3<<0)
1097#define USTORM_FCOE_AG_CONTEXT_TX_CF_SHIFT 0
1098#define __USTORM_FCOE_AG_CONTEXT_TIMER_CF (0x3<<2)
1099#define __USTORM_FCOE_AG_CONTEXT_TIMER_CF_SHIFT 2
1100#define USTORM_FCOE_AG_CONTEXT_AGG_MISC4_RULE (0x7<<4)
1101#define USTORM_FCOE_AG_CONTEXT_AGG_MISC4_RULE_SHIFT 4
1102#define __USTORM_FCOE_AG_CONTEXT_AGG_VAL2_MASK (0x1<<7)
1103#define __USTORM_FCOE_AG_CONTEXT_AGG_VAL2_MASK_SHIFT 7
1104	u8 __aux_counter_flags;
1105#endif
1106#if defined(__BIG_ENDIAN)
1107	u8 cdu_usage;
1108	u8 agg_misc2;
1109	u16 pbf_tx_seq_ack;
1110#elif defined(__LITTLE_ENDIAN)
1111	u16 pbf_tx_seq_ack;
1112	u8 agg_misc2;
1113	u8 cdu_usage;
1114#endif
1115	u32 agg_misc4;
1116#if defined(__BIG_ENDIAN)
1117	u8 agg_val3_th;
1118	u8 agg_val3;
1119	u16 agg_misc3;
1120#elif defined(__LITTLE_ENDIAN)
1121	u16 agg_misc3;
1122	u8 agg_val3;
1123	u8 agg_val3_th;
1124#endif
1125	u32 expired_task_id;
1126	u32 agg_misc4_th;
1127#if defined(__BIG_ENDIAN)
1128	u16 cq_prod;
1129	u16 cq_cons;
1130#elif defined(__LITTLE_ENDIAN)
1131	u16 cq_cons;
1132	u16 cq_prod;
1133#endif
1134#if defined(__BIG_ENDIAN)
1135	u16 __reserved2;
1136	u8 decision_rules;
1137#define USTORM_FCOE_AG_CONTEXT_CQ_DEC_RULE (0x7<<0)
1138#define USTORM_FCOE_AG_CONTEXT_CQ_DEC_RULE_SHIFT 0
1139#define __USTORM_FCOE_AG_CONTEXT_AGG_VAL3_RULE (0x7<<3)
1140#define __USTORM_FCOE_AG_CONTEXT_AGG_VAL3_RULE_SHIFT 3
1141#define USTORM_FCOE_AG_CONTEXT_CQ_ARM_N_FLAG (0x1<<6)
1142#define USTORM_FCOE_AG_CONTEXT_CQ_ARM_N_FLAG_SHIFT 6
1143#define __USTORM_FCOE_AG_CONTEXT_RESERVED1 (0x1<<7)
1144#define __USTORM_FCOE_AG_CONTEXT_RESERVED1_SHIFT 7
1145	u8 decision_rule_enable_bits;
1146#define __USTORM_FCOE_AG_CONTEXT_RESERVED_INV_CF_EN (0x1<<0)
1147#define __USTORM_FCOE_AG_CONTEXT_RESERVED_INV_CF_EN_SHIFT 0
1148#define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF_EN (0x1<<1)
1149#define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF_EN_SHIFT 1
1150#define USTORM_FCOE_AG_CONTEXT_TX_CF_EN (0x1<<2)
1151#define USTORM_FCOE_AG_CONTEXT_TX_CF_EN_SHIFT 2
1152#define __USTORM_FCOE_AG_CONTEXT_TIMER_CF_EN (0x1<<3)
1153#define __USTORM_FCOE_AG_CONTEXT_TIMER_CF_EN_SHIFT 3
1154#define __USTORM_FCOE_AG_CONTEXT_AUX1_CF_EN (0x1<<4)
1155#define __USTORM_FCOE_AG_CONTEXT_AUX1_CF_EN_SHIFT 4
1156#define __USTORM_FCOE_AG_CONTEXT_QUEUE0_CF_EN (0x1<<5)
1157#define __USTORM_FCOE_AG_CONTEXT_QUEUE0_CF_EN_SHIFT 5
1158#define __USTORM_FCOE_AG_CONTEXT_AUX3_CF_EN (0x1<<6)
1159#define __USTORM_FCOE_AG_CONTEXT_AUX3_CF_EN_SHIFT 6
1160#define __USTORM_FCOE_AG_CONTEXT_DQ_CF_EN (0x1<<7)
1161#define __USTORM_FCOE_AG_CONTEXT_DQ_CF_EN_SHIFT 7
1162#elif defined(__LITTLE_ENDIAN)
1163	u8 decision_rule_enable_bits;
1164#define __USTORM_FCOE_AG_CONTEXT_RESERVED_INV_CF_EN (0x1<<0)
1165#define __USTORM_FCOE_AG_CONTEXT_RESERVED_INV_CF_EN_SHIFT 0
1166#define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF_EN (0x1<<1)
1167#define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF_EN_SHIFT 1
1168#define USTORM_FCOE_AG_CONTEXT_TX_CF_EN (0x1<<2)
1169#define USTORM_FCOE_AG_CONTEXT_TX_CF_EN_SHIFT 2
1170#define __USTORM_FCOE_AG_CONTEXT_TIMER_CF_EN (0x1<<3)
1171#define __USTORM_FCOE_AG_CONTEXT_TIMER_CF_EN_SHIFT 3
1172#define __USTORM_FCOE_AG_CONTEXT_AUX1_CF_EN (0x1<<4)
1173#define __USTORM_FCOE_AG_CONTEXT_AUX1_CF_EN_SHIFT 4
1174#define __USTORM_FCOE_AG_CONTEXT_QUEUE0_CF_EN (0x1<<5)
1175#define __USTORM_FCOE_AG_CONTEXT_QUEUE0_CF_EN_SHIFT 5
1176#define __USTORM_FCOE_AG_CONTEXT_AUX3_CF_EN (0x1<<6)
1177#define __USTORM_FCOE_AG_CONTEXT_AUX3_CF_EN_SHIFT 6
1178#define __USTORM_FCOE_AG_CONTEXT_DQ_CF_EN (0x1<<7)
1179#define __USTORM_FCOE_AG_CONTEXT_DQ_CF_EN_SHIFT 7
1180	u8 decision_rules;
1181#define USTORM_FCOE_AG_CONTEXT_CQ_DEC_RULE (0x7<<0)
1182#define USTORM_FCOE_AG_CONTEXT_CQ_DEC_RULE_SHIFT 0
1183#define __USTORM_FCOE_AG_CONTEXT_AGG_VAL3_RULE (0x7<<3)
1184#define __USTORM_FCOE_AG_CONTEXT_AGG_VAL3_RULE_SHIFT 3
1185#define USTORM_FCOE_AG_CONTEXT_CQ_ARM_N_FLAG (0x1<<6)
1186#define USTORM_FCOE_AG_CONTEXT_CQ_ARM_N_FLAG_SHIFT 6
1187#define __USTORM_FCOE_AG_CONTEXT_RESERVED1 (0x1<<7)
1188#define __USTORM_FCOE_AG_CONTEXT_RESERVED1_SHIFT 7
1189	u16 __reserved2;
1190#endif
1191};
1192
1193
1194/*
1195 * The iscsi aggregative context of Ustorm
1196 */
1197struct ustorm_iscsi_ag_context {
1198#if defined(__BIG_ENDIAN)
1199	u8 __aux_counter_flags;
1200	u8 agg_vars2;
1201#define USTORM_ISCSI_AG_CONTEXT_TX_CF (0x3<<0)
1202#define USTORM_ISCSI_AG_CONTEXT_TX_CF_SHIFT 0
1203#define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF (0x3<<2)
1204#define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_SHIFT 2
1205#define USTORM_ISCSI_AG_CONTEXT_AGG_MISC4_RULE (0x7<<4)
1206#define USTORM_ISCSI_AG_CONTEXT_AGG_MISC4_RULE_SHIFT 4
1207#define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_MASK (0x1<<7)
1208#define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_MASK_SHIFT 7
1209	u8 agg_vars1;
1210#define __USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0)
1211#define __USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0
1212#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1)
1213#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1
1214#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2)
1215#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2
1216#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3)
1217#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3
1218#define USTORM_ISCSI_AG_CONTEXT_INV_CF (0x3<<4)
1219#define USTORM_ISCSI_AG_CONTEXT_INV_CF_SHIFT 4
1220#define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF (0x3<<6)
1221#define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_SHIFT 6
1222	u8 state;
1223#elif defined(__LITTLE_ENDIAN)
1224	u8 state;
1225	u8 agg_vars1;
1226#define __USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0)
1227#define __USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0
1228#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1)
1229#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1
1230#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2)
1231#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2
1232#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3)
1233#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3
1234#define USTORM_ISCSI_AG_CONTEXT_INV_CF (0x3<<4)
1235#define USTORM_ISCSI_AG_CONTEXT_INV_CF_SHIFT 4
1236#define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF (0x3<<6)
1237#define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_SHIFT 6
1238	u8 agg_vars2;
1239#define USTORM_ISCSI_AG_CONTEXT_TX_CF (0x3<<0)
1240#define USTORM_ISCSI_AG_CONTEXT_TX_CF_SHIFT 0
1241#define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF (0x3<<2)
1242#define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_SHIFT 2
1243#define USTORM_ISCSI_AG_CONTEXT_AGG_MISC4_RULE (0x7<<4)
1244#define USTORM_ISCSI_AG_CONTEXT_AGG_MISC4_RULE_SHIFT 4
1245#define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_MASK (0x1<<7)
1246#define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_MASK_SHIFT 7
1247	u8 __aux_counter_flags;
1248#endif
1249#if defined(__BIG_ENDIAN)
1250	u8 cdu_usage;
1251	u8 agg_misc2;
1252	u16 __cq_local_comp_itt_val;
1253#elif defined(__LITTLE_ENDIAN)
1254	u16 __cq_local_comp_itt_val;
1255	u8 agg_misc2;
1256	u8 cdu_usage;
1257#endif
1258	u32 agg_misc4;
1259#if defined(__BIG_ENDIAN)
1260	u8 agg_val3_th;
1261	u8 agg_val3;
1262	u16 agg_misc3;
1263#elif defined(__LITTLE_ENDIAN)
1264	u16 agg_misc3;
1265	u8 agg_val3;
1266	u8 agg_val3_th;
1267#endif
1268	u32 agg_val1;
1269	u32 agg_misc4_th;
1270#if defined(__BIG_ENDIAN)
1271	u16 agg_val2_th;
1272	u16 agg_val2;
1273#elif defined(__LITTLE_ENDIAN)
1274	u16 agg_val2;
1275	u16 agg_val2_th;
1276#endif
1277#if defined(__BIG_ENDIAN)
1278	u16 __reserved2;
1279	u8 decision_rules;
1280#define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_RULE (0x7<<0)
1281#define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_RULE_SHIFT 0
1282#define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL3_RULE (0x7<<3)
1283#define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL3_RULE_SHIFT 3
1284#define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_ARM_N_FLAG (0x1<<6)
1285#define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_ARM_N_FLAG_SHIFT 6
1286#define __USTORM_ISCSI_AG_CONTEXT_RESERVED1 (0x1<<7)
1287#define __USTORM_ISCSI_AG_CONTEXT_RESERVED1_SHIFT 7
1288	u8 decision_rule_enable_bits;
1289#define USTORM_ISCSI_AG_CONTEXT_INV_CF_EN (0x1<<0)
1290#define USTORM_ISCSI_AG_CONTEXT_INV_CF_EN_SHIFT 0
1291#define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_EN (0x1<<1)
1292#define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_EN_SHIFT 1
1293#define USTORM_ISCSI_AG_CONTEXT_TX_CF_EN (0x1<<2)
1294#define USTORM_ISCSI_AG_CONTEXT_TX_CF_EN_SHIFT 2
1295#define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_EN (0x1<<3)
1296#define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_EN_SHIFT 3
1297#define __USTORM_ISCSI_AG_CONTEXT_CQ_LOCAL_COMP_CF_EN (0x1<<4)
1298#define __USTORM_ISCSI_AG_CONTEXT_CQ_LOCAL_COMP_CF_EN_SHIFT 4
1299#define __USTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN (0x1<<5)
1300#define __USTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN_SHIFT 5
1301#define __USTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN (0x1<<6)
1302#define __USTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN_SHIFT 6
1303#define __USTORM_ISCSI_AG_CONTEXT_DQ_CF_EN (0x1<<7)
1304#define __USTORM_ISCSI_AG_CONTEXT_DQ_CF_EN_SHIFT 7
1305#elif defined(__LITTLE_ENDIAN)
1306	u8 decision_rule_enable_bits;
1307#define USTORM_ISCSI_AG_CONTEXT_INV_CF_EN (0x1<<0)
1308#define USTORM_ISCSI_AG_CONTEXT_INV_CF_EN_SHIFT 0
1309#define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_EN (0x1<<1)
1310#define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_EN_SHIFT 1
1311#define USTORM_ISCSI_AG_CONTEXT_TX_CF_EN (0x1<<2)
1312#define USTORM_ISCSI_AG_CONTEXT_TX_CF_EN_SHIFT 2
1313#define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_EN (0x1<<3)
1314#define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_EN_SHIFT 3
1315#define __USTORM_ISCSI_AG_CONTEXT_CQ_LOCAL_COMP_CF_EN (0x1<<4)
1316#define __USTORM_ISCSI_AG_CONTEXT_CQ_LOCAL_COMP_CF_EN_SHIFT 4
1317#define __USTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN (0x1<<5)
1318#define __USTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN_SHIFT 5
1319#define __USTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN (0x1<<6)
1320#define __USTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN_SHIFT 6
1321#define __USTORM_ISCSI_AG_CONTEXT_DQ_CF_EN (0x1<<7)
1322#define __USTORM_ISCSI_AG_CONTEXT_DQ_CF_EN_SHIFT 7
1323	u8 decision_rules;
1324#define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_RULE (0x7<<0)
1325#define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_RULE_SHIFT 0
1326#define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL3_RULE (0x7<<3)
1327#define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL3_RULE_SHIFT 3
1328#define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_ARM_N_FLAG (0x1<<6)
1329#define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_ARM_N_FLAG_SHIFT 6
1330#define __USTORM_ISCSI_AG_CONTEXT_RESERVED1 (0x1<<7)
1331#define __USTORM_ISCSI_AG_CONTEXT_RESERVED1_SHIFT 7
1332	u16 __reserved2;
1333#endif
1334};
1335
1336
1337/*
1338 * The fcoe aggregative context section of Xstorm
1339 */
1340struct xstorm_fcoe_extra_ag_context_section {
1341#if defined(__BIG_ENDIAN)
1342	u8 tcp_agg_vars1;
1343#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED51 (0x3<<0)
1344#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED51_SHIFT 0
1345#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED (0x3<<2)
1346#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_SHIFT 2
1347#define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF (0x3<<4)
1348#define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_SHIFT 4
1349#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_CLEAR_DA_TIMER_EN (0x1<<6)
1350#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_CLEAR_DA_TIMER_EN_SHIFT 6
1351#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_DA_EXPIRATION_FLAG (0x1<<7)
1352#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_DA_EXPIRATION_FLAG_SHIFT 7
1353	u8 __reserved_da_cnt;
1354	u16 __mtu;
1355#elif defined(__LITTLE_ENDIAN)
1356	u16 __mtu;
1357	u8 __reserved_da_cnt;
1358	u8 tcp_agg_vars1;
1359#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED51 (0x3<<0)
1360#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED51_SHIFT 0
1361#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED (0x3<<2)
1362#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_SHIFT 2
1363#define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF (0x3<<4)
1364#define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_SHIFT 4
1365#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_CLEAR_DA_TIMER_EN (0x1<<6)
1366#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_CLEAR_DA_TIMER_EN_SHIFT 6
1367#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_DA_EXPIRATION_FLAG (0x1<<7)
1368#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_DA_EXPIRATION_FLAG_SHIFT 7
1369#endif
1370	u32 snd_nxt;
1371	u32 __xfrqe_bd_addr_lo;
1372	u32 __xfrqe_bd_addr_hi;
1373	u32 __xfrqe_data1;
1374#if defined(__BIG_ENDIAN)
1375	u8 __agg_val8_th;
1376	u8 __tx_dest;
1377	u16 tcp_agg_vars2;
1378#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED57 (0x1<<0)
1379#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED57_SHIFT 0
1380#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED58 (0x1<<1)
1381#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED58_SHIFT 1
1382#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED59 (0x1<<2)
1383#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED59_SHIFT 2
1384#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX3_FLAG (0x1<<3)
1385#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX3_FLAG_SHIFT 3
1386#d…

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