/Ethereal-msm8939-beta9/arch/metag/include/asm/io.h

https://bitbucket.org/MilosStamenkovic95/etherealos · C Header · 165 lines · 107 code · 27 blank · 31 comment · 0 complexity · a6a61b9db683849c9835f5de600d7a3c MD5 · raw file

  1. #ifndef _ASM_METAG_IO_H
  2. #define _ASM_METAG_IO_H
  3. #include <linux/types.h>
  4. #define IO_SPACE_LIMIT 0
  5. #define page_to_bus page_to_phys
  6. #define bus_to_page phys_to_page
  7. /*
  8. * Generic I/O
  9. */
  10. #define __raw_readb __raw_readb
  11. static inline u8 __raw_readb(const volatile void __iomem *addr)
  12. {
  13. u8 ret;
  14. asm volatile("GETB %0,[%1]"
  15. : "=da" (ret)
  16. : "da" (addr)
  17. : "memory");
  18. return ret;
  19. }
  20. #define __raw_readw __raw_readw
  21. static inline u16 __raw_readw(const volatile void __iomem *addr)
  22. {
  23. u16 ret;
  24. asm volatile("GETW %0,[%1]"
  25. : "=da" (ret)
  26. : "da" (addr)
  27. : "memory");
  28. return ret;
  29. }
  30. #define __raw_readl __raw_readl
  31. static inline u32 __raw_readl(const volatile void __iomem *addr)
  32. {
  33. u32 ret;
  34. asm volatile("GETD %0,[%1]"
  35. : "=da" (ret)
  36. : "da" (addr)
  37. : "memory");
  38. return ret;
  39. }
  40. #define __raw_readq __raw_readq
  41. static inline u64 __raw_readq(const volatile void __iomem *addr)
  42. {
  43. u64 ret;
  44. asm volatile("GETL %0,%t0,[%1]"
  45. : "=da" (ret)
  46. : "da" (addr)
  47. : "memory");
  48. return ret;
  49. }
  50. #define __raw_writeb __raw_writeb
  51. static inline void __raw_writeb(u8 b, volatile void __iomem *addr)
  52. {
  53. asm volatile("SETB [%0],%1"
  54. :
  55. : "da" (addr),
  56. "da" (b)
  57. : "memory");
  58. }
  59. #define __raw_writew __raw_writew
  60. static inline void __raw_writew(u16 b, volatile void __iomem *addr)
  61. {
  62. asm volatile("SETW [%0],%1"
  63. :
  64. : "da" (addr),
  65. "da" (b)
  66. : "memory");
  67. }
  68. #define __raw_writel __raw_writel
  69. static inline void __raw_writel(u32 b, volatile void __iomem *addr)
  70. {
  71. asm volatile("SETD [%0],%1"
  72. :
  73. : "da" (addr),
  74. "da" (b)
  75. : "memory");
  76. }
  77. #define __raw_writeq __raw_writeq
  78. static inline void __raw_writeq(u64 b, volatile void __iomem *addr)
  79. {
  80. asm volatile("SETL [%0],%1,%t1"
  81. :
  82. : "da" (addr),
  83. "da" (b)
  84. : "memory");
  85. }
  86. /*
  87. * The generic io.h can define all the other generic accessors
  88. */
  89. #include <asm-generic/io.h>
  90. /*
  91. * Despite being a 32bit architecture, Meta can do 64bit memory accesses
  92. * (assuming the bus supports it).
  93. */
  94. #define readq __raw_readq
  95. #define writeq __raw_writeq
  96. /*
  97. * Meta specific I/O for accessing non-MMU areas.
  98. *
  99. * These can be provided with a physical address rather than an __iomem pointer
  100. * and should only be used by core architecture code for accessing fixed core
  101. * registers. Generic drivers should use ioremap and the generic I/O accessors.
  102. */
  103. #define metag_in8(addr) __raw_readb((volatile void __iomem *)(addr))
  104. #define metag_in16(addr) __raw_readw((volatile void __iomem *)(addr))
  105. #define metag_in32(addr) __raw_readl((volatile void __iomem *)(addr))
  106. #define metag_in64(addr) __raw_readq((volatile void __iomem *)(addr))
  107. #define metag_out8(b, addr) __raw_writeb(b, (volatile void __iomem *)(addr))
  108. #define metag_out16(b, addr) __raw_writew(b, (volatile void __iomem *)(addr))
  109. #define metag_out32(b, addr) __raw_writel(b, (volatile void __iomem *)(addr))
  110. #define metag_out64(b, addr) __raw_writeq(b, (volatile void __iomem *)(addr))
  111. /*
  112. * io remapping functions
  113. */
  114. extern void __iomem *__ioremap(unsigned long offset,
  115. size_t size, unsigned long flags);
  116. extern void __iounmap(void __iomem *addr);
  117. /**
  118. * ioremap - map bus memory into CPU space
  119. * @offset: bus address of the memory
  120. * @size: size of the resource to map
  121. *
  122. * ioremap performs a platform specific sequence of operations to
  123. * make bus memory CPU accessible via the readb/readw/readl/writeb/
  124. * writew/writel functions and the other mmio helpers. The returned
  125. * address is not guaranteed to be usable directly as a virtual
  126. * address.
  127. */
  128. #define ioremap(offset, size) \
  129. __ioremap((offset), (size), 0)
  130. #define ioremap_nocache(offset, size) \
  131. __ioremap((offset), (size), 0)
  132. #define ioremap_cached(offset, size) \
  133. __ioremap((offset), (size), _PAGE_CACHEABLE)
  134. #define ioremap_wc(offset, size) \
  135. __ioremap((offset), (size), _PAGE_WR_COMBINE)
  136. #define iounmap(addr) \
  137. __iounmap(addr)
  138. #endif /* _ASM_METAG_IO_H */