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/drivers/net/wireless/tiwlan1251/common/inc/ratesTypes.h

http://github.com/CyanogenMod/cm-kernel
C Header | 138 lines | 89 code | 13 blank | 36 comment | 0 complexity | bed1c2f294dc43c49705901315655df3 MD5 | raw file
Possible License(s): AGPL-1.0, GPL-2.0, LGPL-2.0
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  35. #ifndef RATES_TYPES_H
  36. #define RATES_TYPES_H
  37. typedef enum
  38. {
  39. DRV_RATE_AUTO = 0,
  40. DRV_RATE_1M = 1,
  41. DRV_RATE_2M = 2,
  42. DRV_RATE_5_5M = 3,
  43. DRV_RATE_11M = 4,
  44. DRV_RATE_22M = 5,
  45. DRV_RATE_6M = 6,
  46. DRV_RATE_9M = 7,
  47. DRV_RATE_12M = 8,
  48. DRV_RATE_18M = 9,
  49. DRV_RATE_24M = 10,
  50. DRV_RATE_36M = 11,
  51. DRV_RATE_48M = 12,
  52. DRV_RATE_54M = 13,
  53. DRV_RATE_MAX = 13,
  54. DRV_RATE_INVALID= 0xFF
  55. } rate_e;
  56. typedef enum
  57. {
  58. DRV_RATE_MASK_AUTO = DRV_RATE_AUTO, /*0x0000,*/
  59. DRV_RATE_MASK_1_BARKER = (1<<(DRV_RATE_1M - 1)), /*0x0001,*/
  60. DRV_RATE_MASK_2_BARKER = (1<<(DRV_RATE_2M - 1)), /*0x0002,*/
  61. DRV_RATE_MASK_5_5_CCK = (1<<(DRV_RATE_5_5M - 1)), /*0x0004,*/
  62. DRV_RATE_MASK_11_CCK = (1<<(DRV_RATE_11M - 1)), /*0x0008,*/
  63. DRV_RATE_MASK_22_PBCC = (1<<(DRV_RATE_22M - 1)), /*0x0010,*/
  64. DRV_RATE_MASK_6_OFDM = (1<<(DRV_RATE_6M - 1)), /*0x0020,*/
  65. DRV_RATE_MASK_9_OFDM = (1<<(DRV_RATE_9M - 1)), /*0x0040,*/
  66. DRV_RATE_MASK_12_OFDM = (1<<(DRV_RATE_12M - 1)), /*0x0080,*/
  67. DRV_RATE_MASK_18_OFDM = (1<<(DRV_RATE_18M - 1)), /*0x0100,*/
  68. DRV_RATE_MASK_24_OFDM = (1<<(DRV_RATE_24M - 1)), /*0x0200,*/
  69. DRV_RATE_MASK_36_OFDM = (1<<(DRV_RATE_36M - 1)), /*0x0400,*/
  70. DRV_RATE_MASK_48_OFDM = (1<<(DRV_RATE_48M - 1)), /*0x0800,*/
  71. DRV_RATE_MASK_54_OFDM = (1<<(DRV_RATE_54M - 1)), /*0x1000*/
  72. } rateMask_e;
  73. /*GWSI_RATE*/
  74. #define GWSI_1Mbits 0x00000001
  75. #define GWSI_2Mbits 0x00000002
  76. #define GWSI_5_5Mbits 0x00000004
  77. #define GWSI_6Mbits 0x00000008
  78. #define GWSI_9Mbits 0x00000010
  79. #define GWSI_11Mbits 0x00000020
  80. #define GWSI_12Mbits 0x00000040
  81. #define GWSI_18Mbits 0x00000080
  82. #define GWSI_22Mbits 0x00000100
  83. #define GWSI_24Mbits 0x00000200
  84. #define GWSI_36Mbits 0x00000800
  85. #define GWSI_48Mbits 0x00001000
  86. #define GWSI_54Mbits 0x00002000
  87. /*HW_RATE*/
  88. #define HW_RATE_1M (0x0A)
  89. #define HW_RATE_2M (0x14)
  90. #define HW_RATE_5_5M (0x37)
  91. #define HW_RATE_5_5M_PBCC (0xB7)
  92. #define HW_RATE_11M (0x6E)
  93. #define HW_RATE_11M_PBCC (0xEE)
  94. #define HW_RATE_22M_PBCC (0xDC)
  95. #define HW_RATE_6M (0x0B)
  96. #define HW_RATE_9M (0x0F)
  97. #define HW_RATE_12M (0x0A)
  98. #define HW_RATE_18M (0x0E)
  99. #define HW_RATE_24M (0x09)
  100. #define HW_RATE_36M (0x0D)
  101. #define HW_RATE_48M (0x08)
  102. #define HW_RATE_54M (0x0C)
  103. #define HW_BIT_RATE_1MBPS 0x00000001
  104. #define HW_BIT_RATE_2MBPS 0x00000002
  105. #define HW_BIT_RATE_5_5MBPS 0x00000004
  106. #define HW_BIT_RATE_6MBPS 0x00000008
  107. #define HW_BIT_RATE_9MBPS 0x00000010
  108. #define HW_BIT_RATE_11MBPS 0x00000020
  109. #define HW_BIT_RATE_12MBPS 0x00000040
  110. #define HW_BIT_RATE_18MBPS 0x00000080
  111. #define HW_BIT_RATE_22MBPS 0x00000100
  112. #define HW_BIT_RATE_24MBPS 0x00000200
  113. #define HW_BIT_RATE_36MBPS 0x00000400
  114. #define HW_BIT_RATE_48MBPS 0x00000800
  115. #define HW_BIT_RATE_54MBPS 0x00001000
  116. #define SHORT_PREAMBLE_BIT BIT_0 /*CCK or Barker depending on the rate*/
  117. #define OFDM_MOD_TYPE BIT_6
  118. #define PBCC_MOD_TYPE BIT_7
  119. typedef enum
  120. {
  121. MOD_PBCC = 1,
  122. MOD_CCK,
  123. MOD_OFDM
  124. }Modulation_e;
  125. #endif