PageRenderTime 38ms CodeModel.GetById 15ms app.highlight 13ms RepoModel.GetById 0ms app.codeStats 1ms

/sound/soc/codecs/wm8993.h

https://bitbucket.org/abioy/linux
C Header | 2132 lines | 1679 code | 117 blank | 336 comment | 0 complexity | 85b03b72ff5d45cad62c6207675a35c0 MD5 | raw file
Possible License(s): CC-BY-SA-3.0, GPL-2.0, LGPL-2.0, AGPL-1.0

Large files files are truncated, but you can click here to view the full file

  1#ifndef WM8993_H
  2#define WM8993_H
  3
  4extern struct snd_soc_dai wm8993_dai;
  5extern struct snd_soc_codec_device soc_codec_dev_wm8993;
  6
  7#define WM8993_SYSCLK_MCLK     1
  8#define WM8993_SYSCLK_FLL      2
  9
 10#define WM8993_FLL_MCLK  1
 11#define WM8993_FLL_BCLK  2
 12#define WM8993_FLL_LRCLK 3
 13
 14/*
 15 * Register values.
 16 */
 17#define WM8993_SOFTWARE_RESET                   0x00
 18#define WM8993_POWER_MANAGEMENT_1               0x01
 19#define WM8993_POWER_MANAGEMENT_2               0x02
 20#define WM8993_POWER_MANAGEMENT_3               0x03
 21#define WM8993_AUDIO_INTERFACE_1                0x04
 22#define WM8993_AUDIO_INTERFACE_2                0x05
 23#define WM8993_CLOCKING_1                       0x06
 24#define WM8993_CLOCKING_2                       0x07
 25#define WM8993_AUDIO_INTERFACE_3                0x08
 26#define WM8993_AUDIO_INTERFACE_4                0x09
 27#define WM8993_DAC_CTRL                         0x0A
 28#define WM8993_LEFT_DAC_DIGITAL_VOLUME          0x0B
 29#define WM8993_RIGHT_DAC_DIGITAL_VOLUME         0x0C
 30#define WM8993_DIGITAL_SIDE_TONE                0x0D
 31#define WM8993_ADC_CTRL                         0x0E
 32#define WM8993_LEFT_ADC_DIGITAL_VOLUME          0x0F
 33#define WM8993_RIGHT_ADC_DIGITAL_VOLUME         0x10
 34#define WM8993_GPIO_CTRL_1                      0x12
 35#define WM8993_GPIO1                            0x13
 36#define WM8993_IRQ_DEBOUNCE                     0x14
 37#define WM8993_GPIOCTRL_2                       0x16
 38#define WM8993_GPIO_POL                         0x17
 39#define WM8993_LEFT_LINE_INPUT_1_2_VOLUME       0x18
 40#define WM8993_LEFT_LINE_INPUT_3_4_VOLUME       0x19
 41#define WM8993_RIGHT_LINE_INPUT_1_2_VOLUME      0x1A
 42#define WM8993_RIGHT_LINE_INPUT_3_4_VOLUME      0x1B
 43#define WM8993_LEFT_OUTPUT_VOLUME               0x1C
 44#define WM8993_RIGHT_OUTPUT_VOLUME              0x1D
 45#define WM8993_LINE_OUTPUTS_VOLUME              0x1E
 46#define WM8993_HPOUT2_VOLUME                    0x1F
 47#define WM8993_LEFT_OPGA_VOLUME                 0x20
 48#define WM8993_RIGHT_OPGA_VOLUME                0x21
 49#define WM8993_SPKMIXL_ATTENUATION              0x22
 50#define WM8993_SPKMIXR_ATTENUATION              0x23
 51#define WM8993_SPKOUT_MIXERS                    0x24
 52#define WM8993_SPKOUT_BOOST                     0x25
 53#define WM8993_SPEAKER_VOLUME_LEFT              0x26
 54#define WM8993_SPEAKER_VOLUME_RIGHT             0x27
 55#define WM8993_INPUT_MIXER2                     0x28
 56#define WM8993_INPUT_MIXER3                     0x29
 57#define WM8993_INPUT_MIXER4                     0x2A
 58#define WM8993_INPUT_MIXER5                     0x2B
 59#define WM8993_INPUT_MIXER6                     0x2C
 60#define WM8993_OUTPUT_MIXER1                    0x2D
 61#define WM8993_OUTPUT_MIXER2                    0x2E
 62#define WM8993_OUTPUT_MIXER3                    0x2F
 63#define WM8993_OUTPUT_MIXER4                    0x30
 64#define WM8993_OUTPUT_MIXER5                    0x31
 65#define WM8993_OUTPUT_MIXER6                    0x32
 66#define WM8993_HPOUT2_MIXER                     0x33
 67#define WM8993_LINE_MIXER1                      0x34
 68#define WM8993_LINE_MIXER2                      0x35
 69#define WM8993_SPEAKER_MIXER                    0x36
 70#define WM8993_ADDITIONAL_CONTROL               0x37
 71#define WM8993_ANTIPOP1                         0x38
 72#define WM8993_ANTIPOP2                         0x39
 73#define WM8993_MICBIAS                          0x3A
 74#define WM8993_FLL_CONTROL_1                    0x3C
 75#define WM8993_FLL_CONTROL_2                    0x3D
 76#define WM8993_FLL_CONTROL_3                    0x3E
 77#define WM8993_FLL_CONTROL_4                    0x3F
 78#define WM8993_FLL_CONTROL_5                    0x40
 79#define WM8993_CLOCKING_3                       0x41
 80#define WM8993_CLOCKING_4                       0x42
 81#define WM8993_MW_SLAVE_CONTROL                 0x43
 82#define WM8993_BUS_CONTROL_1                    0x45
 83#define WM8993_WRITE_SEQUENCER_0                0x46
 84#define WM8993_WRITE_SEQUENCER_1                0x47
 85#define WM8993_WRITE_SEQUENCER_2                0x48
 86#define WM8993_WRITE_SEQUENCER_3                0x49
 87#define WM8993_WRITE_SEQUENCER_4                0x4A
 88#define WM8993_WRITE_SEQUENCER_5                0x4B
 89#define WM8993_CHARGE_PUMP_1                    0x4C
 90#define WM8993_CLASS_W_0                        0x51
 91#define WM8993_DC_SERVO_0                       0x54
 92#define WM8993_DC_SERVO_1                       0x55
 93#define WM8993_DC_SERVO_3                       0x57
 94#define WM8993_DC_SERVO_READBACK_0              0x58
 95#define WM8993_DC_SERVO_READBACK_1              0x59
 96#define WM8993_DC_SERVO_READBACK_2              0x5A
 97#define WM8993_ANALOGUE_HP_0                    0x60
 98#define WM8993_EQ1                              0x62
 99#define WM8993_EQ2                              0x63
100#define WM8993_EQ3                              0x64
101#define WM8993_EQ4                              0x65
102#define WM8993_EQ5                              0x66
103#define WM8993_EQ6                              0x67
104#define WM8993_EQ7                              0x68
105#define WM8993_EQ8                              0x69
106#define WM8993_EQ9                              0x6A
107#define WM8993_EQ10                             0x6B
108#define WM8993_EQ11                             0x6C
109#define WM8993_EQ12                             0x6D
110#define WM8993_EQ13                             0x6E
111#define WM8993_EQ14                             0x6F
112#define WM8993_EQ15                             0x70
113#define WM8993_EQ16                             0x71
114#define WM8993_EQ17                             0x72
115#define WM8993_EQ18                             0x73
116#define WM8993_EQ19                             0x74
117#define WM8993_EQ20                             0x75
118#define WM8993_EQ21                             0x76
119#define WM8993_EQ22                             0x77
120#define WM8993_EQ23                             0x78
121#define WM8993_EQ24                             0x79
122#define WM8993_DIGITAL_PULLS                    0x7A
123#define WM8993_DRC_CONTROL_1                    0x7B
124#define WM8993_DRC_CONTROL_2                    0x7C
125#define WM8993_DRC_CONTROL_3                    0x7D
126#define WM8993_DRC_CONTROL_4                    0x7E
127
128#define WM8993_REGISTER_COUNT                   0x7F
129#define WM8993_MAX_REGISTER                     0x7E
130
131/*
132 * Field Definitions.
133 */
134
135/*
136 * R0 (0x00) - Software Reset
137 */
138#define WM8993_SW_RESET_MASK                    0xFFFF  /* SW_RESET - [15:0] */
139#define WM8993_SW_RESET_SHIFT                        0  /* SW_RESET - [15:0] */
140#define WM8993_SW_RESET_WIDTH                       16  /* SW_RESET - [15:0] */
141
142/*
143 * R1 (0x01) - Power Management (1)
144 */
145#define WM8993_SPKOUTR_ENA                      0x2000  /* SPKOUTR_ENA */
146#define WM8993_SPKOUTR_ENA_MASK                 0x2000  /* SPKOUTR_ENA */
147#define WM8993_SPKOUTR_ENA_SHIFT                    13  /* SPKOUTR_ENA */
148#define WM8993_SPKOUTR_ENA_WIDTH                     1  /* SPKOUTR_ENA */
149#define WM8993_SPKOUTL_ENA                      0x1000  /* SPKOUTL_ENA */
150#define WM8993_SPKOUTL_ENA_MASK                 0x1000  /* SPKOUTL_ENA */
151#define WM8993_SPKOUTL_ENA_SHIFT                    12  /* SPKOUTL_ENA */
152#define WM8993_SPKOUTL_ENA_WIDTH                     1  /* SPKOUTL_ENA */
153#define WM8993_HPOUT2_ENA                       0x0800  /* HPOUT2_ENA */
154#define WM8993_HPOUT2_ENA_MASK                  0x0800  /* HPOUT2_ENA */
155#define WM8993_HPOUT2_ENA_SHIFT                     11  /* HPOUT2_ENA */
156#define WM8993_HPOUT2_ENA_WIDTH                      1  /* HPOUT2_ENA */
157#define WM8993_HPOUT1L_ENA                      0x0200  /* HPOUT1L_ENA */
158#define WM8993_HPOUT1L_ENA_MASK                 0x0200  /* HPOUT1L_ENA */
159#define WM8993_HPOUT1L_ENA_SHIFT                     9  /* HPOUT1L_ENA */
160#define WM8993_HPOUT1L_ENA_WIDTH                     1  /* HPOUT1L_ENA */
161#define WM8993_HPOUT1R_ENA                      0x0100  /* HPOUT1R_ENA */
162#define WM8993_HPOUT1R_ENA_MASK                 0x0100  /* HPOUT1R_ENA */
163#define WM8993_HPOUT1R_ENA_SHIFT                     8  /* HPOUT1R_ENA */
164#define WM8993_HPOUT1R_ENA_WIDTH                     1  /* HPOUT1R_ENA */
165#define WM8993_MICB2_ENA                        0x0020  /* MICB2_ENA */
166#define WM8993_MICB2_ENA_MASK                   0x0020  /* MICB2_ENA */
167#define WM8993_MICB2_ENA_SHIFT                       5  /* MICB2_ENA */
168#define WM8993_MICB2_ENA_WIDTH                       1  /* MICB2_ENA */
169#define WM8993_MICB1_ENA                        0x0010  /* MICB1_ENA */
170#define WM8993_MICB1_ENA_MASK                   0x0010  /* MICB1_ENA */
171#define WM8993_MICB1_ENA_SHIFT                       4  /* MICB1_ENA */
172#define WM8993_MICB1_ENA_WIDTH                       1  /* MICB1_ENA */
173#define WM8993_VMID_SEL_MASK                    0x0006  /* VMID_SEL - [2:1] */
174#define WM8993_VMID_SEL_SHIFT                        1  /* VMID_SEL - [2:1] */
175#define WM8993_VMID_SEL_WIDTH                        2  /* VMID_SEL - [2:1] */
176#define WM8993_BIAS_ENA                         0x0001  /* BIAS_ENA */
177#define WM8993_BIAS_ENA_MASK                    0x0001  /* BIAS_ENA */
178#define WM8993_BIAS_ENA_SHIFT                        0  /* BIAS_ENA */
179#define WM8993_BIAS_ENA_WIDTH                        1  /* BIAS_ENA */
180
181/*
182 * R2 (0x02) - Power Management (2)
183 */
184#define WM8993_TSHUT_ENA                        0x4000  /* TSHUT_ENA */
185#define WM8993_TSHUT_ENA_MASK                   0x4000  /* TSHUT_ENA */
186#define WM8993_TSHUT_ENA_SHIFT                      14  /* TSHUT_ENA */
187#define WM8993_TSHUT_ENA_WIDTH                       1  /* TSHUT_ENA */
188#define WM8993_TSHUT_OPDIS                      0x2000  /* TSHUT_OPDIS */
189#define WM8993_TSHUT_OPDIS_MASK                 0x2000  /* TSHUT_OPDIS */
190#define WM8993_TSHUT_OPDIS_SHIFT                    13  /* TSHUT_OPDIS */
191#define WM8993_TSHUT_OPDIS_WIDTH                     1  /* TSHUT_OPDIS */
192#define WM8993_OPCLK_ENA                        0x0800  /* OPCLK_ENA */
193#define WM8993_OPCLK_ENA_MASK                   0x0800  /* OPCLK_ENA */
194#define WM8993_OPCLK_ENA_SHIFT                      11  /* OPCLK_ENA */
195#define WM8993_OPCLK_ENA_WIDTH                       1  /* OPCLK_ENA */
196#define WM8993_MIXINL_ENA                       0x0200  /* MIXINL_ENA */
197#define WM8993_MIXINL_ENA_MASK                  0x0200  /* MIXINL_ENA */
198#define WM8993_MIXINL_ENA_SHIFT                      9  /* MIXINL_ENA */
199#define WM8993_MIXINL_ENA_WIDTH                      1  /* MIXINL_ENA */
200#define WM8993_MIXINR_ENA                       0x0100  /* MIXINR_ENA */
201#define WM8993_MIXINR_ENA_MASK                  0x0100  /* MIXINR_ENA */
202#define WM8993_MIXINR_ENA_SHIFT                      8  /* MIXINR_ENA */
203#define WM8993_MIXINR_ENA_WIDTH                      1  /* MIXINR_ENA */
204#define WM8993_IN2L_ENA                         0x0080  /* IN2L_ENA */
205#define WM8993_IN2L_ENA_MASK                    0x0080  /* IN2L_ENA */
206#define WM8993_IN2L_ENA_SHIFT                        7  /* IN2L_ENA */
207#define WM8993_IN2L_ENA_WIDTH                        1  /* IN2L_ENA */
208#define WM8993_IN1L_ENA                         0x0040  /* IN1L_ENA */
209#define WM8993_IN1L_ENA_MASK                    0x0040  /* IN1L_ENA */
210#define WM8993_IN1L_ENA_SHIFT                        6  /* IN1L_ENA */
211#define WM8993_IN1L_ENA_WIDTH                        1  /* IN1L_ENA */
212#define WM8993_IN2R_ENA                         0x0020  /* IN2R_ENA */
213#define WM8993_IN2R_ENA_MASK                    0x0020  /* IN2R_ENA */
214#define WM8993_IN2R_ENA_SHIFT                        5  /* IN2R_ENA */
215#define WM8993_IN2R_ENA_WIDTH                        1  /* IN2R_ENA */
216#define WM8993_IN1R_ENA                         0x0010  /* IN1R_ENA */
217#define WM8993_IN1R_ENA_MASK                    0x0010  /* IN1R_ENA */
218#define WM8993_IN1R_ENA_SHIFT                        4  /* IN1R_ENA */
219#define WM8993_IN1R_ENA_WIDTH                        1  /* IN1R_ENA */
220#define WM8993_ADCL_ENA                         0x0002  /* ADCL_ENA */
221#define WM8993_ADCL_ENA_MASK                    0x0002  /* ADCL_ENA */
222#define WM8993_ADCL_ENA_SHIFT                        1  /* ADCL_ENA */
223#define WM8993_ADCL_ENA_WIDTH                        1  /* ADCL_ENA */
224#define WM8993_ADCR_ENA                         0x0001  /* ADCR_ENA */
225#define WM8993_ADCR_ENA_MASK                    0x0001  /* ADCR_ENA */
226#define WM8993_ADCR_ENA_SHIFT                        0  /* ADCR_ENA */
227#define WM8993_ADCR_ENA_WIDTH                        1  /* ADCR_ENA */
228
229/*
230 * R3 (0x03) - Power Management (3)
231 */
232#define WM8993_LINEOUT1N_ENA                    0x2000  /* LINEOUT1N_ENA */
233#define WM8993_LINEOUT1N_ENA_MASK               0x2000  /* LINEOUT1N_ENA */
234#define WM8993_LINEOUT1N_ENA_SHIFT                  13  /* LINEOUT1N_ENA */
235#define WM8993_LINEOUT1N_ENA_WIDTH                   1  /* LINEOUT1N_ENA */
236#define WM8993_LINEOUT1P_ENA                    0x1000  /* LINEOUT1P_ENA */
237#define WM8993_LINEOUT1P_ENA_MASK               0x1000  /* LINEOUT1P_ENA */
238#define WM8993_LINEOUT1P_ENA_SHIFT                  12  /* LINEOUT1P_ENA */
239#define WM8993_LINEOUT1P_ENA_WIDTH                   1  /* LINEOUT1P_ENA */
240#define WM8993_LINEOUT2N_ENA                    0x0800  /* LINEOUT2N_ENA */
241#define WM8993_LINEOUT2N_ENA_MASK               0x0800  /* LINEOUT2N_ENA */
242#define WM8993_LINEOUT2N_ENA_SHIFT                  11  /* LINEOUT2N_ENA */
243#define WM8993_LINEOUT2N_ENA_WIDTH                   1  /* LINEOUT2N_ENA */
244#define WM8993_LINEOUT2P_ENA                    0x0400  /* LINEOUT2P_ENA */
245#define WM8993_LINEOUT2P_ENA_MASK               0x0400  /* LINEOUT2P_ENA */
246#define WM8993_LINEOUT2P_ENA_SHIFT                  10  /* LINEOUT2P_ENA */
247#define WM8993_LINEOUT2P_ENA_WIDTH                   1  /* LINEOUT2P_ENA */
248#define WM8993_SPKRVOL_ENA                      0x0200  /* SPKRVOL_ENA */
249#define WM8993_SPKRVOL_ENA_MASK                 0x0200  /* SPKRVOL_ENA */
250#define WM8993_SPKRVOL_ENA_SHIFT                     9  /* SPKRVOL_ENA */
251#define WM8993_SPKRVOL_ENA_WIDTH                     1  /* SPKRVOL_ENA */
252#define WM8993_SPKLVOL_ENA                      0x0100  /* SPKLVOL_ENA */
253#define WM8993_SPKLVOL_ENA_MASK                 0x0100  /* SPKLVOL_ENA */
254#define WM8993_SPKLVOL_ENA_SHIFT                     8  /* SPKLVOL_ENA */
255#define WM8993_SPKLVOL_ENA_WIDTH                     1  /* SPKLVOL_ENA */
256#define WM8993_MIXOUTLVOL_ENA                   0x0080  /* MIXOUTLVOL_ENA */
257#define WM8993_MIXOUTLVOL_ENA_MASK              0x0080  /* MIXOUTLVOL_ENA */
258#define WM8993_MIXOUTLVOL_ENA_SHIFT                  7  /* MIXOUTLVOL_ENA */
259#define WM8993_MIXOUTLVOL_ENA_WIDTH                  1  /* MIXOUTLVOL_ENA */
260#define WM8993_MIXOUTRVOL_ENA                   0x0040  /* MIXOUTRVOL_ENA */
261#define WM8993_MIXOUTRVOL_ENA_MASK              0x0040  /* MIXOUTRVOL_ENA */
262#define WM8993_MIXOUTRVOL_ENA_SHIFT                  6  /* MIXOUTRVOL_ENA */
263#define WM8993_MIXOUTRVOL_ENA_WIDTH                  1  /* MIXOUTRVOL_ENA */
264#define WM8993_MIXOUTL_ENA                      0x0020  /* MIXOUTL_ENA */
265#define WM8993_MIXOUTL_ENA_MASK                 0x0020  /* MIXOUTL_ENA */
266#define WM8993_MIXOUTL_ENA_SHIFT                     5  /* MIXOUTL_ENA */
267#define WM8993_MIXOUTL_ENA_WIDTH                     1  /* MIXOUTL_ENA */
268#define WM8993_MIXOUTR_ENA                      0x0010  /* MIXOUTR_ENA */
269#define WM8993_MIXOUTR_ENA_MASK                 0x0010  /* MIXOUTR_ENA */
270#define WM8993_MIXOUTR_ENA_SHIFT                     4  /* MIXOUTR_ENA */
271#define WM8993_MIXOUTR_ENA_WIDTH                     1  /* MIXOUTR_ENA */
272#define WM8993_DACL_ENA                         0x0002  /* DACL_ENA */
273#define WM8993_DACL_ENA_MASK                    0x0002  /* DACL_ENA */
274#define WM8993_DACL_ENA_SHIFT                        1  /* DACL_ENA */
275#define WM8993_DACL_ENA_WIDTH                        1  /* DACL_ENA */
276#define WM8993_DACR_ENA                         0x0001  /* DACR_ENA */
277#define WM8993_DACR_ENA_MASK                    0x0001  /* DACR_ENA */
278#define WM8993_DACR_ENA_SHIFT                        0  /* DACR_ENA */
279#define WM8993_DACR_ENA_WIDTH                        1  /* DACR_ENA */
280
281/*
282 * R4 (0x04) - Audio Interface (1)
283 */
284#define WM8993_AIFADCL_SRC                      0x8000  /* AIFADCL_SRC */
285#define WM8993_AIFADCL_SRC_MASK                 0x8000  /* AIFADCL_SRC */
286#define WM8993_AIFADCL_SRC_SHIFT                    15  /* AIFADCL_SRC */
287#define WM8993_AIFADCL_SRC_WIDTH                     1  /* AIFADCL_SRC */
288#define WM8993_AIFADCR_SRC                      0x4000  /* AIFADCR_SRC */
289#define WM8993_AIFADCR_SRC_MASK                 0x4000  /* AIFADCR_SRC */
290#define WM8993_AIFADCR_SRC_SHIFT                    14  /* AIFADCR_SRC */
291#define WM8993_AIFADCR_SRC_WIDTH                     1  /* AIFADCR_SRC */
292#define WM8993_AIFADC_TDM                       0x2000  /* AIFADC_TDM */
293#define WM8993_AIFADC_TDM_MASK                  0x2000  /* AIFADC_TDM */
294#define WM8993_AIFADC_TDM_SHIFT                     13  /* AIFADC_TDM */
295#define WM8993_AIFADC_TDM_WIDTH                      1  /* AIFADC_TDM */
296#define WM8993_AIFADC_TDM_CHAN                  0x1000  /* AIFADC_TDM_CHAN */
297#define WM8993_AIFADC_TDM_CHAN_MASK             0x1000  /* AIFADC_TDM_CHAN */
298#define WM8993_AIFADC_TDM_CHAN_SHIFT                12  /* AIFADC_TDM_CHAN */
299#define WM8993_AIFADC_TDM_CHAN_WIDTH                 1  /* AIFADC_TDM_CHAN */
300#define WM8993_BCLK_DIR                         0x0200  /* BCLK_DIR */
301#define WM8993_BCLK_DIR_MASK                    0x0200  /* BCLK_DIR */
302#define WM8993_BCLK_DIR_SHIFT                        9  /* BCLK_DIR */
303#define WM8993_BCLK_DIR_WIDTH                        1  /* BCLK_DIR */
304#define WM8993_AIF_BCLK_INV                     0x0100  /* AIF_BCLK_INV */
305#define WM8993_AIF_BCLK_INV_MASK                0x0100  /* AIF_BCLK_INV */
306#define WM8993_AIF_BCLK_INV_SHIFT                    8  /* AIF_BCLK_INV */
307#define WM8993_AIF_BCLK_INV_WIDTH                    1  /* AIF_BCLK_INV */
308#define WM8993_AIF_LRCLK_INV                    0x0080  /* AIF_LRCLK_INV */
309#define WM8993_AIF_LRCLK_INV_MASK               0x0080  /* AIF_LRCLK_INV */
310#define WM8993_AIF_LRCLK_INV_SHIFT                   7  /* AIF_LRCLK_INV */
311#define WM8993_AIF_LRCLK_INV_WIDTH                   1  /* AIF_LRCLK_INV */
312#define WM8993_AIF_WL_MASK                      0x0060  /* AIF_WL - [6:5] */
313#define WM8993_AIF_WL_SHIFT                          5  /* AIF_WL - [6:5] */
314#define WM8993_AIF_WL_WIDTH                          2  /* AIF_WL - [6:5] */
315#define WM8993_AIF_FMT_MASK                     0x0018  /* AIF_FMT - [4:3] */
316#define WM8993_AIF_FMT_SHIFT                         3  /* AIF_FMT - [4:3] */
317#define WM8993_AIF_FMT_WIDTH                         2  /* AIF_FMT - [4:3] */
318
319/*
320 * R5 (0x05) - Audio Interface (2)
321 */
322#define WM8993_AIFDACL_SRC                      0x8000  /* AIFDACL_SRC */
323#define WM8993_AIFDACL_SRC_MASK                 0x8000  /* AIFDACL_SRC */
324#define WM8993_AIFDACL_SRC_SHIFT                    15  /* AIFDACL_SRC */
325#define WM8993_AIFDACL_SRC_WIDTH                     1  /* AIFDACL_SRC */
326#define WM8993_AIFDACR_SRC                      0x4000  /* AIFDACR_SRC */
327#define WM8993_AIFDACR_SRC_MASK                 0x4000  /* AIFDACR_SRC */
328#define WM8993_AIFDACR_SRC_SHIFT                    14  /* AIFDACR_SRC */
329#define WM8993_AIFDACR_SRC_WIDTH                     1  /* AIFDACR_SRC */
330#define WM8993_AIFDAC_TDM                       0x2000  /* AIFDAC_TDM */
331#define WM8993_AIFDAC_TDM_MASK                  0x2000  /* AIFDAC_TDM */
332#define WM8993_AIFDAC_TDM_SHIFT                     13  /* AIFDAC_TDM */
333#define WM8993_AIFDAC_TDM_WIDTH                      1  /* AIFDAC_TDM */
334#define WM8993_AIFDAC_TDM_CHAN                  0x1000  /* AIFDAC_TDM_CHAN */
335#define WM8993_AIFDAC_TDM_CHAN_MASK             0x1000  /* AIFDAC_TDM_CHAN */
336#define WM8993_AIFDAC_TDM_CHAN_SHIFT                12  /* AIFDAC_TDM_CHAN */
337#define WM8993_AIFDAC_TDM_CHAN_WIDTH                 1  /* AIFDAC_TDM_CHAN */
338#define WM8993_DAC_BOOST_MASK                   0x0C00  /* DAC_BOOST - [11:10] */
339#define WM8993_DAC_BOOST_SHIFT                      10  /* DAC_BOOST - [11:10] */
340#define WM8993_DAC_BOOST_WIDTH                       2  /* DAC_BOOST - [11:10] */
341#define WM8993_DAC_COMP                         0x0010  /* DAC_COMP */
342#define WM8993_DAC_COMP_MASK                    0x0010  /* DAC_COMP */
343#define WM8993_DAC_COMP_SHIFT                        4  /* DAC_COMP */
344#define WM8993_DAC_COMP_WIDTH                        1  /* DAC_COMP */
345#define WM8993_DAC_COMPMODE                     0x0008  /* DAC_COMPMODE */
346#define WM8993_DAC_COMPMODE_MASK                0x0008  /* DAC_COMPMODE */
347#define WM8993_DAC_COMPMODE_SHIFT                    3  /* DAC_COMPMODE */
348#define WM8993_DAC_COMPMODE_WIDTH                    1  /* DAC_COMPMODE */
349#define WM8993_ADC_COMP                         0x0004  /* ADC_COMP */
350#define WM8993_ADC_COMP_MASK                    0x0004  /* ADC_COMP */
351#define WM8993_ADC_COMP_SHIFT                        2  /* ADC_COMP */
352#define WM8993_ADC_COMP_WIDTH                        1  /* ADC_COMP */
353#define WM8993_ADC_COMPMODE                     0x0002  /* ADC_COMPMODE */
354#define WM8993_ADC_COMPMODE_MASK                0x0002  /* ADC_COMPMODE */
355#define WM8993_ADC_COMPMODE_SHIFT                    1  /* ADC_COMPMODE */
356#define WM8993_ADC_COMPMODE_WIDTH                    1  /* ADC_COMPMODE */
357#define WM8993_LOOPBACK                         0x0001  /* LOOPBACK */
358#define WM8993_LOOPBACK_MASK                    0x0001  /* LOOPBACK */
359#define WM8993_LOOPBACK_SHIFT                        0  /* LOOPBACK */
360#define WM8993_LOOPBACK_WIDTH                        1  /* LOOPBACK */
361
362/*
363 * R6 (0x06) - Clocking 1
364 */
365#define WM8993_TOCLK_RATE                       0x8000  /* TOCLK_RATE */
366#define WM8993_TOCLK_RATE_MASK                  0x8000  /* TOCLK_RATE */
367#define WM8993_TOCLK_RATE_SHIFT                     15  /* TOCLK_RATE */
368#define WM8993_TOCLK_RATE_WIDTH                      1  /* TOCLK_RATE */
369#define WM8993_TOCLK_ENA                        0x4000  /* TOCLK_ENA */
370#define WM8993_TOCLK_ENA_MASK                   0x4000  /* TOCLK_ENA */
371#define WM8993_TOCLK_ENA_SHIFT                      14  /* TOCLK_ENA */
372#define WM8993_TOCLK_ENA_WIDTH                       1  /* TOCLK_ENA */
373#define WM8993_OPCLK_DIV_MASK                   0x1E00  /* OPCLK_DIV - [12:9] */
374#define WM8993_OPCLK_DIV_SHIFT                       9  /* OPCLK_DIV - [12:9] */
375#define WM8993_OPCLK_DIV_WIDTH                       4  /* OPCLK_DIV - [12:9] */
376#define WM8993_DCLK_DIV_MASK                    0x01C0  /* DCLK_DIV - [8:6] */
377#define WM8993_DCLK_DIV_SHIFT                        6  /* DCLK_DIV - [8:6] */
378#define WM8993_DCLK_DIV_WIDTH                        3  /* DCLK_DIV - [8:6] */
379#define WM8993_BCLK_DIV_MASK                    0x001E  /* BCLK_DIV - [4:1] */
380#define WM8993_BCLK_DIV_SHIFT                        1  /* BCLK_DIV - [4:1] */
381#define WM8993_BCLK_DIV_WIDTH                        4  /* BCLK_DIV - [4:1] */
382
383/*
384 * R7 (0x07) - Clocking 2
385 */
386#define WM8993_MCLK_SRC                         0x8000  /* MCLK_SRC */
387#define WM8993_MCLK_SRC_MASK                    0x8000  /* MCLK_SRC */
388#define WM8993_MCLK_SRC_SHIFT                       15  /* MCLK_SRC */
389#define WM8993_MCLK_SRC_WIDTH                        1  /* MCLK_SRC */
390#define WM8993_SYSCLK_SRC                       0x4000  /* SYSCLK_SRC */
391#define WM8993_SYSCLK_SRC_MASK                  0x4000  /* SYSCLK_SRC */
392#define WM8993_SYSCLK_SRC_SHIFT                     14  /* SYSCLK_SRC */
393#define WM8993_SYSCLK_SRC_WIDTH                      1  /* SYSCLK_SRC */
394#define WM8993_MCLK_DIV                         0x1000  /* MCLK_DIV */
395#define WM8993_MCLK_DIV_MASK                    0x1000  /* MCLK_DIV */
396#define WM8993_MCLK_DIV_SHIFT                       12  /* MCLK_DIV */
397#define WM8993_MCLK_DIV_WIDTH                        1  /* MCLK_DIV */
398#define WM8993_MCLK_INV                         0x0400  /* MCLK_INV */
399#define WM8993_MCLK_INV_MASK                    0x0400  /* MCLK_INV */
400#define WM8993_MCLK_INV_SHIFT                       10  /* MCLK_INV */
401#define WM8993_MCLK_INV_WIDTH                        1  /* MCLK_INV */
402#define WM8993_ADC_DIV_MASK                     0x00E0  /* ADC_DIV - [7:5] */
403#define WM8993_ADC_DIV_SHIFT                         5  /* ADC_DIV - [7:5] */
404#define WM8993_ADC_DIV_WIDTH                         3  /* ADC_DIV - [7:5] */
405#define WM8993_DAC_DIV_MASK                     0x001C  /* DAC_DIV - [4:2] */
406#define WM8993_DAC_DIV_SHIFT                         2  /* DAC_DIV - [4:2] */
407#define WM8993_DAC_DIV_WIDTH                         3  /* DAC_DIV - [4:2] */
408
409/*
410 * R8 (0x08) - Audio Interface (3)
411 */
412#define WM8993_AIF_MSTR1                        0x8000  /* AIF_MSTR1 */
413#define WM8993_AIF_MSTR1_MASK                   0x8000  /* AIF_MSTR1 */
414#define WM8993_AIF_MSTR1_SHIFT                      15  /* AIF_MSTR1 */
415#define WM8993_AIF_MSTR1_WIDTH                       1  /* AIF_MSTR1 */
416
417/*
418 * R9 (0x09) - Audio Interface (4)
419 */
420#define WM8993_AIF_TRIS                         0x2000  /* AIF_TRIS */
421#define WM8993_AIF_TRIS_MASK                    0x2000  /* AIF_TRIS */
422#define WM8993_AIF_TRIS_SHIFT                       13  /* AIF_TRIS */
423#define WM8993_AIF_TRIS_WIDTH                        1  /* AIF_TRIS */
424#define WM8993_LRCLK_DIR                        0x0800  /* LRCLK_DIR */
425#define WM8993_LRCLK_DIR_MASK                   0x0800  /* LRCLK_DIR */
426#define WM8993_LRCLK_DIR_SHIFT                      11  /* LRCLK_DIR */
427#define WM8993_LRCLK_DIR_WIDTH                       1  /* LRCLK_DIR */
428#define WM8993_LRCLK_RATE_MASK                  0x07FF  /* LRCLK_RATE - [10:0] */
429#define WM8993_LRCLK_RATE_SHIFT                      0  /* LRCLK_RATE - [10:0] */
430#define WM8993_LRCLK_RATE_WIDTH                     11  /* LRCLK_RATE - [10:0] */
431
432/*
433 * R10 (0x0A) - DAC CTRL
434 */
435#define WM8993_DAC_OSR128                       0x2000  /* DAC_OSR128 */
436#define WM8993_DAC_OSR128_MASK                  0x2000  /* DAC_OSR128 */
437#define WM8993_DAC_OSR128_SHIFT                     13  /* DAC_OSR128 */
438#define WM8993_DAC_OSR128_WIDTH                      1  /* DAC_OSR128 */
439#define WM8993_DAC_MONO                         0x0200  /* DAC_MONO */
440#define WM8993_DAC_MONO_MASK                    0x0200  /* DAC_MONO */
441#define WM8993_DAC_MONO_SHIFT                        9  /* DAC_MONO */
442#define WM8993_DAC_MONO_WIDTH                        1  /* DAC_MONO */
443#define WM8993_DAC_SB_FILT                      0x0100  /* DAC_SB_FILT */
444#define WM8993_DAC_SB_FILT_MASK                 0x0100  /* DAC_SB_FILT */
445#define WM8993_DAC_SB_FILT_SHIFT                     8  /* DAC_SB_FILT */
446#define WM8993_DAC_SB_FILT_WIDTH                     1  /* DAC_SB_FILT */
447#define WM8993_DAC_MUTERATE                     0x0080  /* DAC_MUTERATE */
448#define WM8993_DAC_MUTERATE_MASK                0x0080  /* DAC_MUTERATE */
449#define WM8993_DAC_MUTERATE_SHIFT                    7  /* DAC_MUTERATE */
450#define WM8993_DAC_MUTERATE_WIDTH                    1  /* DAC_MUTERATE */
451#define WM8993_DAC_UNMUTE_RAMP                  0x0040  /* DAC_UNMUTE_RAMP */
452#define WM8993_DAC_UNMUTE_RAMP_MASK             0x0040  /* DAC_UNMUTE_RAMP */
453#define WM8993_DAC_UNMUTE_RAMP_SHIFT                 6  /* DAC_UNMUTE_RAMP */
454#define WM8993_DAC_UNMUTE_RAMP_WIDTH                 1  /* DAC_UNMUTE_RAMP */
455#define WM8993_DEEMPH_MASK                      0x0030  /* DEEMPH - [5:4] */
456#define WM8993_DEEMPH_SHIFT                          4  /* DEEMPH - [5:4] */
457#define WM8993_DEEMPH_WIDTH                          2  /* DEEMPH - [5:4] */
458#define WM8993_DAC_MUTE                         0x0004  /* DAC_MUTE */
459#define WM8993_DAC_MUTE_MASK                    0x0004  /* DAC_MUTE */
460#define WM8993_DAC_MUTE_SHIFT                        2  /* DAC_MUTE */
461#define WM8993_DAC_MUTE_WIDTH                        1  /* DAC_MUTE */
462#define WM8993_DACL_DATINV                      0x0002  /* DACL_DATINV */
463#define WM8993_DACL_DATINV_MASK                 0x0002  /* DACL_DATINV */
464#define WM8993_DACL_DATINV_SHIFT                     1  /* DACL_DATINV */
465#define WM8993_DACL_DATINV_WIDTH                     1  /* DACL_DATINV */
466#define WM8993_DACR_DATINV                      0x0001  /* DACR_DATINV */
467#define WM8993_DACR_DATINV_MASK                 0x0001  /* DACR_DATINV */
468#define WM8993_DACR_DATINV_SHIFT                     0  /* DACR_DATINV */
469#define WM8993_DACR_DATINV_WIDTH                     1  /* DACR_DATINV */
470
471/*
472 * R11 (0x0B) - Left DAC Digital Volume
473 */
474#define WM8993_DAC_VU                           0x0100  /* DAC_VU */
475#define WM8993_DAC_VU_MASK                      0x0100  /* DAC_VU */
476#define WM8993_DAC_VU_SHIFT                          8  /* DAC_VU */
477#define WM8993_DAC_VU_WIDTH                          1  /* DAC_VU */
478#define WM8993_DACL_VOL_MASK                    0x00FF  /* DACL_VOL - [7:0] */
479#define WM8993_DACL_VOL_SHIFT                        0  /* DACL_VOL - [7:0] */
480#define WM8993_DACL_VOL_WIDTH                        8  /* DACL_VOL - [7:0] */
481
482/*
483 * R12 (0x0C) - Right DAC Digital Volume
484 */
485#define WM8993_DAC_VU                           0x0100  /* DAC_VU */
486#define WM8993_DAC_VU_MASK                      0x0100  /* DAC_VU */
487#define WM8993_DAC_VU_SHIFT                          8  /* DAC_VU */
488#define WM8993_DAC_VU_WIDTH                          1  /* DAC_VU */
489#define WM8993_DACR_VOL_MASK                    0x00FF  /* DACR_VOL - [7:0] */
490#define WM8993_DACR_VOL_SHIFT                        0  /* DACR_VOL - [7:0] */
491#define WM8993_DACR_VOL_WIDTH                        8  /* DACR_VOL - [7:0] */
492
493/*
494 * R13 (0x0D) - Digital Side Tone
495 */
496#define WM8993_ADCL_DAC_SVOL_MASK               0x1E00  /* ADCL_DAC_SVOL - [12:9] */
497#define WM8993_ADCL_DAC_SVOL_SHIFT                   9  /* ADCL_DAC_SVOL - [12:9] */
498#define WM8993_ADCL_DAC_SVOL_WIDTH                   4  /* ADCL_DAC_SVOL - [12:9] */
499#define WM8993_ADCR_DAC_SVOL_MASK               0x01E0  /* ADCR_DAC_SVOL - [8:5] */
500#define WM8993_ADCR_DAC_SVOL_SHIFT                   5  /* ADCR_DAC_SVOL - [8:5] */
501#define WM8993_ADCR_DAC_SVOL_WIDTH                   4  /* ADCR_DAC_SVOL - [8:5] */
502#define WM8993_ADC_TO_DACL_MASK                 0x000C  /* ADC_TO_DACL - [3:2] */
503#define WM8993_ADC_TO_DACL_SHIFT                     2  /* ADC_TO_DACL - [3:2] */
504#define WM8993_ADC_TO_DACL_WIDTH                     2  /* ADC_TO_DACL - [3:2] */
505#define WM8993_ADC_TO_DACR_MASK                 0x0003  /* ADC_TO_DACR - [1:0] */
506#define WM8993_ADC_TO_DACR_SHIFT                     0  /* ADC_TO_DACR - [1:0] */
507#define WM8993_ADC_TO_DACR_WIDTH                     2  /* ADC_TO_DACR - [1:0] */
508
509/*
510 * R14 (0x0E) - ADC CTRL
511 */
512#define WM8993_ADC_OSR128                       0x0200  /* ADC_OSR128 */
513#define WM8993_ADC_OSR128_MASK                  0x0200  /* ADC_OSR128 */
514#define WM8993_ADC_OSR128_SHIFT                      9  /* ADC_OSR128 */
515#define WM8993_ADC_OSR128_WIDTH                      1  /* ADC_OSR128 */
516#define WM8993_ADC_HPF                          0x0100  /* ADC_HPF */
517#define WM8993_ADC_HPF_MASK                     0x0100  /* ADC_HPF */
518#define WM8993_ADC_HPF_SHIFT                         8  /* ADC_HPF */
519#define WM8993_ADC_HPF_WIDTH                         1  /* ADC_HPF */
520#define WM8993_ADC_HPF_CUT_MASK                 0x0060  /* ADC_HPF_CUT - [6:5] */
521#define WM8993_ADC_HPF_CUT_SHIFT                     5  /* ADC_HPF_CUT - [6:5] */
522#define WM8993_ADC_HPF_CUT_WIDTH                     2  /* ADC_HPF_CUT - [6:5] */
523#define WM8993_ADCL_DATINV                      0x0002  /* ADCL_DATINV */
524#define WM8993_ADCL_DATINV_MASK                 0x0002  /* ADCL_DATINV */
525#define WM8993_ADCL_DATINV_SHIFT                     1  /* ADCL_DATINV */
526#define WM8993_ADCL_DATINV_WIDTH                     1  /* ADCL_DATINV */
527#define WM8993_ADCR_DATINV                      0x0001  /* ADCR_DATINV */
528#define WM8993_ADCR_DATINV_MASK                 0x0001  /* ADCR_DATINV */
529#define WM8993_ADCR_DATINV_SHIFT                     0  /* ADCR_DATINV */
530#define WM8993_ADCR_DATINV_WIDTH                     1  /* ADCR_DATINV */
531
532/*
533 * R15 (0x0F) - Left ADC Digital Volume
534 */
535#define WM8993_ADC_VU                           0x0100  /* ADC_VU */
536#define WM8993_ADC_VU_MASK                      0x0100  /* ADC_VU */
537#define WM8993_ADC_VU_SHIFT                          8  /* ADC_VU */
538#define WM8993_ADC_VU_WIDTH                          1  /* ADC_VU */
539#define WM8993_ADCL_VOL_MASK                    0x00FF  /* ADCL_VOL - [7:0] */
540#define WM8993_ADCL_VOL_SHIFT                        0  /* ADCL_VOL - [7:0] */
541#define WM8993_ADCL_VOL_WIDTH                        8  /* ADCL_VOL - [7:0] */
542
543/*
544 * R16 (0x10) - Right ADC Digital Volume
545 */
546#define WM8993_ADC_VU                           0x0100  /* ADC_VU */
547#define WM8993_ADC_VU_MASK                      0x0100  /* ADC_VU */
548#define WM8993_ADC_VU_SHIFT                          8  /* ADC_VU */
549#define WM8993_ADC_VU_WIDTH                          1  /* ADC_VU */
550#define WM8993_ADCR_VOL_MASK                    0x00FF  /* ADCR_VOL - [7:0] */
551#define WM8993_ADCR_VOL_SHIFT                        0  /* ADCR_VOL - [7:0] */
552#define WM8993_ADCR_VOL_WIDTH                        8  /* ADCR_VOL - [7:0] */
553
554/*
555 * R18 (0x12) - GPIO CTRL 1
556 */
557#define WM8993_JD2_SC_EINT                      0x8000  /* JD2_SC_EINT */
558#define WM8993_JD2_SC_EINT_MASK                 0x8000  /* JD2_SC_EINT */
559#define WM8993_JD2_SC_EINT_SHIFT                    15  /* JD2_SC_EINT */
560#define WM8993_JD2_SC_EINT_WIDTH                     1  /* JD2_SC_EINT */
561#define WM8993_JD2_EINT                         0x4000  /* JD2_EINT */
562#define WM8993_JD2_EINT_MASK                    0x4000  /* JD2_EINT */
563#define WM8993_JD2_EINT_SHIFT                       14  /* JD2_EINT */
564#define WM8993_JD2_EINT_WIDTH                        1  /* JD2_EINT */
565#define WM8993_WSEQ_EINT                        0x2000  /* WSEQ_EINT */
566#define WM8993_WSEQ_EINT_MASK                   0x2000  /* WSEQ_EINT */
567#define WM8993_WSEQ_EINT_SHIFT                      13  /* WSEQ_EINT */
568#define WM8993_WSEQ_EINT_WIDTH                       1  /* WSEQ_EINT */
569#define WM8993_IRQ                              0x1000  /* IRQ */
570#define WM8993_IRQ_MASK                         0x1000  /* IRQ */
571#define WM8993_IRQ_SHIFT                            12  /* IRQ */
572#define WM8993_IRQ_WIDTH                             1  /* IRQ */
573#define WM8993_TEMPOK_EINT                      0x0800  /* TEMPOK_EINT */
574#define WM8993_TEMPOK_EINT_MASK                 0x0800  /* TEMPOK_EINT */
575#define WM8993_TEMPOK_EINT_SHIFT                    11  /* TEMPOK_EINT */
576#define WM8993_TEMPOK_EINT_WIDTH                     1  /* TEMPOK_EINT */
577#define WM8993_JD1_SC_EINT                      0x0400  /* JD1_SC_EINT */
578#define WM8993_JD1_SC_EINT_MASK                 0x0400  /* JD1_SC_EINT */
579#define WM8993_JD1_SC_EINT_SHIFT                    10  /* JD1_SC_EINT */
580#define WM8993_JD1_SC_EINT_WIDTH                     1  /* JD1_SC_EINT */
581#define WM8993_JD1_EINT                         0x0200  /* JD1_EINT */
582#define WM8993_JD1_EINT_MASK                    0x0200  /* JD1_EINT */
583#define WM8993_JD1_EINT_SHIFT                        9  /* JD1_EINT */
584#define WM8993_JD1_EINT_WIDTH                        1  /* JD1_EINT */
585#define WM8993_FLL_LOCK_EINT                    0x0100  /* FLL_LOCK_EINT */
586#define WM8993_FLL_LOCK_EINT_MASK               0x0100  /* FLL_LOCK_EINT */
587#define WM8993_FLL_LOCK_EINT_SHIFT                   8  /* FLL_LOCK_EINT */
588#define WM8993_FLL_LOCK_EINT_WIDTH                   1  /* FLL_LOCK_EINT */
589#define WM8993_GPI8_EINT                        0x0080  /* GPI8_EINT */
590#define WM8993_GPI8_EINT_MASK                   0x0080  /* GPI8_EINT */
591#define WM8993_GPI8_EINT_SHIFT                       7  /* GPI8_EINT */
592#define WM8993_GPI8_EINT_WIDTH                       1  /* GPI8_EINT */
593#define WM8993_GPI7_EINT                        0x0040  /* GPI7_EINT */
594#define WM8993_GPI7_EINT_MASK                   0x0040  /* GPI7_EINT */
595#define WM8993_GPI7_EINT_SHIFT                       6  /* GPI7_EINT */
596#define WM8993_GPI7_EINT_WIDTH                       1  /* GPI7_EINT */
597#define WM8993_GPIO1_EINT                       0x0001  /* GPIO1_EINT */
598#define WM8993_GPIO1_EINT_MASK                  0x0001  /* GPIO1_EINT */
599#define WM8993_GPIO1_EINT_SHIFT                      0  /* GPIO1_EINT */
600#define WM8993_GPIO1_EINT_WIDTH                      1  /* GPIO1_EINT */
601
602/*
603 * R19 (0x13) - GPIO1
604 */
605#define WM8993_GPIO1_PU                         0x0020  /* GPIO1_PU */
606#define WM8993_GPIO1_PU_MASK                    0x0020  /* GPIO1_PU */
607#define WM8993_GPIO1_PU_SHIFT                        5  /* GPIO1_PU */
608#define WM8993_GPIO1_PU_WIDTH                        1  /* GPIO1_PU */
609#define WM8993_GPIO1_PD                         0x0010  /* GPIO1_PD */
610#define WM8993_GPIO1_PD_MASK                    0x0010  /* GPIO1_PD */
611#define WM8993_GPIO1_PD_SHIFT                        4  /* GPIO1_PD */
612#define WM8993_GPIO1_PD_WIDTH                        1  /* GPIO1_PD */
613#define WM8993_GPIO1_SEL_MASK                   0x000F  /* GPIO1_SEL - [3:0] */
614#define WM8993_GPIO1_SEL_SHIFT                       0  /* GPIO1_SEL - [3:0] */
615#define WM8993_GPIO1_SEL_WIDTH                       4  /* GPIO1_SEL - [3:0] */
616
617/*
618 * R20 (0x14) - IRQ_DEBOUNCE
619 */
620#define WM8993_JD2_SC_DB                        0x8000  /* JD2_SC_DB */
621#define WM8993_JD2_SC_DB_MASK                   0x8000  /* JD2_SC_DB */
622#define WM8993_JD2_SC_DB_SHIFT                      15  /* JD2_SC_DB */
623#define WM8993_JD2_SC_DB_WIDTH                       1  /* JD2_SC_DB */
624#define WM8993_JD2_DB                           0x4000  /* JD2_DB */
625#define WM8993_JD2_DB_MASK                      0x4000  /* JD2_DB */
626#define WM8993_JD2_DB_SHIFT                         14  /* JD2_DB */
627#define WM8993_JD2_DB_WIDTH                          1  /* JD2_DB */
628#define WM8993_WSEQ_DB                          0x2000  /* WSEQ_DB */
629#define WM8993_WSEQ_DB_MASK                     0x2000  /* WSEQ_DB */
630#define WM8993_WSEQ_DB_SHIFT                        13  /* WSEQ_DB */
631#define WM8993_WSEQ_DB_WIDTH                         1  /* WSEQ_DB */
632#define WM8993_TEMPOK_DB                        0x0800  /* TEMPOK_DB */
633#define WM8993_TEMPOK_DB_MASK                   0x0800  /* TEMPOK_DB */
634#define WM8993_TEMPOK_DB_SHIFT                      11  /* TEMPOK_DB */
635#define WM8993_TEMPOK_DB_WIDTH                       1  /* TEMPOK_DB */
636#define WM8993_JD1_SC_DB                        0x0400  /* JD1_SC_DB */
637#define WM8993_JD1_SC_DB_MASK                   0x0400  /* JD1_SC_DB */
638#define WM8993_JD1_SC_DB_SHIFT                      10  /* JD1_SC_DB */
639#define WM8993_JD1_SC_DB_WIDTH                       1  /* JD1_SC_DB */
640#define WM8993_JD1_DB                           0x0200  /* JD1_DB */
641#define WM8993_JD1_DB_MASK                      0x0200  /* JD1_DB */
642#define WM8993_JD1_DB_SHIFT                          9  /* JD1_DB */
643#define WM8993_JD1_DB_WIDTH                          1  /* JD1_DB */
644#define WM8993_FLL_LOCK_DB                      0x0100  /* FLL_LOCK_DB */
645#define WM8993_FLL_LOCK_DB_MASK                 0x0100  /* FLL_LOCK_DB */
646#define WM8993_FLL_LOCK_DB_SHIFT                     8  /* FLL_LOCK_DB */
647#define WM8993_FLL_LOCK_DB_WIDTH                     1  /* FLL_LOCK_DB */
648#define WM8993_GPI8_DB                          0x0080  /* GPI8_DB */
649#define WM8993_GPI8_DB_MASK                     0x0080  /* GPI8_DB */
650#define WM8993_GPI8_DB_SHIFT                         7  /* GPI8_DB */
651#define WM8993_GPI8_DB_WIDTH                         1  /* GPI8_DB */
652#define WM8993_GPI7_DB                          0x0008  /* GPI7_DB */
653#define WM8993_GPI7_DB_MASK                     0x0008  /* GPI7_DB */
654#define WM8993_GPI7_DB_SHIFT                         3  /* GPI7_DB */
655#define WM8993_GPI7_DB_WIDTH                         1  /* GPI7_DB */
656#define WM8993_GPIO1_DB                         0x0001  /* GPIO1_DB */
657#define WM8993_GPIO1_DB_MASK                    0x0001  /* GPIO1_DB */
658#define WM8993_GPIO1_DB_SHIFT                        0  /* GPIO1_DB */
659#define WM8993_GPIO1_DB_WIDTH                        1  /* GPIO1_DB */
660
661/*
662 * R22 (0x16) - GPIOCTRL 2
663 */
664#define WM8993_IM_JD2_EINT                      0x2000  /* IM_JD2_EINT */
665#define WM8993_IM_JD2_EINT_MASK                 0x2000  /* IM_JD2_EINT */
666#define WM8993_IM_JD2_EINT_SHIFT                    13  /* IM_JD2_EINT */
667#define WM8993_IM_JD2_EINT_WIDTH                     1  /* IM_JD2_EINT */
668#define WM8993_IM_JD2_SC_EINT                   0x1000  /* IM_JD2_SC_EINT */
669#define WM8993_IM_JD2_SC_EINT_MASK              0x1000  /* IM_JD2_SC_EINT */
670#define WM8993_IM_JD2_SC_EINT_SHIFT                 12  /* IM_JD2_SC_EINT */
671#define WM8993_IM_JD2_SC_EINT_WIDTH                  1  /* IM_JD2_SC_EINT */
672#define WM8993_IM_TEMPOK_EINT                   0x0800  /* IM_TEMPOK_EINT */
673#define WM8993_IM_TEMPOK_EINT_MASK              0x0800  /* IM_TEMPOK_EINT */
674#define WM8993_IM_TEMPOK_EINT_SHIFT                 11  /* IM_TEMPOK_EINT */
675#define WM8993_IM_TEMPOK_EINT_WIDTH                  1  /* IM_TEMPOK_EINT */
676#define WM8993_IM_JD1_SC_EINT                   0x0400  /* IM_JD1_SC_EINT */
677#define WM8993_IM_JD1_SC_EINT_MASK              0x0400  /* IM_JD1_SC_EINT */
678#define WM8993_IM_JD1_SC_EINT_SHIFT                 10  /* IM_JD1_SC_EINT */
679#define WM8993_IM_JD1_SC_EINT_WIDTH                  1  /* IM_JD1_SC_EINT */
680#define WM8993_IM_JD1_EINT                      0x0200  /* IM_JD1_EINT */
681#define WM8993_IM_JD1_EINT_MASK                 0x0200  /* IM_JD1_EINT */
682#define WM8993_IM_JD1_EINT_SHIFT                     9  /* IM_JD1_EINT */
683#define WM8993_IM_JD1_EINT_WIDTH                     1  /* IM_JD1_EINT */
684#define WM8993_IM_FLL_LOCK_EINT                 0x0100  /* IM_FLL_LOCK_EINT */
685#define WM8993_IM_FLL_LOCK_EINT_MASK            0x0100  /* IM_FLL_LOCK_EINT */
686#define WM8993_IM_FLL_LOCK_EINT_SHIFT                8  /* IM_FLL_LOCK_EINT */
687#define WM8993_IM_FLL_LOCK_EINT_WIDTH                1  /* IM_FLL_LOCK_EINT */
688#define WM8993_IM_GPI8_EINT                     0x0040  /* IM_GPI8_EINT */
689#define WM8993_IM_GPI8_EINT_MASK                0x0040  /* IM_GPI8_EINT */
690#define WM8993_IM_GPI8_EINT_SHIFT                    6  /* IM_GPI8_EINT */
691#define WM8993_IM_GPI8_EINT_WIDTH                    1  /* IM_GPI8_EINT */
692#define WM8993_IM_GPIO1_EINT                    0x0020  /* IM_GPIO1_EINT */
693#define WM8993_IM_GPIO1_EINT_MASK               0x0020  /* IM_GPIO1_EINT */
694#define WM8993_IM_GPIO1_EINT_SHIFT                   5  /* IM_GPIO1_EINT */
695#define WM8993_IM_GPIO1_EINT_WIDTH                   1  /* IM_GPIO1_EINT */
696#define WM8993_GPI8_ENA                         0x0010  /* GPI8_ENA */
697#define WM8993_GPI8_ENA_MASK                    0x0010  /* GPI8_ENA */
698#define WM8993_GPI8_ENA_SHIFT                        4  /* GPI8_ENA */
699#define WM8993_GPI8_ENA_WIDTH                        1  /* GPI8_ENA */
700#define WM8993_IM_GPI7_EINT                     0x0004  /* IM_GPI7_EINT */
701#define WM8993_IM_GPI7_EINT_MASK                0x0004  /* IM_GPI7_EINT */
702#define WM8993_IM_GPI7_EINT_SHIFT                    2  /* IM_GPI7_EINT */
703#define WM8993_IM_GPI7_EINT_WIDTH                    1  /* IM_GPI7_EINT */
704#define WM8993_IM_WSEQ_EINT                     0x0002  /* IM_WSEQ_EINT */
705#define WM8993_IM_WSEQ_EINT_MASK                0x0002  /* IM_WSEQ_EINT */
706#define WM8993_IM_WSEQ_EINT_SHIFT                    1  /* IM_WSEQ_EINT */
707#define WM8993_IM_WSEQ_EINT_WIDTH                    1  /* IM_WSEQ_EINT */
708#define WM8993_GPI7_ENA                         0x0001  /* GPI7_ENA */
709#define WM8993_GPI7_ENA_MASK                    0x0001  /* GPI7_ENA */
710#define WM8993_GPI7_ENA_SHIFT                        0  /* GPI7_ENA */
711#define WM8993_GPI7_ENA_WIDTH                        1  /* GPI7_ENA */
712
713/*
714 * R23 (0x17) - GPIO_POL
715 */
716#define WM8993_JD2_SC_POL                       0x8000  /* JD2_SC_POL */
717#define WM8993_JD2_SC_POL_MASK                  0x8000  /* JD2_SC_POL */
718#define WM8993_JD2_SC_POL_SHIFT                     15  /* JD2_SC_POL */
719#define WM8993_JD2_SC_POL_WIDTH                      1  /* JD2_SC_POL */
720#define WM8993_JD2_POL                          0x4000  /* JD2_POL */
721#define WM8993_JD2_POL_MASK                     0x4000  /* JD2_POL */
722#define WM8993_JD2_POL_SHIFT                        14  /* JD2_POL */
723#define WM8993_JD2_POL_WIDTH                         1  /* JD2_POL */
724#define WM8993_WSEQ_POL                         0x2000  /* WSEQ_POL */
725#define WM8993_WSEQ_POL_MASK                    0x2000  /* WSEQ_POL */
726#define WM8993_WSEQ_POL_SHIFT                       13  /* WSEQ_POL */
727#define WM8993_WSEQ_POL_WIDTH                        1  /* WSEQ_POL */
728#define WM8993_IRQ_POL                          0x1000  /* IRQ_POL */
729#define WM8993_IRQ_POL_MASK                     0x1000  /* IRQ_POL */
730#define WM8993_IRQ_POL_SHIFT                        12  /* IRQ_POL */
731#define WM8993_IRQ_POL_WIDTH                         1  /* IRQ_POL */
732#define WM8993_TEMPOK_POL                       0x0800  /* TEMPOK_POL */
733#define WM8993_TEMPOK_POL_MASK                  0x0800  /* TEMPOK_POL */
734#define WM8993_TEMPOK_POL_SHIFT                     11  /* TEMPOK_POL */
735#define WM8993_TEMPOK_POL_WIDTH                      1  /* TEMPOK_POL */
736#define WM8993_JD1_SC_POL                       0x0400  /* JD1_SC_POL */
737#define WM8993_JD1_SC_POL_MASK                  0x0400  /* JD1_SC_POL */
738#define WM8993_JD1_SC_POL_SHIFT                     10  /* JD1_SC_POL */
739#define WM8993_JD1_SC_POL_WIDTH                      1  /* JD1_SC_POL */
740#define WM8993_JD1_POL                          0x0200  /* JD1_POL */
741#define WM8993_JD1_POL_MASK                     0x0200  /* JD1_POL */
742#define WM8993_JD1_POL_SHIFT                         9  /* JD1_POL */
743#define WM8993_JD1_POL_WIDTH                         1  /* JD1_POL */
744#define WM8993_FLL_LOCK_POL                     0x0100  /* FLL_LOCK_POL */
745#define WM8993_FLL_LOCK_POL_MASK                0x0100  /* FLL_LOCK_POL */
746#define WM8993_FLL_LOCK_POL_SHIFT                    8  /* FLL_LOCK_POL */
747#define WM8993_FLL_LOCK_POL_WIDTH                    1  /* FLL_LOCK_POL */
748#define WM8993_GPI8_POL                         0x0080  /* GPI8_POL */
749#define WM8993_GPI8_POL_MASK                    0x0080  /* GPI8_POL */
750#define WM8993_GPI8_POL_SHIFT                        7  /* GPI8_POL */
751#define WM8993_GPI8_POL_WIDTH                        1  /* GPI8_POL */
752#define WM8993_GPI7_POL                         0x0040  /* GPI7_POL */
753#define WM8993_GPI7_POL_MASK                    0x0040  /* GPI7_POL */
754#define WM8993_GPI7_POL_SHIFT                        6  /* GPI7_POL */
755#define WM8993_GPI7_POL_WIDTH                        1  /* GPI7_POL */
756#define WM8993_GPIO1_POL                        0x0001  /* GPIO1_POL */
757#define WM8993_GPIO1_POL_MASK                   0x0001  /* GPIO1_POL */
758#define WM8993_GPIO1_POL_SHIFT                       0  /* GPIO1_POL */
759#define WM8993_GPIO1_POL_WIDTH                       1  /* GPIO1_POL */
760
761/*
762 * R24 (0x18) - Left Line Input 1&2 Volume
763 */
764#define WM8993_IN1_VU                           0x0100  /* IN1_VU */
765#define WM8993_IN1_VU_MASK                      0x0100  /* IN1_VU */
766#define WM8993_IN1_VU_SHIFT                          8  /* IN1_VU */
767#define WM8993_IN1_VU_WIDTH                          1  /* IN1_VU */
768#define WM8993_IN1L_MUTE                        0x0080  /* IN1L_MUTE */
769#define WM8993_IN1L_MUTE_MASK                   0x0080  /* IN1L_MUTE */
770#define WM8993_IN1L_MUTE_SHIFT                       7  /* IN1L_MUTE */
771#define WM8993_IN1L_MUTE_WIDTH                       1  /* IN1L_MUTE */
772#define WM8993_IN1L_ZC                          0x0040  /* IN1L_ZC */
773#define WM8993_IN1L_ZC_MASK                     0x0040  /* IN1L_ZC */
774#define WM8993_IN1L_ZC_SHIFT                         6  /* IN1L_ZC */
775#define WM8993_IN1L_ZC_WIDTH                         1  /* IN1L_ZC */
776#define WM8993_IN1L_VOL_MASK                    0x001F  /* IN1L_VOL - [4:0] */
777#define WM8993_IN1L_VOL_SHIFT                        0  /* IN1L_VOL - [4:0] */
778#define WM8993_IN1L_VOL_WIDTH                        5  /* IN1L_VOL - [4:0] */
779
780/*
781 * R25 (0x19) - Left Line Input 3&4 Volume
782 */
783#define WM8993_IN2_VU                           0x0100  /* IN2_VU */
784#define WM8993_IN2_VU_MASK                      0x0100  /* IN2_VU */
785#define WM8993_IN2_VU_SHIFT                          8  /* IN2_VU */
786#define WM8993_IN2_VU_WIDTH                          1  /* IN2_VU */
787#define WM8993_IN2L_MUTE                        0x0080  /* IN2L_MUTE */
788#define WM8993_IN2L_MUTE_MASK                   0x0080  /* IN2L_MUTE */
789#define WM8993_IN2L_MUTE_SHIFT                       7  /* IN2L_MUTE */
790#define WM8993_IN2L_MUTE_WIDTH                       1  /* IN2L_MUTE */
791#define WM8993_IN2L_ZC                          0x0040  /* IN2L_ZC */
792#define WM8993_IN2L_ZC_MASK                     0x0040  /* IN2L_ZC */
793#define WM8993_IN2L_ZC_SHIFT                         6  /* IN2L_ZC */
794#define WM8993_IN2L_ZC_WIDTH                         1  /* IN2L_ZC */
795#define WM8993_IN2L_VOL_MASK                    0x001F  /* IN2L_VOL - [4:0] */
796#define WM8993_IN2L_VOL_SHIFT                        0  /* IN2L_VOL - [4:0] */
797#define WM8993_IN2L_VOL_WIDTH                        5  /* IN2L_VOL - [4:0] */
798
799/*
800 * R26 (0x1A) - Right Line Input 1&2 Volume
801 */
802#define WM8993_IN1_VU                           0x0100  /* IN1_VU */
803#define WM8993_IN1_VU_MASK                      0x0100  /* IN1_VU */
804#define WM8993_IN1_VU_SHIFT                          8  /* IN1_VU */
805#define WM8993_IN1_VU_WIDTH                          1  /* IN1_VU */
806#define WM8993_IN1R_MUTE                        0x0080  /* IN1R_MUTE */
807#define WM8993_IN1R_MUTE_MASK                   0x0080  /* IN1R_MUTE */
808#define WM8993_IN1R_MUTE_SHIFT                       7  /* IN1R_MUTE */
809#define WM8993_IN1R_MUTE_WIDTH                       1  /* IN1R_MUTE */
810#define WM8993_IN1R_ZC                          0x0040  /* IN1R_ZC */
811#define WM8993_IN1R_ZC_MASK                     0x0040  /* IN1R_ZC */
812#define WM8993_IN1R_ZC_SHIFT                         6  /* IN1R_ZC */
813#define WM8993_IN1R_ZC_WIDTH                         1  /* IN1R_ZC */
814#define WM8993_IN1R_VOL_MASK    …

Large files files are truncated, but you can click here to view the full file