/sound/soc/fsl/fsl_ssi.c
C | 734 lines | 422 code | 97 blank | 215 comment | 59 complexity | 94456be0b9ff5f48c5c9598181dd596a MD5 | raw file
Possible License(s): CC-BY-SA-3.0, GPL-2.0, LGPL-2.0, AGPL-1.0
1/*
2 * Freescale SSI ALSA SoC Digital Audio Interface (DAI) driver
3 *
4 * Author: Timur Tabi <timur@freescale.com>
5 *
6 * Copyright 2007-2008 Freescale Semiconductor, Inc. This file is licensed
7 * under the terms of the GNU General Public License version 2. This
8 * program is licensed "as is" without any warranty of any kind, whether
9 * express or implied.
10 */
11
12#include <linux/init.h>
13#include <linux/module.h>
14#include <linux/interrupt.h>
15#include <linux/device.h>
16#include <linux/delay.h>
17#include <linux/slab.h>
18
19#include <sound/core.h>
20#include <sound/pcm.h>
21#include <sound/pcm_params.h>
22#include <sound/initval.h>
23#include <sound/soc.h>
24
25#include <asm/immap_86xx.h>
26
27#include "fsl_ssi.h"
28
29/**
30 * FSLSSI_I2S_RATES: sample rates supported by the I2S
31 *
32 * This driver currently only supports the SSI running in I2S slave mode,
33 * which means the codec determines the sample rate. Therefore, we tell
34 * ALSA that we support all rates and let the codec driver decide what rates
35 * are really supported.
36 */
37#define FSLSSI_I2S_RATES (SNDRV_PCM_RATE_5512 | SNDRV_PCM_RATE_8000_192000 | \
38 SNDRV_PCM_RATE_CONTINUOUS)
39
40/**
41 * FSLSSI_I2S_FORMATS: audio formats supported by the SSI
42 *
43 * This driver currently only supports the SSI running in I2S slave mode.
44 *
45 * The SSI has a limitation in that the samples must be in the same byte
46 * order as the host CPU. This is because when multiple bytes are written
47 * to the STX register, the bytes and bits must be written in the same
48 * order. The STX is a shift register, so all the bits need to be aligned
49 * (bit-endianness must match byte-endianness). Processors typically write
50 * the bits within a byte in the same order that the bytes of a word are
51 * written in. So if the host CPU is big-endian, then only big-endian
52 * samples will be written to STX properly.
53 */
54#ifdef __BIG_ENDIAN
55#define FSLSSI_I2S_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE | \
56 SNDRV_PCM_FMTBIT_S18_3BE | SNDRV_PCM_FMTBIT_S20_3BE | \
57 SNDRV_PCM_FMTBIT_S24_3BE | SNDRV_PCM_FMTBIT_S24_BE)
58#else
59#define FSLSSI_I2S_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE | \
60 SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S20_3LE | \
61 SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_LE)
62#endif
63
64/* SIER bitflag of interrupts to enable */
65#define SIER_FLAGS (CCSR_SSI_SIER_TFRC_EN | CCSR_SSI_SIER_TDMAE | \
66 CCSR_SSI_SIER_TIE | CCSR_SSI_SIER_TUE0_EN | \
67 CCSR_SSI_SIER_TUE1_EN | CCSR_SSI_SIER_RFRC_EN | \
68 CCSR_SSI_SIER_RDMAE | CCSR_SSI_SIER_RIE | \
69 CCSR_SSI_SIER_ROE0_EN | CCSR_SSI_SIER_ROE1_EN)
70
71/**
72 * fsl_ssi_private: per-SSI private data
73 *
74 * @name: short name for this device ("SSI0", "SSI1", etc)
75 * @ssi: pointer to the SSI's registers
76 * @ssi_phys: physical address of the SSI registers
77 * @irq: IRQ of this SSI
78 * @first_stream: pointer to the stream that was opened first
79 * @second_stream: pointer to second stream
80 * @dev: struct device pointer
81 * @playback: the number of playback streams opened
82 * @capture: the number of capture streams opened
83 * @asynchronous: 0=synchronous mode, 1=asynchronous mode
84 * @cpu_dai: the CPU DAI for this device
85 * @dev_attr: the sysfs device attribute structure
86 * @stats: SSI statistics
87 */
88struct fsl_ssi_private {
89 char name[8];
90 struct ccsr_ssi __iomem *ssi;
91 dma_addr_t ssi_phys;
92 unsigned int irq;
93 struct snd_pcm_substream *first_stream;
94 struct snd_pcm_substream *second_stream;
95 struct device *dev;
96 unsigned int playback;
97 unsigned int capture;
98 int asynchronous;
99 struct snd_soc_dai cpu_dai;
100 struct device_attribute dev_attr;
101
102 struct {
103 unsigned int rfrc;
104 unsigned int tfrc;
105 unsigned int cmdau;
106 unsigned int cmddu;
107 unsigned int rxt;
108 unsigned int rdr1;
109 unsigned int rdr0;
110 unsigned int tde1;
111 unsigned int tde0;
112 unsigned int roe1;
113 unsigned int roe0;
114 unsigned int tue1;
115 unsigned int tue0;
116 unsigned int tfs;
117 unsigned int rfs;
118 unsigned int tls;
119 unsigned int rls;
120 unsigned int rff1;
121 unsigned int rff0;
122 unsigned int tfe1;
123 unsigned int tfe0;
124 } stats;
125};
126
127/**
128 * fsl_ssi_isr: SSI interrupt handler
129 *
130 * Although it's possible to use the interrupt handler to send and receive
131 * data to/from the SSI, we use the DMA instead. Programming is more
132 * complicated, but the performance is much better.
133 *
134 * This interrupt handler is used only to gather statistics.
135 *
136 * @irq: IRQ of the SSI device
137 * @dev_id: pointer to the ssi_private structure for this SSI device
138 */
139static irqreturn_t fsl_ssi_isr(int irq, void *dev_id)
140{
141 struct fsl_ssi_private *ssi_private = dev_id;
142 struct ccsr_ssi __iomem *ssi = ssi_private->ssi;
143 irqreturn_t ret = IRQ_NONE;
144 __be32 sisr;
145 __be32 sisr2 = 0;
146
147 /* We got an interrupt, so read the status register to see what we
148 were interrupted for. We mask it with the Interrupt Enable register
149 so that we only check for events that we're interested in.
150 */
151 sisr = in_be32(&ssi->sisr) & SIER_FLAGS;
152
153 if (sisr & CCSR_SSI_SISR_RFRC) {
154 ssi_private->stats.rfrc++;
155 sisr2 |= CCSR_SSI_SISR_RFRC;
156 ret = IRQ_HANDLED;
157 }
158
159 if (sisr & CCSR_SSI_SISR_TFRC) {
160 ssi_private->stats.tfrc++;
161 sisr2 |= CCSR_SSI_SISR_TFRC;
162 ret = IRQ_HANDLED;
163 }
164
165 if (sisr & CCSR_SSI_SISR_CMDAU) {
166 ssi_private->stats.cmdau++;
167 ret = IRQ_HANDLED;
168 }
169
170 if (sisr & CCSR_SSI_SISR_CMDDU) {
171 ssi_private->stats.cmddu++;
172 ret = IRQ_HANDLED;
173 }
174
175 if (sisr & CCSR_SSI_SISR_RXT) {
176 ssi_private->stats.rxt++;
177 ret = IRQ_HANDLED;
178 }
179
180 if (sisr & CCSR_SSI_SISR_RDR1) {
181 ssi_private->stats.rdr1++;
182 ret = IRQ_HANDLED;
183 }
184
185 if (sisr & CCSR_SSI_SISR_RDR0) {
186 ssi_private->stats.rdr0++;
187 ret = IRQ_HANDLED;
188 }
189
190 if (sisr & CCSR_SSI_SISR_TDE1) {
191 ssi_private->stats.tde1++;
192 ret = IRQ_HANDLED;
193 }
194
195 if (sisr & CCSR_SSI_SISR_TDE0) {
196 ssi_private->stats.tde0++;
197 ret = IRQ_HANDLED;
198 }
199
200 if (sisr & CCSR_SSI_SISR_ROE1) {
201 ssi_private->stats.roe1++;
202 sisr2 |= CCSR_SSI_SISR_ROE1;
203 ret = IRQ_HANDLED;
204 }
205
206 if (sisr & CCSR_SSI_SISR_ROE0) {
207 ssi_private->stats.roe0++;
208 sisr2 |= CCSR_SSI_SISR_ROE0;
209 ret = IRQ_HANDLED;
210 }
211
212 if (sisr & CCSR_SSI_SISR_TUE1) {
213 ssi_private->stats.tue1++;
214 sisr2 |= CCSR_SSI_SISR_TUE1;
215 ret = IRQ_HANDLED;
216 }
217
218 if (sisr & CCSR_SSI_SISR_TUE0) {
219 ssi_private->stats.tue0++;
220 sisr2 |= CCSR_SSI_SISR_TUE0;
221 ret = IRQ_HANDLED;
222 }
223
224 if (sisr & CCSR_SSI_SISR_TFS) {
225 ssi_private->stats.tfs++;
226 ret = IRQ_HANDLED;
227 }
228
229 if (sisr & CCSR_SSI_SISR_RFS) {
230 ssi_private->stats.rfs++;
231 ret = IRQ_HANDLED;
232 }
233
234 if (sisr & CCSR_SSI_SISR_TLS) {
235 ssi_private->stats.tls++;
236 ret = IRQ_HANDLED;
237 }
238
239 if (sisr & CCSR_SSI_SISR_RLS) {
240 ssi_private->stats.rls++;
241 ret = IRQ_HANDLED;
242 }
243
244 if (sisr & CCSR_SSI_SISR_RFF1) {
245 ssi_private->stats.rff1++;
246 ret = IRQ_HANDLED;
247 }
248
249 if (sisr & CCSR_SSI_SISR_RFF0) {
250 ssi_private->stats.rff0++;
251 ret = IRQ_HANDLED;
252 }
253
254 if (sisr & CCSR_SSI_SISR_TFE1) {
255 ssi_private->stats.tfe1++;
256 ret = IRQ_HANDLED;
257 }
258
259 if (sisr & CCSR_SSI_SISR_TFE0) {
260 ssi_private->stats.tfe0++;
261 ret = IRQ_HANDLED;
262 }
263
264 /* Clear the bits that we set */
265 if (sisr2)
266 out_be32(&ssi->sisr, sisr2);
267
268 return ret;
269}
270
271/**
272 * fsl_ssi_startup: create a new substream
273 *
274 * This is the first function called when a stream is opened.
275 *
276 * If this is the first stream open, then grab the IRQ and program most of
277 * the SSI registers.
278 */
279static int fsl_ssi_startup(struct snd_pcm_substream *substream,
280 struct snd_soc_dai *dai)
281{
282 struct snd_soc_pcm_runtime *rtd = substream->private_data;
283 struct fsl_ssi_private *ssi_private = rtd->dai->cpu_dai->private_data;
284
285 /*
286 * If this is the first stream opened, then request the IRQ
287 * and initialize the SSI registers.
288 */
289 if (!ssi_private->playback && !ssi_private->capture) {
290 struct ccsr_ssi __iomem *ssi = ssi_private->ssi;
291 int ret;
292
293 ret = request_irq(ssi_private->irq, fsl_ssi_isr, 0,
294 ssi_private->name, ssi_private);
295 if (ret < 0) {
296 dev_err(substream->pcm->card->dev,
297 "could not claim irq %u\n", ssi_private->irq);
298 return ret;
299 }
300
301 /*
302 * Section 16.5 of the MPC8610 reference manual says that the
303 * SSI needs to be disabled before updating the registers we set
304 * here.
305 */
306 clrbits32(&ssi->scr, CCSR_SSI_SCR_SSIEN);
307
308 /*
309 * Program the SSI into I2S Slave Non-Network Synchronous mode.
310 * Also enable the transmit and receive FIFO.
311 *
312 * FIXME: Little-endian samples require a different shift dir
313 */
314 clrsetbits_be32(&ssi->scr,
315 CCSR_SSI_SCR_I2S_MODE_MASK | CCSR_SSI_SCR_SYN,
316 CCSR_SSI_SCR_TFR_CLK_DIS | CCSR_SSI_SCR_I2S_MODE_SLAVE
317 | (ssi_private->asynchronous ? 0 : CCSR_SSI_SCR_SYN));
318
319 out_be32(&ssi->stcr,
320 CCSR_SSI_STCR_TXBIT0 | CCSR_SSI_STCR_TFEN0 |
321 CCSR_SSI_STCR_TFSI | CCSR_SSI_STCR_TEFS |
322 CCSR_SSI_STCR_TSCKP);
323
324 out_be32(&ssi->srcr,
325 CCSR_SSI_SRCR_RXBIT0 | CCSR_SSI_SRCR_RFEN0 |
326 CCSR_SSI_SRCR_RFSI | CCSR_SSI_SRCR_REFS |
327 CCSR_SSI_SRCR_RSCKP);
328
329 /*
330 * The DC and PM bits are only used if the SSI is the clock
331 * master.
332 */
333
334 /* 4. Enable the interrupts and DMA requests */
335 out_be32(&ssi->sier, SIER_FLAGS);
336
337 /*
338 * Set the watermark for transmit FIFI 0 and receive FIFO 0. We
339 * don't use FIFO 1. Since the SSI only supports stereo, the
340 * watermark should never be an odd number.
341 */
342 out_be32(&ssi->sfcsr,
343 CCSR_SSI_SFCSR_TFWM0(6) | CCSR_SSI_SFCSR_RFWM0(2));
344
345 /*
346 * We keep the SSI disabled because if we enable it, then the
347 * DMA controller will start. It's not supposed to start until
348 * the SCR.TE (or SCR.RE) bit is set, but it does anyway. The
349 * DMA controller will transfer one "BWC" of data (i.e. the
350 * amount of data that the MR.BWC bits are set to). The reason
351 * this is bad is because at this point, the PCM driver has not
352 * finished initializing the DMA controller.
353 */
354 }
355
356 if (!ssi_private->first_stream)
357 ssi_private->first_stream = substream;
358 else {
359 /* This is the second stream open, so we need to impose sample
360 * rate and maybe sample size constraints. Note that this can
361 * cause a race condition if the second stream is opened before
362 * the first stream is fully initialized.
363 *
364 * We provide some protection by checking to make sure the first
365 * stream is initialized, but it's not perfect. ALSA sometimes
366 * re-initializes the driver with a different sample rate or
367 * size. If the second stream is opened before the first stream
368 * has received its final parameters, then the second stream may
369 * be constrained to the wrong sample rate or size.
370 *
371 * FIXME: This code does not handle opening and closing streams
372 * repeatedly. If you open two streams and then close the first
373 * one, you may not be able to open another stream until you
374 * close the second one as well.
375 */
376 struct snd_pcm_runtime *first_runtime =
377 ssi_private->first_stream->runtime;
378
379 if (!first_runtime->sample_bits) {
380 dev_err(substream->pcm->card->dev,
381 "set sample size in %s stream first\n",
382 substream->stream == SNDRV_PCM_STREAM_PLAYBACK
383 ? "capture" : "playback");
384 return -EAGAIN;
385 }
386
387 /* If we're in synchronous mode, then we need to constrain
388 * the sample size as well. We don't support independent sample
389 * rates in asynchronous mode.
390 */
391 if (!ssi_private->asynchronous)
392 snd_pcm_hw_constraint_minmax(substream->runtime,
393 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
394 first_runtime->sample_bits,
395 first_runtime->sample_bits);
396
397 ssi_private->second_stream = substream;
398 }
399
400 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
401 ssi_private->playback++;
402
403 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
404 ssi_private->capture++;
405
406 return 0;
407}
408
409/**
410 * fsl_ssi_hw_params - program the sample size
411 *
412 * Most of the SSI registers have been programmed in the startup function,
413 * but the word length must be programmed here. Unfortunately, programming
414 * the SxCCR.WL bits requires the SSI to be temporarily disabled. This can
415 * cause a problem with supporting simultaneous playback and capture. If
416 * the SSI is already playing a stream, then that stream may be temporarily
417 * stopped when you start capture.
418 *
419 * Note: The SxCCR.DC and SxCCR.PM bits are only used if the SSI is the
420 * clock master.
421 */
422static int fsl_ssi_hw_params(struct snd_pcm_substream *substream,
423 struct snd_pcm_hw_params *hw_params, struct snd_soc_dai *cpu_dai)
424{
425 struct fsl_ssi_private *ssi_private = cpu_dai->private_data;
426
427 if (substream == ssi_private->first_stream) {
428 struct ccsr_ssi __iomem *ssi = ssi_private->ssi;
429 unsigned int sample_size =
430 snd_pcm_format_width(params_format(hw_params));
431 u32 wl = CCSR_SSI_SxCCR_WL(sample_size);
432
433 /* The SSI should always be disabled at this points (SSIEN=0) */
434
435 /* In synchronous mode, the SSI uses STCCR for capture */
436 if ((substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ||
437 !ssi_private->asynchronous)
438 clrsetbits_be32(&ssi->stccr,
439 CCSR_SSI_SxCCR_WL_MASK, wl);
440 else
441 clrsetbits_be32(&ssi->srccr,
442 CCSR_SSI_SxCCR_WL_MASK, wl);
443 }
444
445 return 0;
446}
447
448/**
449 * fsl_ssi_trigger: start and stop the DMA transfer.
450 *
451 * This function is called by ALSA to start, stop, pause, and resume the DMA
452 * transfer of data.
453 *
454 * The DMA channel is in external master start and pause mode, which
455 * means the SSI completely controls the flow of data.
456 */
457static int fsl_ssi_trigger(struct snd_pcm_substream *substream, int cmd,
458 struct snd_soc_dai *dai)
459{
460 struct snd_soc_pcm_runtime *rtd = substream->private_data;
461 struct fsl_ssi_private *ssi_private = rtd->dai->cpu_dai->private_data;
462 struct ccsr_ssi __iomem *ssi = ssi_private->ssi;
463
464 switch (cmd) {
465 case SNDRV_PCM_TRIGGER_START:
466 clrbits32(&ssi->scr, CCSR_SSI_SCR_SSIEN);
467 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
468 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
469 setbits32(&ssi->scr,
470 CCSR_SSI_SCR_SSIEN | CCSR_SSI_SCR_TE);
471 else
472 setbits32(&ssi->scr,
473 CCSR_SSI_SCR_SSIEN | CCSR_SSI_SCR_RE);
474 break;
475
476 case SNDRV_PCM_TRIGGER_STOP:
477 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
478 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
479 clrbits32(&ssi->scr, CCSR_SSI_SCR_TE);
480 else
481 clrbits32(&ssi->scr, CCSR_SSI_SCR_RE);
482 break;
483
484 default:
485 return -EINVAL;
486 }
487
488 return 0;
489}
490
491/**
492 * fsl_ssi_shutdown: shutdown the SSI
493 *
494 * Shutdown the SSI if there are no other substreams open.
495 */
496static void fsl_ssi_shutdown(struct snd_pcm_substream *substream,
497 struct snd_soc_dai *dai)
498{
499 struct snd_soc_pcm_runtime *rtd = substream->private_data;
500 struct fsl_ssi_private *ssi_private = rtd->dai->cpu_dai->private_data;
501
502 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
503 ssi_private->playback--;
504
505 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
506 ssi_private->capture--;
507
508 if (ssi_private->first_stream == substream)
509 ssi_private->first_stream = ssi_private->second_stream;
510
511 ssi_private->second_stream = NULL;
512
513 /*
514 * If this is the last active substream, disable the SSI and release
515 * the IRQ.
516 */
517 if (!ssi_private->playback && !ssi_private->capture) {
518 struct ccsr_ssi __iomem *ssi = ssi_private->ssi;
519
520 clrbits32(&ssi->scr, CCSR_SSI_SCR_SSIEN);
521
522 free_irq(ssi_private->irq, ssi_private);
523 }
524}
525
526/**
527 * fsl_ssi_set_sysclk: set the clock frequency and direction
528 *
529 * This function is called by the machine driver to tell us what the clock
530 * frequency and direction are.
531 *
532 * Currently, we only support operating as a clock slave (SND_SOC_CLOCK_IN),
533 * and we don't care about the frequency. Return an error if the direction
534 * is not SND_SOC_CLOCK_IN.
535 *
536 * @clk_id: reserved, should be zero
537 * @freq: the frequency of the given clock ID, currently ignored
538 * @dir: SND_SOC_CLOCK_IN (clock slave) or SND_SOC_CLOCK_OUT (clock master)
539 */
540static int fsl_ssi_set_sysclk(struct snd_soc_dai *cpu_dai,
541 int clk_id, unsigned int freq, int dir)
542{
543
544 return (dir == SND_SOC_CLOCK_IN) ? 0 : -EINVAL;
545}
546
547/**
548 * fsl_ssi_set_fmt: set the serial format.
549 *
550 * This function is called by the machine driver to tell us what serial
551 * format to use.
552 *
553 * Currently, we only support I2S mode. Return an error if the format is
554 * not SND_SOC_DAIFMT_I2S.
555 *
556 * @format: one of SND_SOC_DAIFMT_xxx
557 */
558static int fsl_ssi_set_fmt(struct snd_soc_dai *cpu_dai, unsigned int format)
559{
560 return (format == SND_SOC_DAIFMT_I2S) ? 0 : -EINVAL;
561}
562
563/**
564 * fsl_ssi_dai_template: template CPU DAI for the SSI
565 */
566static struct snd_soc_dai_ops fsl_ssi_dai_ops = {
567 .startup = fsl_ssi_startup,
568 .hw_params = fsl_ssi_hw_params,
569 .shutdown = fsl_ssi_shutdown,
570 .trigger = fsl_ssi_trigger,
571 .set_sysclk = fsl_ssi_set_sysclk,
572 .set_fmt = fsl_ssi_set_fmt,
573};
574
575static struct snd_soc_dai fsl_ssi_dai_template = {
576 .playback = {
577 /* The SSI does not support monaural audio. */
578 .channels_min = 2,
579 .channels_max = 2,
580 .rates = FSLSSI_I2S_RATES,
581 .formats = FSLSSI_I2S_FORMATS,
582 },
583 .capture = {
584 .channels_min = 2,
585 .channels_max = 2,
586 .rates = FSLSSI_I2S_RATES,
587 .formats = FSLSSI_I2S_FORMATS,
588 },
589 .ops = &fsl_ssi_dai_ops,
590};
591
592/* Show the statistics of a flag only if its interrupt is enabled. The
593 * compiler will optimze this code to a no-op if the interrupt is not
594 * enabled.
595 */
596#define SIER_SHOW(flag, name) \
597 do { \
598 if (SIER_FLAGS & CCSR_SSI_SIER_##flag) \
599 length += sprintf(buf + length, #name "=%u\n", \
600 ssi_private->stats.name); \
601 } while (0)
602
603
604/**
605 * fsl_sysfs_ssi_show: display SSI statistics
606 *
607 * Display the statistics for the current SSI device. To avoid confusion,
608 * we only show those counts that are enabled.
609 */
610static ssize_t fsl_sysfs_ssi_show(struct device *dev,
611 struct device_attribute *attr, char *buf)
612{
613 struct fsl_ssi_private *ssi_private =
614 container_of(attr, struct fsl_ssi_private, dev_attr);
615 ssize_t length = 0;
616
617 SIER_SHOW(RFRC_EN, rfrc);
618 SIER_SHOW(TFRC_EN, tfrc);
619 SIER_SHOW(CMDAU_EN, cmdau);
620 SIER_SHOW(CMDDU_EN, cmddu);
621 SIER_SHOW(RXT_EN, rxt);
622 SIER_SHOW(RDR1_EN, rdr1);
623 SIER_SHOW(RDR0_EN, rdr0);
624 SIER_SHOW(TDE1_EN, tde1);
625 SIER_SHOW(TDE0_EN, tde0);
626 SIER_SHOW(ROE1_EN, roe1);
627 SIER_SHOW(ROE0_EN, roe0);
628 SIER_SHOW(TUE1_EN, tue1);
629 SIER_SHOW(TUE0_EN, tue0);
630 SIER_SHOW(TFS_EN, tfs);
631 SIER_SHOW(RFS_EN, rfs);
632 SIER_SHOW(TLS_EN, tls);
633 SIER_SHOW(RLS_EN, rls);
634 SIER_SHOW(RFF1_EN, rff1);
635 SIER_SHOW(RFF0_EN, rff0);
636 SIER_SHOW(TFE1_EN, tfe1);
637 SIER_SHOW(TFE0_EN, tfe0);
638
639 return length;
640}
641
642/**
643 * fsl_ssi_create_dai: create a snd_soc_dai structure
644 *
645 * This function is called by the machine driver to create a snd_soc_dai
646 * structure. The function creates an ssi_private object, which contains
647 * the snd_soc_dai. It also creates the sysfs statistics device.
648 */
649struct snd_soc_dai *fsl_ssi_create_dai(struct fsl_ssi_info *ssi_info)
650{
651 struct snd_soc_dai *fsl_ssi_dai;
652 struct fsl_ssi_private *ssi_private;
653 int ret = 0;
654 struct device_attribute *dev_attr;
655
656 ssi_private = kzalloc(sizeof(struct fsl_ssi_private), GFP_KERNEL);
657 if (!ssi_private) {
658 dev_err(ssi_info->dev, "could not allocate DAI object\n");
659 return NULL;
660 }
661 memcpy(&ssi_private->cpu_dai, &fsl_ssi_dai_template,
662 sizeof(struct snd_soc_dai));
663
664 fsl_ssi_dai = &ssi_private->cpu_dai;
665 dev_attr = &ssi_private->dev_attr;
666
667 sprintf(ssi_private->name, "ssi%u", (u8) ssi_info->id);
668 ssi_private->ssi = ssi_info->ssi;
669 ssi_private->ssi_phys = ssi_info->ssi_phys;
670 ssi_private->irq = ssi_info->irq;
671 ssi_private->dev = ssi_info->dev;
672 ssi_private->asynchronous = ssi_info->asynchronous;
673
674 dev_set_drvdata(ssi_private->dev, fsl_ssi_dai);
675
676 /* Initialize the the device_attribute structure */
677 dev_attr->attr.name = "ssi-stats";
678 dev_attr->attr.mode = S_IRUGO;
679 dev_attr->show = fsl_sysfs_ssi_show;
680
681 ret = device_create_file(ssi_private->dev, dev_attr);
682 if (ret) {
683 dev_err(ssi_info->dev, "could not create sysfs %s file\n",
684 ssi_private->dev_attr.attr.name);
685 kfree(fsl_ssi_dai);
686 return NULL;
687 }
688
689 fsl_ssi_dai->private_data = ssi_private;
690 fsl_ssi_dai->name = ssi_private->name;
691 fsl_ssi_dai->id = ssi_info->id;
692 fsl_ssi_dai->dev = ssi_info->dev;
693 fsl_ssi_dai->symmetric_rates = 1;
694
695 ret = snd_soc_register_dai(fsl_ssi_dai);
696 if (ret != 0) {
697 dev_err(ssi_info->dev, "failed to register DAI: %d\n", ret);
698 kfree(fsl_ssi_dai);
699 return NULL;
700 }
701
702 return fsl_ssi_dai;
703}
704EXPORT_SYMBOL_GPL(fsl_ssi_create_dai);
705
706/**
707 * fsl_ssi_destroy_dai: destroy the snd_soc_dai object
708 *
709 * This function undoes the operations of fsl_ssi_create_dai()
710 */
711void fsl_ssi_destroy_dai(struct snd_soc_dai *fsl_ssi_dai)
712{
713 struct fsl_ssi_private *ssi_private =
714 container_of(fsl_ssi_dai, struct fsl_ssi_private, cpu_dai);
715
716 device_remove_file(ssi_private->dev, &ssi_private->dev_attr);
717
718 snd_soc_unregister_dai(&ssi_private->cpu_dai);
719
720 kfree(ssi_private);
721}
722EXPORT_SYMBOL_GPL(fsl_ssi_destroy_dai);
723
724static int __init fsl_ssi_init(void)
725{
726 printk(KERN_INFO "Freescale Synchronous Serial Interface (SSI) ASoC Driver\n");
727
728 return 0;
729}
730module_init(fsl_ssi_init);
731
732MODULE_AUTHOR("Timur Tabi <timur@freescale.com>");
733MODULE_DESCRIPTION("Freescale Synchronous Serial Interface (SSI) ASoC Driver");
734MODULE_LICENSE("GPL");