/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt
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1GPIO controllers on MPC8xxx SoCs
2
3This is for the non-QE/CPM/GUTs GPIO controllers as found on
48349, 8572, 8610 and compatible.
5
6Every GPIO controller node must have #gpio-cells property defined,
7this information will be used to translate gpio-specifiers.
8
9Required properties:
10- compatible : "fsl,<CHIP>-gpio" followed by "fsl,mpc8349-gpio" for
11 83xx, "fsl,mpc8572-gpio" for 85xx and "fsl,mpc8610-gpio" for 86xx.
12- #gpio-cells : Should be two. The first cell is the pin number and the
13 second cell is used to specify optional parameters (currently unused).
14 - interrupts : Interrupt mapping for GPIO IRQ (currently unused).
15 - interrupt-parent : Phandle for the interrupt controller that
16 services interrupts for this device.
17- gpio-controller : Marks the port as GPIO controller.
18
19Example of gpio-controller nodes for a MPC8347 SoC:
20
21 gpio1: gpio-controller@c00 {
22 #gpio-cells = <2>;
23 compatible = "fsl,mpc8347-gpio", "fsl,mpc8349-gpio";
24 reg = <0xc00 0x100>;
25 interrupts = <74 0x8>;
26 interrupt-parent = <&ipic>;
27 gpio-controller;
28 };
29
30 gpio2: gpio-controller@d00 {
31 #gpio-cells = <2>;
32 compatible = "fsl,mpc8347-gpio", "fsl,mpc8349-gpio";
33 reg = <0xd00 0x100>;
34 interrupts = <75 0x8>;
35 interrupt-parent = <&ipic>;
36 gpio-controller;
37 };
38
39See booting-without-of.txt for details of how to specify GPIO
40information for devices.