/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt

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  1. GPIO controllers on MPC8xxx SoCs
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  2. 

  3. This is for the non-QE/CPM/GUTs GPIO controllers as found on
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  4. 8349, 8572, 8610 and compatible.
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  5. 

  6. Every GPIO controller node must have #gpio-cells property defined,
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  7. this information will be used to translate gpio-specifiers.
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  8. 

  9. Required properties:
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  10. - compatible : "fsl,<CHIP>-gpio" followed by "fsl,mpc8349-gpio" for
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  11.   83xx, "fsl,mpc8572-gpio" for 85xx and "fsl,mpc8610-gpio" for 86xx.
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  12. - #gpio-cells : Should be two. The first cell is the pin number and the
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  13.   second cell is used to specify optional parameters (currently unused).
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  14.  - interrupts : Interrupt mapping for GPIO IRQ (currently unused).
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  15.  - interrupt-parent : Phandle for the interrupt controller that
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  16.    services interrupts for this device.
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  17. - gpio-controller : Marks the port as GPIO controller.
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  18. 

  19. Example of gpio-controller nodes for a MPC8347 SoC:
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  20. 

  21. 	gpio1: gpio-controller@c00 {
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  22. 		#gpio-cells = <2>;
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  23. 		compatible = "fsl,mpc8347-gpio", "fsl,mpc8349-gpio";
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  24. 		reg = <0xc00 0x100>;
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  25. 		interrupts = <74 0x8>;
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  26. 		interrupt-parent = <&ipic>;
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  27. 		gpio-controller;
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  28. 	};
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  29. 

  30. 	gpio2: gpio-controller@d00 {
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  31. 		#gpio-cells = <2>;
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  32. 		compatible = "fsl,mpc8347-gpio", "fsl,mpc8349-gpio";
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  33. 		reg = <0xd00 0x100>;
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  34. 		interrupts = <75 0x8>;
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  35. 		interrupt-parent = <&ipic>;
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  36. 		gpio-controller;
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  37. 	};
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  38. 

  39. See booting-without-of.txt for details of how to specify GPIO
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  40. information for devices.
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