/drivers/media/video/gspca/stv06xx/stv06xx_hdcs.h

https://bitbucket.org/abioy/linux · C Header · 198 lines · 106 code · 23 blank · 69 comment · 0 complexity · eb4415c0d29a46521e5211969a44d5af MD5 · raw file

  1. /*
  2. * Copyright (c) 2001 Jean-Fredric Clere, Nikolas Zimmermann, Georg Acher
  3. * Mark Cave-Ayland, Carlo E Prelz, Dick Streefland
  4. * Copyright (c) 2002, 2003 Tuukka Toivonen
  5. * Copyright (c) 2008 Erik Andrén
  6. * Copyright (c) 2008 Chia-I Wu
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. * P/N 861037: Sensor HDCS1000 ASIC STV0600
  23. * P/N 861050-0010: Sensor HDCS1000 ASIC STV0600
  24. * P/N 861050-0020: Sensor Photobit PB100 ASIC STV0600-1 - QuickCam Express
  25. * P/N 861055: Sensor ST VV6410 ASIC STV0610 - LEGO cam
  26. * P/N 861075-0040: Sensor HDCS1000 ASIC
  27. * P/N 961179-0700: Sensor ST VV6410 ASIC STV0602 - Dexxa WebCam USB
  28. * P/N 861040-0000: Sensor ST VV6410 ASIC STV0610 - QuickCam Web
  29. */
  30. #ifndef STV06XX_HDCS_H_
  31. #define STV06XX_HDCS_H_
  32. #include "stv06xx_sensor.h"
  33. #define HDCS_REG_CONFIG(sd) (IS_1020(sd) ? HDCS20_CONFIG : HDCS00_CONFIG)
  34. #define HDCS_REG_CONTROL(sd) (IS_1020(sd) ? HDCS20_CONTROL : HDCS00_CONTROL)
  35. #define HDCS_1X00_DEF_WIDTH 360
  36. #define HDCS_1X00_DEF_HEIGHT 296
  37. #define HDCS_1020_DEF_WIDTH 352
  38. #define HDCS_1020_DEF_HEIGHT 292
  39. #define HDCS_1020_BOTTOM_Y_SKIP 4
  40. #define HDCS_CLK_FREQ_MHZ 25
  41. #define HDCS_ADC_START_SIG_DUR 3
  42. /* LSB bit of I2C or register address signifies write (0) or read (1) */
  43. /* I2C Registers common for both HDCS-1000/1100 and HDCS-1020 */
  44. /* Identifications Register */
  45. #define HDCS_IDENT (0x00 << 1)
  46. /* Status Register */
  47. #define HDCS_STATUS (0x01 << 1)
  48. /* Interrupt Mask Register */
  49. #define HDCS_IMASK (0x02 << 1)
  50. /* Pad Control Register */
  51. #define HDCS_PCTRL (0x03 << 1)
  52. /* Pad Drive Control Register */
  53. #define HDCS_PDRV (0x04 << 1)
  54. /* Interface Control Register */
  55. #define HDCS_ICTRL (0x05 << 1)
  56. /* Interface Timing Register */
  57. #define HDCS_ITMG (0x06 << 1)
  58. /* Baud Fraction Register */
  59. #define HDCS_BFRAC (0x07 << 1)
  60. /* Baud Rate Register */
  61. #define HDCS_BRATE (0x08 << 1)
  62. /* ADC Control Register */
  63. #define HDCS_ADCCTRL (0x09 << 1)
  64. /* First Window Row Register */
  65. #define HDCS_FWROW (0x0a << 1)
  66. /* First Window Column Register */
  67. #define HDCS_FWCOL (0x0b << 1)
  68. /* Last Window Row Register */
  69. #define HDCS_LWROW (0x0c << 1)
  70. /* Last Window Column Register */
  71. #define HDCS_LWCOL (0x0d << 1)
  72. /* Timing Control Register */
  73. #define HDCS_TCTRL (0x0e << 1)
  74. /* PGA Gain Register: Even Row, Even Column */
  75. #define HDCS_ERECPGA (0x0f << 1)
  76. /* PGA Gain Register: Even Row, Odd Column */
  77. #define HDCS_EROCPGA (0x10 << 1)
  78. /* PGA Gain Register: Odd Row, Even Column */
  79. #define HDCS_ORECPGA (0x11 << 1)
  80. /* PGA Gain Register: Odd Row, Odd Column */
  81. #define HDCS_OROCPGA (0x12 << 1)
  82. /* Row Exposure Low Register */
  83. #define HDCS_ROWEXPL (0x13 << 1)
  84. /* Row Exposure High Register */
  85. #define HDCS_ROWEXPH (0x14 << 1)
  86. /* I2C Registers only for HDCS-1000/1100 */
  87. /* Sub-Row Exposure Low Register */
  88. #define HDCS00_SROWEXPL (0x15 << 1)
  89. /* Sub-Row Exposure High Register */
  90. #define HDCS00_SROWEXPH (0x16 << 1)
  91. /* Configuration Register */
  92. #define HDCS00_CONFIG (0x17 << 1)
  93. /* Control Register */
  94. #define HDCS00_CONTROL (0x18 << 1)
  95. /* I2C Registers only for HDCS-1020 */
  96. /* Sub-Row Exposure Register */
  97. #define HDCS20_SROWEXP (0x15 << 1)
  98. /* Error Control Register */
  99. #define HDCS20_ERROR (0x16 << 1)
  100. /* Interface Timing 2 Register */
  101. #define HDCS20_ITMG2 (0x17 << 1)
  102. /* Interface Control 2 Register */
  103. #define HDCS20_ICTRL2 (0x18 << 1)
  104. /* Horizontal Blank Register */
  105. #define HDCS20_HBLANK (0x19 << 1)
  106. /* Vertical Blank Register */
  107. #define HDCS20_VBLANK (0x1a << 1)
  108. /* Configuration Register */
  109. #define HDCS20_CONFIG (0x1b << 1)
  110. /* Control Register */
  111. #define HDCS20_CONTROL (0x1c << 1)
  112. #define HDCS_RUN_ENABLE (1 << 2)
  113. #define HDCS_SLEEP_MODE (1 << 1)
  114. #define HDCS_DEFAULT_EXPOSURE 48
  115. #define HDCS_DEFAULT_GAIN 128
  116. static int hdcs_probe_1x00(struct sd *sd);
  117. static int hdcs_probe_1020(struct sd *sd);
  118. static int hdcs_start(struct sd *sd);
  119. static int hdcs_init(struct sd *sd);
  120. static int hdcs_stop(struct sd *sd);
  121. static int hdcs_dump(struct sd *sd);
  122. static void hdcs_disconnect(struct sd *sd);
  123. static int hdcs_get_exposure(struct gspca_dev *gspca_dev, __s32 *val);
  124. static int hdcs_set_exposure(struct gspca_dev *gspca_dev, __s32 val);
  125. static int hdcs_set_gain(struct gspca_dev *gspca_dev, __s32 val);
  126. static int hdcs_get_gain(struct gspca_dev *gspca_dev, __s32 *val);
  127. const struct stv06xx_sensor stv06xx_sensor_hdcs1x00 = {
  128. .name = "HP HDCS-1000/1100",
  129. .i2c_flush = 0,
  130. .i2c_addr = (0x55 << 1),
  131. .i2c_len = 1,
  132. .init = hdcs_init,
  133. .probe = hdcs_probe_1x00,
  134. .start = hdcs_start,
  135. .stop = hdcs_stop,
  136. .disconnect = hdcs_disconnect,
  137. .dump = hdcs_dump,
  138. };
  139. const struct stv06xx_sensor stv06xx_sensor_hdcs1020 = {
  140. .name = "HDCS-1020",
  141. .i2c_flush = 0,
  142. .i2c_addr = (0x55 << 1),
  143. .i2c_len = 1,
  144. .init = hdcs_init,
  145. .probe = hdcs_probe_1020,
  146. .start = hdcs_start,
  147. .stop = hdcs_stop,
  148. .dump = hdcs_dump,
  149. };
  150. static const u16 stv_bridge_init[][2] = {
  151. {STV_ISO_ENABLE, 0},
  152. {STV_REG23, 0},
  153. {STV_REG00, 0x1d},
  154. {STV_REG01, 0xb5},
  155. {STV_REG02, 0xa8},
  156. {STV_REG03, 0x95},
  157. {STV_REG04, 0x07},
  158. {STV_SCAN_RATE, 0x20},
  159. {STV_ISO_SIZE_L, 847},
  160. {STV_Y_CTRL, 0x01},
  161. {STV_X_CTRL, 0x0a}
  162. };
  163. static const u8 stv_sensor_init[][2] = {
  164. /* Clear status (writing 1 will clear the corresponding status bit) */
  165. {HDCS_STATUS, BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1)},
  166. /* Disable all interrupts */
  167. {HDCS_IMASK, 0x00},
  168. {HDCS_PCTRL, BIT(6) | BIT(5) | BIT(1) | BIT(0)},
  169. {HDCS_PDRV, 0x00},
  170. {HDCS_ICTRL, BIT(5)},
  171. {HDCS_ITMG, BIT(4) | BIT(1)},
  172. /* ADC output resolution to 10 bits */
  173. {HDCS_ADCCTRL, 10}
  174. };
  175. #endif